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deps: bump pliron to master (no_std/hashbrown) + AttributeDict encapsulation sweep #175

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Merged
nihalpasham merged 3 commits into from
Jun 12, 2026
Merged

deps: bump pliron to master (no_std/hashbrown) + AttributeDict encapsulation sweep #175

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c1ed5fb
deps: bump pliron rev to af1b7d0 (no_std support)
nihalpasham Jun 12, 2026
fec343c
refactor: route keyed AttributeDict access through the wrapper API
nihalpasham Jun 12, 2026
4d70eb6
test(mir-lower): drop stale &mut now that set_operand_segment_sizes t…
nihalpasham Jun 12, 2026
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51 changes: 47 additions & 4 deletions Cargo.lock
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6 changes: 3 additions & 3 deletions Cargo.toml
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Expand Up @@ -43,9 +43,9 @@ repository = "https://github.com/NVlabs/cuda-oxide.git"
# cuda-oxide consumes the dialect modeling only, not the FFI bridge.
# `crates/rustc-codegen-cuda/Cargo.toml` MUST stay on this same rev, or pliron
# resolves to two distinct crates and types stop unifying.
pliron = { git = "https://github.com/pliron-org/pliron", rev = "fed4e6f848bd726a4f2deb51c5021760ef382aec" }
pliron-derive = { git = "https://github.com/pliron-org/pliron", rev = "fed4e6f848bd726a4f2deb51c5021760ef382aec" }
pliron-llvm = { git = "https://github.com/pliron-org/pliron", rev = "fed4e6f848bd726a4f2deb51c5021760ef382aec", default-features = false }
pliron = { git = "https://github.com/pliron-org/pliron", rev = "af1b7d07dda91dad140c1df1df665754cd1646e5" }
pliron-derive = { git = "https://github.com/pliron-org/pliron", rev = "af1b7d07dda91dad140c1df1df665754cd1646e5" }
pliron-llvm = { git = "https://github.com/pliron-org/pliron", rev = "af1b7d07dda91dad140c1df1df665754cd1646e5", default-features = false }

# Internal crates
llvm-export = { path = "crates/llvm-export" }
Expand Down
80 changes: 33 additions & 47 deletions crates/llvm-export/src/export/function.rs
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Expand Up @@ -121,8 +121,10 @@ impl<'a> ModuleExportState<'a> {

// Check for kernel attribute
let kernel_key: pliron::identifier::Identifier = "gpu_kernel".try_into().unwrap();
let attrs = &func.get_operation().deref(self.ctx).attributes.0;
let is_kernel = attrs.contains_key(&kernel_key);
let attrs = &func.get_operation().deref(self.ctx).attributes;
let is_kernel = attrs
.get::<pliron::builtin::attributes::StringAttr>(&kernel_key)
.is_some();

// Track ALL kernels if backend requires annotations for every kernel
if is_kernel && self.track_all_kernels {
Expand All @@ -141,55 +143,39 @@ impl<'a> ModuleExportState<'a> {
// Check for cluster dimension attributes (from #[cluster(x,y,z)])
// These will be emitted as nvvm.annotations metadata
if is_kernel {
let x_key: pliron::identifier::Identifier = "cluster_dim_x".try_into().unwrap();
let y_key: pliron::identifier::Identifier = "cluster_dim_y".try_into().unwrap();
let z_key: pliron::identifier::Identifier = "cluster_dim_z".try_into().unwrap();

if let (Some(x_attr), Some(y_attr), Some(z_attr)) =
(attrs.get(&x_key), attrs.get(&y_key), attrs.get(&z_key))
{
use pliron::attribute::AttrObj;
let get_int = |attr: &AttrObj| -> Option<u32> {
attr.downcast_ref::<pliron::builtin::attributes::IntegerAttr>()
.map(|int_attr| int_attr.value().to_u32())
};

if let (Some(dim_x), Some(dim_y), Some(dim_z)) =
(get_int(x_attr), get_int(y_attr), get_int(z_attr))
{
self.cluster_kernels.push(KernelClusterConfig {
name: fixed_func_name.clone(),
dim_x,
dim_y,
dim_z,
});
}
let get_int = |key: &str| -> Option<u32> {
let key: pliron::identifier::Identifier = key.try_into().unwrap();
attrs
.get::<pliron::builtin::attributes::IntegerAttr>(&key)
.map(|int_attr| int_attr.value().to_u32())
};

if let (Some(dim_x), Some(dim_y), Some(dim_z)) = (
get_int("cluster_dim_x"),
get_int("cluster_dim_y"),
get_int("cluster_dim_z"),
) {
self.cluster_kernels.push(KernelClusterConfig {
name: fixed_func_name.clone(),
dim_x,
dim_y,
dim_z,
});
}

// Check for launch bounds attributes (from #[launch_bounds(max, min)])
// These will be emitted as nvvm.annotations metadata for maxntid and minctasm
let maxntid_key: pliron::identifier::Identifier = "maxntid".try_into().unwrap();
let minctasm_key: pliron::identifier::Identifier = "minctasm".try_into().unwrap();

if let Some(max_attr) = attrs.get(&maxntid_key) {
use pliron::attribute::AttrObj;
let get_int = |attr: &AttrObj| -> Option<u32> {
attr.downcast_ref::<pliron::builtin::attributes::IntegerAttr>()
.map(|int_attr| int_attr.value().to_u32())
};

if let Some(max_threads) = get_int(max_attr) {
let min_blocks = attrs.get(&minctasm_key).and_then(get_int);
self.launch_bounds_kernels.push(KernelLaunchBounds {
name: fixed_func_name.clone(),
max_threads,
min_blocks: if min_blocks == Some(0) {
None
} else {
min_blocks
},
});
}
if let Some(max_threads) = get_int("maxntid") {
let min_blocks = get_int("minctasm");
self.launch_bounds_kernels.push(KernelLaunchBounds {
name: fixed_func_name.clone(),
max_threads,
min_blocks: if min_blocks == Some(0) {
None
} else {
min_blocks
},
});
}
}

Expand Down
9 changes: 2 additions & 7 deletions crates/llvm-export/src/export/ops.rs
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Expand Up @@ -896,16 +896,11 @@ impl<'a> ModuleExportState<'a> {
let res_name = value_names.get(&res).unwrap();
let val = op_ref.get_operand(0);

// Manual attribute access since helper is missing
let nneg_key: pliron::identifier::Identifier = "llvm_nneg_flag".try_into().unwrap();
let nneg = op_ref
.attributes
.0
.get(&nneg_key)
.and_then(|attr| {
attr.downcast_ref::<pliron::builtin::attributes::BoolAttr>()
.map(|b| bool::from(b.clone()))
})
.get::<pliron::builtin::attributes::BoolAttr>(&nneg_key)
.map(|b| bool::from(b.clone()))
.unwrap_or(false);

write!(output, " {res_name} = zext ").unwrap();
Expand Down
13 changes: 6 additions & 7 deletions crates/mir-importer/src/translator/body.rs
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Expand Up @@ -449,8 +449,7 @@ pub fn translate_body(
.get_operation()
.deref_mut(ctx)
.attributes
.0
.insert(key, kernel_attr.into());
.set(key, kernel_attr);

// Detect compile-time cluster configuration from #[cluster(x,y,z)] attribute
if let Some(cluster_dims) = detect_cluster_config(body) {
Expand Down Expand Up @@ -478,9 +477,9 @@ pub fn translate_body(
let z_key: Identifier = "cluster_dim_z".try_into().unwrap();

let mut op_mut = mir_func_op.get_operation().deref_mut(ctx);
op_mut.attributes.0.insert(x_key, x_attr.into());
op_mut.attributes.0.insert(y_key, y_attr.into());
op_mut.attributes.0.insert(z_key, z_attr.into());
op_mut.attributes.set(x_key, x_attr);
op_mut.attributes.set(y_key, y_attr);
op_mut.attributes.set(z_key, z_attr);

if std::env::var("CUDA_OXIDE_VERBOSE").is_ok() {
eprintln!(
Expand Down Expand Up @@ -508,14 +507,14 @@ pub fn translate_body(
let max_key: Identifier = "maxntid".try_into().unwrap();

let mut op_mut = mir_func_op.get_operation().deref_mut(ctx);
op_mut.attributes.0.insert(max_key, max_attr.into());
op_mut.attributes.set(max_key, max_attr);

// Only add minctasm if it's non-zero (specified)
if launch_bounds.min_blocks > 0 {
let apint_min = APInt::from_u32(launch_bounds.min_blocks, width);
let min_attr = IntegerAttr::new(u32_ty, apint_min);
let min_key: Identifier = "minctasm".try_into().unwrap();
op_mut.attributes.0.insert(min_key, min_attr.into());
op_mut.attributes.set(min_key, min_attr);
}

if std::env::var("CUDA_OXIDE_VERBOSE").is_ok() {
Expand Down
4 changes: 2 additions & 2 deletions crates/mir-importer/src/translator/terminator/helpers.rs
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Expand Up @@ -160,9 +160,9 @@ pub fn emit_function_call(
call_op.deref_mut(ctx).set_loc(loc.clone());

let callee_attr = StringAttr::new(callee_name.into());
call_op.deref_mut(ctx).attributes.0.insert(
call_op.deref_mut(ctx).attributes.set(
pliron::identifier::Identifier::try_from("callee").unwrap(),
callee_attr.into(),
callee_attr,
);

let call_op = if let Some(prev) = last_op {
Expand Down
6 changes: 2 additions & 4 deletions crates/mir-importer/src/translator/terminator/intrinsics/float_math.rs
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Expand Up @@ -418,8 +418,7 @@ pub fn emit_sincos(
sin_op
.deref_mut(ctx)
.attributes
.0
.insert(callee_id.clone(), StringAttr::new(sin_callee.into()).into());
.set(callee_id.clone(), StringAttr::new(sin_callee.into()));
if let Some(prev) = last_op {
sin_op.insert_after(ctx, prev);
} else {
Expand All @@ -440,8 +439,7 @@ pub fn emit_sincos(
cos_op
.deref_mut(ctx)
.attributes
.0
.insert(callee_id, StringAttr::new(cos_callee.into()).into());
.set(callee_id, StringAttr::new(cos_callee.into()));
cos_op.insert_after(ctx, sin_op);
let cos_val = cos_op.deref(ctx).get_result(0);

Expand Down
11 changes: 5 additions & 6 deletions crates/mir-importer/src/translator/terminator/mod.rs
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Expand Up @@ -1336,10 +1336,10 @@ fn translate_closure_call(
let bool_type = IntegerType::get(ctx, 1, Signedness::Unsigned);
let mutable_attr =
IntegerAttr::new(bool_type, APInt::from_i64(1, NonZeroUsize::new(1).unwrap()));
ref_op.deref_mut(ctx).attributes.0.insert(
Identifier::try_from("mutable").unwrap(),
mutable_attr.into(),
);
ref_op
.deref_mut(ctx)
.attributes
.set(Identifier::try_from("mutable").unwrap(), mutable_attr);

// Insert after previous op
if let Some(prev) = last_op {
Expand Down Expand Up @@ -1417,8 +1417,7 @@ fn translate_closure_call(
call_op
.deref_mut(ctx)
.attributes
.0
.insert(Identifier::try_from("callee").unwrap(), callee_attr.into());
.set(Identifier::try_from("callee").unwrap(), callee_attr);

// Insert the call
let call_op = if let Some(prev) = last_op {
Expand Down
10 changes: 5 additions & 5 deletions crates/mir-lower/src/convert/ops/arithmetic.rs
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Expand Up @@ -114,7 +114,7 @@ fn is_signed_int_op(
fn add_fastmath_flags(ctx: &mut Context, op: Ptr<Operation>) {
let flags = FastmathFlagsAttr::default();
let key: pliron::identifier::Identifier = "llvm_fast_math_flags".try_into().unwrap();
op.deref_mut(ctx).attributes.0.insert(key, flags.into());
op.deref_mut(ctx).attributes.set(key, flags);
}

// ============================================================================
Expand Down Expand Up @@ -442,10 +442,10 @@ where
let cast_op = if lhs_width > rhs_width {
let zext = llvm::ZExtOp::new(ctx, rhs, lhs_ty);
let nneg_key: pliron::identifier::Identifier = "llvm_nneg_flag".try_into().unwrap();
zext.get_operation().deref_mut(ctx).attributes.0.insert(
nneg_key,
pliron::builtin::attributes::BoolAttr::new(false).into(),
);
zext.get_operation()
.deref_mut(ctx)
.attributes
.set(nneg_key, pliron::builtin::attributes::BoolAttr::new(false));
zext.get_operation()
} else {
llvm::TruncOp::new(ctx, rhs, lhs_ty).get_operation()
Expand Down
8 changes: 4 additions & 4 deletions crates/mir-lower/src/convert/ops/call.rs
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Expand Up @@ -983,10 +983,10 @@ fn cast_integer_value_to_type(
let cast_op = if source_width < target_width {
let zext = llvm::ZExtOp::new(ctx, value, target_ty);
let nneg_key: pliron::identifier::Identifier = "llvm_nneg_flag".try_into().unwrap();
zext.get_operation().deref_mut(ctx).attributes.0.insert(
nneg_key,
pliron::builtin::attributes::BoolAttr::new(false).into(),
);
zext.get_operation()
.deref_mut(ctx)
.attributes
.set(nneg_key, pliron::builtin::attributes::BoolAttr::new(false));
zext.get_operation()
} else {
llvm::TruncOp::new(ctx, value, target_ty).get_operation()
Expand Down
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