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Full debug: describe static shared-memory objects (AS3) #1121

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Description

@nihalpasham

What problem does this solve?

A function-local static mut TILE: SharedArray<T, N> materializes real AS3
backing storage, but its source name reaches LLVM only as a diagnostic comment.
No global DWARF describes the object, so cuda-gdb reports No symbol 'TILE'.

This is a child of #226 and should build on the common global-DI plumbing from
the AS1 device-global task.

Proposed behavior

  • Join a named shared static to its allocation using the exact opaque mangled
    static identity, while carrying its human name/scope/span separately. Do not
    use StaticDef::name(): two block-local same-leaf statics can share that
    spelling.
  • Carry the source identity, owning device function, declaration span, and
    physical layout to the generated @__shared_mem_N allocation.
  • Scope the global DIE to the owning function's single DISubprogram. A flat
    or namespace-only scope does not make TILE visible to info locals.
  • Emit and retain an AS3 DIGlobalVariableExpression with NVPTX's explicit
    shared address-class expression:
    DIExpression(DW_OP_constu, 8, DW_OP_swap, DW_OP_xderef).
  • Describe the compiler-materialized [N x T] backing allocation, not the
    Rust SharedArray<T, N> marker's zero-sized PhantomData layout.

Expected debugger behavior

After the relevant barrier, cuda-gdb includes TILE in info locals, resolves
bare whatis TILE / print TILE[i], and reports the correct physical array
shape. Values retain block-local shared-memory semantics. The final DWARF and
cuda-gdb's C++ language view must identify address class 8 / @shared; the
Rust formatter may omit that textual qualifier. A namespace-only DIE makes a
qualified spelling work but fails the existing T27 local-variable contract, so
qualified lookup is not a substitute for function scope.

Acceptance criteria

  • LLVM AS3 global has a retained debug attachment and CU global entry, and the
    DIE reuses the exact DISubprogram node emitted for its owning function.
  • Metadata preserves source name TILE, generated linkage name, declaration
    file/line, physical [N x T] backing type, size, and alignment; the
    independently synthesized debug type must exactly match the materialized
    element/count/alignment.
  • LLVM contains the explicit class-8 constu/swap/xderef expression; cubin
    DWARF and cuda-gdb's C++ view report shared address class 8 / @shared, and
    the Rust view reports [T; N] with the correct byte size/address.
  • info locals, whatis TILE, and bare element reads succeed at the T27 stop.
  • Repeated uses of one static deduplicate; two same-leaf statics in different
    blocks of one function retain distinct exact identities, linkage names,
    declaration lines, storage, and DIEs.
  • Live tests switch between blocks and confirm different per-block values at
    the same shared offset.
  • Unsupported element-type graphs fail closed without suppressing the physical
    shared allocation or breaking full-debug compilation.
  • Barrier allocations either receive independently validated metadata in
    this task or are explicitly deferred with a negative regression test.
  • Full debug emits variable metadata; line tables/debug off do not.
  • LLVM verifier, llc/ptxas, and live cuda-gdb checks pass.

Current evidence

On baseline 6c5458fe, MirSharedAlloc lowers to an AS3
@__shared_mem_N. The source path is explicitly diagnostic-only and exporter
output contains no DIGlobalVariable*. The cuda-devtools T27 assessment reports
no TILE symbol.

A reviewed implementation is available as stacked branch
feat/debug-as3-shared-statics at
d516d6fb982f61877a7a70219decb9ec3690ca37, based on the repaired AS1
prerequisite a57bc934b39bf1710671da9c1602afdc99aec3aa. The AS3 patch ID and
parent-to-child binary diff are unchanged from the independently reviewed
pre-restack commit.

Environment

  • Baseline: 6c5458fe991bbde32c5bee74d87822aef1b5a691
  • CUDA/cuda-gdb: 13.3
  • GPU: RTX 5090 (sm_120)
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    IR-loweringLowering between dialects (dialect-mir to LLVM dialect)codegenDevice code-generation pipeline (Rust MIR to IR to PTX)debug infoDebug information in generated PTX/IR (line/source maps)enhancementNew feature or requestllvm-exportTextual LLVM/NVVM IR exporter (llvm-export crate)

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