Debug info: preserve MIR assert locations on generated traps #1118

Description

The mir.assert lowering copies the assertion source location to its generated
conditional branch, but not to the generated trap call or unreachable.
Those instructions then fall back to the enclosing function scope, so
cuda-gdb reports a bounds failure at the function declaration rather than the
failing indexing expression.

This is a related follow-up to #224/#225. It should not be a native child of
#226 because that tracker explicitly excludes line-table source mapping.

Minimal reproducer

Use a kernel whose input[tid] access is out of bounds for one launched thread
and run it under cuda-gdb with full debug information. The cuda-devtools T36
assessment is the integration reproducer.

Expected behavior

The failing thread stops on the source indexing expression.

Actual behavior

On baseline 6c5458fe, T36 stops at the kernel signature on line 487 rather
than input[tid] on line 494. The internal cuda-devtools commit
f95e5753299d0154bbf8279abc8732c5a9948dea demonstrated the intended behavior
but is not present on public main.

Acceptance criteria

• The generated conditional branch, trap call, and unreachable all retain
  the mir.assert source location.
• The shared module-level llvm.trap declaration remains locationless.
• T36 stops on line 494, not line 487.
• Multiple assertion sites retain distinct locations after optimization.
• MIR-lowering tests, LLVM/PTX validation, and live cuda-gdb validation pass.
• Debug-off behavior is unchanged.

Environment

• Baseline: 6c5458fe991bbde32c5bee74d87822aef1b5a691
• CUDA/cuda-gdb: 13.3
• GPU: RTX 5090 (sm_120)