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Implementation of the 2by4 decoder#20

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rufusy wants to merge 29 commits into
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Open

Implementation of the 2by4 decoder#20
rufusy wants to merge 29 commits into
Muriukidavid:masterfrom
rufusy:master

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@rufusy

@rufusy rufusy commented Jun 1, 2018

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Kindly ignore my first pull request and use this.

idachi rufusy added 28 commits June 1, 2018 13:19
Files used in the first implementation of the 2by4 decoder
Images used in the first implementation of the 2by4 decoder
This image is not needed
This is reimplementation of the 2 to 4 line decoder with 1 more submodule. The level of abstraction has dropped to model the behaviour of the ANDing function perfommed on the output signals of the 1 to 2 line decoders.
Therefore a new class anding_gate is introduced to model the above functionality.
Images used in the second implementation of the 2by4 decoder
This image was used in the first implementation. This is the second implementation and therefore it is not needed here.
This is reimplementation of the 2 to 4 line decoder with 2 more submodules. Therefore 2 new classes anding_gate and inverter are introduced to model the above functionality.
The 1 to 2 line decoder is implemented using 2 NOT gates and 2 AND gates as shown in the moc image below. The 1 binary input is fed into the port x1. The default binary input port is held high at all times and according to the binary input value fed into port x1, the truth table shown below is generated.
For simplicity, the default binary input is labelled as d_x in the truth table.
Images used in the third implementation of the 2by4 decoder
This image was used in the second implementation. This is the third implementation and therefore it is not needed here.
These files have been edited to be used in the implementation of the DFF with more details. A README and makefile have been added to the lab.
The images used in the implementation of this section of the lab
The DFF implemented previously has been edited to model the 4 bit shift register. These files have been used to do that.
The images have been used in the implementation of the register.
this is the wrong image
The correct image replaced
@rufusy

rufusy commented Jun 19, 2018

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For lab 3, check the commits made on june 19th. Use the last two on the commit history ie implementation of the dff with more details and implementation of the 4bit shift register from previous dff

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