[LinxV5] Implement complete PTO 0.58.6 TileOp macro assembly - #92
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Normative/generated source PR is now PTO-ISA/pto-spec#271. The final backend update also accepts PTO 0.58.6 direct CUBE layout codes CUBE_M32=29 and CUBE_M16=31 and applies Layout-dependent Row resolution to all 29 owner-identified mixed RowMajor/CUBE forms. |
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## Summary - Clarify `PTO-REQ-SCALAR-BODY-ENTRY-001` that the first decoded scalar instruction may enter the body of any active block kind, explicitly including Tile blocks. - Preserve the active Tile block kind during scalar body entry. - Add an executable AVS point with no intervening `C.BSTART.STD`. This closes documentation/evidence around the behavior already accepted by issue #191 and ADR-BLOCK-0012. It changes no instruction encoding, decoder, block state, or execution transition. ## Validation - `make pr-check`: **10/10 PASS** - exact focused ASL matrix selected by `scripts/prepare-pr`: **17/17 PASS** - new Tile-block scalar-body AVS: PASS - `git diff --check`: PASS Independent exact-input review remains required before merge, as reported by `scripts/prepare-pr`. Downstream implementation: [LinxISA/llvm-project#92](LinxISA/llvm-project#92). LinxISA implementer guidance: [LinxISA/linx-isa#201](LinxISA/linx-isa#201). Co-authored-by: zhoubot <637081+zhoubot@users.noreply.github.com>
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Consume the generated PTO 0.58.6 catalog for all 117 TileOps and 142 exact forms. Add single-line parsing and deterministic physical bundle expansion with explicit destination sizes and compact range modifiers. Print B.DATR and B.FPATR fields directly in one angle-bracket list, omit defaults, map public FP fields to exact physical slots, and reject the retired FPAttrs wrapper. Select every Shared, CUBE-layout, and weight form through configuration and typed operands while keeping the canonical mnemonic equal to the TileOp name. Fold 124 recoverable forms while keeping 18 ambiguous or descriptor-dependent forms fail-closed. Fold constant inline-assembly B.DIM register operands back to immediates, remove their dead ADDI materializations, omit dimension values equal to the per-block default of 1, recover omitted dimensions as 1 during macro disassembly, and suppress ValidRow or ValidCol when equal to Row or Col. Elide compiler-inserted FALL-STD headers on proven unique sequential CFG edges when scalar instructions remain in an active STD or Tile block. Preserve branch targets, non-fallthrough transfers, block-type transitions, non-Tile inline assembly, and final commit boundaries. Print two 32-bit words in the first and continuation hex rows when available, and align every LinxV5 scalar and Tile opcode at column 33.
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Rebased PR #92 onto current dev-llvm15_56 (including the latest PTO-ISA llvm#291 target-branch commits) and resolved the CUBE layout comment/test conflicts. Latest head: c78a661. Focused 142-form, dual-view, round-trip, required-binding, and corrected regression tests pass. GitHub now reports mergeable=true, mergeable_state=clean. Full LinxV5 suites retain only the same baseline failures (MC: 6, CodeGen: 25). The PR is now technically ready for merge; please wait for required CI checks if any. |
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Maintainer review completed for PR #92.
The PTO 0.58.6 macro implementation is consistent with the normative spec. I independently verified:
.textround-trip (2292 bytes);C.B.DIMI 1in the generated corpus;The PR now supports both requested disassembly views:
llvm-objdump -d: folds complete physical TileOp bundles into canonical PTO macros;llvm-objdump -d -M no-tile-macros(equivalently--disassembler-options=no-tile-macros): prints the underlying physical BSTART/B.DATR/B.DIM/B.IOT/B.IOS/B.IOR micro-instructions.I pushed commit
c819e2fa6461to this PR branch. It:BSTART.TLSU GMOVexpectation toBSTART.GMOV;disassembler-options.sregression test;no-tile-macrosin llvm-objdump’s command guide.After these changes, the only remaining LinxV5 lit failures match the baseline suite; the PR-specific CodeGen failure is cleared. The PR is ready for CI and merge.