fix: align Shared Tile PE mask ordering

[zhoubot]

Summary

• map architectural Shared Tile PE masks as bit3=PE0 through bit0=PE3
• update the differential fixture and its fail-closed validator
• remove version-number suffixes from C++ test/helper names

TDD evidence

• old implementation failed the updated state test with emulator_rc=32
• old fixture failed with PE mask must map bit3=PE0 through bit0=PE3

Verification

• complete build succeeded
• ctest --test-dir build-v058 --output-on-failure: 10/10 passed
• clang-format check passed
• forbidden C++ version-name scan returned no matches
• local markdownlint unavailable; hosted workflow remains authoritative

Corrects the model portion of LinxISA/linx-isa#165 and aligns with LinxISA/LinxCore#48.