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[TileOP API] TROWSUM assembly emits stale B.ASSEMBLE ParentSize encoding #145

Description

@jiale-wangOwO

ASL-authoritative diagnosis

Current pto-spec/main 2486822e includes pto-spec#265 (cbd64442): B.ASSEMBLE field 5 is WriterSizeCode, not ParentSizeCode. INIT takes parent capacity from the preceding allocating B.IOT.SizeCode; MIDDLE/LAST uses the final source-form Local B.IOT as one ParentRef. Every participating Local writer needs WriterSizeCode 1..10.

The supplied ELF (SHA-256 2f244a87c4e2961dcf345679d07bc55a6100c855a57d0413d195471d72923836) has only 0x00059053 and 0x00059853: both are INIT=0 with WriterSizeCode=0, and there is no INIT=1 B.ASSEMBLE. It is therefore ASL-invalid.

Required TileOP fix

  • TROWSUM(range::assemble<INIT>): emit allocating source-plus-destination B.IOT with parent capacity, then contiguous B.ASSEMBLE INIT with nonzero WriterSizeCode.
  • TROWSUM_ASS: retain its final source-form ParentRef carrier, but encode the nonzero fragment WriterSizeCode instead of stale ParentSizeCode.
  • Add a compile plus disassembly regression for INIT, MIDDLE, and LAST.

For the #144 FP32 [32,1] fragments, WriterSizeCode is 1. gfrun supports the corrected Local ParentRef form in https://github.com/LinxISA/SuperScalarModel/pull/677. No PTO ASL change is requested.

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