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issue/1565 fix(runtime): support Qwen MTP and recurrent graph replay - #1566

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big-hip wants to merge 2 commits into
InfiniTensor:InfiniLM-v0.2.9cfrom
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@big-hip big-hip commented Sep 19, 2026

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Problem and result

Closes #1565. Target: InfiniLM-v0.2.9c.

Qwen greedy MTP needs E4M3/BOOL conversions, correct TP communicator teardown, head-256 paged Prefill, and reliable graph storage/replay. This PR supplies the complete shared-runtime prerequisites for InfiniTensor/InfiniLM#584. Its graph fixes are also used by Mamba-2 in InfiniTensor/InfiniLM#575.

Implementation

  • Reuse ATen scalar mappings for F8/BOOL; no new conversion kernel.
  • Preserve the caller's CUDA device across ncclCommDestroy.
  • Instantiate the existing NVIDIA paged Prefill warp kernel for head size 256; other vendor/MLA dispatch defaults are unchanged.
  • Keep reused captured allocator blocks pinned and protect reactivated graph storage from trimming.
  • Record Sum/scalar-power and MetaX last-axis concatenation for replay; include reduction axes in descriptor-cache identity and use capture-safe output zeroing.
  • Retain focused cast, Prefill, allocator, changed-input reduction/power and strided-concatenation regressions.

The implementation is organized into two reviewable commits: operator/communication support, then graph prerequisites. The latter consolidates #1560 without changing its code or tests. No Mamba scan, Prefill compiler, model weights or experiment artifacts are included. Native W8A8 is not introduced.

Validation

Consolidation audit and new focused logs; A6000 evidence; RTX 5090 evidence. Evidence lives on independent fork documentation branches.

Environment Checks Result / scope
A6000, original isolated operator/runtime build E4M3/BOOL, paged Prefill, communicator teardown 2 cast checks, 88 Prefill cases and caller-device checks passed
A6000, matching integrated runtime Migrated changed-input graph tests 11 passed; files byte-identical to #1560; no fresh isolated combined-head build claim
C500, archived matching graph implementation Sum/scalar-power and MetaX concatenation 5 + 6 passed; not rerun on C500 during consolidation
Two RTX 5090, recorded graph/SM120 overlay Core casts/Prefill/Decode; LM tiny TP1/TP2; real single-request MTP 2 / 88 / Decode suite passed; 65+1 skip / 66 tiny checks; real K1/K2/K4 exact

The 5090 runtime's graph production changes are now inside this PR; SM120 build-option enumeration remains a documented validation overlay. Builds/tests above retain their exact recorded revisions. Fresh consolidation checks reuse the matching prebuilt runtime, not a newly compiled library. Project formatting (clang-format 21.1.8/Ruff 0.15.20) and whitespace checks pass.

Saved matching-source validation output, not GitHub CI

Performance and limitations

On TP2 RTX 5090, real 27B FP8 weights/BF16 compute, batch=1 greedy, 80×64-token pages, 63/127/1023-input and 64-output tokens, three warm repeats: ordinary Decode graph gives 63.21/62.43/52.16 tok/s; K2 eager MTP gives 107.25/116.50/86.79. These are whole-stack MTP gains, not isolated Core-patch speedups. Sampled K2 device peaks are 24394/24398 MiB (100 ms sampling).

Unresolved integration result: controlled 5090 cancel/re-admit MTP differs at the 21st token despite passing KV/state reclamation. The first divergent layer is unlocalized; evidence does not attribute the failure to this Core patch. Single-request success does not establish general dynamic-batching acceptance. vLLM K2 also fails its own ordinary-output comparison; no validated cross-framework MTP speed claim is made.

Review and CI

Head a3ac4df4: fork Ruff passed; Linux/Windows build matrix passed all four Ubuntu/Windows build and CPU-test jobs. The existing workflow labels jobs debug/release but does not pass matrix.type to the build command; these results do not certify distinct build modes or GPU execution. Previous original-head build matrices passed. Upstream external-PR jobs need maintainer approval; no upstream success is implied.

Please review allocator/graph ownership separately from numerical dispatch. @PanZezhong1725 and @spike-zhu were identified for review; formal assignment previously failed for lack of upstream permissions. Keep approval and required CI as merge gates. The MetaX code is supported by the linked C500 evidence, not a new vendor-wide validation claim.

Map E4M3 and BOOL through the existing ATen adaptor and preserve the
caller's CUDA device across NCCL communicator destruction.

Reuse the existing paged Prefill warp kernel for NVIDIA head size 256,
without changing other vendors' default dispatch. Extend existing
multi-page/long-context coverage and add finite FP8/mask cast checks.

Validation: fresh SM86 build, 88 paged Prefill cases, 2 cast tests,
and TP2 communicator teardown from both caller devices.

Closes InfiniTensor#1565
Consolidate the allocator ownership, reduction/scalar-power recording and MetaX concatenation fixes from InfiniTensor#1560 into the runtime support PR. Preserve the original implementations and focused regressions without adding a separate compiler or Prefill graph path.
@big-hip big-hip changed the title issue/1565 fix(nvidia): complete runtime support for Qwen MTP issue/1565 fix(runtime): support Qwen MTP and recurrent graph replay Sep 20, 2026
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