Portable FPGA IP cores, FPGA devices, and hardware acceleration engineering for cryptography, DSP/audio, edge AI, and embedded systems.

AccelFury builds reusable FPGA IP, board-level reference designs, and engineering workflows with a focus on portability, verification, reproducibility, and commercial integration.

• Develops portable FPGA IP cores for audio, DSP, cryptography, zero-knowledge, interfaces, CDC, FIFO, and streaming dataflow.
• Builds FPGA devices and reference systems on top of reusable IP blocks.
• Uses a verification-first HDL approach: explicit assumptions, documented limits, reproducible checks, and integration-ready artifacts.
• Offers commercial licensing, paid engineering support, and custom FPGA development.

af is the AccelFury workflow tool for FPGA/IP repositories.

It is used to standardize repository structure, run available checks, collect technical evidence, and prepare buyer-ready engineering artifacts. The af repository may remain private while the public repositories and templates continue to reflect that workflow.

• accelfury/af-pdm-rx: portable Verilog PDM RX IP core for FPGA audio pipelines.
• accelfury/core-template: template for new AccelFury FPGA cores and tooling repositories.

• Website: https://accelfury.com
• Email: mail@accelfury.com
• GitHub: https://github.com/accelfury

For commercial licensing, integration support, custom FPGA work, or partnership discussions, contact us by email.