Reverse engineer CUS27 die photo

[wemblykj]

I have access to a CUS27 die photo.

I would like to spend the time to understand how this chip works at the transistor level and to reverse engineer it into a series of logic diagrams that can later be used for improving and revising my existing [black-box] CUS27 module.

Understanding the chip will improve upon the inferences I have attempted to make so far and it will also ensure that the CUS27 module will have the exact timings that I cannot accurately infer from my previous black-box knowledge. For example how are the various video signals correlated to the 6M pixel clock?

I have already spend several weeks reading up on various transistor based approaches and believe I have already got the low-level fundamentals of the CUS27 in hand. This being the fact that the chip appears to be a reusable cell based architecture using bipolar transistor logic, each cell, of which there are ~380, is essentially a 4 input NAND gate that can be configured and chained to other cells in order to create some reusable standard logic blocks, including logic gates, d-type flip-flops, jk flip-flops and toggle switches.

To understand the chip I will need to:

1. identify the layout of the reusable logic blocks
2. markup the die image (e.g. using inkscape) with the various blocks as they are laid out
3. identify how the logic block are interconnected
4. markup the inputs and outputs of the chip on the die photo (including pin numbers)
5. generate some logic diagrams of the fundamental processes required by the Rolling Thunder hardware (e.g. 6M clock, video synchronization signals various pixel related signals - most eagerly S1H and S2H.