index.md

Vortex Documentation

Getting Started

• Environment Setup: system prerequisites and toolchain setup
• Installing Vortex: building and installing the Vortex stack
• Building the Toolchain from Source: maintainer-facing build recipes for Verilator, RISC-V GNU, LLVM (with X86 + lld + SPIR-V), compiler-rt, musl, POCL, Mesa, chipStar, and gem5
• FPGA Setup: running Vortex on Altera and Xilinx FPGA cards
• SLASH / Alveo V80 Setup: building the SLASH platform stack, the prerequisite for the aved backend

Architecture

• Codebase Layout: summary of the repo file tree
• Microarchitecture: Vortex pipeline microarchitectural details and reconfigurability — the natural first read before the subsystem design documents
• Hardware IP Library: catalog of the reusable RTL modules in hw/rtl/libs/
• Software Stack: OpenCL support and the software layers above the driver

Development

• Simulation: building and running each simulation driver
• Testing: running applications and test suites with blackbox.sh
• Continuous Integration: the CI catalog and how to run it locally
• Debugging: debugging configurations for each Vortex driver
• Kernel Debugging: source-level kernel debugging with GDB and OpenOCD
• Perfetto Analysis: performance analysis with Perfetto traces
• Synthesis and Power Analysis: FPGA/ASIC synthesis flows and PPA reporting
• SimObject Framework: the SimX simulator's component model
• Coding Guidelines — Verilog
• Coding Guidelines — C++
• Bug-Fix Discipline: root-cause-first rules for fixing defects
• References: foundational external resources on GPU architecture
• Contributing: process for contributing your own features

Design Documents

Detailed architectural specifications for Vortex subsystems live under designs/:

• Core pipeline
  • Microarchitecture Overview
  • Kernel Entry and Dispatch
  • CTA Dispatch Architecture
  • LSU Pipeline
  • Floating Point Unit
  • Compressed Instruction Support
  • Trap and Exception Foundation
  • Custom Accelerator ISA Extensions
• Memory system
  • Cache Subsystem
  • Atomic Memory Operations
  • Multi-Cache AMO Coherence
  • Memory Fabric Attributes
  • Virtual Memory
• Accelerators
  • Tensor Core (WGMMA)
  • DXA — Async Copy and Multicast (DMA)
  • Ray-Tracing Architecture (RTU)
  • Graphics — Hardware Stack (RASTER/TEX/OM)
    • Rasterizer
    • Texture Sampler
    • Output Merger
  • Graphics — Software Stack
• System and host interface
  • Command Processor
  • Vortex Runtime API
  • FPGA AFU Shell
  • aved Driver (Alveo V80)
  • Build Configuration System
• Software stacks
  • OpenCL Support (PoCL)
  • Vulkan Support (vortexpipe)
  • HIP Support (chipStar)
• Simulation and CI
  • SimX Simulator Architecture
  • gem5 Integration
  • FireSim Integration
  • Continuous Integration Design