From 4d6244b845687a8e76205b9a407aaaefe99c45fb Mon Sep 17 00:00:00 2001 From: Krishna Chaitanya Chundru Date: Wed, 4 Feb 2026 15:55:37 +0530 Subject: [PATCH 1/2] Revert "FROMLIST: arm64: dts: qcom: qcs6490-rb3gen2: Add TC9563 PCIe switch node" This reverts commit 90671a19c6c95f4acd18702dde28e82212cfd5d5. There is difference between fromlist version and merged version of this change, this version is not compatible with merged dtbindings and driver changes so reverting the fromlist version. Signed-off-by: Krishna Chaitanya Chundru --- arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 128 ------------------- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- 2 files changed, 1 insertion(+), 129 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts index b66bbdc561d0..ede28094a46e 100644 --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts @@ -262,30 +262,6 @@ regulator-max-microvolt = <3700000>; }; - vdd_ntn_0p9: regulator-vdd-ntn-0p9 { - compatible = "regulator-fixed"; - regulator-name = "VDD_NTN_0P9"; - gpio = <&pm8350c_gpios 2 GPIO_ACTIVE_HIGH>; - regulator-min-microvolt = <899400>; - regulator-max-microvolt = <899400>; - enable-active-high; - pinctrl-0 = <&ntn_0p9_en>; - pinctrl-names = "default"; - regulator-enable-ramp-delay = <4300>; - }; - - vdd_ntn_1p8: regulator-vdd-ntn-1p8 { - compatible = "regulator-fixed"; - regulator-name = "VDD_NTN_1P8"; - gpio = <&pm8350c_gpios 3 GPIO_ACTIVE_HIGH>; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - enable-active-high; - pinctrl-0 = <&ntn_1p8_en>; - pinctrl-names = "default"; - regulator-enable-ramp-delay = <10000>; - }; - wcn6750-pmu { compatible = "qcom,wcn6750-pmu"; pinctrl-0 = <&bt_en>; @@ -867,78 +843,6 @@ status = "okay"; }; -&pcie1_port0 { - pcie@0,0 { - compatible = "pci1179,0623"; - reg = <0x10000 0x0 0x0 0x0 0x0>; - #address-cells = <3>; - #size-cells = <2>; - - device_type = "pci"; - ranges; - bus-range = <0x2 0xff>; - - vddc-supply = <&vdd_ntn_0p9>; - vdd18-supply = <&vdd_ntn_1p8>; - vdd09-supply = <&vdd_ntn_0p9>; - vddio1-supply = <&vdd_ntn_1p8>; - vddio2-supply = <&vdd_ntn_1p8>; - vddio18-supply = <&vdd_ntn_1p8>; - - i2c-parent = <&i2c0 0x77>; - - reset-gpios = <&pm8350c_gpios 1 GPIO_ACTIVE_LOW>; - - pinctrl-0 = <&tc9563_rsex_n>; - pinctrl-names = "default"; - - pcie@1,0 { - reg = <0x20800 0x0 0x0 0x0 0x0>; - #address-cells = <3>; - #size-cells = <2>; - - device_type = "pci"; - ranges; - bus-range = <0x3 0xff>; - }; - - pcie@2,0 { - reg = <0x21000 0x0 0x0 0x0 0x0>; - #address-cells = <3>; - #size-cells = <2>; - - device_type = "pci"; - ranges; - bus-range = <0x4 0xff>; - }; - - pcie@3,0 { - reg = <0x21800 0x0 0x0 0x0 0x0>; - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - ranges; - bus-range = <0x5 0xff>; - - pci@0,0 { - reg = <0x50000 0x0 0x0 0x0 0x0>; - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - ranges; - }; - - pci@0,1 { - reg = <0x50100 0x0 0x0 0x0 0x0>; - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - ranges; - }; - }; - }; -}; - &pm7325_gpios { kypd_vol_up_n: kypd-vol-up-n-state { pins = "gpio6"; @@ -949,38 +853,6 @@ }; }; -&pm8350c_gpios { - ntn_0p9_en: ntn-0p9-en-state { - pins = "gpio2"; - function = "normal"; - - bias-disable; - input-disable; - output-enable; - power-source = <0>; - }; - - ntn_1p8_en: ntn-1p8-en-state { - pins = "gpio3"; - function = "normal"; - - bias-disable; - input-disable; - output-enable; - power-source = <0>; - }; - - tc9563_rsex_n: tc9563-resx-state { - pins = "gpio1"; - function = "normal"; - - bias-disable; - input-disable; - output-enable; - power-source = <0>; - }; -}; - &pm7325_temp_alarm { io-channels = <&pmk8350_vadc PM7325_ADC7_DIE_TEMP>; io-channel-names = "thermal"; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 68ed07238937..2dacd98d26cb 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2429,7 +2429,7 @@ status = "disabled"; - pcie1_port0: pcie@0 { + pcie@0 { device_type = "pci"; reg = <0x0 0x0 0x0 0x0 0x0>; bus-range = <0x01 0xff>; From 6293ef1b63ef1df8b4ef3be9e8d595fc5c018112 Mon Sep 17 00:00:00 2001 From: Krishna Chaitanya Chundru Date: Mon, 5 Jan 2026 15:55:24 +0530 Subject: [PATCH 2/2] BACKPORT: arm64: dts: qcom: qcs6490-rb3gen2: Add TC9563 PCIe switch nodei Add a node for the TC9563 PCIe switch, which has three downstream ports. Two embedded Ethernet devices are present on one of the downstream ports. As all these ports are present in the node represent the downstream ports and embedded endpoints. Power to the TC9563 is supplied through two LDO regulators, controlled by two GPIOs, which are added as fixed regulators. Configure the TC9563 through I2C. Reviewed-by: Bjorn Andersson Acked-by: Manivannan Sadhasivam Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20260105-tc9563-v1-1-642fd1fe7893@oss.qualcomm.com Signed-off-by: Krishna Chaitanya Chundru --- arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 128 +++++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- 2 files changed, 129 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts index ede28094a46e..d6eeda945c3d 100644 --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts @@ -262,6 +262,30 @@ regulator-max-microvolt = <3700000>; }; + vdd_ntn_0p9: regulator-vdd-ntn-0p9 { + compatible = "regulator-fixed"; + regulator-name = "VDD_NTN_0P9"; + gpio = <&pm8350c_gpios 2 GPIO_ACTIVE_HIGH>; + regulator-min-microvolt = <899400>; + regulator-max-microvolt = <899400>; + enable-active-high; + pinctrl-0 = <&ntn_0p9_en>; + pinctrl-names = "default"; + regulator-enable-ramp-delay = <4300>; + }; + + vdd_ntn_1p8: regulator-vdd-ntn-1p8 { + compatible = "regulator-fixed"; + regulator-name = "VDD_NTN_1P8"; + gpio = <&pm8350c_gpios 3 GPIO_ACTIVE_HIGH>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + enable-active-high; + pinctrl-0 = <&ntn_1p8_en>; + pinctrl-names = "default"; + regulator-enable-ramp-delay = <10000>; + }; + wcn6750-pmu { compatible = "qcom,wcn6750-pmu"; pinctrl-0 = <&bt_en>; @@ -843,6 +867,78 @@ status = "okay"; }; +&pcie1_port0 { + pcie@0,0 { + compatible = "pci1179,0623"; + reg = <0x10000 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + + device_type = "pci"; + ranges; + bus-range = <0x2 0xff>; + + vddc-supply = <&vdd_ntn_0p9>; + vdd18-supply = <&vdd_ntn_1p8>; + vdd09-supply = <&vdd_ntn_0p9>; + vddio1-supply = <&vdd_ntn_1p8>; + vddio2-supply = <&vdd_ntn_1p8>; + vddio18-supply = <&vdd_ntn_1p8>; + + i2c-parent = <&i2c0 0x77>; + + resx-gpios = <&pm8350c_gpios 1 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&tc9563_resx_n>; + pinctrl-names = "default"; + + pcie@1,0 { + reg = <0x20800 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + + device_type = "pci"; + ranges; + bus-range = <0x3 0xff>; + }; + + pcie@2,0 { + reg = <0x21000 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + + device_type = "pci"; + ranges; + bus-range = <0x4 0xff>; + }; + + pcie@3,0 { + reg = <0x21800 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges; + bus-range = <0x5 0xff>; + + pci@0,0 { + reg = <0x50000 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges; + }; + + pci@0,1 { + reg = <0x50100 0x0 0x0 0x0 0x0>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges; + }; + }; + }; +}; + &pm7325_gpios { kypd_vol_up_n: kypd-vol-up-n-state { pins = "gpio6"; @@ -1462,6 +1558,38 @@ }; }; +&pm8350c_gpios { + ntn_0p9_en: ntn-0p9-en-state { + pins = "gpio2"; + function = "normal"; + + bias-disable; + input-disable; + output-enable; + power-source = <0>; + }; + + ntn_1p8_en: ntn-1p8-en-state { + pins = "gpio3"; + function = "normal"; + + bias-disable; + input-disable; + output-enable; + power-source = <0>; + }; + + tc9563_resx_n: tc9563-resx-state { + pins = "gpio1"; + function = "normal"; + + bias-disable; + input-disable; + output-enable; + power-source = <0>; + }; +}; + &tlmm { gpio-reserved-ranges = <32 2>, /* ADSP */ <48 4>; /* NFC */ diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 2dacd98d26cb..68ed07238937 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2429,7 +2429,7 @@ status = "disabled"; - pcie@0 { + pcie1_port0: pcie@0 { device_type = "pci"; reg = <0x0 0x0 0x0 0x0 0x0>; bus-range = <0x01 0xff>;