From 721ca0eda3ca503925b4aee3adb4e8c0f280dba5 Mon Sep 17 00:00:00 2001 From: Michael Rogenmoser Date: Thu, 29 Jan 2026 16:22:35 -0500 Subject: [PATCH 1/6] Add ability for file-specific comments --- src/cmd/script.rs | 6 +++--- src/script_fmt/flist-plus.tera | 12 +++++++----- src/script_fmt/flist.tera | 16 +++++++++------- src/script_fmt/formality_tcl.tera | 9 ++++++--- src/script_fmt/genus_tcl.tera | 9 ++++++--- src/script_fmt/precision_tcl.tera | 9 ++++++--- src/script_fmt/riviera_tcl.tera | 9 ++++++--- src/script_fmt/synopsys_tcl.tera | 9 ++++++--- src/script_fmt/vcs_sh.tera | 6 +++--- src/script_fmt/verilator_sh.tera | 2 +- src/script_fmt/vivado_tcl.tera | 6 ++++-- src/script_fmt/vsim_tcl.tera | 9 ++++++--- 12 files changed, 63 insertions(+), 39 deletions(-) diff --git a/src/cmd/script.rs b/src/cmd/script.rs index 847563059..b95bcd849 100644 --- a/src/cmd/script.rs +++ b/src/cmd/script.rs @@ -463,7 +463,7 @@ fn emit_template( ); all_incdirs.append(&mut src.clone().get_incdirs()); all_files.extend(src.files.iter().filter_map(|file| match file { - SourceFile::File(p, _) => Some(p.to_string_lossy().to_string()), + SourceFile::File(p, _) => Some((p.to_string_lossy().to_string(), None::)), SourceFile::Group(_) => None, })); } @@ -536,7 +536,7 @@ fn emit_template( files: files .iter() .map(|f| match f { - SourceFile::File(p, _) => p.to_path_buf(), + SourceFile::File(p, _) => (p.to_path_buf(), None), SourceFile::Group(_) => unreachable!(), }) .collect(), @@ -600,6 +600,6 @@ struct TplSrcStruct { metadata: String, defines: IndexSet<(String, Option)>, incdirs: IndexSet, - files: IndexSet, + files: IndexSet<(PathBuf, Option)>, file_type: String, } diff --git a/src/script_fmt/flist-plus.tera b/src/script_fmt/flist-plus.tera index ba43bcde4..be5a61c56 100644 --- a/src/script_fmt/flist-plus.tera +++ b/src/script_fmt/flist-plus.tera @@ -17,14 +17,16 @@ #}// {{ file_group.metadata }} {% endif %}{# #}{% for file in file_group.files %}{# loop over all files -#}{% if relativize_path %}{# make path relative if necessary -#}{% if file is starting_with(root) %}{# keep path unless it starts with common root -#}{{ file | replace(from=root, to='') | trim_start_matches(pat='/') }} +#}{% if source_annotations %}{% if file.1 %}{# add file-specific comment +#}// {{ file.1 }} +{% endif %}{% endif %}{% if relativize_path %}{# make path relative if necessary +#}{% if file.0 is starting_with(root) %}{# keep path unless it starts with common root +#}{{ file.0 | replace(from=root, to='') | trim_start_matches(pat='/') }} {% else %}{# -#}{{ file }} +#}{{ file.0 }} {% endif %}{# #}{% else %}{# -#}{{ file }} +#}{{ file.0 }} {% endif %}{# #}{% endfor %}{# #}{% endfor %} diff --git a/src/script_fmt/flist.tera b/src/script_fmt/flist.tera index 3deff7199..fb360957d 100644 --- a/src/script_fmt/flist.tera +++ b/src/script_fmt/flist.tera @@ -1,16 +1,18 @@ -{% for file_group in srcs %}{# loop over all file groups -#}{% if source_annotations %}{# Add source annotations +{% for file_group in srcs %}{# loop over all file groups +#}{% if source_annotations %}{# Add source annotations #}// {{ file_group.metadata }} {% endif %}{# #}{% for file in file_group.files %}{# loop over all files -#}{% if relativize_path %}{# make path relative if necessary -#}{% if file is starting_with(root) %}{# keep path unless it starts with common root -#}{{ file | replace(from=root, to='') | trim_start_matches(pat='/') }} +#}{% if source_annotations %}{% if file.1 %}{# add file-specific comment +#}// {{ file.1 }} +{% endif %}{% endif %}{% if relativize_path %}{# make path relative if necessary +#}{% if file.0 is starting_with(root) %}{# keep path unless it starts with common root +#}{{ file.0 | replace(from=root, to='') | trim_start_matches(pat='/') }} {% else %}{# -#}{{ file }} +#}{{ file.0 }} {% endif %}{# #}{% else %}{# -#}{{ file }} +#}{{ file.0 }} {% endif %}{# #}{% endfor %}{# #}{% endfor %} diff --git a/src/script_fmt/formality_tcl.tera b/src/script_fmt/formality_tcl.tera index 82c6abe17..bb1b45516 100644 --- a/src/script_fmt/formality_tcl.tera +++ b/src/script_fmt/formality_tcl.tera @@ -12,7 +12,8 @@ set search_path $search_path_initial } \ {% else %} \ {% endif %}{% endfor %}[list \ - {% for file in group.files %}{{ ' ' }}"{{ file | replace(from=root, to='$ROOT') }}" \ + {% for file in group.files %}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} + {% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \ {% endfor %}] {% if abort_on_error %}}]} {return 1}{% endif %} {% endfor %} @@ -25,13 +26,15 @@ set search_path $search_path_initial } \ {% else %} \ {% endif %}{% endfor %}[list \ - {% endif %}{{ ' ' }}"{{ file | replace(from=root, to='$ROOT') }}" \ + {% endif %}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} + {% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \ {% if loop.last %}] {% if abort_on_error %}}]} {return 1}{% endif %} {% endif %}{% endfor %} {% for file in all_vhdl %}{% if loop.first %}{% if abort_on_error %}if {[catch { {% endif %}read_vhdl -r \ [list \ - {% endif %}{{ ' ' }}"{{ file | replace(from=root, to='$ROOT') }}" \ + {% endif %}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} + {% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \ {% if loop.last %}] {% if abort_on_error %}}]} {return 1}{% endif %} {% endif %}{% endfor %} diff --git a/src/script_fmt/genus_tcl.tera b/src/script_fmt/genus_tcl.tera index ec86ccf86..393b328e7 100644 --- a/src/script_fmt/genus_tcl.tera +++ b/src/script_fmt/genus_tcl.tera @@ -18,7 +18,8 @@ set search_path $search_path_initial } \ {% else %} \ {% endif %}{% endfor %}[list \ - {% for file in group.files %}{{ ' ' }}"{{ file | replace(from=root, to='$ROOT') }}" \ + {% for file in group.files %}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} + {% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \ {% endfor %}] {% endfor %} {% else %}{# compilation_mode == 'common' #}{% for file in all_verilog %}{% if loop.first %}set search_path $search_path_initial @@ -32,14 +33,16 @@ set_db init_hdl_search_path $search_path } \ {% else %} \ {% endif %}{% endfor %}[list \ - {% endif %}{{ ' ' }}"{{ file | replace(from=root, to='$ROOT') }}" \ + {% endif %}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} + {% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \ {% if loop.last %}] {% if abort_on_error %}}]} {return 1}{% endif %} {% endif %}{% endfor %} {% for file in all_vhdl %}{% if loop.first %} {% if abort_on_error %}if {[catch { {% endif %}read_hdl -language vhdl \ [list \ - {% endif %}{{ ' ' }}"{{ file | replace(from=root, to='$ROOT') }}" \ + {% endif %}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} + {% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \ {% if loop.last %}] {% if abort_on_error %}}]} {return 1}{% endif %} {% endif %}{% endfor %} diff --git a/src/script_fmt/precision_tcl.tera b/src/script_fmt/precision_tcl.tera index b935e66cc..5aa9dad65 100644 --- a/src/script_fmt/precision_tcl.tera +++ b/src/script_fmt/precision_tcl.tera @@ -19,7 +19,8 @@ setup_design -defines { \ {% else %} \ {% endif %}{% endfor %}{% elif group.file_type == 'vhdl' %}-format vhdl_2008 \ {% endif %}{ \ - {% for file in group.files %}{{ file }}{% if loop.last %} \ + {% for file in group.files %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }} + {% endif %}{% endif %}{{ file.0 }}{% if loop.last %} \ {% else %} \ {% endif %}{% endfor %}} \ {% if abort_on_error %}}]} {return 1} @@ -32,7 +33,8 @@ setup_design -defines { \ } \ {% else %} \ {% endif %}{% endfor %}{ \ - {% endif %}{{ file }}{% if loop.last %} \ + {% endif %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }} + {% endif %}{% endif %}{{ file.0 }}{% if loop.last %} \ {% else %} \ {% endif %}{% if loop.last %}} \ {% if abort_on_error %}}]} {return 1} @@ -41,7 +43,8 @@ setup_design -defines { \ {% for file in all_vhdl %}{% if loop.first %}{% if abort_on_error %}if {[catch { {% endif %}add_input_file \ -format vhdl_2008 \ { \ - {% endif %}{{ file }}{% if loop.last %} \ + {% endif %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }} + {% endif %}{% endif %}{{ file.0 }}{% if loop.last %} \ {% else %} \ {% endif %}{% if loop.last %}} \ {% if abort_on_error %}}]} {return 1} diff --git a/src/script_fmt/riviera_tcl.tera b/src/script_fmt/riviera_tcl.tera index 22f24598f..d3c67417c 100644 --- a/src/script_fmt/riviera_tcl.tera +++ b/src/script_fmt/riviera_tcl.tera @@ -8,7 +8,8 @@ vlib work {% endfor %}{% for incdir in group.incdirs %}"+incdir+{{ incdir | replace(from=root, to='$ROOT') }}" \ {% endfor %}{% elif group.file_type == 'vhdl' %}vcom -2008 \ {% for tmp_arg in vcom_args %}{{ tmp_arg }} \ - {% endfor %}{% endif %}{% for file in group.files %}"{{ file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ + {% endfor %}{% endif %}{% for file in group.files %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }} + {% endif %}{% endif %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% else %}\ {% endif %}{% endfor %}{% if abort_on_error %}}]} {return 1}{% endif %} @@ -16,13 +17,15 @@ vlib work {% for tmp_arg in vlog_args %}{{ tmp_arg }} \ {% endfor %}{% for define in all_defines %}"+define+{{ define.0 }}{% if define.1 %}={{ define.1 }}{% endif %}" \ {% endfor %}{% for incdir in all_incdirs %}"+incdir+{{ incdir | replace(from=root, to='$ROOT') }}" \ - {% endfor %}{% endif %}"{{ file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ + {% endfor %}{% endif %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }} + {% endif %}{% endif %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% else %}\ {% endif %}{% if loop.last %}{% if abort_on_error %}}]} {return 1}{% endif %} {% endif %}{% endfor %}{% for file in all_vhdl %}{% if loop.first %}{% if abort_on_error %}if {[catch { {% endif %}vcom -2008 \ {% for tmp_arg in vcom_args %}{{ tmp_arg }} \ - {% endfor %}{% endif %}"{{ file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ + {% endfor %}{% endif %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }} + {% endif %}{% endif %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% else %}\ {% endif %}{% if loop.last %}{% if abort_on_error %}}]} {return 1}{% endif %} diff --git a/src/script_fmt/synopsys_tcl.tera b/src/script_fmt/synopsys_tcl.tera index d3ec50b64..ddf26ecbf 100644 --- a/src/script_fmt/synopsys_tcl.tera +++ b/src/script_fmt/synopsys_tcl.tera @@ -24,7 +24,8 @@ set search_path $search_path_initial {% else %} \ {% endif %}{% endfor %}[list \ {% for file in group.files %}{# Add group's files -#}{{ ' ' }}"{{ file | replace(from=root, to='$ROOT') }}" \ +#}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} +{% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \ {% endfor %}] {% if abort_on_error %}]} {return 1}{% endif %} {% endfor %} @@ -45,7 +46,8 @@ set search_path $search_path_initial } \ {% else %} \ {% endif %}{% endfor %}[list \ - {% endif %}{{ ' ' }}"{{ file | replace(from=root, to='$ROOT') }}" \{# Add all verilog files #} + {% endif %}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} + {% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \{# Add all verilog files #} {% if loop.last %}] {% if abort_on_error %}]} {return 1}{% endif %} {% endif %}{% endfor %} @@ -55,7 +57,8 @@ set search_path $search_path_initial {% for tmp_arg in vhdl_args %}{{ tmp_arg }} \ {% endfor %}{# Additional command arguments #} [list \ - {% endif %}{{ ' ' }}"{{ file | replace(from=root, to='$ROOT') }}" \{# Add all VHDL files #} + {% endif %}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} + {% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \{# Add all VHDL files #} {% if loop.last %}] {% if abort_on_error %}]} {return 1}{% endif %} {% endif %}{% endfor %} diff --git a/src/script_fmt/vcs_sh.tera b/src/script_fmt/vcs_sh.tera index 7c650a358..a619bc751 100644 --- a/src/script_fmt/vcs_sh.tera +++ b/src/script_fmt/vcs_sh.tera @@ -13,7 +13,7 @@ ROOT="{{ root }}" {% endfor %}{% for incdir in group.incdirs %}"+incdir+{{ incdir | replace(from=root, to='$ROOT') }}" \ {% endfor %}{% elif group.file_type == 'vhdl' %}{{ vhdlan_bin }} \ {% for tmp_arg in vhdlan_args %}{{ tmp_arg }} \ - {% endfor %}{% endif %}{% for file in group.files %}"{{ file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ + {% endfor %}{% endif %}{% for file in group.files %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% endif %}{% endfor %} {% endfor %} {% else %}{# compilation_mode == 'common' #}{% for file in all_verilog %}{% if loop.first %}{{ vlogan_bin }} -sverilog \ @@ -21,12 +21,12 @@ ROOT="{{ root }}" {% for tmp_arg in vlogan_args %}{{ tmp_arg }} \ {% endfor %}{% for define in all_defines %}"+define+{{ define.0 }}{% if define.1 %}={{ define.1 }}{% endif %}" \ {% endfor %}{% for incdir in all_incdirs %}"+incdir+{{ incdir | replace(from=root, to='$ROOT') }}" \ - {% endfor %}{% endif %}"{{ file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ + {% endfor %}{% endif %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% endif %}{% if loop.last %} {% endif %}{% endfor %} {% for file in all_vhdl %}{% if loop.first %}{{ vhdlan_bin }} \ {% for tmp_arg in vhdlan_args %}{{ tmp_arg }} \ - {% endfor %}{% endif %}"{{ file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ + {% endfor %}{% endif %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% endif %}{% if loop.last %} {% endif %}{% endfor %} {% endif %} diff --git a/src/script_fmt/verilator_sh.tera b/src/script_fmt/verilator_sh.tera index 7acdef73a..87a1c4fe8 100644 --- a/src/script_fmt/verilator_sh.tera +++ b/src/script_fmt/verilator_sh.tera @@ -2,5 +2,5 @@ {% for tmp_arg in vlt_args %}{{ tmp_arg }} {% endfor %}{% for define in group.defines %}+define+{{ define.0 }}{% if define.1 %}={{ define.1 }}{% endif %} {% endfor %}{% for incdir in group.incdirs %}+incdir+{{ incdir }} -{% endfor %}{% for file in group.files %}{{ file }} +{% endfor %}{% for file in group.files %}{{ file.0 }} {% endfor %}{% endif %}{% endfor %} diff --git a/src/script_fmt/vivado_tcl.tera b/src/script_fmt/vivado_tcl.tera index 9258aa28f..5bcb5b886 100644 --- a/src/script_fmt/vivado_tcl.tera +++ b/src/script_fmt/vivado_tcl.tera @@ -4,12 +4,14 @@ set ROOT "{{ root }}" #}{% for group in srcs %} {% if source_annotations %}# {{ group.metadata }}{# Add metadata #} {% endif %}add_files -norecurse -fileset [current_fileset] [list \{# Add files command #} - {% for file in group.files %}{{ file | replace(from=root, to='$ROOT') }} \{# Add group's files #} + {% for file in group.files %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }}{# Add file comments, if present #} + {% endif %}{% endif %}{{ file.0 | replace(from=root, to='$ROOT') }} \{# Add group's files #} {% if not loop.last %} {% endif %}{% endfor %}] {% endfor %}{% else %}{# compilation_mode == 'common' #}{# Common block for all files #}{% for file in all_files %}{# Loop over all files #}{% if loop.first %}add_files -norecurse -fileset [current_fileset] [list \{# Add files command #} - {% endif %}{{ file | replace(from=root, to='$ROOT') }} \{# Add all files #} + {% endif %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }}{# Add file comments, if present #} + {% endif %}{% endif %}{{ file.0 | replace(from=root, to='$ROOT') }} \{# Add all files #} {% if not loop.last %} {% endif %}{% if loop.last %}] {% endif %}{% endfor %}{% endif %}{# #}{% for arg in vivado_filesets %}{# Loop over vivado arguments diff --git a/src/script_fmt/vsim_tcl.tera b/src/script_fmt/vsim_tcl.tera index a0550b9fc..48bcd532d 100644 --- a/src/script_fmt/vsim_tcl.tera +++ b/src/script_fmt/vsim_tcl.tera @@ -15,7 +15,8 @@ set ROOT "{{ root }}" {% for tmp_arg in vcom_args %}{{ tmp_arg }} \ {% endfor %}{# Add all vcom arguments #}{% endif %}{# -#}{% for file in group.files %}"{{ file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ +#}{% for file in group.files %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }}{# Add file comments, if present #} + {% endif %}{% endif %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% endif %}{% endfor %}{# Add group's files #}{% if abort_on_error %}\ }]} {return 1}{% endif %} @@ -30,7 +31,8 @@ set ROOT "{{ root }}" {% endfor %}{# Add all defines #}{% for incdir in all_incdirs %}"+incdir+{{ incdir | replace(from=root, to='$ROOT') }}" \ {% endfor %}{# Add all include directories -#}{% endif %}"{{ file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ +#}{% endif %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }}{# Add file comments, if present #} + {% endif %}{% endif %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% endif %}{# Add all verilog files #}{% if loop.last %}{% if abort_on_error %} \ }]} {return 1}{% endif %} @@ -40,7 +42,8 @@ set ROOT "{{ root }}" #}vcom -2008 \{# Compile VHDL files with vcom #} {% for tmp_arg in vcom_args %}{{ tmp_arg }} \ {% endfor %}{# Add all vcom arguments -#}{% endif %}"{{ file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ +#}{% endif %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }}{# Add file comments, if present #} + {% endif %}{% endif %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% endif %}{# Add all VHDL files #}{% if loop.last %}{% if abort_on_error %} \ }]} {return 1}{% endif %} From 51409a1a63414822c1a359c5711b020625018363 Mon Sep 17 00:00:00 2001 From: Michael Rogenmoser Date: Thu, 5 Feb 2026 16:08:57 -0500 Subject: [PATCH 2/6] Add the ability to override files This add a new attribute `override_files` that can be added to a source. All files in that source will now override previous files in the final filelist that have the same basename. If source annotations are enabled, the original file will have an //OVERRIDE comment in front of it. Co-authored-by: Troy Hinckley --- src/cmd/script.rs | 79 ++++++++++++++++++++++++++++++++++++++++++----- src/config.rs | 11 +++++++ src/sess.rs | 1 + src/src.rs | 2 ++ 4 files changed, 85 insertions(+), 8 deletions(-) diff --git a/src/cmd/script.rs b/src/cmd/script.rs index b95bcd849..8292d64cd 100644 --- a/src/cmd/script.rs +++ b/src/cmd/script.rs @@ -4,7 +4,7 @@ //! The `script` subcommand. use std::io::Write; -use std::path::PathBuf; +use std::path::{Path, PathBuf}; use clap::{ArgAction, Args, Subcommand, ValueEnum}; use indexmap::{IndexMap, IndexSet}; @@ -388,7 +388,7 @@ pub fn run(sess: &Session, args: &ScriptArgs) -> Result<()> { /// Subdivide the source files in a group. /// -/// The function `cateogrize` is used to assign a category to each source file. +/// The function `categorize` is used to assign a category to each source file. /// Files with the same category that appear after each other will be kept in /// the same source group. Files with different cateogries are split into /// separate groups. @@ -452,9 +452,10 @@ fn emit_template( let mut all_defines = IndexMap::new(); let mut all_incdirs = vec![]; - let mut all_files = IndexSet::new(); + let mut all_files: IndexSet<(&Path, _)> = IndexSet::new(); let mut all_verilog = vec![]; let mut all_vhdl = vec![]; + let mut all_override_files: IndexSet<(&Path, &str)> = IndexSet::new(); for src in &srcs { all_defines.extend( src.defines @@ -462,10 +463,19 @@ fn emit_template( .map(|(k, &v)| (k.to_string(), v.map(String::from))), ); all_incdirs.append(&mut src.clone().get_incdirs()); - all_files.extend(src.files.iter().filter_map(|file| match file { - SourceFile::File(p, _) => Some((p.to_string_lossy().to_string(), None::)), - SourceFile::Group(_) => None, - })); + + // If override_files is set, source files are not automatically included, only to replace files with matching basenames. + if src.override_files { + all_override_files.extend(src.files.iter().filter_map(|file| match file { + SourceFile::File(p, _) => Some((*p, src.package.unwrap_or("None"))), + SourceFile::Group(_) => None, + })); + } else { + all_files.extend(src.files.iter().filter_map(|file| match file { + SourceFile::File(p, _) => Some((*p, None::)), + SourceFile::Group(_) => None, + })); + } } add_defines(&mut all_defines, &args.define); @@ -485,12 +495,49 @@ fn emit_template( }; tera_context.insert("all_incdirs", &all_incdirs); + // replace files in all_files with override files + let override_map = all_override_files + .iter() + .map(|(f, pkg)| { + ( + f.file_name() + .and_then(std::ffi::OsStr::to_str) + .unwrap_or(""), + (*f, pkg), + ) + }) + .collect::>(); + let all_files = all_files + .into_iter() + .map(|file| { + let basename = file + .0 + .file_name() + .and_then(std::ffi::OsStr::to_str) + .unwrap_or(""); + match override_map.get(&basename) { + Some((new_path, pkg)) => ( + new_path.to_string_lossy(), + Some(format!( + "OVERRIDDEN from {}: {}", + pkg, + file.0.to_string_lossy() + )), + ), + None => (file.0.to_string_lossy(), file.1), + } + }) + .collect::>(); + if emit_sources { tera_context.insert("all_files", &all_files); } let mut split_srcs = vec![]; for src in srcs { + if src.override_files { + continue; + } separate_files_in_group( src, |f| match f { @@ -536,7 +583,23 @@ fn emit_template( files: files .iter() .map(|f| match f { - SourceFile::File(p, _) => (p.to_path_buf(), None), + SourceFile::File(p, _) => { + let basename = p + .file_name() + .and_then(std::ffi::OsStr::to_str) + .unwrap_or(""); + match override_map.get(&basename) { + Some((new_path, pkg)) => ( + new_path.to_path_buf(), + Some(format!( + "OVERRIDDEN from {}: {}", + pkg, + p.to_string_lossy() + )), + ), + None => (p.to_path_buf(), None), + } + } SourceFile::Group(_) => unreachable!(), }) .collect(), diff --git a/src/config.rs b/src/config.rs index 7492eac9e..2d10da299 100644 --- a/src/config.rs +++ b/src/config.rs @@ -233,6 +233,8 @@ pub struct Sources { pub defines: IndexMap>, /// The source files. pub files: Vec, + /// The files in this source will override other files. + pub override_files: bool, } impl PrefixPaths for Sources { @@ -617,6 +619,7 @@ impl Validate for PartialManifest { include_dirs: Vec::new(), defines: IndexMap::new(), files: vec![srcs.unwrap()], + override_files: false, }), None => None, }, @@ -869,6 +872,8 @@ pub struct PartialSources { pub vhd: Option, /// The list of external flists to include. pub external_flists: Option>, + /// The files in this source will override other files. + pub override_files: Option, /// Unknown extra fields #[serde(flatten)] extra: HashMap, @@ -922,6 +927,7 @@ impl Validate for PartialSources { v: None, vhd: None, external_flists: None, + override_files: None, extra: _, } => PartialSourceFile::SvFile(sv).validate(vctx), PartialSources { @@ -933,6 +939,7 @@ impl Validate for PartialSources { v: Some(v), vhd: None, external_flists: None, + override_files: None, extra: _, } => PartialSourceFile::VerilogFile(v).validate(vctx), PartialSources { @@ -944,6 +951,7 @@ impl Validate for PartialSources { v: None, vhd: Some(vhd), external_flists: None, + override_files: None, extra: _, } => PartialSourceFile::VhdlFile(vhd).validate(vctx), PartialSources { @@ -955,6 +963,7 @@ impl Validate for PartialSources { v: None, vhd: None, external_flists, + override_files, extra, } => { let external_flists: Result> = external_flists @@ -1196,6 +1205,7 @@ impl Validate for PartialSources { include_dirs: include_dirs?, defines, files, + override_files: override_files.is_some_and(|x| x), }))) } PartialSources { @@ -1207,6 +1217,7 @@ impl Validate for PartialSources { v: _v, vhd: _vhd, external_flists: None, + override_files: None, extra: _, } => Err(Error::new( "Only a single source with a single type is supported.", diff --git a/src/sess.rs b/src/sess.rs index e2c1bd747..ccf2557b8 100644 --- a/src/sess.rs +++ b/src/sess.rs @@ -452,6 +452,7 @@ impl<'ctx> Session<'ctx> { files, dependencies, version, + override_files: sources.override_files, } } diff --git a/src/src.rs b/src/src.rs index 4cdf2a0a6..f3ccd3a1f 100644 --- a/src/src.rs +++ b/src/src.rs @@ -41,6 +41,8 @@ pub struct SourceGroup<'ctx> { pub dependencies: IndexSet, /// Version information of the package pub version: Option, + /// This group will override files in previous packages + pub override_files: bool, } impl<'ctx> Validate for SourceGroup<'ctx> { From 5749e1f2f759b49995358e534648afd871f84e65 Mon Sep 17 00:00:00 2001 From: Troy Hinckley Date: Mon, 14 Jul 2025 13:53:45 -0500 Subject: [PATCH 3/6] Add override files to the README --- README.md | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/README.md b/README.md index 052d831d1..83f1e6d75 100644 --- a/README.md +++ b/README.md @@ -325,6 +325,8 @@ sources: ... # Target specifier. Optional. target: + # Optional setting to override other files in any source that have the same file basename. + override_files: true # Recursive list of source files and groups: files: - @@ -384,6 +386,32 @@ Do not start the target name with `-`, as this is used to remove target applicat [Relevant code](https://github.com/pulp-platform/bender/blob/master/src/target.rs) + +### Override Files +If the `override_files` setting is applied to a source, then any files in that source will override other files that share the same basename. The overridden file will be removed from the output and replaced with the overriding file. For example, if `override_files` is applied to a source that has the file `src/core/pkg.sv`, then any other files that are also `pkg.sv` but in a different path will be removed and replaced with `src/core/pkg.sv`. If a file in an override files source does not override any other file, it will not be present in the output. + + +#### Example: +```yaml +sources: + - files: + - src/core/pkg.sv + - src/core/alu.sv + - src/core/top.sv + - target: custom_pkg + override_files: true + files: + - src/custom/pkg.sv + - src/custom/adder.sv +``` +If Bender is run with the `custom_pkg` target, the output files will be: + +``` +src/custom/pkg.sv +src/core/alu.sv +src/core/top.sv +``` + ### Vendor Section to list files and directories copied and patched within this repository from external repositories not supporting bender. From fe85c360de3451f9d073918c4c4bcb1060b4aff4 Mon Sep 17 00:00:00 2001 From: Michael Rogenmoser Date: Thu, 5 Feb 2026 17:43:35 -0500 Subject: [PATCH 4/6] Add warning for unsupported configuration --- src/config.rs | 11 ++++++++--- src/diagnostic.rs | 4 ++++ 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/src/config.rs b/src/config.rs index 2d10da299..c92d9d3e6 100644 --- a/src/config.rs +++ b/src/config.rs @@ -1162,7 +1162,7 @@ impl Validate for PartialSources { .flatten() .collect::>(); - let include_dirs: Result> = include_dirs + let include_dirs = include_dirs .unwrap_or_default() .iter() .filter_map(|path| match env_path_from_string(path.to_string()) { @@ -1179,7 +1179,7 @@ impl Validate for PartialSources { } } }) - .collect(); + .collect::>>()?; let defines = defines.unwrap_or_default(); let files: Result> = post_glob_files @@ -1200,9 +1200,14 @@ impl Validate for PartialSources { .emit(); }); } + if override_files.is_some_and(|x| x) + && (!include_dirs.is_empty() || !defines.is_empty()) + { + Warnings::OverrideFilesWithExtras(vctx.package_name.to_string()).emit(); + } Ok(SourceFile::Group(Box::new(Sources { target: target.unwrap_or_default(), - include_dirs: include_dirs?, + include_dirs, defines, files, override_files: override_files.is_some_and(|x| x), diff --git a/src/diagnostic.rs b/src/diagnostic.rs index 6210d5212..717ec5fcd 100644 --- a/src/diagnostic.rs +++ b/src/diagnostic.rs @@ -361,6 +361,10 @@ pub enum Warnings { )] LfsDisabled(String), + #[error("Override files in {} does not support additional fields like include_dirs, defines, etc.", fmt_pkg!(.0))] + #[diagnostic(code(W28))] + OverrideFilesWithExtras(String), + #[error("File not added, ignoring: {cause}")] #[diagnostic(code(W30))] IgnoredPath { cause: String }, From ecf4beb5ab8a836d0d080ab1a6fe5d2e9982e51f Mon Sep 17 00:00:00 2001 From: Michael Rogenmoser Date: Thu, 12 Feb 2026 14:17:31 -0500 Subject: [PATCH 5/6] Fix --no-source-annotation flag placement options --- src/cmd/script.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/cmd/script.rs b/src/cmd/script.rs index 8292d64cd..5d9c115e5 100644 --- a/src/cmd/script.rs +++ b/src/cmd/script.rs @@ -35,7 +35,7 @@ pub struct ScriptArgs { pub define: Vec, /// Remove source annotations from the generated script - #[arg(long, help_heading = "General Script Options")] + #[arg(long, global = true, help_heading = "General Script Options")] pub no_source_annotations: bool, /// Specify package to show sources for From f5ee875161bd321c87e1ba93551e4b6b07c36bd8 Mon Sep 17 00:00:00 2001 From: Michael Rogenmoser Date: Thu, 12 Feb 2026 14:43:54 -0500 Subject: [PATCH 6/6] Clarify file/comment info for script templates --- src/cmd/script.rs | 36 ++++++++++++++++++++----------- src/script_fmt/flist-plus.tera | 12 +++++------ src/script_fmt/flist.tera | 20 ++++++++--------- src/script_fmt/formality_tcl.tera | 12 +++++------ src/script_fmt/genus_tcl.tera | 12 +++++------ src/script_fmt/precision_tcl.tera | 12 +++++------ src/script_fmt/riviera_tcl.tera | 12 +++++------ src/script_fmt/synopsys_tcl.tera | 12 +++++------ src/script_fmt/vcs_sh.tera | 6 +++--- src/script_fmt/verilator_sh.tera | 2 +- src/script_fmt/vivado_tcl.tera | 10 ++++----- src/script_fmt/vsim_tcl.tera | 12 +++++------ 12 files changed, 85 insertions(+), 73 deletions(-) diff --git a/src/cmd/script.rs b/src/cmd/script.rs index 5d9c115e5..3142d2f20 100644 --- a/src/cmd/script.rs +++ b/src/cmd/script.rs @@ -452,7 +452,7 @@ fn emit_template( let mut all_defines = IndexMap::new(); let mut all_incdirs = vec![]; - let mut all_files: IndexSet<(&Path, _)> = IndexSet::new(); + let mut all_files = IndexSet::new(); let mut all_verilog = vec![]; let mut all_vhdl = vec![]; let mut all_override_files: IndexSet<(&Path, &str)> = IndexSet::new(); @@ -516,15 +516,18 @@ fn emit_template( .and_then(std::ffi::OsStr::to_str) .unwrap_or(""); match override_map.get(&basename) { - Some((new_path, pkg)) => ( - new_path.to_string_lossy(), - Some(format!( + Some((new_path, pkg)) => FileEntry { + file: new_path.to_path_buf(), + comment: Some(format!( "OVERRIDDEN from {}: {}", pkg, file.0.to_string_lossy() )), - ), - None => (file.0.to_string_lossy(), file.1), + }, + None => FileEntry { + file: file.0.to_path_buf(), + comment: file.1, + }, } }) .collect::>(); @@ -589,15 +592,18 @@ fn emit_template( .and_then(std::ffi::OsStr::to_str) .unwrap_or(""); match override_map.get(&basename) { - Some((new_path, pkg)) => ( - new_path.to_path_buf(), - Some(format!( + Some((new_path, pkg)) => FileEntry { + file: new_path.to_path_buf(), + comment: Some(format!( "OVERRIDDEN from {}: {}", pkg, p.to_string_lossy() )), - ), - None => (p.to_path_buf(), None), + }, + None => FileEntry { + file: p.to_path_buf(), + comment: None, + }, } } SourceFile::Group(_) => unreachable!(), @@ -658,11 +664,17 @@ fn emit_template( Ok(()) } +#[derive(Debug, Serialize, Hash, Eq, PartialEq, Clone)] +struct FileEntry { + file: PathBuf, + comment: Option, +} + #[derive(Debug, Serialize)] struct TplSrcStruct { metadata: String, defines: IndexSet<(String, Option)>, incdirs: IndexSet, - files: IndexSet<(PathBuf, Option)>, + files: IndexSet, file_type: String, } diff --git a/src/script_fmt/flist-plus.tera b/src/script_fmt/flist-plus.tera index be5a61c56..c562e2603 100644 --- a/src/script_fmt/flist-plus.tera +++ b/src/script_fmt/flist-plus.tera @@ -17,16 +17,16 @@ #}// {{ file_group.metadata }} {% endif %}{# #}{% for file in file_group.files %}{# loop over all files -#}{% if source_annotations %}{% if file.1 %}{# add file-specific comment -#}// {{ file.1 }} +#}{% if source_annotations %}{% if file.comment %}{# add file-specific comment +#}// {{ file.comment }} {% endif %}{% endif %}{% if relativize_path %}{# make path relative if necessary -#}{% if file.0 is starting_with(root) %}{# keep path unless it starts with common root -#}{{ file.0 | replace(from=root, to='') | trim_start_matches(pat='/') }} +#}{% if file.file is starting_with(root) %}{# keep path unless it starts with common root +#}{{ file.file | replace(from=root, to='') | trim_start_matches(pat='/') }} {% else %}{# -#}{{ file.0 }} +#}{{ file.file }} {% endif %}{# #}{% else %}{# -#}{{ file.0 }} +#}{{ file.file }} {% endif %}{# #}{% endfor %}{# #}{% endfor %} diff --git a/src/script_fmt/flist.tera b/src/script_fmt/flist.tera index fb360957d..f289eabda 100644 --- a/src/script_fmt/flist.tera +++ b/src/script_fmt/flist.tera @@ -1,18 +1,18 @@ -{% for file_group in srcs %}{# loop over all file groups -#}{% if source_annotations %}{# Add source annotations +{% for file_group in srcs %}{# loop over all file groups +#}{% if source_annotations %}{# Add source annotations #}// {{ file_group.metadata }} {% endif %}{# -#}{% for file in file_group.files %}{# loop over all files -#}{% if source_annotations %}{% if file.1 %}{# add file-specific comment -#}// {{ file.1 }} -{% endif %}{% endif %}{% if relativize_path %}{# make path relative if necessary -#}{% if file.0 is starting_with(root) %}{# keep path unless it starts with common root -#}{{ file.0 | replace(from=root, to='') | trim_start_matches(pat='/') }} +#}{% for file in file_group.files %}{# loop over all files +#}{% if source_annotations %}{% if file.comment %}{# add file-specific comment +#}// {{ file.comment }} +{% endif %}{% endif %}{% if relativize_path %}{# make path relative if necessary +#}{% if file.file is starting_with(root) %}{# keep path unless it starts with common root +#}{{ file.file | replace(from=root, to='') | trim_start_matches(pat='/') }} {% else %}{# -#}{{ file.0 }} +#}{{ file.file }} {% endif %}{# #}{% else %}{# -#}{{ file.0 }} +#}{{ file.file }} {% endif %}{# #}{% endfor %}{# #}{% endfor %} diff --git a/src/script_fmt/formality_tcl.tera b/src/script_fmt/formality_tcl.tera index bb1b45516..34636a9f2 100644 --- a/src/script_fmt/formality_tcl.tera +++ b/src/script_fmt/formality_tcl.tera @@ -12,8 +12,8 @@ set search_path $search_path_initial } \ {% else %} \ {% endif %}{% endfor %}[list \ - {% for file in group.files %}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} - {% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \ + {% for file in group.files %}{% if source_annotations %}{% if file.comment %}{{ ' ' }}# {{ file.comment }} + {% endif %}{% endif %}{{ ' ' }}"{{ file.file | replace(from=root, to='$ROOT') }}" \ {% endfor %}] {% if abort_on_error %}}]} {return 1}{% endif %} {% endfor %} @@ -26,15 +26,15 @@ set search_path $search_path_initial } \ {% else %} \ {% endif %}{% endfor %}[list \ - {% endif %}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} - {% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \ + {% endif %}{% if source_annotations %}{% if file.comment %}{{ ' ' }}# {{ file.comment }} + {% endif %}{% endif %}{{ ' ' }}"{{ file.file | replace(from=root, to='$ROOT') }}" \ {% if loop.last %}] {% if abort_on_error %}}]} {return 1}{% endif %} {% endif %}{% endfor %} {% for file in all_vhdl %}{% if loop.first %}{% if abort_on_error %}if {[catch { {% endif %}read_vhdl -r \ [list \ - {% endif %}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} - {% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \ + {% endif %}{% if source_annotations %}{% if file.comment %}{{ ' ' }}# {{ file.comment }} + {% endif %}{% endif %}{{ ' ' }}"{{ file.file | replace(from=root, to='$ROOT') }}" \ {% if loop.last %}] {% if abort_on_error %}}]} {return 1}{% endif %} {% endif %}{% endfor %} diff --git a/src/script_fmt/genus_tcl.tera b/src/script_fmt/genus_tcl.tera index 393b328e7..874612159 100644 --- a/src/script_fmt/genus_tcl.tera +++ b/src/script_fmt/genus_tcl.tera @@ -18,8 +18,8 @@ set search_path $search_path_initial } \ {% else %} \ {% endif %}{% endfor %}[list \ - {% for file in group.files %}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} - {% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \ + {% for file in group.files %}{% if source_annotations %}{% if file.comment %}{{ ' ' }}# {{ file.comment }} + {% endif %}{% endif %}{{ ' ' }}"{{ file.file | replace(from=root, to='$ROOT') }}" \ {% endfor %}] {% endfor %} {% else %}{# compilation_mode == 'common' #}{% for file in all_verilog %}{% if loop.first %}set search_path $search_path_initial @@ -33,16 +33,16 @@ set_db init_hdl_search_path $search_path } \ {% else %} \ {% endif %}{% endfor %}[list \ - {% endif %}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} - {% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \ + {% endif %}{% if source_annotations %}{% if file.comment %}{{ ' ' }}# {{ file.comment }} + {% endif %}{% endif %}{{ ' ' }}"{{ file.file | replace(from=root, to='$ROOT') }}" \ {% if loop.last %}] {% if abort_on_error %}}]} {return 1}{% endif %} {% endif %}{% endfor %} {% for file in all_vhdl %}{% if loop.first %} {% if abort_on_error %}if {[catch { {% endif %}read_hdl -language vhdl \ [list \ - {% endif %}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} - {% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \ + {% endif %}{% if source_annotations %}{% if file.comment %}{{ ' ' }}# {{ file.comment }} + {% endif %}{% endif %}{{ ' ' }}"{{ file.file | replace(from=root, to='$ROOT') }}" \ {% if loop.last %}] {% if abort_on_error %}}]} {return 1}{% endif %} {% endif %}{% endfor %} diff --git a/src/script_fmt/precision_tcl.tera b/src/script_fmt/precision_tcl.tera index 5aa9dad65..d31ec117a 100644 --- a/src/script_fmt/precision_tcl.tera +++ b/src/script_fmt/precision_tcl.tera @@ -19,8 +19,8 @@ setup_design -defines { \ {% else %} \ {% endif %}{% endfor %}{% elif group.file_type == 'vhdl' %}-format vhdl_2008 \ {% endif %}{ \ - {% for file in group.files %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }} - {% endif %}{% endif %}{{ file.0 }}{% if loop.last %} \ + {% for file in group.files %}{% if source_annotations %}{% if file.comment %}# {{ file.comment }} + {% endif %}{% endif %}{{ file.file }}{% if loop.last %} \ {% else %} \ {% endif %}{% endfor %}} \ {% if abort_on_error %}}]} {return 1} @@ -33,8 +33,8 @@ setup_design -defines { \ } \ {% else %} \ {% endif %}{% endfor %}{ \ - {% endif %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }} - {% endif %}{% endif %}{{ file.0 }}{% if loop.last %} \ + {% endif %}{% if source_annotations %}{% if file.comment %}# {{ file.comment }} + {% endif %}{% endif %}{{ file.file }}{% if loop.last %} \ {% else %} \ {% endif %}{% if loop.last %}} \ {% if abort_on_error %}}]} {return 1} @@ -43,8 +43,8 @@ setup_design -defines { \ {% for file in all_vhdl %}{% if loop.first %}{% if abort_on_error %}if {[catch { {% endif %}add_input_file \ -format vhdl_2008 \ { \ - {% endif %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }} - {% endif %}{% endif %}{{ file.0 }}{% if loop.last %} \ + {% endif %}{% if source_annotations %}{% if file.comment %}# {{ file.comment }} + {% endif %}{% endif %}{{ file.file }}{% if loop.last %} \ {% else %} \ {% endif %}{% if loop.last %}} \ {% if abort_on_error %}}]} {return 1} diff --git a/src/script_fmt/riviera_tcl.tera b/src/script_fmt/riviera_tcl.tera index d3c67417c..823c5365d 100644 --- a/src/script_fmt/riviera_tcl.tera +++ b/src/script_fmt/riviera_tcl.tera @@ -8,8 +8,8 @@ vlib work {% endfor %}{% for incdir in group.incdirs %}"+incdir+{{ incdir | replace(from=root, to='$ROOT') }}" \ {% endfor %}{% elif group.file_type == 'vhdl' %}vcom -2008 \ {% for tmp_arg in vcom_args %}{{ tmp_arg }} \ - {% endfor %}{% endif %}{% for file in group.files %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }} - {% endif %}{% endif %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ + {% endfor %}{% endif %}{% for file in group.files %}{% if source_annotations %}{% if file.comment %}# {{ file.comment }} + {% endif %}{% endif %}"{{ file.file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% else %}\ {% endif %}{% endfor %}{% if abort_on_error %}}]} {return 1}{% endif %} @@ -17,15 +17,15 @@ vlib work {% for tmp_arg in vlog_args %}{{ tmp_arg }} \ {% endfor %}{% for define in all_defines %}"+define+{{ define.0 }}{% if define.1 %}={{ define.1 }}{% endif %}" \ {% endfor %}{% for incdir in all_incdirs %}"+incdir+{{ incdir | replace(from=root, to='$ROOT') }}" \ - {% endfor %}{% endif %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }} - {% endif %}{% endif %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ + {% endfor %}{% endif %}{% if source_annotations %}{% if file.comment %}# {{ file.comment }} + {% endif %}{% endif %}"{{ file.file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% else %}\ {% endif %}{% if loop.last %}{% if abort_on_error %}}]} {return 1}{% endif %} {% endif %}{% endfor %}{% for file in all_vhdl %}{% if loop.first %}{% if abort_on_error %}if {[catch { {% endif %}vcom -2008 \ {% for tmp_arg in vcom_args %}{{ tmp_arg }} \ - {% endfor %}{% endif %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }} - {% endif %}{% endif %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ + {% endfor %}{% endif %}{% if source_annotations %}{% if file.comment %}# {{ file.comment }} + {% endif %}{% endif %}"{{ file.file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% else %}\ {% endif %}{% if loop.last %}{% if abort_on_error %}}]} {return 1}{% endif %} diff --git a/src/script_fmt/synopsys_tcl.tera b/src/script_fmt/synopsys_tcl.tera index ddf26ecbf..ad0975d04 100644 --- a/src/script_fmt/synopsys_tcl.tera +++ b/src/script_fmt/synopsys_tcl.tera @@ -24,8 +24,8 @@ set search_path $search_path_initial {% else %} \ {% endif %}{% endfor %}[list \ {% for file in group.files %}{# Add group's files -#}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} -{% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \ +#}{% if source_annotations %}{% if file.comment %}{{ ' ' }}# {{ file.comment }} +{% endif %}{% endif %}{{ ' ' }}"{{ file.file | replace(from=root, to='$ROOT') }}" \ {% endfor %}] {% if abort_on_error %}]} {return 1}{% endif %} {% endfor %} @@ -46,8 +46,8 @@ set search_path $search_path_initial } \ {% else %} \ {% endif %}{% endfor %}[list \ - {% endif %}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} - {% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \{# Add all verilog files #} + {% endif %}{% if source_annotations %}{% if file.comment %}{{ ' ' }}# {{ file.comment }} + {% endif %}{% endif %}{{ ' ' }}"{{ file.file | replace(from=root, to='$ROOT') }}" \{# Add all verilog files #} {% if loop.last %}] {% if abort_on_error %}]} {return 1}{% endif %} {% endif %}{% endfor %} @@ -57,8 +57,8 @@ set search_path $search_path_initial {% for tmp_arg in vhdl_args %}{{ tmp_arg }} \ {% endfor %}{# Additional command arguments #} [list \ - {% endif %}{% if source_annotations %}{% if file.1 %}{{ ' ' }}# {{ file.1 }} - {% endif %}{% endif %}{{ ' ' }}"{{ file.0 | replace(from=root, to='$ROOT') }}" \{# Add all VHDL files #} + {% endif %}{% if source_annotations %}{% if file.comment %}{{ ' ' }}# {{ file.comment }} + {% endif %}{% endif %}{{ ' ' }}"{{ file.file | replace(from=root, to='$ROOT') }}" \{# Add all VHDL files #} {% if loop.last %}] {% if abort_on_error %}]} {return 1}{% endif %} {% endif %}{% endfor %} diff --git a/src/script_fmt/vcs_sh.tera b/src/script_fmt/vcs_sh.tera index a619bc751..df9a3f0ea 100644 --- a/src/script_fmt/vcs_sh.tera +++ b/src/script_fmt/vcs_sh.tera @@ -13,7 +13,7 @@ ROOT="{{ root }}" {% endfor %}{% for incdir in group.incdirs %}"+incdir+{{ incdir | replace(from=root, to='$ROOT') }}" \ {% endfor %}{% elif group.file_type == 'vhdl' %}{{ vhdlan_bin }} \ {% for tmp_arg in vhdlan_args %}{{ tmp_arg }} \ - {% endfor %}{% endif %}{% for file in group.files %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ + {% endfor %}{% endif %}{% for file in group.files %}"{{ file.file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% endif %}{% endfor %} {% endfor %} {% else %}{# compilation_mode == 'common' #}{% for file in all_verilog %}{% if loop.first %}{{ vlogan_bin }} -sverilog \ @@ -21,12 +21,12 @@ ROOT="{{ root }}" {% for tmp_arg in vlogan_args %}{{ tmp_arg }} \ {% endfor %}{% for define in all_defines %}"+define+{{ define.0 }}{% if define.1 %}={{ define.1 }}{% endif %}" \ {% endfor %}{% for incdir in all_incdirs %}"+incdir+{{ incdir | replace(from=root, to='$ROOT') }}" \ - {% endfor %}{% endif %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ + {% endfor %}{% endif %}"{{ file.file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% endif %}{% if loop.last %} {% endif %}{% endfor %} {% for file in all_vhdl %}{% if loop.first %}{{ vhdlan_bin }} \ {% for tmp_arg in vhdlan_args %}{{ tmp_arg }} \ - {% endfor %}{% endif %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ + {% endfor %}{% endif %}"{{ file.file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% endif %}{% if loop.last %} {% endif %}{% endfor %} {% endif %} diff --git a/src/script_fmt/verilator_sh.tera b/src/script_fmt/verilator_sh.tera index 87a1c4fe8..1e87bad51 100644 --- a/src/script_fmt/verilator_sh.tera +++ b/src/script_fmt/verilator_sh.tera @@ -2,5 +2,5 @@ {% for tmp_arg in vlt_args %}{{ tmp_arg }} {% endfor %}{% for define in group.defines %}+define+{{ define.0 }}{% if define.1 %}={{ define.1 }}{% endif %} {% endfor %}{% for incdir in group.incdirs %}+incdir+{{ incdir }} -{% endfor %}{% for file in group.files %}{{ file.0 }} +{% endfor %}{% for file in group.files %}{{ file.file }} {% endfor %}{% endif %}{% endfor %} diff --git a/src/script_fmt/vivado_tcl.tera b/src/script_fmt/vivado_tcl.tera index 5bcb5b886..bafbc28da 100644 --- a/src/script_fmt/vivado_tcl.tera +++ b/src/script_fmt/vivado_tcl.tera @@ -4,14 +4,14 @@ set ROOT "{{ root }}" #}{% for group in srcs %} {% if source_annotations %}# {{ group.metadata }}{# Add metadata #} {% endif %}add_files -norecurse -fileset [current_fileset] [list \{# Add files command #} - {% for file in group.files %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }}{# Add file comments, if present #} - {% endif %}{% endif %}{{ file.0 | replace(from=root, to='$ROOT') }} \{# Add group's files #} + {% for file in group.files %}{% if source_annotations %}{% if file.comment %}# {{ file.comment }}{# Add file comments, if present #} + {% endif %}{% endif %}{{ file.file | replace(from=root, to='$ROOT') }} \{# Add group's files #} {% if not loop.last %} {% endif %}{% endfor %}] {% endfor %}{% else %}{# compilation_mode == 'common' #}{# Common block for all files #}{% for file in all_files %}{# Loop over all files #}{% if loop.first %}add_files -norecurse -fileset [current_fileset] [list \{# Add files command #} - {% endif %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }}{# Add file comments, if present #} - {% endif %}{% endif %}{{ file.0 | replace(from=root, to='$ROOT') }} \{# Add all files #} + {% endif %}{% if source_annotations %}{% if file.comment %}# {{ file.comment }}{# Add file comments, if present #} + {% endif %}{% endif %}{{ file.file | replace(from=root, to='$ROOT') }} \{# Add all files #} {% if not loop.last %} {% endif %}{% if loop.last %}] {% endif %}{% endfor %}{% endif %}{# #}{% for arg in vivado_filesets %}{# Loop over vivado arguments @@ -26,7 +26,7 @@ set_property include_dirs [list \ #}{% for define in all_defines %}{# Loop over defines #}{% if loop.first %} set_property verilog_define [list \ - {% endif %}{{ define.0 }}{% if define.1 %}={{ define.1 }}{% endif %}{% if loop.last %} \{# Add all defines #} + {% endif %}{{ define.0 }}{% if define.1 %}={{ define.1 }}{% endif %}{% if loop.last %} \{# Add all defines #} ] [current_fileset{{ arg }}]{# Add all arguments #} {% else %} \ {% endif %}{% endfor %}{% endfor %} diff --git a/src/script_fmt/vsim_tcl.tera b/src/script_fmt/vsim_tcl.tera index 48bcd532d..3241323ec 100644 --- a/src/script_fmt/vsim_tcl.tera +++ b/src/script_fmt/vsim_tcl.tera @@ -15,8 +15,8 @@ set ROOT "{{ root }}" {% for tmp_arg in vcom_args %}{{ tmp_arg }} \ {% endfor %}{# Add all vcom arguments #}{% endif %}{# -#}{% for file in group.files %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }}{# Add file comments, if present #} - {% endif %}{% endif %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ +#}{% for file in group.files %}{% if source_annotations %}{% if file.comment %}# {{ file.comment }}{# Add file comments, if present #} + {% endif %}{% endif %}"{{ file.file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% endif %}{% endfor %}{# Add group's files #}{% if abort_on_error %}\ }]} {return 1}{% endif %} @@ -31,8 +31,8 @@ set ROOT "{{ root }}" {% endfor %}{# Add all defines #}{% for incdir in all_incdirs %}"+incdir+{{ incdir | replace(from=root, to='$ROOT') }}" \ {% endfor %}{# Add all include directories -#}{% endif %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }}{# Add file comments, if present #} - {% endif %}{% endif %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ +#}{% endif %}{% if source_annotations %}{% if file.comment %}# {{ file.comment }}{# Add file comments, if present #} + {% endif %}{% endif %}"{{ file.file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% endif %}{# Add all verilog files #}{% if loop.last %}{% if abort_on_error %} \ }]} {return 1}{% endif %} @@ -42,8 +42,8 @@ set ROOT "{{ root }}" #}vcom -2008 \{# Compile VHDL files with vcom #} {% for tmp_arg in vcom_args %}{{ tmp_arg }} \ {% endfor %}{# Add all vcom arguments -#}{% endif %}{% if source_annotations %}{% if file.1 %}# {{ file.1 }}{# Add file comments, if present #} - {% endif %}{% endif %}"{{ file.0 | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ +#}{% endif %}{% if source_annotations %}{% if file.comment %}# {{ file.comment }}{# Add file comments, if present #} + {% endif %}{% endif %}"{{ file.file | replace(from=root, to='$ROOT') }}" {% if not loop.last %}\ {% endif %}{# Add all VHDL files #}{% if loop.last %}{% if abort_on_error %} \ }]} {return 1}{% endif %}