From 25fe0160a04e8d56c5ed01e9892164e9ee3e7127 Mon Sep 17 00:00:00 2001 From: Jonathan Goyvaerts Date: Sat, 24 Oct 2026 21:35:58 -0300 Subject: [PATCH 1/3] asahi: build with -Dwerror=true again aurora-wip no longer builds with -Dwerror=true and the tests enabled (GCC 16.1.1). None of the fixes changes behaviour: - agx3_mesh_core.c: EMIT() put "n += size" on the line of the return its if guards (-Wmisleading-indentation); give it its own line. - agx3_cmdstream.h: cast the narrowed shifts in the designated initializers, as the neighbouring fields already do (-Wnarrowing when the header is included from C++). - hk_cmd_draw.c: hk_m5_pass_merge_begin() set a slot name it never read and fetched a device it never used. - hk_acceleration_structure.c: discard the popped page explicitly. - hk_cpu_upload_bench.c: push[] is a byte array; store the byte that the 0x12345678 constant was truncated to anyway. - compiler and lib tests: brace the gtest assertions that sit alone under an if (-Wdangling-else from the macros' internal else). Signed-off-by: Jonathan Goyvaerts Assisted-by: LLM (cherry picked from commit 141481c19964ac29dbd1707d4c99a2dfbc638999) Signed-off-by: Eryk Wieliczko --- src/asahi/compiler/agx3_mesh_core.c | 3 ++- .../compiler/test/test-mixed-uniform-alu.cpp | 3 ++- .../test/test-native-form-regressions.cpp | 24 ++++++++++++------- src/asahi/compiler/test/test-optimizer.cpp | 3 ++- .../compiler/test/test-preamble-modifiers.cpp | 6 +++-- src/asahi/genxml/agx3_cmdstream.h | 8 +++---- src/asahi/lib/tests/test-g17p-msaa-epilog.cpp | 3 ++- src/asahi/vulkan/hk_acceleration_structure.c | 2 +- src/asahi/vulkan/hk_cmd_draw.c | 5 ---- src/asahi/vulkan/tests/hk_cpu_upload_bench.c | 2 +- 10 files changed, 34 insertions(+), 25 deletions(-) diff --git a/src/asahi/compiler/agx3_mesh_core.c b/src/asahi/compiler/agx3_mesh_core.c index 2d44e5c07ff6..957952ea8fb4 100644 --- a/src/asahi/compiler/agx3_mesh_core.c +++ b/src/asahi/compiler/agx3_mesh_core.c @@ -82,7 +82,8 @@ agx3_mesh_passthrough_object(uint16_t grid_uniform, uint8_t out[64], const struct agx3_field_kv fields[]={__VA_ARGS__}; \ if(!agx3_bind_compose(AGX_ISA_ENCODING_AGX3C,name,ep,fields, \ sizeof(fields)/sizeof(fields[0]),NULL,0,temp+n,&size)) \ - return false; n+=size; \ + return false; \ + n+=size; \ } while(0) EMIT("rld",1,KV(9,2),KV(10,1),KV(11,1),KV(12,1),KV(21,13), KV(23,7),KV(24,1),KV(28,4),KV(29,144),KV(38,1)); diff --git a/src/asahi/compiler/test/test-mixed-uniform-alu.cpp b/src/asahi/compiler/test/test-mixed-uniform-alu.cpp index 0e2bee9f7fe1..34231ca284a1 100644 --- a/src/asahi/compiler/test/test-mixed-uniform-alu.cpp +++ b/src/asahi/compiler/test/test-mixed-uniform-alu.cpp @@ -131,8 +131,9 @@ TEST(MixedUniformALU, OptimizerFoldsUniformWideningOnlyIntoNativeShapes) agx_optimizer_forward(b->shader); EXPECT_EQ(I->src[1].type == AGX_INDEX_UNIFORM, !uniform_other && !saturate); - if (!uniform_other && !saturate) + if (!uniform_other && !saturate) { EXPECT_EQ(I->src[1].size, AGX_SIZE_16); + } ralloc_free(mem); } } diff --git a/src/asahi/compiler/test/test-native-form-regressions.cpp b/src/asahi/compiler/test/test-native-form-regressions.cpp index 358b7aa42287..cc0bc8129b9c 100644 --- a/src/asahi/compiler/test/test-native-form-regressions.cpp +++ b/src/asahi/compiler/test/test-native-form-regressions.cpp @@ -568,8 +568,9 @@ TEST(NativeForms, PhiEdgeAffinityRespectsTileBankAndLiveValues) ASSERT_FALSE(b->shader->ra_failed); EXPECT_LT(use->src[0].value, agx3_tile_store_bank(b->shader)); EXPECT_EQ(use->src[0].value, mode == 0 ? 10u : 1u); - if (held_use) + if (held_use) { EXPECT_EQ(held_use->src[0].value, 10u); + } unsigned copies = 0; agx_foreach_instr_global(b->shader, I) copies += I->op == AGX_OPCODE_MOV; @@ -1729,10 +1730,12 @@ TEST(NativeForms, ScalarCubeAllocationPreservesSharedInputs) EXPECT_TRUE(I->dest[0].value + 8 <= keep->src[0].value || I->dest[0].value >= keep->src[0].value + 2); } - if (mode == 2) + if (mode == 2) { EXPECT_EQ(I->src[6].value, I->src[7].value); - if (mode == 0 || mode == 4) + } + if (mode == 0 || mode == 4) { EXPECT_EQ(I->dest[0].value, 8u); + } } EXPECT_EQ(samples, mode == 3 ? 2u : 1u); ralloc_free(mem); @@ -2432,8 +2435,9 @@ TEST(NativeForms, TextureFmaStagingAdmission) const bool supported = invalid == 0 || invalid == 9 || invalid == 12 || invalid == 13; EXPECT_FALSE(sample->agx3_tex_coords_staged); - if (publication) + if (publication) { EXPECT_EQ(publication->agx3_tex_coords_staged, supported); + } if (supported) { ASSERT_NE(publication, nullptr); EXPECT_TRUE(first->agx3_tex_coord_start); @@ -2516,8 +2520,9 @@ TEST(NativeForms, TextureFmaStagingPreservesDemand) unsigned index = 0; agx_foreach_instr_global(b->shader, I) { EXPECT_FALSE(I->agx3_tex_coords_staged); - if (I->op == AGX_OPCODE_FFMA) + if (I->op == AGX_OPCODE_FFMA) { EXPECT_EQ(I->dest[0].type, AGX_INDEX_NORMAL); + } if (agx_is_texture_publication(I)) { EXPECT_EQ(I->src[0].type, AGX_INDEX_NORMAL); EXPECT_EQ(I->src[1].type, AGX_INDEX_NORMAL); @@ -2571,8 +2576,9 @@ TEST(NativeForms, MultipleTextureFmaPublications) unsigned stages = 0, publications = 0; agx_foreach_instr_global(b->shader, I) { stages += I->agx3_tex_coord_stage; - if (I->agx3_tex_coord_stage) + if (I->agx3_tex_coord_stage) { EXPECT_TRUE(agx_is_null(I->dest[0])); + } if (agx_is_texture_publication(I)) { publications++; EXPECT_TRUE(I->agx3_tex_coords_staged); @@ -2631,8 +2637,9 @@ TEST(NativeForms, TextureFmaPublicationPrecedesEarlierSamples) EXPECT_TRUE(I->agx3_tex_coords_staged); published = true; } - if (I == samples[0]) + if (I == samples[0]) { EXPECT_TRUE(published); + } } EXPECT_TRUE(published); ralloc_free(mem); @@ -3312,8 +3319,9 @@ TEST(LegacySamplers, UnpromotedIndexNeedsHeap) agx_shader_part part = {}; bool ok = agx_compile_shader_nir(b.shader, &key, &part); EXPECT_TRUE(ok); - if (ok) + if (ok) { EXPECT_TRUE(part.info.uses_sampler_heap); + } free(part.binary); ralloc_free(b.shader); } diff --git a/src/asahi/compiler/test/test-optimizer.cpp b/src/asahi/compiler/test/test-optimizer.cpp index c783d0ed3b3b..1c3ea0f662a7 100644 --- a/src/asahi/compiler/test/test-optimizer.cpp +++ b/src/asahi/compiler/test/test-optimizer.cpp @@ -1290,8 +1290,9 @@ TEST_F(Optimizer, G17PRangeSelectImmediateBoundary) agx_optimize_and_dce(after->shader); agx_foreach_instr_global(after->shader, I) { agx_foreach_src(I, s) { - if (I->src[s].type == AGX_INDEX_IMMEDIATE) + if (I->src[s].type == AGX_INDEX_IMMEDIATE) { ASSERT_LT(I->src[s].value, 256u); + } } } for (uint32_t input : {0u, 254u, 255u, 256u, 257u, 65535u}) diff --git a/src/asahi/compiler/test/test-preamble-modifiers.cpp b/src/asahi/compiler/test/test-preamble-modifiers.cpp index 83925a303d8a..c6d418c900ac 100644 --- a/src/asahi/compiler/test/test-preamble-modifiers.cpp +++ b/src/asahi/compiler/test/test-preamble-modifiers.cpp @@ -20,8 +20,9 @@ check_modifier(bool g17p, bool widen) unsigned sizes[3] = {16, 0, 0}; bool progress = agx_nir_opt_preamble(b.shader, sizes, g17p); const bool hoisted = g17p && !widen; - if (hoisted) + if (hoisted) { EXPECT_TRUE(progress); + } unsigned modifiers = 0, exported = 0; nir_function_impl *main = nir_shader_get_entrypoint(b.shader); nir_foreach_block(block, main) { @@ -38,8 +39,9 @@ check_modifier(bool g17p, bool widen) } EXPECT_EQ(modifiers, hoisted ? 0u : 1u); EXPECT_EQ(exported, hoisted ? 1u : 0u); - if (hoisted) + if (hoisted) { EXPECT_EQ(sizes[0], 18u); + } ralloc_free(b.shader); } diff --git a/src/asahi/genxml/agx3_cmdstream.h b/src/asahi/genxml/agx3_cmdstream.h index 32b39ed1d2b2..5a889a233850 100644 --- a/src/asahi/genxml/agx3_cmdstream.h +++ b/src/asahi/genxml/agx3_cmdstream.h @@ -240,7 +240,7 @@ agx3_cdm_launch_pack(const struct agx3_cdm_launch_info *info, struct AGX_CDM_LAUNCH_AGX3 header = { .word_0_payload = info->word0_payload, .word_1_payload = info->word1_payload, - .pipeline_hi = info->pipeline >> 38, + .pipeline_hi = (uint32_t)(info->pipeline >> 38), .pipeline_lo = (uint32_t)(info->pipeline >> 6), .opaque_word_3 = info->opaque_word3, }; @@ -360,7 +360,7 @@ agx3_cdm_indirect_launch_unpack( .pipeline = ((uint64_t)(word1 >> 22) << 38) | ((uint64_t)agx3_cmdstream_load_le32(bytes + 8) << 6), .opaque_word3 = agx3_cmdstream_load_le32(bytes + 12), - .indirect_word4_payload = word4 >> 16, + .indirect_word4_payload = (uint16_t)(word4 >> 16), .indirect_parameters = ((uint64_t)(word4 & 0xffff) << 32) | agx3_cmdstream_load_le32(bytes + 20), }; @@ -437,7 +437,7 @@ agx3_cdm_indirect_launch_36_unpack( .pipeline = ((uint64_t)(word1 >> 22) << 38) | ((uint64_t)agx3_cmdstream_load_le32(bytes + 8) << 6), .opaque_word3 = agx3_cmdstream_load_le32(bytes + 12), - .indirect_word4_payload = word4 >> 16, + .indirect_word4_payload = (uint16_t)(word4 >> 16), .indirect_parameters = ((uint64_t)(word4 & 0xffff) << 32) | agx3_cmdstream_load_le32(bytes + 20), }; @@ -467,7 +467,7 @@ agx3_cdm_stream_link_pack( return false; struct AGX_CDM_STREAM_LINK_AGX3 link = { - .target_hi = info->target >> 32, + .target_hi = (uint32_t)(info->target >> 32), .with_return = info->with_return, .target_lo = (uint32_t)info->target, }; diff --git a/src/asahi/lib/tests/test-g17p-msaa-epilog.cpp b/src/asahi/lib/tests/test-g17p-msaa-epilog.cpp index faceaef71f71..407a0f939b53 100644 --- a/src/asahi/lib/tests/test-g17p-msaa-epilog.cpp +++ b/src/asahi/lib/tests/test-g17p-msaa-epilog.cpp @@ -300,8 +300,9 @@ TEST(LegacyFragments, EpilogUsesUpstreamDepthCoverage) if (intr->intrinsic != nir_intrinsic_store_zs_agx) continue; zs++; EXPECT_TRUE(nir_src_is_const(intr->src[0])); - if (nir_src_is_const(intr->src[0])) + if (nir_src_is_const(intr->src[0])) { EXPECT_EQ(nir_src_as_uint(intr->src[0]), 0xffu); + } } } EXPECT_EQ(zs, 1u); diff --git a/src/asahi/vulkan/hk_acceleration_structure.c b/src/asahi/vulkan/hk_acceleration_structure.c index b4c1be5a2c96..a763186a0433 100644 --- a/src/asahi/vulkan/hk_acceleration_structure.c +++ b/src/asahi/vulkan/hk_acceleration_structure.c @@ -184,7 +184,7 @@ hk_gen1_sparse_entry(struct hk_device *dev, struct hk_gen1_sparse_table *t, if (agx_bo_bind(&dev->dev, bo, t->va->addr + (uint64_t)next * HK_GEN1_SPARSE_PAGE_BYTES, HK_GEN1_SPARSE_PAGE_BYTES, 0, t->bind_flags)) { - util_dynarray_pop(&t->pages, struct agx_bo *); + (void)util_dynarray_pop_ptr(&t->pages, struct agx_bo *); agx_bo_unreference(&dev->dev, bo); return NULL; } diff --git a/src/asahi/vulkan/hk_cmd_draw.c b/src/asahi/vulkan/hk_cmd_draw.c index 44033be3d129..0f05f8d4df54 100644 --- a/src/asahi/vulkan/hk_cmd_draw.c +++ b/src/asahi/vulkan/hk_cmd_draw.c @@ -3204,7 +3204,6 @@ hk_m5_ordered_draw_hazard(struct hk_cmd_buffer *cmd) static bool hk_m5_pass_merge_begin(struct hk_cmd_buffer *cmd, const VkRenderingInfo *info) { - struct hk_device *dev = hk_cmd_buffer_device(cmd); struct hk_pass_merge_candidate *m = &cmd->state.pass_merge; struct hk_cs *cs = m->cs; const struct hk_rendering_state *prev = &m->render; @@ -3245,19 +3244,15 @@ hk_m5_pass_merge_begin(struct hk_cmd_buffer *cmd, const VkRenderingInfo *info) return false; } - const char *slot = NULL; if (!why) { - slot = "depth"; why = hk_m5_attachment_continues(info->pDepthAttachment, &prev->depth_att); } if (!why) { - slot = "stencil"; why = hk_m5_attachment_continues(info->pStencilAttachment, &prev->stencil_att); } for (uint32_t i = 0; !why && i < info->colorAttachmentCount; ++i) { - slot = "color"; why = hk_m5_attachment_continues(&info->pColorAttachments[i], &prev->color_att[i]); } diff --git a/src/asahi/vulkan/tests/hk_cpu_upload_bench.c b/src/asahi/vulkan/tests/hk_cpu_upload_bench.c index 15f244d725da..0955d5d19162 100644 --- a/src/asahi/vulkan/tests/hk_cpu_upload_bench.c +++ b/src/asahi/vulkan/tests/hk_cpu_upload_bench.c @@ -192,7 +192,7 @@ reuse_correctness(struct fixture *f) struct hk_descriptor_state *cd = &cmd->state.cs.descriptors; const size_t small_B = 64; cs->variants[0].root_descriptor_size = small_B; - cd->root.push[0] = 0x12345678; + cd->root.push[0] = 0x78; uint64_t small = hk_cmd_buffer_upload_root(cmd, VK_PIPELINE_BIND_POINT_COMPUTE); CHECK(small != compute && cd->uploaded_root_size == small_B); CHECK(memcmp(cd->uploaded_root.cpu, &cd->root, small_B) == 0); From eaf69705c33249bd5e4f4ac2211bdcc6fad94f63 Mon Sep 17 00:00:00 2001 From: Eryk Wieliczko Date: Mon, 26 Oct 2026 11:29:31 +0100 Subject: [PATCH 2/3] hk: restore the native G15S Vulkan capability profile Restore conditional rendering, unified image layouts, memory-budget reporting and the sixteen-set limit qualified on M3 Pro. G15S uses the native AGX3 path; other G15 parts retain their conservative profile pending separate hardware qualification. FMA/rounding gates are unchanged. Check extensions, feature bits and the set limit through the real drm-shim driver. The new check fails on the previous G15S profile. Fixes: a5f56d81f46d ("hk: preserve the G13-G15 capability profile and isolate G17P FMA") Generated-by: LLM Signed-off-by: Eryk Wieliczko --- src/asahi/vulkan/hk_physical_device.c | 11 +++++---- tools/siliconforest/vulkan-smoke.c | 35 ++++++++++++++++++++++++++- 2 files changed, 40 insertions(+), 6 deletions(-) diff --git a/src/asahi/vulkan/hk_physical_device.c b/src/asahi/vulkan/hk_physical_device.c index dd0e7a4b1375..c28af1830188 100644 --- a/src/asahi/vulkan/hk_physical_device.c +++ b/src/asahi/vulkan/hk_physical_device.c @@ -86,12 +86,11 @@ hk_get_device_extensions(const struct agx_device *dev, const struct hk_instance *instance, struct vk_device_extension_table *ext) { - /* Keep the upstream AGX2 extension profile until the newly added common - * implementations have been qualified there. Native AGX3 keeps its - * existing exposure. + /* G15S restores the extended profile qualified on M3 Pro. Preserve the + * conservative AGX2 and other G15 profiles, and newer native exposure. */ const bool native_agx3 = agx_native_graphics(dev) && - dev->params.gpu_generation > 15; + (dev->params.gpu_generation > 15 || dev->chip == AGX_CHIP_G15S); /* * VK_KHR_ray_query and everything it depends on. Software traversal: @@ -1065,9 +1064,11 @@ hk_get_device_properties(const struct agx_device *dev, /* The classic AGX2 root upload has one USC uniform record, limited * to 64 halfwords. Keep upstream's eight-set limit: the native * sixteen-set root needs 68 halfwords and uses a separate loader. + * G15S is qualified for that profile; other G15 parts retain eight. */ .maxBoundDescriptorSets = - dev->params.gpu_generation <= 15 ? 8 : HK_MAX_SETS, + dev->params.gpu_generation <= 15 && dev->chip != AGX_CHIP_G15S + ? 8 : HK_MAX_SETS, /* VK_KHR_acceleration_structure limits. The counts are the * specification's own 24/29-bit encoding maxima, which is what bounds * us: the geometry, instance and primitive ids all live in packed diff --git a/tools/siliconforest/vulkan-smoke.c b/tools/siliconforest/vulkan-smoke.c index 29515817e0e9..c76587d5954b 100644 --- a/tools/siliconforest/vulkan-smoke.c +++ b/tools/siliconforest/vulkan-smoke.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -48,6 +49,28 @@ int main(int argc, char **argv) REQUIRE(strstr(props.deviceName, "Apple") != NULL); printf("device: %s\n", props.deviceName); + const char *chip = getenv("ASAHI_SHIM_CHIP"); + REQUIRE(chip != NULL); + const bool extended = strcmp(chip, "g15s") == 0 || strcmp(chip, "g17p") == 0; + REQUIRE(props.limits.maxBoundDescriptorSets == (extended ? 16u : 8u)); + uint32_t extension_count = 0; + OK(vkEnumerateDeviceExtensionProperties(physical, NULL, &extension_count, NULL)); + VkExtensionProperties *available = calloc(extension_count, sizeof(*available)); + REQUIRE(available != NULL); + OK(vkEnumerateDeviceExtensionProperties(physical, NULL, &extension_count, available)); + const char *profile_extensions[] = { + VK_EXT_CONDITIONAL_RENDERING_EXTENSION_NAME, + VK_KHR_UNIFIED_IMAGE_LAYOUTS_EXTENSION_NAME, + VK_EXT_MEMORY_BUDGET_EXTENSION_NAME, + }; + for (unsigned e = 0; e < sizeof(profile_extensions) / sizeof(profile_extensions[0]); ++e) { + bool found = false; + for (unsigned i = 0; i < extension_count; ++i) + found |= strcmp(available[i].extensionName, profile_extensions[e]) == 0; + REQUIRE(found == extended); + } + free(available); + VkPhysicalDeviceVulkan13Features f13 = { .sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_3_FEATURES, }; @@ -59,12 +82,22 @@ int main(int argc, char **argv) .sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MAP_MEMORY_PLACED_FEATURES_EXT, .pNext = &xfb, }; + VkPhysicalDeviceUnifiedImageLayoutsFeaturesKHR unified = { + .sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_UNIFIED_IMAGE_LAYOUTS_FEATURES_KHR, + .pNext = &placed, + }; + VkPhysicalDeviceConditionalRenderingFeaturesEXT conditional = { + .sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_CONDITIONAL_RENDERING_FEATURES_EXT, + .pNext = &unified, + }; VkPhysicalDeviceFeatures2 features = { - .sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FEATURES_2, .pNext = &placed, + .sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FEATURES_2, .pNext = &conditional, }; vkGetPhysicalDeviceFeatures2(physical, &features); REQUIRE(placed.memoryMapPlaced && placed.memoryUnmapReserve && xfb.transformFeedback); REQUIRE(f13.dynamicRendering); + REQUIRE((conditional.conditionalRendering != VK_FALSE) == extended); + REQUIRE((unified.unifiedImageLayouts != VK_FALSE) == extended); f13 = (VkPhysicalDeviceVulkan13Features){ .sType = VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_3_FEATURES, .dynamicRendering = VK_TRUE, From 7c9db5205daa5189cf6e767ccd95f54ff8ea8cf1 Mon Sep 17 00:00:00 2001 From: Eryk Wieliczko Date: Mon, 26 Oct 2026 11:44:41 +0100 Subject: [PATCH 3/3] Record M3 Pro integration tests and source triage Pin the packaged and rebooted source, targeted CTS results and library hashes. Record the existing CTS fixes and remaining native-path candidates. Full CTS remains a separate hardware run. Generated-by: LLM Signed-off-by: Eryk Wieliczko --- OMACOM-M3PRO-20261026.json | 101 +++++++++++++++++++++++++++++++++++++ SILICONFOREST-REVIEW.md | 41 +++++++++++++++ SILICONFOREST-SOURCES.json | 14 ++++- 3 files changed, 155 insertions(+), 1 deletion(-) create mode 100644 OMACOM-M3PRO-20261026.json diff --git a/OMACOM-M3PRO-20261026.json b/OMACOM-M3PRO-20261026.json new file mode 100644 index 000000000000..214d33651483 --- /dev/null +++ b/OMACOM-M3PRO-20261026.json @@ -0,0 +1,101 @@ +{ + "schema": 1, + "recorded_utc": "2026-10-26T10:44:41.216352+00:00", + "model": "J514S, Apple M3 Pro (G15S B1)", + "source_repository": "https://github.com/omacom/mesa", + "integration_base": "7c86130d26cecd50c7af1ac01ff3fa1705d58045", + "tested_source": "eaf69705c33249bd5e4f4ac2211bdcc6fad94f63", + "tested_tree": "4ef9418d79cd92a353c5beae0d9dcd89d6efb167", + "kernel": "7.2.11-m3plasma-16575aa-ARCH", + "kernel_source": "16575aa9c769e9bede0ab58dc26f9d91dc07182f", + "kernel_prs": [ + "https://github.com/omacom/linux-aurora/pull/233", + "https://github.com/omacom/linux-aurora/pull/238" + ], + "package": "mesa-m3-pro-g15 26.3.0.omacom.eaf69705c3-1", + "package_sha256": "cad98edb9dcd296a6b6ba0eaecaf21771b1a912b2020446b61c817eebabef626", + "assertions_enabled": true, + "library_sha256": { + "opt/mesa-m3-pro-g15/lib/libvulkan_asahi.so": "22e5b5686b4d3e78c4a5c851a664683138fd895db814abf3e9a65b40d49e7ab5", + "opt/mesa-m3-pro-g15/lib/libasahi_noop_drm_shim.so": "5bf327deba3274d992ee20b92aff9271be09ad404178b2362a4240e1ea36afa2", + "opt/mesa-m3-pro-g15/lib/libgallium-26.3.0-devel.so": "8c739a31738042ff614fbacaba27e37317aa8b3859c16c872f4334595a04010d", + "opt/mesa-m3-pro-g15/lib/libGLX_mesa.so.0.0.0": "11cd754595287d5d6e49810502f2bcea06e3af41ab75307bb4ef8623968dbf20", + "opt/mesa-m3-pro-g15/lib/libgbm.so.1.0.0": "800a853315840ff5045666e2eccb5a52427abe7e6d39a65672d6c88101e01213", + "opt/mesa-m3-pro-g15/lib/libEGL_mesa.so.0.0.0": "6e00b003acbecef3cf577bea4fc663fd63180d0e3aa34c752ea4d30915400b6f" + }, + "validation": { + "host_meson_suites": 139, + "host_failures": 0, + "production_cpu_programs": 5, + "shim_profiles": "G13G/G15S/G15C/G17P/G15G admitted; Air obsolete opt-in 0/1 unchanged; G16G refused; zero validation errors, no submits", + "red_before_fix": "G15S maxBoundDescriptorSets assertion fails at source 25fe0160a0", + "fresh_boot": true, + "kwin_uses_packaged_libraries": true, + "gl_readback": { + "frames": 64, + "incorrect_channels": 0 + }, + "vk_descriptor_sets": { + "indices": [ + 0, + 7, + 8, + 15 + ], + "dispatches_each": 8, + "words_each": 524288, + "incorrect_words": 0, + "validation_errors": 0 + }, + "cts": { + "reported": { + "Pass": 6, + "Flake": 1 + }, + "focused": { + "Pass": 561, + "Warn": 4, + "Skip": 5 + }, + "wider": { + "Pass": 7054, + "Skip": 5198 + }, + "capabilities": { + "Pass": 359, + "Skip": 1670 + }, + "sets16": { + "Pass": 2694, + "Skip": 4320 + } + }, + "wider_results_identical_to_previous_installed_mesa": true, + "plasma_settings_launches": 10, + "plasma_light_dark_cycles": 10, + "kwin_pid_unchanged_during_plasma_test": true, + "plasma_coredumps": 0, + "gpu_recoveries": 0, + "gpu_hang_kills": 0, + "theme_restored_via_desktop_manager": true + }, + "benchmark": { + "capture_seconds": 10, + "resolution": [ + 1920, + 1080 + ], + "before_source": "ea2c18f45c496034fd97a833c027011d1216a9b1", + "before_fps": 370.24039515784386, + "after_fps": 416.4074536934211, + "same_game_pak_config_kernel": true, + "scope": "One matched sample each across the Mesa branch upgrade and reboot; not an isolated gain from the two new patches." + }, + "limitations": [ + "Full Vulkan 1.4 CTS not rerun; the user will run it separately.", + "Only J514S hardware was tested; other G15 profiles were preserved.", + "No full OpenGL conformance run.", + "The reported seven-case group contains one wrong-result flake (uaddcarry.uvec3_highp_geometry): outputs remained at the clear colour, then the automatic retry passed. Similar dropped draws predate this PR; cause unresolved.", + "All 384 conditional-rendering draw cases and all 60 clear-attachment cases skip; these paths are not hardware-qualified by this receipt." + ] +} diff --git a/SILICONFOREST-REVIEW.md b/SILICONFOREST-REVIEW.md index baf549798127..820f0ac8fdd8 100644 --- a/SILICONFOREST-REVIEW.md +++ b/SILICONFOREST-REVIEW.md @@ -185,3 +185,44 @@ the real `poly_heap` declaration. Twelve real XML-parser-to-callback checks covered negative, zero, in-range and oversized values, including 4096/5000 MiB; all allocated and published the same bounded size. Removing the clamp fails the maintained regression. These are host checks, without GPU qualification. + +## October 26 M3 Pro qualification + +The last local packed-GS-output and select-guard fixes are already covered +by `d4b6840f` and `ae035d59`; no duplicate production patches are imported. +Jonathan Goyvaerts's public `141481c` warning/build fixes are replayed with +original attribution and `-x` provenance. They resolve Clang's enabled-test +build failures in the command-stream header. + +Restore the conditional-rendering, unified-image-layouts, memory-budget and +sixteen-set profile on hardware-tested G15S only. Other G15 profiles and the +FMA/rounding and kernel/device admission checks retain their existing policy. +The actual-driver shim probe rejects the previous G15S profile and verifies +both the restored profile and the unchanged profiles. + +[The J514S receipt](OMACOM-M3PRO-20261026.json) pins built source `eaf69705c3`, +Arch package/library hashes and the initial kernel. GPU readbacks through +set 15, 139 host suites, the sixteen-set graphics/compute group and +Settings/theme cycles pass. + +The seven-case regression group has six passes and one intermittent failure +that passes retry. Geometry-shader output sometimes remains at the clear +colour; this was also observed with the earlier Mesa and kernel. The receipt +records a `uvec3_highp_geometry` failure; the rebased kernel `8824dd6` showed +the same symptom in `uint_highp_geometry`. This dropped-draw defect remains +unresolved and is not a clean pass or an established consequence of load. + +All 384 conditional-rendering draw cases and all 60 clear-attachment cases +skip. Exposing conditional rendering does not qualify these skipped paths; +the current full suite will not validate paths it also skips. Skips and +warnings remain in the receipt. Full Vulkan 1.4 CTS on the rebased stack is +pending the owner's run; the earlier full result belongs to a different Mesa. + +Newer shared-native candidates remain separate review work: bank-constrained +RA recovery (`c7d849e5`), passthrough-GS OOM reporting (`89bb9b98`), uniform +atomics (`52e35626`), application then internal compute DMA (`a29a074b`, +`43901729`), and occlusion availability (`e07644ef`, `360a1c91`). The blend +series `8fc7dc70` also touches shared native paths; its new constant-program +fast path requires G17P's qualified preamble. None is qualified on M3 by this +receipt. G17P-only timestamp/cache-range/signal optimizations, RT work and +virtio-only unbind handling are not direct-DRM M3 prerequisites. diff --git a/SILICONFOREST-SOURCES.json b/SILICONFOREST-SOURCES.json index 9f8a43b65c05..d8deab631e51 100644 --- a/SILICONFOREST-SOURCES.json +++ b/SILICONFOREST-SOURCES.json @@ -2856,7 +2856,7 @@ "review_hardening_commit": "db96168675f5464d5293caf48ed718792b2bed74" } ], - "last_integration_update": "2026-10-24", + "last_integration_update": "2026-10-26", "integration_followups_20261024": { "base": "7515336b3dfbe8943b555ffec9817b9ed64379a8", "aurora_merge": "5323fb87815718ca294ebe3c4f92b56cc18c577e", @@ -2866,5 +2866,17 @@ "kernel_header": "include/uapi/drm/asahi_drm.h", "hardware_qualified": false, "system_install_performed": false + }, + "integration_followups_20261026": { + "base": "7c86130d26cecd50c7af1ac01ff3fa1705d58045", + "public_source_repository": "https://github.com/aurora-silicon/mesa", + "public_source_inspected": "f2c9dc3fb59c81fdaf51f19884175c856e3d1889", + "imported_commit": "141481c19964ac29dbd1707d4c99a2dfbc638999", + "local_import_commit": "25fe0160a04e8d56c5ed01e9892164e9ee3e7127", + "tested_source": "eaf69705c33249bd5e4f4ac2211bdcc6fad94f63", + "hardware_record": "OMACOM-M3PRO-20261026.json", + "hardware_scope": "J514S/G15S only; targeted checks and reboot; full CTS pending", + "existing_gs_fix": "d4b6840f7af8a25af48566589af41609e0871b9e", + "existing_select_guard_fix": "ae035d592921d018c9431c4b1810300387e7d48b" } }