feat: enable traffic module enable all nrf52 and esp32 nodes

[h3lix1]

Summary
Enable Traffic Management by default for all ESP32 and nRF52 builds via shared compile-time defaults, and remove now-redundant per-variant definitions.

What Changed

• Updated src/mesh/mesh-pb-constants.h to default HAS_TRAFFIC_MANAGEMENT=1 on ARCH_ESP32 and ARCH_NRF52.
• Centralized default cache sizing:
  • 2048 on ESP32 boards with BOARD_HAS_PSRAM
  • 1024 on ESP32 boards without PSRAM
  • 1024 on nRF52
  • 0 when Traffic Management is disabled
• Removed redundant HAS_TRAFFIC_MANAGEMENT / TRAFFIC_MANAGEMENT_CACHE_SIZE overrides from:
  • variants/esp32s3/heltec_v4/variant.h
  • variants/esp32s3/station-g2/variant.h
  • variants/nrf52840/tracker-t1000-e/variant.h
• Left variants/native/portduino/variant.h unchanged, since the shared default logic does not apply to native builds.
• Updated docs/blog text to reflect architecture-wide default support and the revised cache sizing rules.

Why

• Avoid maintaining the same Traffic Management defines in multiple variants.
• Make support consistent across all ESP32 and nRF52 targets.
• Prevent non-PSRAM ESP32-S3 and similar boards from incorrectly inheriting the larger 2048 cache.

🤝 Attestations

• I have tested that my proposed changes behave as described.
• [XI have tested that my proposed changes do not cause any obvious regressions on the following devices:
  • Heltec (Lora32) V3
  • LilyGo T-Deck
  • LilyGo T-Beam
  • RAK WisBlock 4631
  • Seeed Studio T-1000E tracker card
  • Other (please specify below)
    Heltec v4
    Station G2

[hecatae]

I'm going to have to build and check this, but the Lilygo T3S3 series have only 2048 PSRAM, see
https://wiki.lilygo.cc/get_started/en/LoRa_GPS/T3S3/T3S3.html
https://wiki.lilygo.cc/get_started/en/LoRa_GPS/T3-S3-LR1121/T3-S3-LR1121.html
https://wiki.lilygo.cc/get_started/en/LoRa_GPS/T3-S3-E-paper/T3-S3-E-paper.html
https://wiki.lilygo.cc/get_started/en/LoRa_GPS/T3-S3_MVSRBoard/T3-S3_MVSRBoard.html

Are you aiming to max out the PSRAM on the T3S3 models with this traffic module?

[h3lix1]

I'm going to have to build and check this, but the Lilygo T3S3 series have only 2048 PSRAM, see

Are you aiming to max out the PSRAM on the T3S3 models with this traffic module?

The module should only use 20 Kilobytes of PSRAM. There isn't a goal to use all the PSRAM, but to be as light as possible on DRAM.