diff --git a/src/a5/runtime/tensormap_and_ringbuffer/runtime/hot_entry_alignment.h b/src/a5/runtime/tensormap_and_ringbuffer/runtime/hot_entry_alignment.h
new file mode 100644
index 0000000000..866a4f02fb
--- /dev/null
+++ b/src/a5/runtime/tensormap_and_ringbuffer/runtime/hot_entry_alignment.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) PyPTO Contributors.
+ * This program is free software, you can redistribute it and/or modify it under the terms and conditions of
+ * CANN Open Software License Agreement Version 2.0 (the "License").
+ * Please refer to the License for details. You may not use this file except in compliance with the License.
+ * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR IMPLIED,
+ * INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE.
+ * See LICENSE in the root of the software repository for the full text of the License.
+ * -----------------------------------------------------------------------------------------------------------
+ */
+
+#pragma once
+
+#if defined(__aarch64__) && defined(__linux__) && (defined(__GNUC__) || defined(__clang__))
+#define SIMPLER_A5_TMR_HOT_ENTRY_ALIGN __attribute__((aligned(64)))
+#else
+#define SIMPLER_A5_TMR_HOT_ENTRY_ALIGN
+#endif
diff --git a/src/a5/runtime/tensormap_and_ringbuffer/runtime/orchestrator.cpp b/src/a5/runtime/tensormap_and_ringbuffer/runtime/orchestrator.cpp
index 59d0de556c..f2881c3f5b 100644
--- a/src/a5/runtime/tensormap_and_ringbuffer/runtime/orchestrator.cpp
+++ b/src/a5/runtime/tensormap_and_ringbuffer/runtime/orchestrator.cpp
@@ -30,6 +30,7 @@
 #include "common/dep_gen.h"
 #include "common/unified_log.h"
 #include "dep_compute.h"
+#include "hot_entry_alignment.h"
 #include "runtime_types.h"
 #include "shared_memory.h"
 #include "tensormap_and_ringbuffer/task_id_encoding.h"
@@ -888,7 +889,7 @@ static bool ensure_tensormap_capacity(OrchestratorState *orch, int32_t needed) {
 // kernel_ids (all INVALID_KERNEL_ID for dummy). Performs tensormap sync, fanin
 // computation (explicit_deps + auto), output registration, slot init, and
 // Orch-side wiring/ready publication.
-static TaskOutputTensors submit_task_common(
+SIMPLER_A5_TMR_HOT_ENTRY_ALIGN static TaskOutputTensors submit_task_common(
     OrchestratorState *orch, const CoreTaskArgs &args, ActiveMask active_mask, TaskAttrs task_attrs,
     int32_t aic_kernel_id, int32_t aiv0_kernel_id, int32_t aiv1_kernel_id
 ) {
diff --git a/src/a5/runtime/tensormap_and_ringbuffer/runtime/scheduler/scheduler_completion.cpp b/src/a5/runtime/tensormap_and_ringbuffer/runtime/scheduler/scheduler_completion.cpp
index f7a054f818..472cd50ddb 100644
--- a/src/a5/runtime/tensormap_and_ringbuffer/runtime/scheduler/scheduler_completion.cpp
+++ b/src/a5/runtime/tensormap_and_ringbuffer/runtime/scheduler/scheduler_completion.cpp
@@ -19,6 +19,7 @@
 #include "common/chip_swimlane_profiling.h"
 #include "common/memory_barrier.h"
 #include "common/platform_config.h"
+#include "hot_entry_alignment.h"
 #include "runtime_core.h"
 #include "runtime.h"
 #include "spin_hint.h"
@@ -75,7 +76,7 @@ SlotTransition SchedulerContext::decide_slot_transition(
 }
 
 // Complete one slot's task: subtask counting, mixed completion, deferred release, profiling.
-void SchedulerContext::complete_slot_task(
+SIMPLER_A5_TMR_HOT_ENTRY_ALIGN void SchedulerContext::complete_slot_task(
     ChipTaskSlotState &slot_state, int32_t expected_reg_task_id, [[maybe_unused]] SubtaskSlot subslot,
     [[maybe_unused]] int32_t thread_idx, int32_t core_id, Handshake *hank, int32_t &completed_this_turn,
     ChipTaskSlotState *deferred_release_slot_states[], int32_t &deferred_release_count
diff --git a/src/a5/runtime/tensormap_and_ringbuffer/runtime/scheduler/scheduler_dispatch.cpp b/src/a5/runtime/tensormap_and_ringbuffer/runtime/scheduler/scheduler_dispatch.cpp
index 6f2cf594c1..a9f13b6fec 100644
--- a/src/a5/runtime/tensormap_and_ringbuffer/runtime/scheduler/scheduler_dispatch.cpp
+++ b/src/a5/runtime/tensormap_and_ringbuffer/runtime/scheduler/scheduler_dispatch.cpp
@@ -24,6 +24,7 @@
 #include "common/chip_swimlane_profiling.h"
 #include "common/memory_barrier.h"
 #include "common/platform_config.h"
+#include "hot_entry_alignment.h"
 #include "runtime_core.h"
 #include "runtime.h"
 #include "spin_hint.h"
@@ -839,7 +840,7 @@ int32_t SchedulerContext::try_early_dispatch(
 // Main scheduler dispatch loop
 // =============================================================================
 
-int32_t SchedulerContext::resolve_and_dispatch(Runtime *runtime, int32_t thread_idx) {
+SIMPLER_A5_TMR_HOT_ENTRY_ALIGN int32_t SchedulerContext::resolve_and_dispatch(Runtime *runtime, int32_t thread_idx) {
     always_assert(sched_ != nullptr);
     CoreTracker &tracker = core_trackers_[thread_idx];