diff --git a/Documentation/ABI/testing/procfs-smaps_rollup b/Documentation/ABI/testing/procfs-smaps_rollup index 0a54ed0d63c9..274df44d8b1b 100644 --- a/Documentation/ABI/testing/procfs-smaps_rollup +++ b/Documentation/ABI/testing/procfs-smaps_rollup @@ -3,18 +3,28 @@ Date: August 2017 Contact: Daniel Colascione Description: This file provides pre-summed memory information for a - process. The format is identical to /proc/pid/smaps, + process. The format is almost identical to /proc/pid/smaps, except instead of an entry for each VMA in a process, smaps_rollup has a single entry (tagged "[rollup]") for which each field is the sum of the corresponding fields from all the maps in /proc/pid/smaps. - For more details, see the procfs man page. + Additionally, the fields Pss_Anon, Pss_File and Pss_Shmem + are not present in /proc/pid/smaps. These fields represent + the sum of the Pss field of each type (anon, file, shmem). + For more details, see Documentation/filesystems/proc.txt + and the procfs man page. Typical output looks like this: 00100000-ff709000 ---p 00000000 00:00 0 [rollup] + Size: 1192 kB + KernelPageSize: 4 kB + MMUPageSize: 4 kB Rss: 884 kB Pss: 385 kB + Pss_Anon: 301 kB + Pss_File: 80 kB + Pss_Shmem: 4 kB Shared_Clean: 696 kB Shared_Dirty: 0 kB Private_Clean: 120 kB diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt index b9baeea45d9e..a7338dd6afcd 100644 --- a/Documentation/filesystems/proc.txt +++ b/Documentation/filesystems/proc.txt @@ -147,9 +147,11 @@ Table 1-1: Process specific entries in /proc symbol the task is blocked in - or "0" if not blocked. pagemap Page table stack Report full stack trace, enable via CONFIG_STACKTRACE - smaps an extension based on maps, showing the memory consumption of + smaps An extension based on maps, showing the memory consumption of each mapping and flags associated with it - numa_maps an extension based on maps, showing the memory locality and + smaps_rollup Accumulated smaps stats for all mappings of the process. This + can be derived from smaps, but is faster and more convenient + numa_maps An extension based on maps, showing the memory locality and binding policy as well as mem usage (in pages) of each mapping. .............................................................................. @@ -349,7 +351,7 @@ Table 1-4: Contents of the stat files (as of 2.6.30-rc7) exit_code the thread's exit_code in the form reported by the waitpid system call .............................................................................. -The /proc/PID/maps file containing the currently mapped memory regions and +The /proc/PID/maps file contains the currently mapped memory regions and their access permissions. The format is: @@ -402,11 +404,14 @@ is not associated with a file: or if empty, the mapping is anonymous. The /proc/PID/smaps is an extension based on maps, showing the memory -consumption for each of the process's mappings. For each of mappings there -is a series of lines such as the following: +consumption for each of the process's mappings. For each mapping (aka Virtual +Memory Area, or VMA) there is a series of lines such as the following: 08048000-080bc000 r-xp 00000000 03:02 13130 /bin/bash + Size: 1084 kB +KernelPageSize: 4 kB +MMUPageSize: 4 kB Rss: 892 kB Pss: 374 kB Shared_Clean: 892 kB @@ -428,11 +433,14 @@ Locked: 0 kB VmFlags: rd ex mr mw me dw Name: name from userspace -the first of these lines shows the same information as is displayed for the -mapping in /proc/PID/maps. The remaining lines show the size of the mapping -(size), the amount of the mapping that is currently resident in RAM (RSS), the -process' proportional share of this mapping (PSS), the number of clean and -dirty private pages in the mapping. +The first of these lines shows the same information as is displayed for the +mapping in /proc/PID/maps. Following lines show the size of the mapping +(size); the size of each page allocated when backing a VMA (KernelPageSize), +which is usually the same as the size in the page table entries; the page size +used by the MMU when backing a VMA (in most cases, the same as KernelPageSize); +the amount of the mapping that is currently resident in RAM (RSS); the +process' proportional share of this mapping (PSS); and the number of clean and +dirty shared and private pages in the mapping. The "proportional set size" (PSS) of a process is the count of pages it has in memory, where each page is divided by the number of processes sharing it. @@ -518,6 +526,19 @@ guarantees: 2) If there is something at a given vaddr during the entirety of the life of the smaps/maps walk, there will be some output for it. +The /proc/PID/smaps_rollup file includes the same fields as /proc/PID/smaps, +but their values are the sums of the corresponding values for all mappings of +the process. Additionally, it contains these fields: + +Pss_Anon +Pss_File +Pss_Shmem + +They represent the proportional shares of anonymous, file, and shmem pages, as +described for smaps above. These fields are omitted in smaps since each +mapping identifies the type (anon, file, or shmem) of all pages it contains. +Thus all information in smaps_rollup can be derived from smaps, but at a +significantly higher cost. The /proc/PID/clear_refs is used to reset the PG_Referenced and ACCESSED/YOUNG bits on both physical and virtual pages associated with a process, and the diff --git a/Documentation/sysctl/vm.txt b/Documentation/sysctl/vm.txt index 33c6df730a6b..61674561d465 100644 --- a/Documentation/sysctl/vm.txt +++ b/Documentation/sysctl/vm.txt @@ -19,7 +19,10 @@ files can be found in mm/swap.c. Currently, these files are in /proc/sys/vm: - admin_reserve_kbytes +- anon_min_kbytes - block_dump +- clean_low_kbytes +- clean_min_kbytes - compact_memory - compact_unevictable_allowed - dirty_background_bytes @@ -99,6 +102,23 @@ Changing this takes effect whenever an application requests memory. ============================================================== +anon_min_kbytes + +This knob provides *hard* protection of anonymous pages. The anonymous pages +on the current node won't be reclaimed under any conditions when their amount +is below vm.anon_min_kbytes. + +This knob may be used to prevent excessive swap thrashing when anonymous +memory is low (for example, when memory is going to be overfilled by +compressed data of zram module). + +Setting this value too high (close to MemTotal) can result in inability to +swap and can lead to early OOM under memory pressure. + +The default value is defined by CONFIG_ANON_MIN_KBYTES. + +============================================================== + block_dump block_dump enables block I/O debugging when set to a nonzero value. More @@ -106,6 +126,44 @@ information on block I/O debugging is in Documentation/laptops/laptop-mode.txt. ============================================================== +clean_low_kbytes + +This knob provides *best-effort* protection of clean file pages. The file pages +on the current node won't be reclaimed under memory pressure when the amount of +clean file pages is below vm.clean_low_kbytes *unless* we threaten to OOM. + +Protection of clean file pages using this knob may be used when swapping is +still possible to + - prevent disk I/O thrashing under memory pressure; + - improve performance in disk cache-bound tasks under memory pressure. + +Setting it to a high value may result in a early eviction of anonymous pages +into the swap space by attempting to hold the protected amount of clean file +pages in memory. + +The default value is defined by CONFIG_CLEAN_LOW_KBYTES. + +============================================================== + +clean_min_kbytes + +This knob provides *hard* protection of clean file pages. The file pages on the +current node won't be reclaimed under memory pressure when the amount of clean +file pages is below vm.clean_min_kbytes. + +Hard protection of clean file pages using this knob may be used to + - prevent disk I/O thrashing under memory pressure even with no free swap space; + - improve performance in disk cache-bound tasks under memory pressure; + - avoid high latency and prevent livelock in near-OOM conditions. + +Setting it to a high value may result in a early out-of-memory condition due to +the inability to reclaim the protected amount of clean file pages when other +types of pages cannot be reclaimed. + +The default value is defined by CONFIG_CLEAN_MIN_KBYTES. + +============================================================== + compact_memory Available only when CONFIG_COMPACTION is set. When 1 is written to the file, @@ -837,6 +895,14 @@ decrease the amount of swap. A value of 0 instructs the kernel not to initiate swap until the amount of free and file-backed pages is less than the high water mark in a zone. +This knob has no effect if the amount of clean file pages on the current +node is below vm.clean_low_kbytes or vm.clean_min_kbytes. In this case, +only anonymous pages can be reclaimed. + +If the number of anonymous pages on the current node is below +vm.anon_min_kbytes, then only file pages can be reclaimed with +any vm.swappiness value. + The default value is 60. ============================================================== diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 4d75cff64e43..af8661d62c1f 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -1,4 +1,41 @@ # SPDX-License-Identifier: GPL-2.0 +ifeq ($(CONFIG_MACH_XIAOMI),y) + +ifeq ($(CONFIG_MACH_XIAOMI_SM8150),y) +ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) + dtbo-$(CONFIG_ARCH_SM8150) += \ + andromeda-sm8150-overlay.dtbo \ + andromeda-sm8150-p1-overlay.dtbo \ + andromeda-sm8150-p1_1-overlay.dtbo \ + andromeda-sm8150-p2-overlay.dtbo \ + andromeda-sm8150-p2_1-overlay.dtbo \ + andromeda-sm8150-p2_2-overlay.dtbo \ + andromeda-sm8150-p2_21-overlay.dtbo \ + andromeda-sm8150-p2_22-overlay.dtbo \ + cepheus-sm8150-overlay.dtbo \ + crux-sm8150-overlay.dtbo \ + nabu-sm8150-overlay.dtbo \ + raphael-sm8150-overlay.dtbo \ + vayu-sm8150-overlay.dtbo + +andromeda-sm8150-overlay.dtbo-base := sm8150-xiaomi.dtb sm8150-v2-xiaomi.dtb sm8150p-xiaomi.dtb sm8150p-v2-xiaomi.dtb +andromeda-sm8150-p1-overlay.dtbo-base := sm8150-xiaomi.dtb sm8150-v2-xiaomi.dtb sm8150p-xiaomi.dtb sm8150p-v2-xiaomi.dtb +andromeda-sm8150-p1_1-overlay.dtbo-base := sm8150-xiaomi.dtb sm8150-v2-xiaomi.dtb sm8150p-xiaomi.dtb sm8150p-v2-xiaomi.dtb +andromeda-sm8150-p2-overlay.dtbo-base := sm8150-xiaomi.dtb sm8150-v2-xiaomi.dtb sm8150p-xiaomi.dtb sm8150p-v2-xiaomi.dtb +andromeda-sm8150-p2_1-overlay.dtbo-base := sm8150-xiaomi.dtb sm8150-v2-xiaomi.dtb sm8150p-xiaomi.dtb sm8150p-v2-xiaomi.dtb +andromeda-sm8150-p2_2-overlay.dtbo-base := sm8150-xiaomi.dtb sm8150-v2-xiaomi.dtb sm8150p-xiaomi.dtb sm8150p-v2-xiaomi.dtb +andromeda-sm8150-p2_21-overlay.dtbo-base := sm8150-xiaomi.dtb sm8150-v2-xiaomi.dtb sm8150p-xiaomi.dtb sm8150p-v2-xiaomi.dtb +andromeda-sm8150-p2_22-overlay.dtbo-base := sm8150-xiaomi.dtb sm8150-v2-xiaomi.dtb sm8150p-xiaomi.dtb sm8150p-v2-xiaomi.dtb +cepheus-sm8150-overlay.dtbo-base := sm8150-xiaomi.dtb sm8150-v2-xiaomi.dtb sm8150p-xiaomi.dtb sm8150p-v2-xiaomi.dtb +crux-sm8150-overlay.dtbo-base := sm8150-xiaomi.dtb sm8150-v2-xiaomi.dtb sm8150p-xiaomi.dtb sm8150p-v2-xiaomi.dtb +nabu-sm8150-overlay.dtbo-base := sm8150-xiaomi.dtb sm8150-v2-xiaomi.dtb sm8150p-xiaomi.dtb sm8150p-v2-xiaomi.dtb +raphael-sm8150-overlay.dtbo-base := sm8150-xiaomi.dtb sm8150-v2-xiaomi.dtb sm8150p-xiaomi.dtb sm8150p-v2-xiaomi.dtb +vayu-sm8150-overlay.dtbo-base := sm8150-xiaomi.dtb sm8150-v2-xiaomi.dtb sm8150p-xiaomi.dtb sm8150p-v2-xiaomi.dtb +endif # CONFIG_BUILD_ARM64_DT_OVERLAY +endif # CONFIG_MACH_XIAOMI_SM8150 + +else # CONFIG_MACH_XIAOMI + ifeq ($(TARGET_BOARD_TYPE),auto) ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y) dtbo-$(CONFIG_ARCH_SM8150) += \ @@ -588,6 +625,8 @@ endif endif +endif # CONFIG_MACH_XIAOMI + ifeq ($(CONFIG_ARM64),y) always := $(dtb-y) subdir-y := $(dts-dirs) diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-overlay.dts b/arch/arm64/boot/dts/qcom/andromeda-sm8150-overlay.dts new file mode 100644 index 000000000000..3ad6b24cf95d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-overlay.dts @@ -0,0 +1,34 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "xiaomi/overlay/andromeda/andromeda-sm8150.dtsi" +#include "xiaomi/overlay/andromeda/andromeda-audio-overlay.dtsi" + +#include "sdx5xm-external-soc.dtsi" +#include "sm8150-sdx50m.dtsi" + +/ { + model = "SDX50M ANDROMEDA"; + compatible = "qcom,sm8150-mtp", "qcom,sm8150", "qcom,mtp"; + qcom,board-id = <0x27 0x1>; + +}; + diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1-overlay.dts b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1-overlay.dts new file mode 100644 index 000000000000..4babe5db12c5 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1-overlay.dts @@ -0,0 +1,36 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "xiaomi/overlay/andromeda/andromeda-audio-overlay.dtsi" + +#include "xiaomi/overlay/andromeda/andromeda-sm8150-p1.dtsi" +#include "xiaomi/overlay/andromeda/andromeda-pinctrl-p1.dtsi" + +#include "sdx5xm-external-soc.dtsi" +#include "sm8150-sdx50m.dtsi" + +/ { + model = "SDX50M ANDROMEDA"; + compatible = "qcom,sm8150-mtp", "qcom,sm8150", "qcom,mtp"; + qcom,board-id = <0x28 0x1>; + +}; + diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1_1-overlay.dts b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1_1-overlay.dts new file mode 100644 index 000000000000..dc4947679af7 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p1_1-overlay.dts @@ -0,0 +1,36 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "xiaomi/overlay/andromeda/andromeda-audio-overlay.dtsi" + +#include "xiaomi/overlay/andromeda/andromeda-sm8150-p1_1.dtsi" +#include "xiaomi/overlay/andromeda/andromeda-pinctrl-p1_1.dtsi" + +#include "sdx5xm-external-soc.dtsi" +#include "sm8150-sdx50m.dtsi" + +/ { + model = "SDX50M ANDROMEDA"; + compatible = "qcom,sm8150-mtp", "qcom,sm8150", "qcom,mtp"; + qcom,board-id = <0x2b 0x1>; + +}; + diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2-overlay.dts b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2-overlay.dts new file mode 100644 index 000000000000..3ba628d2b6f7 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2-overlay.dts @@ -0,0 +1,36 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "xiaomi/overlay/andromeda/andromeda-audio-overlay.dtsi" + +#include "xiaomi/overlay/andromeda/andromeda-sm8150-p2.dtsi" +#include "xiaomi/overlay/andromeda/andromeda-pinctrl-p2.dtsi" + +#include "sdx5xm-external-soc.dtsi" +#include "sm8150-sdx50m.dtsi" + +/ { + model = "SDX50M ANDROMEDA"; + compatible = "qcom,sm8150-mtp", "qcom,sm8150", "qcom,mtp"; + qcom,board-id = <0x29 0x1>; + +}; + diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_1-overlay.dts b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_1-overlay.dts new file mode 100644 index 000000000000..f28dab8c4852 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_1-overlay.dts @@ -0,0 +1,36 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "xiaomi/overlay/andromeda/andromeda-audio-overlay.dtsi" + +#include "xiaomi/overlay/andromeda/andromeda-sm8150-p2_1.dtsi" +#include "xiaomi/overlay/andromeda/andromeda-pinctrl-p2_1.dtsi" + +#include "sdx5xm-external-soc.dtsi" +#include "sm8150-sdx50m.dtsi" + +/ { + model = "SDX50M ANDROMEDA"; + compatible = "qcom,sm8150-mtp", "qcom,sm8150", "qcom,mtp"; + qcom,board-id = <0x2c 0x1>; + +}; + diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_2-overlay.dts b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_2-overlay.dts new file mode 100644 index 000000000000..f94584c4f4c0 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_2-overlay.dts @@ -0,0 +1,36 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "xiaomi/overlay/andromeda/andromeda-audio-overlay.dtsi" + +#include "xiaomi/overlay/andromeda/andromeda-sm8150-p2_2.dtsi" +#include "xiaomi/overlay/andromeda/andromeda-pinctrl-p2_2.dtsi" + +#include "sdx5xm-external-soc.dtsi" +#include "sm8150-sdx50m.dtsi" + +/ { + model = "SDX50M ANDROMEDA"; + compatible = "qcom,sm8150-mtp", "qcom,sm8150", "qcom,mtp"; + qcom,board-id = <0x2d 0x1>; + +}; + diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_21-overlay.dts b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_21-overlay.dts new file mode 100644 index 000000000000..5155ccfa4a7a --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_21-overlay.dts @@ -0,0 +1,36 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "xiaomi/overlay/andromeda/andromeda-audio-overlay.dtsi" + +#include "xiaomi/overlay/andromeda/andromeda-sm8150-p2_21.dtsi" +#include "xiaomi/overlay/andromeda/andromeda-pinctrl-p2_21.dtsi" + +#include "sdx5xm-external-soc.dtsi" +#include "sm8150-sdx50m.dtsi" + +/ { + model = "SDX50M ANDROMEDA"; + compatible = "qcom,sm8150-mtp", "qcom,sm8150", "qcom,mtp"; + qcom,board-id = <0x2e 0x1>; + +}; + diff --git a/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_22-overlay.dts b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_22-overlay.dts new file mode 100644 index 000000000000..38aa96ec0a75 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/andromeda-sm8150-p2_22-overlay.dts @@ -0,0 +1,36 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "xiaomi/overlay/andromeda/andromeda-audio-overlay.dtsi" + +#include "xiaomi/overlay/andromeda/andromeda-sm8150-p2_22.dtsi" +#include "xiaomi/overlay/andromeda/andromeda-pinctrl-p2_22.dtsi" + +#include "sdx5xm-external-soc.dtsi" +#include "sm8150-sdx50m.dtsi" + +/ { + model = "SDX50M ANDROMEDA"; + compatible = "qcom,sm8150-mtp", "qcom,sm8150", "qcom,mtp"; + qcom,board-id = <0x2f 0x1>; + +}; + diff --git a/arch/arm64/boot/dts/qcom/cepheus-sm8150-overlay.dts b/arch/arm64/boot/dts/qcom/cepheus-sm8150-overlay.dts new file mode 100644 index 000000000000..a3b5361e657b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/cepheus-sm8150-overlay.dts @@ -0,0 +1,29 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "xiaomi/overlay/cepheus/cepheus-sm8150.dtsi" +#include "xiaomi/overlay/cepheus/cepheus-audio-overlay.dtsi" + +/ { + model = "CEPHEUS"; + compatible = "qcom,sm8150-cdp", "qcom,sm8150", "qcom,cdp"; + qcom,board-id = <37 0>; +}; diff --git a/arch/arm64/boot/dts/qcom/crux-sm8150-overlay.dts b/arch/arm64/boot/dts/qcom/crux-sm8150-overlay.dts new file mode 100644 index 000000000000..a27fdcd6d6c5 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/crux-sm8150-overlay.dts @@ -0,0 +1,33 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "xiaomi/overlay/crux/crux-sm8150.dtsi" +#include "xiaomi/overlay/crux/crux-audio-overlay.dtsi" +#include "sdx5xm-external-soc.dtsi" +#include "sm8150-sdx50m.dtsi" + +/ { + model = "SDX50M CRUX"; + compatible = "qcom,sm8150-mtp", "qcom,sm8150", "qcom,mtp"; + qcom,board-id = <0x2B 0x1>; + +}; + diff --git a/arch/arm64/boot/dts/qcom/nabu-sm8150-overlay.dts b/arch/arm64/boot/dts/qcom/nabu-sm8150-overlay.dts new file mode 100644 index 000000000000..bb0eb37e5217 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/nabu-sm8150-overlay.dts @@ -0,0 +1,29 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "xiaomi/overlay/nabu/nabu-sm8150.dtsi" +#include "xiaomi/overlay/nabu/nabu-audio-overlay.dtsi" + +/ { + model = "NABU"; + compatible = "qcom,sm8150-cdp", "qcom,sm8150", "qcom,cdp"; + qcom,board-id = <48 0>; +}; diff --git a/arch/arm64/boot/dts/qcom/pm8150l.dtsi b/arch/arm64/boot/dts/qcom/pm8150l.dtsi index 3586af695f4f..b764ca015f11 100644 --- a/arch/arm64/boot/dts/qcom/pm8150l.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8150l.dtsi @@ -334,7 +334,7 @@ qcom,num-lpg-channels = <3>; qcom,lut-patterns = <0 10 20 30 40 50 60 70 80 90 100 90 80 70 60 50 40 30 20 10 0>; - lpg1 { + pwm_lpg1: lpg1 { qcom,lpg-chan-id = <1>; qcom,ramp-step-ms = <100>; qcom,ramp-pause-hi-count = <2>; @@ -345,7 +345,7 @@ qcom,ramp-pattern-repeat; }; - lpg2 { + pwm_lpg2: lpg2 { qcom,lpg-chan-id = <2>; qcom,ramp-step-ms = <100>; qcom,ramp-pause-hi-count = <2>; @@ -356,7 +356,7 @@ qcom,ramp-pattern-repeat; }; - lpg3 { + pwm_lpg3: lpg3 { qcom,lpg-chan-id = <3>; qcom,ramp-step-ms = <100>; qcom,ramp-pause-hi-count = <2>; @@ -379,19 +379,19 @@ pm8150l_rgb_led: qcom,leds@d000 { compatible = "qcom,tri-led"; reg = <0xd000 0x100>; - red { + red_led: red { label = "red"; pwms = <&pm8150l_lpg 0 1000000>; led-sources = <0>; linux,default-trigger = "timer"; }; - green { + green_led: green { label = "green"; pwms = <&pm8150l_lpg 1 1000000>; led-sources = <1>; linux,default-trigger = "timer"; }; - blue { + blue_led: blue { label = "blue"; pwms = <&pm8150l_lpg 2 1000000>; led-sources = <2>; diff --git a/arch/arm64/boot/dts/qcom/raphael-sm8150-overlay.dts b/arch/arm64/boot/dts/qcom/raphael-sm8150-overlay.dts new file mode 100644 index 000000000000..e3b35255216d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/raphael-sm8150-overlay.dts @@ -0,0 +1,29 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "xiaomi/overlay/raphael/raphael-sm8150.dtsi" +#include "xiaomi/overlay/raphael/raphael-audio-overlay.dtsi" + +/ { + model = "RAPHAEL"; + compatible = "qcom,sm8150-cdp", "qcom,sm8150", "qcom,cdp"; + qcom,board-id = <40 0>; +}; diff --git a/arch/arm64/boot/dts/qcom/sm8150-gpu-v2.dtsi b/arch/arm64/boot/dts/qcom/sm8150-gpu-v2.dtsi index bbf88b802122..18b1202464c9 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-gpu-v2.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-gpu-v2.dtsi @@ -14,6 +14,11 @@ gpu_opp_table_v2: gpu_opp_table_v2 { compatible = "operating-points-v2"; + opp-770000000 { + opp-hz = /bits/ 64 <770000000>; + opp-microvolt = ; + }; + opp-675000000 { opp-hz = /bits/ 64 <675000000>; opp-microvolt = ; diff --git a/arch/arm64/boot/dts/qcom/sm8150-sde-display.dtsi b/arch/arm64/boot/dts/qcom/sm8150-sde-display.dtsi index ddcd25ac1273..9e82bea8c132 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-sde-display.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-sde-display.dtsi @@ -561,7 +561,7 @@ &sde_dp { qcom,dp-usbpd-detection = <&pm8150b_pdphy>; qcom,ext-disp = <&ext_disp>; - qcom,dp-aux-switch = <&fsa4480>; + /* qcom,dp-aux-switch = <&fsa4480>; */ qcom,usbplug-cc-gpio = <&tlmm 38 0>; diff --git a/arch/arm64/boot/dts/qcom/sm8150-v2-xiaomi.dts b/arch/arm64/boot/dts/qcom/sm8150-v2-xiaomi.dts new file mode 100644 index 000000000000..47c6db4cffeb --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm8150-v2-xiaomi.dts @@ -0,0 +1,23 @@ +/* Copyright (c) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; + +#include "sm8150-v2.dtsi" +#include "xiaomi/base/sm8150.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SM8150 v2 SoC"; + compatible = "qcom,sm8150"; + qcom,pmic-name = "PM8150"; + qcom,board-id = <0 0>; +}; diff --git a/arch/arm64/boot/dts/qcom/sm8150-v2.dtsi b/arch/arm64/boot/dts/qcom/sm8150-v2.dtsi index 92ab8d316ea5..ede09fcc67e9 100644 --- a/arch/arm64/boot/dts/qcom/sm8150-v2.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150-v2.dtsi @@ -628,11 +628,11 @@ #size-cells = <0>; qcom,speed-bin = <0>; - qcom,initial-pwrlevel = <4>; + qcom,initial-pwrlevel = <6>; qcom,gpu-pwrlevel@0 { reg = <0>; - qcom,gpu-freq = <585000000>; + qcom,gpu-freq = <770000000>; qcom,bus-freq = <11>; qcom,bus-min = <11>; qcom,bus-max = <11>; @@ -640,38 +640,54 @@ qcom,gpu-pwrlevel@1 { reg = <1>; + qcom,gpu-freq = <675000000>; + qcom,bus-freq = <11>; + qcom,bus-min = <11>; + qcom,bus-max = <11>; + }; + + qcom,gpu-pwrlevel@2 { + reg = <2>; + qcom,gpu-freq = <585000000>; + qcom,bus-freq = <10>; + qcom,bus-min = <9>; + qcom,bus-max = <11>; + }; + + qcom,gpu-pwrlevel@3 { + reg = <3>; qcom,gpu-freq = <499200000>; qcom,bus-freq = <9>; qcom,bus-min = <8>; qcom,bus-max = <11>; }; - qcom,gpu-pwrlevel@2 { - reg = <2>; + qcom,gpu-pwrlevel@4 { + reg = <4>; qcom,gpu-freq = <427000000>; qcom,bus-freq = <6>; qcom,bus-min = <5>; qcom,bus-max = <9>; }; - qcom,gpu-pwrlevel@3 { - reg = <3>; + qcom,gpu-pwrlevel@5 { + reg = <5>; qcom,gpu-freq = <345000000>; qcom,bus-freq = <3>; qcom,bus-min = <3>; qcom,bus-max = <5>; }; - qcom,gpu-pwrlevel@4 { - reg = <4>; + qcom,gpu-pwrlevel@6 { + reg = <6>; qcom,gpu-freq = <257000000>; qcom,bus-freq = <3>; qcom,bus-min = <2>; qcom,bus-max = <4>; }; - qcom,gpu-pwrlevel@5 { - reg = <5>; + qcom,gpu-pwrlevel@7 { + reg = <7>; qcom,gpu-freq = <0>; qcom,bus-freq = <0>; qcom,bus-min = <0>; diff --git a/arch/arm64/boot/dts/qcom/sm8150-xiaomi.dts b/arch/arm64/boot/dts/qcom/sm8150-xiaomi.dts new file mode 100644 index 000000000000..b804a396c922 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm8150-xiaomi.dts @@ -0,0 +1,23 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; + +#include "sm8150.dtsi" +#include "xiaomi/base/sm8150.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SM8150 v1 SoC"; + compatible = "qcom,sm8150"; + qcom,pmic-name = "PM8150"; + qcom,board-id = <0 0>; +}; diff --git a/arch/arm64/boot/dts/qcom/sm8150p-v2-xiaomi.dts b/arch/arm64/boot/dts/qcom/sm8150p-v2-xiaomi.dts new file mode 100644 index 000000000000..470042197d16 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm8150p-v2-xiaomi.dts @@ -0,0 +1,23 @@ +/* Copyright (c) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; + +#include "sm8150p-v2.dtsi" +#include "xiaomi/base/sm8150.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SM8150P v2 SoC"; + compatible = "qcom,sm8150p"; + qcom,pmic-name = "PM8150"; + qcom,board-id = <0 0>; +}; diff --git a/arch/arm64/boot/dts/qcom/sm8150p-xiaomi.dts b/arch/arm64/boot/dts/qcom/sm8150p-xiaomi.dts new file mode 100644 index 000000000000..f7d46f5dd1bf --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sm8150p-xiaomi.dts @@ -0,0 +1,23 @@ +/* Copyright (c) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; + +#include "sm8150p.dtsi" +#include "xiaomi/base/sm8150.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SM8150P v1 SoC"; + compatible = "qcom,sm8150p"; + qcom,pmic-name = "PM8150"; + qcom,board-id = <0 0>; +}; diff --git a/arch/arm64/boot/dts/qcom/vayu-sm8150-overlay.dts b/arch/arm64/boot/dts/qcom/vayu-sm8150-overlay.dts new file mode 100644 index 000000000000..0e0129d3d871 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/vayu-sm8150-overlay.dts @@ -0,0 +1,29 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include + +#include "xiaomi/overlay/vayu/vayu-sm8150.dtsi" +#include "xiaomi/overlay/vayu/vayu-audio-overlay.dtsi" + +/ { + model = "VAYU"; + compatible = "qcom,sm8150-cdp", "qcom,sm8150", "qcom,cdp"; + qcom,board-id = <47 0>; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150-audio.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150-audio.dtsi new file mode 100644 index 000000000000..b923803e5fb0 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150-audio.dtsi @@ -0,0 +1,13 @@ +&snd_934x { + qcom,msm-mbhc-usbc-audio-supported = <1>; +}; + +&snd_934x { + /delete-property/ fsa4480-i2c-handle; +}; + +/* +&fsa4480 { + reg = <0x42>; +}; +*/ diff --git a/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150-camera.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150-camera.dtsi new file mode 100644 index 000000000000..34705a761b0d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150-camera.dtsi @@ -0,0 +1,23 @@ +&i2c_freq_100Khz_cci0 { + hw-scl-stretch-en = <1>; +}; + +&i2c_freq_400Khz_cci0 { + hw-scl-stretch-en = <1>; +}; + +&i2c_freq_custom_cci0 { + hw-scl-stretch-en = <0>; +}; + +&i2c_freq_100Khz_cci1 { + hw-scl-stretch-en = <1>; +}; + +&i2c_freq_400Khz_cci1 { + hw-scl-stretch-en = <1>; +}; + +&i2c_freq_custom_cci1 { + hw-scl-stretch-en = <0>; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150-pcie.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150-pcie.dtsi new file mode 100644 index 000000000000..137b831ca704 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150-pcie.dtsi @@ -0,0 +1,5 @@ +&pcie0 { + pinctrl-0 = <&pcie0_clkreq_default>; + /delete-property/ perst-gpio; + /delete-property/ wake-gpio; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150-pinctrl.dtsi new file mode 100644 index 000000000000..ec7306e17938 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150-pinctrl.dtsi @@ -0,0 +1,148 @@ +&ts_int_suspend { + config { + input-enable; + }; +}; + +&ts_reset_suspend { + config { + /delete-property/ bias-pull-down; + bias-disable; + output-low; + }; +}; + +/delete-node/ &pcie0_perst_default; +/delete-node/ &pcie0_wake_default; + +&nfc_enable_active { + mux { + pins = "gpio41", "gpio48"; + }; + + config { + pins = "gpio41", "gpio48"; + }; +}; + +&nfc_enable_suspend { + mux { + pins = "gpio41", "gpio48"; + }; + + config { + pins = "gpio41", "gpio48"; + }; +}; + +&quat_aux_pcm_sleep { + mux { + function = "func2"; + }; +}; + +&quat_aux_pcm_active { + mux { + function = "func2"; + }; +}; + +&quat_aux_pcm_din_sleep { + mux { + function = "func2"; + }; +}; + +&quat_aux_pcm_din_active { + mux { + function = "func2"; + }; +}; + +&quat_aux_pcm_dout_sleep { + mux { + function = "func2"; + }; +}; + +&quat_aux_pcm_dout_active { + mux { + function = "func2"; + }; +}; + +&tlmm { + tert_tdm { + cs35l41_int_default: cs35l41_int_default { + mux { + pins = "gpio10"; + function = "gpio"; + }; + config { + pins = "gpio10"; + bias-pull-up; + drive-strength = <8>; + input-enable; + }; + }; + }; +}; + +&tlmm { + /* USB C analog configuration */ + wcd_usbc_analog_en1 { + wcd_usbc_analog_en1_idle: wcd_usbc_ana_en1_idle { + mux { + pins = "gpio35"; + function = "gpio"; + }; + config { + pins = "gpio35"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + wcd_usbc_analog_en1_active: wcd_usbc_ana_en1_active { + mux { + pins = "gpio35"; + function = "gpio"; + }; + config { + pins = "gpio35"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + wcd_usbc_analog_en2n { + wcd_usbc_analog_en2n_idle: wcd_usbc_ana_en2n_idle { + mux { + pins = "gpio58"; + function = "gpio"; + }; + config { + pins = "gpio58"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + wcd_usbc_analog_en2n_active: wcd_usbc_ana_en2n_active { + mux { + pins = "gpio58"; + function = "gpio"; + }; + config { + pins = "gpio58"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150-regulator.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150-regulator.dtsi new file mode 100644 index 000000000000..6aedd1ecfa4b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150-regulator.dtsi @@ -0,0 +1,5 @@ +&pm8150_l13 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + qcom,init-voltage = <3000000>; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150.dtsi new file mode 100644 index 000000000000..2bdfd8672fff --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/base/sm8150.dtsi @@ -0,0 +1,93 @@ +/ { + aliases { + spi1 = &qupv3_se1_spi; + }; +}; + +&firmware { + android { + boot_devices = "soc/1d84000.ufshc"; + }; +}; + +&shared_meta { + parts = "vbmeta,boot,system,vendor,dtbo"; +}; + +&android_q_fstab { + odm { + status = "disabled"; + }; + vendor { + status = "disabled"; + }; +}; + +&reserved_memory { + xbl_dump_mem: xbl_dump_mem { + no-map; + reg = <0x0 0x85d00000 0x0 0x100000>; + }; +}; + +&pil_adsp_mem { + reg = <0x0 0x8be00000 0x0 0x2200000>; +}; + +&pil_modem_mem { + reg = <0x0 0x8e000000 0x0 0x9600000>; +}; + +&pil_video_mem { + reg = <0x0 0x97600000 0x0 0x500000>; +}; + +&pil_slpi_mem { + reg = <0x0 0x97b00000 0x0 0x1400000>; +}; + +&pil_ipa_fw_mem { + reg = <0x0 0x98f00000 0x0 0x10000>; +}; + +&pil_ipa_gsi_mem { + reg = <0x0 0x98f10000 0x0 0x5000>; +}; + +&pil_gpu_mem { + reg = <0x0 0x98f15000 0x0 0x2000>; +}; + +&pil_spss_mem { + reg = <0x0 0x99000000 0x0 0x100000>; +}; + +&pil_cdsp_mem { + reg = <0x0 0x99100000 0x0 0x1400000>; +}; + +&disp_rdump_memory { + status = "disabled"; +}; + +#include "trusty.dtsi" + +&qcom_seecom { + reg = <0x87900000 0x3E00000>; +}; + +&qcom_smcinvoke { + reg = <0x87900000 0x3E00000>; +}; + +&soc { + qcom,rmtfs_sharedmem@0 { + reg = <0x0 0x300000>; + }; +}; + +#include "sm8150-audio.dtsi" +#include "sm8150-camera.dtsi" +#include "sm8150-pcie.dtsi" +#include "sm8150-pinctrl.dtsi" +#include "sm8150-regulator.dtsi" diff --git a/arch/arm64/boot/dts/qcom/xiaomi/base/trusty.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/base/trusty.dtsi new file mode 100644 index 000000000000..5d054de89e9f --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/base/trusty.dtsi @@ -0,0 +1,28 @@ +/* Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + trusty { + #size-cells = <0x2>; + #address-cells = <0x2>; + ranges; + compatible = "android,trusty-smc-v1"; + log { + compatible = "android,trusty-log-v1"; + }; + virtio { + compatible = "android,trusty-virtio-v1"; + }; + }; + +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-audio-overlay.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-audio-overlay.dtsi new file mode 100644 index 000000000000..b3ea6495be41 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-audio-overlay.dtsi @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "../common/sm8150-audio-overlay.dtsi" + + +&snd_934x { + qcom,audio-routing = + "AIF4 VI", "MCLK", + "RX_BIAS", "MCLK", + "MADINPUT", "MCLK", + "hifi amp", "LINEOUT1", + "hifi amp", "LINEOUT2", + "MIC BIAS2", "Headset Mic", + "AMIC2_EXT_0", "MIC BIAS2", + "MIC BIAS4", "ANCLeft Headset Mic", + "AMIC2_EXT_1", "MIC BIAS4", + "MIC BIAS1", "ANCRight Headset Mic", + "AMIC3", "MIC BIAS1", + "AMIC4", "MIC BIAS1", + "MIC BIAS1", "ANCRight Headset Mic", + "AMIC1", "MIC BIAS4", + "MIC BIAS4", "ANCLeft Headset Mic"; + + qcom,uart-audio-sw-gpio = <&sbu_uart_en>; + qcom,adc2-switch-gpio = <&adc2_switch_gpio>; + qcom,msm-mbhc-usbc-audio-supported = <1>; + qcom,fsa4476-gpio-support = <1>; + qcom,usbc-analog-en1_gpio = <&wcd_usbc_analog_en1_gpio>; + qcom,usbc-analog-en2_n_gpio = <&wcd_usbc_analog_en2n_gpio>; + qcom,usbc-analog-en2-gpio = <&tlmm 35 0>; + + pinctrl-names = "quat_mi2s_enable", "quat_mi2s_disable", + "quat_tdm_enable", "quat_tdm_disable"; + pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active &quat_mi2s_sd1_active>; + pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep &quat_mi2s_sd1_sleep>; + pinctrl-2 = <&quat_tdm_active &quat_tdm_dout_active>; + pinctrl-3 = <&quat_tdm_sleep &quat_tdm_dout_sleep>; +}; + +&soc { + sbu_uart_en: msm_cdc_pinctrl@25 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&sbu_uart_en_active>; + pinctrl-1 = <&sbu_uart_en_idle>; + }; + + adc2_switch_gpio: msm_cdc_pinctrl@130 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&adc2_switch_gpio_active>; + pinctrl-1 = <&adc2_switch_gpio_idle>; + }; + + wcd_usbc_analog_en1_gpio: msm_cdc_pinctrl@152 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wcd_usbc_analog_en1_active>; + pinctrl-1 = <&wcd_usbc_analog_en1_idle>; + }; + + wcd_usbc_analog_en2n_gpio: msm_cdc_pinctrl_usbc_audio_en2 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wcd_usbc_analog_en2n_active>; + pinctrl-1 = <&wcd_usbc_analog_en2n_idle>; + }; + +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p1.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p1.dtsi new file mode 100644 index 000000000000..8608642bee99 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p1.dtsi @@ -0,0 +1,125 @@ +/*for E5 5G pinctrl*/ + +&tlmm { + + nfc { + nfc_int_active { + /* active state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_int_suspend { + /* sleep state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_active { + /* active state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio36", "gpio48"; + function = "gpio"; + }; + + config { + pins = "gpio36", "gpio48"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_suspend { + /* sleep state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio36", "gpio48"; + function = "gpio"; + }; + + config { + pins = "gpio36", "gpio48"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + + nfc_clk_req_active { + /* active state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_clk_req_suspend { + /* sleep state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + }; + ai_key_ctrl { + ai_key_active { + mux { + pins = "gpio41"; + function = "gpio"; + }; + config { + pins = "gpio41"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + + }; + + ai_key_idle { + mux { + pins = "gpio41"; + function = "gpio"; + }; + config { + pins = "gpio41"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + }; + }; + +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p1_1.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p1_1.dtsi new file mode 100644 index 000000000000..b7a31e8b2aae --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p1_1.dtsi @@ -0,0 +1,2 @@ +/*for E5 5G pinctrl*/ +#include "andromeda-pinctrl-p1.dtsi" diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p2.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p2.dtsi new file mode 100644 index 000000000000..549da08e5a9b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p2.dtsi @@ -0,0 +1,2 @@ +/*for E5 5G pinctrl*/ +#include "andromeda-pinctrl-p1_1.dtsi" diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p2_1.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p2_1.dtsi new file mode 100644 index 000000000000..b81dd3abfcd4 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p2_1.dtsi @@ -0,0 +1,2 @@ +/*for E5 5G pinctrl*/ +#include "andromeda-pinctrl-p2.dtsi" diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p2_2.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p2_2.dtsi new file mode 100644 index 000000000000..b81dd3abfcd4 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p2_2.dtsi @@ -0,0 +1,2 @@ +/*for E5 5G pinctrl*/ +#include "andromeda-pinctrl-p2.dtsi" diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p2_21.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p2_21.dtsi new file mode 100644 index 000000000000..b81dd3abfcd4 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p2_21.dtsi @@ -0,0 +1,2 @@ +/*for E5 5G pinctrl*/ +#include "andromeda-pinctrl-p2.dtsi" diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p2_22.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p2_22.dtsi new file mode 100644 index 000000000000..b81dd3abfcd4 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl-p2_22.dtsi @@ -0,0 +1,2 @@ +/*for E5 5G pinctrl*/ +#include "andromeda-pinctrl-p2.dtsi" diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl.dtsi new file mode 100644 index 000000000000..309558a92cd5 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-pinctrl.dtsi @@ -0,0 +1,534 @@ +/*for E5 5G pinctrl*/ + +&tlmm { + + /* GPIO_119 : FP_RESET_N */ + msm_gpio_119: msm_gpio_119 { + mux { + pins = "gpio119"; + function = "gpio"; + }; + + config { + pins = "gpio119"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + /* GPIO_119 : FP_RESET_N, state device active*/ + msm_gpio_119_output_high: msm_gpio_119_output_high { + mux { + pins = "gpio119"; + function = "gpio"; + }; + + config { + pins = "gpio119"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + cam_sensor_active_wide: cam_sensor_active_wide { + /* WIDE RESET DVDDEN AVDDEN 1.8AVDDEN */ + mux { + pins = "gpio28", "gpio21"; + function = "gpio"; + }; + + config { + pins = "gpio28", "gpio21"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_wide: cam_sensor_suspend_wide { + /* WIDE RESET DVDDEN AVDDEN 1.8AVDDEN */ + mux { + pins = "gpio28", "gpio21"; + function = "gpio"; + }; + + config { + pins = "gpio28", "gpio21"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_tele: cam_sensor_active_tele { + /* TELE RESET DVDDEN AVDDEN */ + mux { + pins = "gpio30", "gpio29"; + function = "gpio"; + }; + + config { + pins = "gpio30", "gpio29"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_tele: cam_sensor_suspend_tele { + /* TELE RESET DVDDEN AVDDEN */ + mux { + pins = "gpio30", "gpio29"; + function = "gpio"; + }; + + config { + pins = "gpio30", "gpio29"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_front: cam_sensor_active_front { + /* FRONT RESET DVDDEN, AVDDEN */ + mux { + pins = "gpio12", "gpio32"; + function = "gpio"; + }; + + config { + pins = "gpio12", "gpio32"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_front: cam_sensor_suspend_front { + /* FRONT RESET DVDDEN, AVDDEN */ + mux { + pins = "gpio12", "gpio32"; + function = "gpio"; + }; + + config { + pins = "gpio12", "gpio32"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_ultra: cam_sensor_active_ultra { + /* ULTRA RESET DVDDEN AVDDEN */ + mux { + pins = "gpio23", "gpio33"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio33"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_ultra: cam_sensor_suspend_ultra { + /* ULTRA RESET DVDDEN AVDDEN */ + mux { + pins = "gpio23", "gpio33"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio33"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_actuator_wide_en: cam_actuator_wide_en { + mux { + pins = "gpio26"; + function = "gpio"; + }; + + config { + pins = "gpio26"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_actuator_tele_en: cam_actuator_tele_en { + mux { + pins = "gpio31"; + function = "gpio"; + }; + + config { + pins = "gpio31"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_viodd_en: cam_sensor_viodd_en { + mux { + pins = "gpio34"; + function = "gpio"; + }; + + config { + pins = "gpio34"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + adc2_switch_gpio_ctrl { + adc2_switch_gpio_idle: adc2_switch_idle { + mux { + pins = "gpio130"; + function = "gpio"; + }; + config { + pins = "gpio130"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + adc2_switch_gpio_active: adc2_switch_active { + mux { + pins = "gpio130"; + function = "gpio"; + }; + config { + pins = "gpio130"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + sbu_uart_en_ctrl { + sbu_uart_en_idle: uart_audio_en_idle { + mux { + pins = "gpio25"; + function = "gpio"; + }; + config { + pins = "gpio25"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + sbu_uart_en_active: uart_audio_en_active { + mux { + pins = "gpio25"; + function = "gpio"; + }; + config { + pins = "gpio25"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + nfc { + nfc_int_active: nfc_int_active { + /* active state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_int_suspend: nfc_int_suspend { + /* sleep state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_active: nfc_enable_active { + /* active state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio41", "gpio48"; + function = "gpio"; + }; + + config { + pins = "gpio41", "gpio48"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_suspend: nfc_enable_suspend { + /* sleep state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio41", "gpio48"; + function = "gpio"; + }; + + config { + pins = "gpio41", "gpio48"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + + nfc_clk_req_active: nfc_clk_req_active { + /* active state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_clk_req_suspend: nfc_clk_req_suspend { + /* sleep state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + }; + + ai_key_ctrl { + ai_key_active_default: ai_key_active { + mux { + pins = "gpio36"; + function = "gpio"; + }; + config { + pins = "gpio36"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + + }; + + ai_key_idle_default: ai_key_idle { + mux { + pins = "gpio36"; + function = "gpio"; + }; + config { + pins = "gpio36"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + }; + }; + + wcd_usbc_analog_en1 { + wcd_usbc_analog_en1_idle: wcd_usbc_ana_en1_idle { + mux { + pins = "gpio152"; + function = "gpio"; + }; + config { + pins = "gpio152"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + wcd_usbc_analog_en1_active: wcd_usbc_ana_en1_active { + mux { + pins = "gpio152"; + function = "gpio"; + }; + config { + pins = "gpio152"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + wcd_usbc_analog_en2n { + wcd_usbc_analog_en2n_idle: wcd_usbc_ana_en2n_idle { + mux { + pins = "gpio35"; + function = "gpio"; + }; + config { + pins = "gpio35"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + wcd_usbc_analog_en2n_active: wcd_usbc_ana_en2n_active { + mux { + pins = "gpio35"; + function = "gpio"; + }; + config { + pins = "gpio35"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + +}; + +&cam_sensor_mclk0_active { + /* MCLK0 */ + mux { + pins = "gpio13"; + function = "cam_mclk"; + }; + + config { + pins = "gpio13"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk0_suspend { + /* MCLK0 */ + mux { + pins = "gpio13"; + function = "cam_mclk"; + }; + + config { + pins = "gpio13"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk1_active { + /* MCLK1 */ + mux { + pins = "gpio14"; + function = "cam_mclk"; + }; + + config { + pins = "gpio14"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk1_suspend { + /* MCLK1 */ + mux { + pins = "gpio14"; + function = "cam_mclk"; + }; + + config { + pins = "gpio14"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk2_active { + /* MCLK2 */ + mux { + pins = "gpio15"; + function = "cam_mclk"; + }; + + config { + pins = "gpio15"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk2_suspend { + /* MCLK2 */ + mux { + pins = "gpio15"; + function = "cam_mclk"; + }; + + config { + pins = "gpio15"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk3_active { + /* MCLK3 */ + mux { + pins = "gpio16"; + function = "cam_mclk"; + }; + + config { + pins = "gpio16"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk3_suspend { + /* MCLK3 */ + mux { + pins = "gpio16"; + function = "cam_mclk"; + }; + + config { + pins = "gpio16"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; \ No newline at end of file diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-camera-sensor.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-camera-sensor.dtsi new file mode 100644 index 000000000000..964a7597f8b8 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-camera-sensor.dtsi @@ -0,0 +1,494 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&pm8150l_switch0 { + label = "switch"; + qcom,led-name = "led:switch_0"; + qcom,led-mask = <3>; + qcom,default-led-trigger = "switch0_trigger"; +}; + +&pm8150l_switch1 { + label = "switch"; + qcom,led-name = "led:switch_1"; + qcom,led-mask = <4>; + com,default-led-trigger = "switch1_trigger"; +}; + +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + reg = <0x00 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch0>; + status = "ok"; + }; + + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + reg = <0x01 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch0>; + status = "ok"; + }; + + led_flash_front: qcom,camera-flash@2 { + cell-index = <2>; + reg = <0x02 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash2>; + torch-source = <&pm8150l_torch2>; + switch-source = <&pm8150l_switch1>; + status = "ok"; + }; + + led_flash_front_aux: qcom,camera-flash@3 { + cell-index = <3>; + reg = <0x03 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash2>; + torch-source = <&pm8150l_torch2>; + switch-source = <&pm8150l_switch1>; + status = "ok"; + }; + + wide_actuator_regulator: gpio-regulator@0 { + compatible = "regulator-fixed"; + reg = <0x00 0x00>; + regulator-name = "actuator_regulator"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <100>; + enable-active-high; + gpio = <&tlmm 26 0>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_actuator_wide_en>; + vin-supply = <&pm8150l_bob>; + }; + + tele_actuator_regulator: gpio-regulator@1 { + compatible = "regulator-fixed"; + reg = <0x01 0x00>; + regulator-name = "actuator_regulator"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <100>; + enable-active-high; + gpio = <&tlmm 31 0>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_actuator_tele_en>; + vin-supply = <&pm8150l_bob>; + }; + + camera_viodd_ldo: gpio-regulator@2 { + compatible = "regulator-fixed"; + reg = <0x02 0x00>; + regulator-name = "camera_viodd_ldo"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <135>; + enable-active-high; + gpio = <&tlmm 34 0>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_sensor_viodd_en>; + vin-supply = <&pm8150_s4>; + }; + + camera_ois_regulator: gpio-regulator@3 { + compatible = "regulator-fixed"; + reg = <0x03 0x00>; + regulator-name = "camera_ois_regulator"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <100>; + enable-active-high; + gpio = <&tlmm 24 0>; + vin-supply = <&pm8150_s4>; + }; +}; + +&cam_cci1 { + cell-index = <1>; + compatible = "qcom,cci"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +}; + +&cam_cci0 { + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; + + actuator_rear: qcom,actuator@0 { + cell-index = <0>; + reg = <0x0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&wide_actuator_regulator>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + actuator_rear_aux: qcom,actuator@1 { + cell-index = <1>; + reg = <0x1>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&tele_actuator_regulator>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + ois_rear: qcom,ois@0 { + cell-index = <0>; + reg = <0x0>; + compatible = "qcom,ois"; + cci-master = <0>; + cam_vaf-supply = <&camera_ois_regulator>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + status = "ok"; + }; + + + eeprom_rear: qcom,eeprom@0 { + cell-index = <0>; + reg = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_wide>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_wide>; + gpios = <&tlmm 13 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK0"; + + sensor-mode = <0>; + cci-master = <0>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux: qcom,eeprom@1 { + cell-index = <1>; + reg = <0x1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_tele>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_tele>; + gpios = <&tlmm 13 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK0"; + + sensor-mode = <0>; + cci-master = <0>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_front: qcom,eeprom@2 { + cell-index = <2>; + reg = <0x2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0 >; + rgltr-max-voltage = <1800000 0 >; + rgltr-load-current = <1000 0 >; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK2"; + cci-device = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_front_aux: qcom,eeprom@3 { + cell-index = <3>; + reg = <0x03>; + compatible = "qcom,eeprom"; + slave-addr = <0xA2>; + i2c-freq-mode = <1>; + cam_vio-supply = <&camera_viodd_ldo>; + regulator-names = "cam_vio","cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_ultra>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_ultra>; + gpios = <&tlmm 16 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK3"; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + reg = <0x0>; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear>; + actuator-src = <&actuator_rear>; + eeprom-src = <&eeprom_rear>; + ois-src = <&ois_rear>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom1-supply = <&pm8150_l17>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0 2856000>; + rgltr-max-voltage = <1800000 4000000 1352000 0 3008000>; + rgltr-load-current = <1000 80000 1200000 0 10000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_wide>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_wide>; + gpios = <&tlmm 13 0>, + <&tlmm 28 0>, + <&tlmm 21 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET_W", + "CAM_VDD0_EN"; + sensor-mode = <0>; + cci-master = <0>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + reg = <0x1>; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear_aux>; + led-flash-src = <&led_flash_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom1-supply = <&pm8150_l17>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0 2856000>; + rgltr-max-voltage = <1800000 4000000 1352000 0 3008000>; + rgltr-load-current = <1000 80000 1200000 0 1000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_tele>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_tele>; + gpios = <&tlmm 14 0>, + <&tlmm 30 0>, + <&tlmm 29 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET_T", + "CAM_VDD1_EN"; + sensor-mode = <0>; + cci-master = <1>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + reg = <0x02>; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + led-flash-src = <&led_flash_front>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom1-supply = <&pm8150_l17>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0 2856000>; + rgltr-max-voltage = <1800000 4000000 1352000 0 3008000>; + rgltr-load-current = <1000 80000 1200000 0 1000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>, + <&tlmm 12 0>, + <&tlmm 32 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET_F", + "CAM_VDD2_EN"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + reg = <0x03>; + csiphy-sd-index = <3>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + led-flash-src = <&led_flash_front_aux>; + eeprom-src = <&eeprom_front_aux>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 0>; + rgltr-max-voltage = <1800000 4000000 0>; + rgltr-load-current = <1000 80000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_ultra>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_ultra>; + + gpios = <&tlmm 16 0>, + <&tlmm 23 0>, + <&tlmm 33 0>; + gpio-standby = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_PWD_U", + "CAM_VDD3_EN"; + sensor-mode = <0>; + cci-master = <0>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; + + diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p1.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p1.dtsi new file mode 100644 index 000000000000..075fad8a0371 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p1.dtsi @@ -0,0 +1,39 @@ +/* +this file is for attribution only of andromeda +And public attribution of xiaomi platforms(like E5 5G and so and) +*/ + +#include "andromeda-sm8150.dtsi" +&soc { + gpio_keys { + pinctrl-0 = <&ai_key_active_default>; + ai_key { + label = "ai_key"; + gpios = <&tlmm 41 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + gpio-key,wakeup; + debounce-interval = <39>; + }; + }; +}; +&qupv3_se9_i2c { + status = "ok"; + nq@28 { + compatible = "qcom,nq-nci"; + reg = <0x28>; + qcom,nq-irq = <&tlmm 47 0x00>; + qcom,nq-ven = <&tlmm 36 0x00>; + qcom,nq-firm = <&tlmm 48 0x00>; + qcom,nq-clkreq = <&tlmm 113 0x00>; + //qcom,nq-esepwr = <&tlmm 42 0x00>; + interrupt-parent = <&tlmm>; + interrupts = <47 0>; + interrupt-names = "nfc_irq"; + pinctrl-names = "nfc_active", "nfc_suspend"; + pinctrl-0 = <&nfc_int_active &nfc_enable_active + &nfc_clk_req_active>; + pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend + &nfc_clk_req_suspend>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p1_1.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p1_1.dtsi new file mode 100644 index 000000000000..3c441a515ab5 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p1_1.dtsi @@ -0,0 +1,9 @@ +/* +this file is for attribution only of andromeda +And public attribution of xiaomi platforms(like E5 5G and so and) +*/ + +#include "andromeda-sm8150-p1.dtsi" +&dsi_samsung_fhd_ea8076_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_external_supply>; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p2.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p2.dtsi new file mode 100644 index 000000000000..5e907d4f7f5a --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p2.dtsi @@ -0,0 +1,6 @@ +/* +this file is for attribution only of andromeda +And public attribution of xiaomi platforms(like E5 5G and so and) +*/ + +#include "andromeda-sm8150-p1_1.dtsi" diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p2_1.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p2_1.dtsi new file mode 100644 index 000000000000..d6ab8778539f --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p2_1.dtsi @@ -0,0 +1,6 @@ +/* +this file is for attribution only of andromeda +And public attribution of xiaomi platforms(like E5 5G and so and) +*/ + +#include "andromeda-sm8150-p2.dtsi" diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p2_2.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p2_2.dtsi new file mode 100644 index 000000000000..d6ab8778539f --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p2_2.dtsi @@ -0,0 +1,6 @@ +/* +this file is for attribution only of andromeda +And public attribution of xiaomi platforms(like E5 5G and so and) +*/ + +#include "andromeda-sm8150-p2.dtsi" diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p2_21.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p2_21.dtsi new file mode 100644 index 000000000000..d6ab8778539f --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p2_21.dtsi @@ -0,0 +1,6 @@ +/* +this file is for attribution only of andromeda +And public attribution of xiaomi platforms(like E5 5G and so and) +*/ + +#include "andromeda-sm8150-p2.dtsi" diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p2_22.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p2_22.dtsi new file mode 100644 index 000000000000..d6ab8778539f --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150-p2_22.dtsi @@ -0,0 +1,6 @@ +/* +this file is for attribution only of andromeda +And public attribution of xiaomi platforms(like E5 5G and so and) +*/ + +#include "andromeda-sm8150-p2.dtsi" diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150.dtsi new file mode 100644 index 000000000000..c5cb203bf7b5 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/andromeda/andromeda-sm8150.dtsi @@ -0,0 +1,659 @@ +/* +this file is for attribution only of andromeda +And public attribution of xiaomi platforms(like E5 5G and so and) +*/ + +#include "andromeda-pinctrl.dtsi" +#include "../common/xiaomi-sdx50-sm8150-common.dtsi" + +#include "andromeda-sm8150-camera-sensor.dtsi" + +&soc { + touch_vddio_vreg: touch_vddio_vreg { + compatible = "regulator-fixed"; + regulator-name = "disp_vddio_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + gpio = <&tlmm 37 0>; + }; + vdd_boost_vreg: vdd_boost_vreg { + compatible = "regulator-fixed"; + regulator-name = "vdd_boost_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-always-on; + gpio = <&pm8150b_gpios 5 0>; + }; + disp_vci_vreg: disp_vci_vreg { + compatible = "regulator-fixed"; + regulator-name = "disp_vci_vreg"; + start-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + gpio = <&tlmm 7 0>; + }; + + fp_vdd_vreg: fp_vdd_vreg { + compatible = "regulator-fixed"; + regulator-name = "fp_vdd_vreg"; + startup-delay-us = <4000>; + enable-active-high; + gpio = <&tlmm 92 0>; + regulator-always-on; + }; + fingerprint_fpc { + status = "ok"; + compatible = "fpc,fpc1020"; + interrupt-parent = <&tlmm>; + interrupts = <118 0x0>; + fpc,gpio_irq = <&tlmm 118 0x0>; + /* fpc,enable-on-boot; */ + /* fpc,enable-wakeup; */ + + pinctrl-names = "fpc1020_reset_reset", + "fpc1020_reset_active"; + + pinctrl-0 = <&msm_gpio_119>; + pinctrl-1 = <&msm_gpio_119_output_high>; + }; + pcie0: qcom,pcie@1c00000 { + status = "disabled"; + }; + + gpio_keys { + pinctrl-0 = <&ai_key_active_default>; + ai_key { + label = "ai_key"; + gpios = <&tlmm 36 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + gpio-key,wakeup; + debounce-interval = <39>; + }; + }; + +}; + +&sde_dsi { + vcie-supply = <&disp_vci_vreg>; +}; + +&pm8150l_lpg { + qcom,lut-patterns = <0 1 1 1 1 0>; +}; + +&pwm_lpg1 { + qcom,lpg-chan-id = <1>; + qcom,ramp-step-ms = <400>; + qcom,ramp-pause-hi-count = <0>; + qcom,ramp-pause-lo-count = <0>; + qcom,ramp-low-index = <0>; + qcom,ramp-high-index = <5>; + qcom,ramp-from-low-to-high; + qcom,ramp-pattern-repeat; +}; + +&red_led { + label = "white"; +}; + +&green_led { + status = "disabled"; +}; + +&blue_led { + status = "disabled"; +}; + +&qcom_qbt1000 { + status = "disabled"; +}; + +&qcom_seecom { + reg = <0x87900000 0x3E00000>; +}; + +&qcom_smcinvoke { + reg = <0x87900000 0x3E00000>; +}; + +&qupv3_se4_i2c { + status = "ok"; + + fsa4480@43 { + status = "disabled"; + }; +}; + +&qupv3_se8_i2c { + status = "ok"; + /*smart PA*/ + tas2557@4c{ + compatible = "ti,tas2557"; + reg = <0x4c>; + ti,cdc-reset-gpio = <&tlmm 59 0>; + ti,irq-gpio = <&tlmm 115 0>; + ti,i2s-bits = <16>; + ti,bypass-tmax = <0>; + }; +}; + +&qupv3_se17_i2c { + status = "ok"; + fts@49 { + compatible = "st,fts"; + reg = <0x49>; + interrupt-parent = <&tlmm>; + interrupts = <122 0x2008>; + pinctrl-names = "pmx_ts_active", "pmx_ts_suspend"; + pinctrl-0 = <&ts_active>; + pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; + vdd-supply = <&pm8150l_l1>; + avdd-supply = <&touch_vddio_vreg>; + fts,pwr-reg-name = "avdd"; + fts,bus-reg-name = "vdd"; + fts,irq-gpio = <&tlmm 122 0x2008>; + fts,irq-gpio-name = "fts_irq"; + fts,reset-gpio-enable; + fts,reset-gpio = <&tlmm 54 0x00>; + fts,reset-gpio-name = "fts_rst"; + fts,irq-flags = <0x2008>; /* IRQF_ONESHOT | IRQF_TRIGGER_LOW */ + fts,x-max = <1080>; + fts,y-max = <2340>; + fts,default-fw-name = "st_fts_e5.ftb"; + fts,config-array-size = <1>; + fts,dump-click-count; + fts,disable-fw-update; + fts,touch-up-threshold-min = <40>; + fts,touch-up-threshold-max = <120>; + fts,touch-up-threshold-def = <80>; + fts,touch-tolerance-min = <5>; + fts,touch-tolerance-max = <35>; + fts,touch-tolerance-def = <25>; + fts,touch-wgh-min-def = <1>; + fts,touch-wgh-min-max = <15>; + fts,touch-wgh-min-min = <0>; + fts,touch-wgh-max-def = <5>; + fts,touch-wgh-max-max = <15>; + fts,touch-wgh-max-min = <0>; + fts,touch-wgh-step-def = <1>; + fts,touch-wgh-step-max = <2>; + fts,touch-wgh-step-min = <0>; + fts,edgefilter-leftrigt-def = <45>; + fts,edgefilter-topbottom-def = <0>; + fts,edgefilter-top-ingamemode = <0>; + fts,edgefilter-bottom-ingamemode = <0>; + fts,edgefilter-area-step1 = <100>; + fts,edgefilter-area-step2 = <170>; + fts,edgefilter-area-step3 = <250>; + fts,cfg_0 { + fts,tp-vendor = <0x52>; + fts,fw-name = "st_fts_e5.ftb"; + fts,limit-name = "stm_fts_production_limits.csv"; + fts,clicknum-file-name = "fts+sdc"; + }; + }; +}; + +&vendor { + mtp_batterydata: qcom,battery-data { + qcom,batt-id-range-pct = <15>; + #include "../common/battery/batterydata-E5G-coslight-3700mah.dtsi" + #include "../common/battery/fg-gen4-batterydata-alium-3600mah_E5G.dtsi" + }; +}; + +&pm8150b_fg { + qcom,battery-data = <&mtp_batterydata>; + qcom,rapid-soc-dec-en; + qcom,fg-sys-term-current = <(-300)>; + qcom,fg-cutoff-voltage = <3400>; + qcom,fg-cutoff-current = <200>; + qcom,fg-empty-voltage = <3100>; + qcom,fg-batt-temp-delta = <6>; + qcom,fg-force-load-profile; + /* ESR fast calibration */ + qcom,fg-esr-timer-chg-fast = <0 7>; + qcom,fg-esr-timer-dischg-fast = <0 7>; + qcom,fg-esr-timer-chg-slow = <0 96>; + qcom,fg-esr-timer-dischg-slow = <0 96>; + qcom,fg-esr-cal-soc-thresh = <26 230>; + qcom,fg-esr-cal-temp-thresh = <10 40>; +}; + +&pm8150b_charger { + qcom,sec-charger-config = <1>; + qcom,usb-icl-ua = <2800000>; + qcom,fcc-max-ua = <3700000>; + qcom,fv-max-uv = <4450000>; + qcom,auto-recharge-soc = <99>; + qcom,chg-term-src = <1>; + qcom,chg-term-current-ma = <(-220)>; + qcom,thermal-mitigation = <3000000 2800000 2600000 2400000 2200000 2100000 2000000 + 1800000 1600000 1500000 1400000 1200000 1000000 900000 + 800000 500000>; + qcom,thermal-mitigation-icl + = <2800000 2700000 2600000 2400000 2200000 2100000 2000000 + 1800000 1800000 1800000 1700000 1600000 1500000 1300000 + 1000000 750000>; + qcom,thermal-mitigation-dcp + = <1800000 1800000 1800000 1800000 1800000 1800000 1800000 + 1800000 1800000 1700000 1600000 1400000 1200000 1100000 + 1100000 1000000>; + qcom,thermal-mitigation-qc2 + = <1500000 1500000 1500000 1500000 1450000 1400000 1350000 + 1300000 1150000 1100000 1000000 900000 850000 750000 + 650000 500000>; + qcom,thermal-fcc-qc3-normal + = <3200000 3000000 2800000 2600000 2500000 2400000 2300000 + 2200000 2100000 1800000 1600000 1400000 1200000 1000000 + 750000 750000>; + qcom,thermal-fcc-qc3-cp + = <3600000 3500000 3400000 3300000 3200000 3200000 3200000 + 3200000 3200000 2800000 2400000 2200000 2000000 1300000 + 750000 700000>; + qcom,thermal-fcc-qc3-classb-cp + = <3700000 3700000 3700000 3700000 3700000 3700000 3700000 + 3700000 3700000 3600000 3400000 3200000 3000000 2200000 + 2000000 700000>; + qcom,thermal-mitigation-pd-base + = <3000000 2800000 2600000 2400000 2200000 2000000 1800000 + 1600000 1600000 1400000 1200000 1100000 1050000 1000000 + 950000 500000>; + qcom,thermal-fcc-pps-cp + = <3700000 3700000 3700000 3700000 3700000 3700000 3700000 + 3700000 3700000 3600000 3400000 3200000 3000000 2200000 + 2000000 700000>; + io-channels = <&pm8150b_vadc ADC_MID_CHG_DIV6>, + <&pm8150b_vadc ADC_USB_IN_V_16>, + <&pm8150b_vadc ADC_USB_IN_I>, + <&pm8150b_vadc ADC_SBUx>, + <&pm8150b_vadc ADC_VPH_PWR>, + <&pm8150b_vadc ADC_CHG_TEMP>; + io-channel-names = "mid_voltage", + "usb_in_voltage", + "usb_in_current", + "sbux_res", + "vph_voltage", + "chg_temp"; + qcom,battery-data = <&mtp_batterydata>; + dpdm-supply = <&usb2_phy0>; + qcom,distinguish-qc-class-ab; + qcom,lpd-disable; + qcom,sw-jeita-enable; + qcom,wd-bark-time-secs = <16>; +}; + +&ext_5v_boost { + status = "ok"; +}; + +&pm8150b_pdphy { + vbus-supply = <&ext_5v_boost>; +}; + +&usb0 { + dwc3@a600000 { + usb-phy = <&usb2_phy0>, <&usb_nop_phy>; + maximum-speed = "high-speed"; + }; +}; + +&usb2_phy0 { + qcom,param-override-seq = + <0x33 0x70 + 0x2c 0x74>; +}; + +&usb_qmp_dp_phy { + status = "disabled"; +}; + +&usb1 { + extcon = <&extcon_usb1>; + status = "disabled"; +}; + +&usb2_phy1 { + status = "disabled"; +}; + +&usb_qmp_phy { + status = "disabled"; +}; + +&pm8150b_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + wp_therm { + reg = ; + label = "wp_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + conn_therm { + reg = ; + label = "conn_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + chg_sbux { + reg = ; + label = "chg_sbux"; + qcom,pre-scaling = <1 3>; + }; + + mid_chg_div6 { + reg = ; + label = "chg_mid"; + qcom,pre-scaling = <1 6>; + }; + + usb_in_i_uv { + reg = ; + label = "usb_in_i_uv"; + qcom,pre-scaling = <1 1>; + }; + + usb_in_v_div_16 { + reg = ; + label = "usb_in_v_div_16"; + qcom,pre-scaling = <1 16>; + }; +}; + +&pm8150_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + xo_therm { + reg = ; + label = "xo_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + quiet_therm { + reg = ; + label = "quiet_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm0 { + reg = ; + label = "pa_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150l_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + cam_therm0 { + reg = ; + label = "cam_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + cam_therm1 { + reg = ; + label = "cam_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm1 { + reg = ; + label = "pa_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150b_adc_tm { + wp_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150_adc_tm { + xo_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + quiet_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150l_adc_tm { + cam_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + cam_therm1 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm1 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&thermal_zones { + wp_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150b_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + xo_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_XO_THERM_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + quiet_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + pa_therm0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cam_therm0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cam_therm1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + pa_therm1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM3_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; +}; + +&pm8150b_haptics { + qcom,vmax-mv = <2800>; + qcom,play-rate-us = <5102>; + + wf_0 { + /* CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_1 { + /* DOUBLE CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 3e]; + qcom,wf-brake-pattern = [03 01 01 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_2 { + /* TICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 3e]; + qcom,wf-brake-pattern = [03 01 01 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_3 { + /* THUD */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_4 { + /* POP */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_5 { + /* HEAVY CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 7e 7e]; + qcom,wf-brake-pattern = [03 03 01 00]; + qcom,wf-play-rate-us = <5102>; + }; +}; + +&ufshc_mem { + vdd-hba-supply = <&ufs_phy_gdsc>; + vdd-hba-fixed-regulator; + vcc-supply = <&pm8150_l10>; + vcc-voltage-level = <2950000 2960000>; + vccq2-supply = <&pm8150_s4>; + vcc-max-microamp = <750000>; + vccq2-max-microamp = <750000>; + + qcom,vddp-ref-clk-supply = <&pm8150_l9>; + qcom,vddp-ref-clk-max-microamp = <100>; + + status = "ok"; +}; + diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/cepheus/cepheus-audio-overlay.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/cepheus/cepheus-audio-overlay.dtsi new file mode 100644 index 000000000000..d36f44af1498 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/cepheus/cepheus-audio-overlay.dtsi @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "../common/sm8150-audio-overlay.dtsi" + +&snd_934x { + qcom,audio-routing = + "AIF4 VI", "MCLK", + "RX_BIAS", "MCLK", + "MADINPUT", "MCLK", + "hifi amp", "LINEOUT1", + "hifi amp", "LINEOUT2", + "AMIC2_EXT_0", "MIC BIAS2", + "MIC BIAS2", "Headset Mic", + "AMIC2_EXT_1", "MIC BIAS1", + "MIC BIAS1", "Headset Mic2", + "AMIC3", "MIC BIAS3", + "MIC BIAS3", "ANCRight Headset Mic", + "AMIC1", "MIC BIAS1", + "MIC BIAS1", "ANCLeft Headset Mic", + "AMIC4", "MIC BIAS3", + "MIC BIAS3", "ANCRight Headset Mic", + "AMIC5", "MIC BIAS4", + "MIC BIAS4", "Analog Mic5"; + + qcom,uart-audio-sw-gpio = <&sbu_uart_en>; + qcom,adc2-switch-gpio = <&adc2_switch_gpio>; + qcom,msm-mbhc-usbc-audio-supported = <1>; + qcom,fsa4476-gpio-support = <1>; + qcom,usbc-analog-en1_gpio = <&wcd_usbc_analog_en1_gpio>; + qcom,usbc-analog-en2_n_gpio = <&wcd_usbc_analog_en2n_gpio>; + qcom,usbc-analog-en2-gpio = <&tlmm 58 0>; + + pinctrl-names = "quat_mi2s_enable", "quat_mi2s_disable", + "quat_tdm_enable", "quat_tdm_disable"; + pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active &quat_mi2s_sd1_active>; + pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep &quat_mi2s_sd1_sleep>; + pinctrl-2 = <&quat_tdm_active &quat_tdm_dout_active>; + pinctrl-3 = <&quat_tdm_sleep &quat_tdm_dout_sleep>; +}; + +&soc { + sbu_uart_en: msm_cdc_pinctrl@25 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&sbu_uart_en_active>; + pinctrl-1 = <&sbu_uart_en_idle>; + }; + + adc2_switch_gpio: msm_cdc_pinctrl@142 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&adc2_switch_gpio_active>; + pinctrl-1 = <&adc2_switch_gpio_idle>; + }; + + wcd_usbc_analog_en1_gpio: msm_cdc_pinctrl@49 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wcd_usbc_analog_en1_active>; + pinctrl-1 = <&wcd_usbc_analog_en1_idle>; + }; + + wcd_usbc_analog_en2n_gpio: msm_cdc_pinctrl_usbc_audio_en2 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wcd_usbc_analog_en2n_active>; + pinctrl-1 = <&wcd_usbc_analog_en2n_idle>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/cepheus/cepheus-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/cepheus/cepheus-pinctrl.dtsi new file mode 100644 index 000000000000..7aeb99e672df --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/cepheus/cepheus-pinctrl.dtsi @@ -0,0 +1,539 @@ +/*for xiaomi pinctrl*/ +&tlmm { + pmx_ts_active { + ts_active: ts_active { + mux { + pins = "gpio122", "gpio12"; + function = "gpio"; + }; + config { + pins = "gpio122", "gpio12"; + drive-strength = <8>; + bias-pull-up; + }; + }; + }; + + pmx_ts_int_suspend { + ts_int_suspend: ts_int_suspend { + mux { + pins = "gpio122"; + function = "gpio"; + }; + config { + pins = "gpio122"; + drive-strength = <2>; + bias-pull-down; + input-enable; + }; + }; + }; + + pmx_ts_reset_suspend { + ts_reset_suspend: ts_reset_suspend { + mux { + pins = "gpio12"; + function = "gpio"; + }; + config { + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + }; + + idt { + idt_int_active: idt_int_active { + /* active state */ + mux { + /* GPIO 78 idt Read Interrupt */ + pins = "gpio90"; + function = "gpio"; + }; + + config { + pins = "gpio90"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + idt_int_suspend: idt_int_suspend { + /* sleep state */ + mux { + /* GPIO 78 idt Read Interrupt */ + pins = "gpio90"; + function = "gpio"; + }; + + config { + pins = "gpio90"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + idt_enable_active: idt_enable_active { + /* active state */ + mux { + /* GPIO 36 idt enable pin */ + pins = "gpio104"; + function = "gpio"; + }; + + config { + pins = "gpio104"; + drive-strength = <2>; + bias-disable; + bias-pull-down; + output-low; + }; + }; + + idt_enable_suspend: idt_enable_suspend { + /* sleep state */ + mux { + /* GPIO 36 idt enable pin */ + pins = "gpio104"; + function = "gpio"; + }; + + config { + pins = "gpio104"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + adc2_switch_gpio_ctrl { + adc2_switch_gpio_idle: adc2_switch_idle { + mux { + pins = "gpio142"; + function = "gpio"; + }; + config { + pins = "gpio142"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + adc2_switch_gpio_active: adc2_switch_active { + mux { + pins = "gpio142"; + function = "gpio"; + }; + config { + pins = "gpio142"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + sbu_uart_en_ctrl { + sbu_uart_en_idle: uart_audio_en_idle { + mux { + pins = "gpio25"; + function = "gpio"; + }; + config { + pins = "gpio25"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + sbu_uart_en_active: uart_audio_en_active { + mux { + pins = "gpio25"; + function = "gpio"; + }; + config { + pins = "gpio25"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + ai_key_ctrl { + ai_key_active_default: ai_key_active { + mux { + pins = "gpio97"; + function = "gpio"; + }; + config { + pins = "gpio97"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + + }; + + ai_key_idle_default: ai_key_idle { + mux { + pins = "gpio97"; + function = "gpio"; + }; + config { + pins = "gpio97"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + }; + }; + + pcie1 { + pcie1_wake_default: pcie1_wake_default { + mux { + pins = "gpio114"; + function = "gpio"; + }; + + config { + pins = "gpio114"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + nfc { + nfc_int_active: nfc_int_active { + /* active state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_int_suspend: nfc_int_suspend { + /* sleep state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_active: nfc_enable_active { + /* active state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio48", "gpio103"; + function = "gpio"; + }; + + config { + pins = "gpio48", "gpio103"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_suspend: nfc_enable_suspend { + /* sleep state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio48", "gpio103"; + function = "gpio"; + }; + + config { + pins = "gpio48", "gpio103"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + + nfc_clk_req_active: nfc_clk_req_active { + /* active state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_clk_req_suspend: nfc_clk_req_suspend { + /* sleep state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + }; + +}; +//camera voltage start +&cam_sensor_mclk0_active { + /* MCLK0 */ + mux { + pins = "gpio13"; + function = "cam_mclk"; + }; + + config { + pins = "gpio13"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk0_suspend { + /* MCLK0 */ + mux { + pins = "gpio13"; + function = "cam_mclk"; + }; + + config { + pins = "gpio13"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk1_active { + /* MCLK1 */ + mux { + pins = "gpio14"; + function = "cam_mclk"; + }; + + config { + pins = "gpio14"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk1_suspend { + /* MCLK1 */ + mux { + pins = "gpio14"; + function = "cam_mclk"; + }; + + config { + pins = "gpio14"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk2_active { + /* MCLK2 */ + mux { + pins = "gpio15"; + function = "cam_mclk"; + }; + + config { + pins = "gpio15"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk2_suspend { + /* MCLK2 */ + mux { + pins = "gpio15"; + function = "cam_mclk"; + }; + + config { + pins = "gpio15"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk3_active { + /* MCLK3 */ + mux { + pins = "gpio16"; + function = "cam_mclk"; + }; + + config { + pins = "gpio16"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk3_suspend { + /* MCLK3 */ + mux { + pins = "gpio16"; + function = "cam_mclk"; + }; + + config { + pins = "gpio16"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_active_rear { + /* RESET REAR2 */ + mux { + pins = "gpio30", "gpio59"; + function = "gpio"; + }; + + config { + pins = "gpio30", "gpio59"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_rear { + /* RESET REAR2 */ + mux { + pins = "gpio30", "gpio59"; + function = "gpio"; + }; + + config { + pins = "gpio30", "gpio59"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +&cam_sensor_active_rear_aux { + /* RESET REARAUX, VANA REARAUX */ + mux { + pins = "gpio23", "gpio29"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio29"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_rear_aux { + /* RESET REARAUX, VANA REARAUX */ + mux { + pins = "gpio23", "gpio29"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio29"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +&cam_sensor_active_front { + /* RESET FRONT, VANA FRONT*/ + mux { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio54","gpio118"; + function = "gpio"; + }; + + config { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio54","gpio118"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_front { + /* RESET FRONT, VANA FRONT*/ + mux { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio54","gpio118"; + function = "gpio"; + }; + + config { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio54","gpio118"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +&cam_sensor_active_iris { + /* RESET ULTRA, VANA VDIG ULTRA*/ + mux { + pins = "gpio28","gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio28","gpio94"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_iris { + /* RESET ULTRA, VANA VDIG ULTRA*/ + mux { + pins = "gpio28","gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio28","gpio94"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +//camera voltage end diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/cepheus/cepheus-sm8150-camera-sensor-mtp.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/cepheus/cepheus-sm8150-camera-sensor-mtp.dtsi new file mode 100644 index 000000000000..3f716ecc360a --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/cepheus/cepheus-sm8150-camera-sensor-mtp.dtsi @@ -0,0 +1,532 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + reg = <0x00 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_rear_aux1: qcom,camera-flash@1 { + cell-index = <1>; + reg = <0x01 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_front: qcom,camera-flash@2 { + cell-index = <2>; + reg = <0x02 0x00>; + compatible = "qcom,camera-flash"; + wled-flash-support; + flash-source = <&wled_flash>; + torch-source = <&wled_torch>; + switch-source = <&wled_switch>; + status = "ok"; + }; + + led_flash_rear_aux2: qcom,camera-flash@3 { + cell-index = <3>; + reg = <0x03 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + camera_viodd_ldo: gpio-regulator@0 { + compatible = "regulator-fixed"; + reg = <0x00 0x00>; + regulator-name = "camera_viodd_ldo"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <135>; + enable-active-high; + gpio = <&tlmm 132 0>; + vin-supply = <&pm8150_s4>; + }; + + actuator_rear_regulator: gpio-regulator@1 { + compatible = "regulator-fixed"; + reg = <0x01 0x00>; + regulator-name = "actuator_rear_regulator"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <135>; + enable-active-high; + gpio = <&tlmm 24 0>; + vin-supply = <&pm8150l_bob>; + }; + + actuator_rear_aux_ldo: gpio-regulator@2 { + compatible = "regulator-fixed"; + reg = <0x02 0x00>; + regulator-name = "actuator_rear_aux_ldo"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <135>; + enable-active-high; + gpio = <&tlmm 152 0>; + vin-supply = <&pm8150l_bob>; + }; + + actuator_ultra_ldo: gpio-regulator@3 { + compatible = "regulator-fixed"; + reg = <0x03 0x00>; + regulator-name = "actuator_ultra_ldo"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <135>; + enable-active-high; + gpio = <&tlmm 95 0>; + vin-supply = <&pm8150l_bob>; + }; +}; + +&cam_cci1 { + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; + + actuator_rear: qcom,actuator@0 { + cell-index = <0>; + reg = <0x0>; + compatible = "qcom,actuator"; + cci-device = <0>; + cci-master = <1>; + cam_vaf-supply = <&actuator_rear_regulator>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + actuator_rear_aux: qcom,actuator@1 { + cell-index = <1>; + reg = <0x1>; + compatible = "qcom,actuator"; + cci-device = <1>; + cci-master = <1>; + cam_vaf-supply = <&actuator_rear_aux_ldo>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + actuator_front: qcom,actuator@2 { + cell-index = <2>; + reg = <0x2>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&actuator_rear_aux_ldo>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + actuator_ultra_rear: qcom,actuator@3 { + cell-index = <3>; + reg = <0x3>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&actuator_ultra_ldo>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + eeprom_rear: qcom,eeprom@0 { + cell-index = <0>; + reg = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150_s5>; + cam_vdig-supply = <&pm8150_l17>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 1904000 2856000 0>; + rgltr-max-voltage = <1800000 2040000 3008000 0>; + rgltr-load-current = <180000 112000 519000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 14 0>, + <&tlmm 30 0>, + <&tlmm 59 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0", + "CAM_VDIG0"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux: qcom,eeprom@1 { + cell-index = <1>; + reg = <0x1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150_s5>; + cam_vdig-supply = <&pm8150_l17>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 1904000 2856000 0>; + rgltr-max-voltage = <1800000 2040000 3008000 0>; + rgltr-load-current = <180000 112000 519000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 14 0>, + <&tlmm 30 0>, + <&tlmm 59 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0", + "CAM_VDIG0"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_ultra: qcom,eeprom@3 { + cell-index = <3>; + reg = <0x3>; + compatible = "qcom,eeprom"; + qcom,slave-addr = <0xa0>; + qcom,num-blocks = <1>; + qcom,page0 = <0 0 0 0 0 0 >; + qcom,poll0 = <0 0 0 0 0 0>; + qcom,mem0 = <8192 0x0 2 0 1 0>; + qcom,cam-power-seq-type = "cam_vio"; + qcom,cam-power-seq-val = <1>; + qcom,cam-power-seq-cfg-val = <1>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150_l17>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk";//, "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 2856000 0>; + rgltr-max-voltage = <1800000 4000000 3000000 0>; + rgltr-load-current = <180000 2000000 300000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_iris>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_iris>; + gpios = <&tlmm 13 0>,//mclk + <&tlmm 28 0>,//reset + <&tlmm 94 0>;//vana,vdig + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3", + "CAM_VDIG3"; + sensor-position = <0>; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_front: qcom,eeprom@2 { + cell-index = <2>; + reg = <0x2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150_l17>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk";//, "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 3000000 0>; + rgltr-max-voltage = <1800000 4000000 3000000 0>; + rgltr-load-current = <180000 2000000 30000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>,//mclk + <&tlmm 54 0>,//reset + //<&tlmm 132 0>,//vio + <&tlmm 118 0>;//vana,vidg + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-position = <1>; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + reg = <0x0>; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear>; + actuator-src = <&actuator_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150_s5>; + cam_vdig-supply = <&pm8150_l17>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 1904000 2856000 0>; + rgltr-max-voltage = <1800000 2040000 3008000 0>; + rgltr-load-current = <180000 112000 519000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 14 0>, + <&tlmm 30 0>, + <&tlmm 59 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0", + "CAM_VDIG0"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + + qcom,cam-sensor@1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + reg = <0x1>; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear_aux>; + led-flash-src = <&led_flash_rear_aux1>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vdig-supply = <&pm8150_l17>; + cam_vana-supply = <&pm8150l_bob>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk";//, "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 3000000 0>; + rgltr-max-voltage = <1800000 4000000 3000000 0>; + rgltr-load-current = <180000 2000000 300000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 16 0>,//mclk + <&tlmm 23 0>,//reset + <&tlmm 29 0>;//vana,vdig + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1", + "CAM_VANA1"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + + qcom,cam-sensor@2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + reg = <0x02>; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + actuator-src = <&actuator_front>; + //led-flash-src = <&led_flash_front>; + cam_vio-supply = <&camera_viodd_ldo>; + //cam_bob-supply = <&pm8150l_bob>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150_l17>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk";//, "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 3000000 0>; + rgltr-max-voltage = <1800000 4000000 3000000 0>; + rgltr-load-current = <180000 2000000 30000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>,//mclk + <&tlmm 54 0>,//reset + //<&tlmm 132 0>,//vio + <&tlmm 118 0>;//vana,vidg + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2", + "CAM_VANA2"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + +qcom,cam-sensor@3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + reg = <0x03>; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_ultra_rear>; + eeprom-src = <&eeprom_rear_ultra>; + led-flash-src = <&led_flash_rear_aux2>; + cam_vio-supply = <&camera_viodd_ldo>; + //cam_bob-supply = <&pm8150l_bob>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150_l17>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk";//, "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 2856000 0>; + rgltr-max-voltage = <1800000 4000000 3000000 0>; + rgltr-load-current = <180000 2000000 300000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_iris>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_iris>; + gpios = <&tlmm 13 0>,//mclk + <&tlmm 28 0>,//reset + <&tlmm 94 0>;//vana,vdig + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3", + "CAM_VDIG3"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; + + diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/cepheus/cepheus-sm8150.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/cepheus/cepheus-sm8150.dtsi new file mode 100644 index 000000000000..d9789a1dba6f --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/cepheus/cepheus-sm8150.dtsi @@ -0,0 +1,689 @@ +/* +this file is for attribution only of cepheus +And public attribution of xiaomi platforms(like F1 and so and) +*/ +#include "cepheus-pinctrl.dtsi" +#include "../common/xiaomi-sm8150-common.dtsi" +#include "cepheus-sm8150-camera-sensor-mtp.dtsi" + +#include "../common/smb1390.dtsi" + +&vendor { + mtp_batterydata: qcom,battery-data { + qcom,batt-id-range-pct = <15>; + #include "../common/battery/batterydata-F1-atl-3300mah.dtsi" + #include "../common/battery/batterydata-F1-coslight-3300mah.dtsi" + #include "../common/battery/fg-gen4-batterydata-alium-3600mah.dtsi" + }; +}; + +&pm8150b_fg { + qcom,battery-data = <&mtp_batterydata>; + qcom,rapid-soc-dec-en; + qcom,fg-sys-term-current = <(-400)>; + qcom,fg-cutoff-voltage = <3400>; + qcom,fg-cutoff-current = <200>; + qcom,fg-empty-voltage = <3100>; + qcom,fg-batt-temp-delta = <6>; + qcom,fg-force-load-profile; + /* ESR fast calibration */ + qcom,fg-esr-timer-chg-fast = <0 7>; + qcom,fg-esr-timer-dischg-fast = <0 7>; + qcom,fg-esr-timer-chg-slow = <0 96>; + qcom,fg-esr-timer-dischg-slow = <0 96>; + qcom,fg-esr-cal-soc-thresh = <26 230>; + qcom,fg-esr-cal-temp-thresh = <10 40>; +}; + +&pm8150b_charger { + qcom,sec-charger-config = <1>; + qcom,usb-icl-ua = <2800000>; + qcom,fcc-max-ua = <4800000>; + qcom,fv-max-uv = <4400000>; + qcom,dc-icl-ua = <1000000>; + qcom,auto-recharge-soc = <99>; + qcom,chg-term-src = <1>; + qcom,chg-term-current-ma = <(-220)>; + qcom,thermal-mitigation = <3000000 2800000 2600000 2400000 2200000 2100000 2000000 + 1800000 1600000 1500000 1400000 1200000 1000000 900000 + 800000 500000>; + qcom,thermal-mitigation-icl + = <2800000 2700000 2600000 2400000 2400000 2400000 2400000 + 2400000 2400000 2100000 1900000 1700000 1500000 1300000 + 1000000 750000>; + qcom,thermal-mitigation-dcp + = <1800000 1800000 1800000 1800000 1800000 1800000 1800000 + 1800000 1800000 1700000 1600000 1400000 1200000 1100000 + 1100000 1000000>; + qcom,thermal-mitigation-qc2 + = <1500000 1500000 1500000 1500000 1450000 1400000 1350000 + 1300000 1300000 1200000 1000000 900000 850000 750000 + 650000 500000>; + qcom,thermal-fcc-qc3-normal + = <3200000 3000000 2800000 2600000 2500000 2400000 2300000 + 2200000 2100000 1800000 1600000 1400000 1200000 1000000 + 750000 750000>; + qcom,thermal-fcc-qc3-cp + = <3600000 3600000 3600000 3600000 3200000 3200000 3200000 + 3200000 3100000 2800000 2400000 2200000 2000000 1300000 + 750000 700000>; + qcom,thermal-fcc-qc3-classb-cp + = <4800000 4700000 4600000 4500000 4400000 4200000 4200000 + 4200000 4000000 3600000 3400000 3200000 3000000 2200000 + 1000000 700000>; + qcom,thermal-mitigation-pd-base + = <3000000 2800000 2600000 2500000 2500000 2500000 2500000 + 2500000 2500000 2400000 2200000 2000000 1600000 1300000 + 1000000 500000>; + qcom,thermal-fcc-pps-cp + = <4800000 4700000 4600000 4500000 4400000 4200000 4200000 + 4200000 4000000 3600000 3400000 3200000 3000000 2200000 + 1000000 750000>; + qcom,thermal-mitigation-dc + = <2100000 2000000 1800000 1600000 1400000 1200000 1100000 + 1000000 900000 800000 700000 600000 500000 400000 + 300000 200000>; + qcom,thermal-mitigation-epp + = <1200000 1200000 1200000 1100000 1100000 1000000 1000000 + 1000000 900000 700000 700000 600000 500000 400000 + 300000 200000>; + qcom,thermal-mitigation-bpp-qc3 + = <1400000 1300000 1200000 1200000 1100000 1000000 900000 + 800000 700000 700000 700000 600000 500000 400000 + 300000 200000>; + qcom,thermal-mitigation-bpp-qc2 + = <1100000 1100000 1100000 1100000 1100000 1000000 1000000 + 1000000 700000 700000 700000 600000 500000 400000 + 300000 200000>; + qcom,thermal-mitigation-bpp + = <800000 800000 800000 800000 800000 800000 800000 + 800000 800000 700000 700000 600000 500000 400000 + 300000 200000>; + + io-channels = <&pm8150b_vadc ADC_MID_CHG_DIV6>, + <&pm8150b_vadc ADC_USB_IN_V_16>, + <&pm8150b_vadc ADC_USB_IN_I>, + <&pm8150b_vadc ADC_SBUx>, + <&pm8150b_vadc ADC_VPH_PWR>, + <&pm8150b_vadc ADC_CHG_TEMP>; + io-channel-names = "mid_voltage", + "usb_in_voltage", + "usb_in_current", + "sbux_res", + "vph_voltage", + "chg_temp"; + qcom,battery-data = <&mtp_batterydata>; + dpdm-supply = <&usb2_phy0>; + qcom,distinguish-qc-class-ab; + qcom,lpd-disable; + qcom,sw-jeita-enable; + qcom,wd-bark-time-secs = <16>; + qcom,support-wireless; + qcom,dynamic-fv-enable; +}; + +&ext_5v_boost { + status = "ok"; +}; + +&pm8150b_pdphy { + vbus-supply = <&ext_5v_boost>; +}; + +&qupv3_se4_i2c { + status = "ok"; + tas2557@4c { + compatible = "ti,tas2557"; + reg = <0x4c>; + //ti,cdc-reset-gpio = <&tlmm 59 0>; + ti,irq-gpio = <&tlmm 60 0>; + ti,i2s-bits = <16>; + ti,bypass-tmax = <0>; + }; + + fsa4480@43 { + status = "disabled"; + }; + + cs35l41@40 { + #sound-dai-cells = <1>; + compatible = "cirrus,cs35l41"; + cs,cdc-reset-gpio = <&tlmm 89 0x01>; + reg = <0x40>; + pinctrl-names = "cs35l41_irq_default"; + pinctrl-0 = <&cs35l41_int_default>; + interrupt-parent = <&tlmm>; + interrupts = <10 8>; + + cirrus,temp-warn_threshold = <3>; + cirrus,boost-peak-milliamp = <4000>; + cirrus,boost-ind-nanohenry = <1000>; + cirrus,boost-cap-microfarad = <15>; + cirrus,gpio-config2 { + cirrus,gpio-src-select = <0x4>; + cirrus,gpio-output-enable; + }; + }; + +}; + +&smb1390 { + pinctrl-names = "default"; + pinctrl-0 = <&smb_stat_default>; + status = "ok"; +}; + +&smb1390_charger { + io-channels = <&pm8150b_vadc ADC_AMUX_THM2>; + io-channel-names = "cp_die_temp"; + status = "ok"; +}; + +&usb0 { + dwc3@a600000 { + usb-phy = <&usb2_phy0>, <&usb_nop_phy>; + maximum-speed = "high-speed"; + }; +}; + +&usb2_phy0 { + qcom,param-override-seq = + <0x84 0x70 + 0x2c 0x74>; +}; + +&usb_qmp_dp_phy { + status = "disabled"; +}; + +&usb1 { + extcon = <&extcon_usb1>; + status = "disabled"; +}; + +&usb2_phy1 { + status = "disabled"; +}; + +&usb_qmp_phy { + status = "disabled"; +}; + +&soc { + touch_vddio_vreg: touch_vddio_vreg { + compatible = "regulator-fixed"; + regulator-name = "disp_vddio_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + gpio = <&tlmm 84 0>; + }; + + vdd_boost_vreg: vdd_boost_vreg { + compatible = "regulator-fixed"; + regulator-name = "vdd_boost_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-always-on; + gpio = <&pm8150b_gpios 5 0>; + }; + + disp_vci_vreg: disp_vci_vreg { + compatible = "regulator-fixed"; + regulator-name = "disp_vci_vreg"; + start-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + gpio = <&tlmm 21 0>; + }; + + fingerprint_goodix { + compatible = "goodix,fingerprint"; + goodix,gpio-reset = <&tlmm 37 0x0>; + goodix,gpio-irq = <&tlmm 120 0x0>; + fp-gpio-pwr = <&tlmm 125 0>; + status = "ok"; + }; + + gpio_keys { + pinctrl-0 = <&ai_key_active_default>; + ai_key { + label = "ai_key"; + gpios = <&tlmm 97 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + gpio-key,wakeup; + debounce-interval = <39>; + gpio-key,level-trigger; + }; + }; + + xiaomi_touch { + compatible = "xiaomi-touch"; + status = "ok"; + touch,name = "xiaomi-touch"; + }; +}; + +&qupv3_se17_i2c { + status = "ok"; + fts@49 { + compatible = "st,fts"; + reg = <0x49>; + interrupt-parent = <&tlmm>; + interrupts = <122 0x2008>; + pinctrl-names = "pmx_ts_active", "pmx_ts_suspend"; + pinctrl-0 = <&ts_active>; + pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; + vdd-supply = <&touch_vddio_vreg>; + avdd-supply = <&pm8150l_l1>; + fts,pwr-reg-name = "avdd"; + fts,bus-reg-name = "vdd"; + fts,irq-gpio = <&tlmm 122 0x2008>; + fts,irq-gpio-name = "fts_irq"; + fts,reset-gpio-enable; + fts,reset-gpio = <&tlmm 12 0x00>; + fts,reset-gpio-name = "fts_rst"; + fts,irq-flags = <0x2008>; /* IRQF_ONESHOT | IRQF_TRIGGER_LOW */ + fts,x-max = <1080>; + fts,y-max = <2340>; + fts,default-fw-name = "st_fts_f1.ftb"; + fts,config-array-size = <1>; + fts,dump-click-count; + fts,cfg_0 { + fts,tp-vendor = <0x48>; + fts,fw-name = "st_fts_f1.ftb"; + fts,limit-name = "stm_fts_production_limits.csv"; + fts,clicknum-file-name = "fts+sdc"; + }; + }; +}; + +&qupv3_se4_i2c { + status = "ok"; + idtp9220: idtp9220@3b { + compatible = "idt,p9220"; + reg = <0x3b>; + idt,irq = <&tlmm 90 0x00>; + idt,enable = <&tlmm 104 0x00>; + idt,wpc-det = <&pm8150b_gpios 7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default", "idt_active", "idt_suspend"; + pinctrl-0 = <&power_good_default>; + pinctrl-1 = <&idt_int_active &idt_enable_active>; + pinctrl-2 = <&idt_int_suspend &idt_enable_suspend>; + }; +}; + + +#include "../common/ir.dtsi" + +&pm8150l_lpg { + qcom,lut-patterns = <0 1 2 3 4 5 7 9 11 13 15 + 13 11 9 7 5 4 3 2 1 0>; +}; + +&pwm_lpg1 { + qcom,lpg-chan-id = <1>; + qcom,ramp-step-ms = <100>; + qcom,ramp-pause-hi-count = <2>; + qcom,ramp-pause-lo-count = <2>; + qcom,ramp-low-index = <0>; + qcom,ramp-high-index = <20>; + qcom,ramp-from-low-to-high; + qcom,ramp-pattern-repeat; +}; + +&red_led { + label = "white"; +}; + +&green_led { + status = "disabled"; +}; + +&blue_led { + status = "disabled"; +}; + +&sde_dsi { + vcie-supply = <&disp_vci_vreg>; +}; + +&dsi_samsung_fhd_ea8076_f1mp_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_external_supply>; +}; + +&dsi_samsung_fhd_ea8076_f1p2_2_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_external_supply>; +}; + +&dsi_samsung_fhd_ea8076_f1p2_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_external_supply>; +}; + +&pm8150b_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + wp_therm { + reg = ; + label = "wp_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + conn_therm { + reg = ; + label = "conn_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + chg_sbux { + reg = ; + label = "chg_sbux"; + qcom,pre-scaling = <1 3>; + }; + + mid_chg_div6 { + reg = ; + label = "chg_mid"; + qcom,pre-scaling = <1 6>; + }; + + usb_in_i_uv { + reg = ; + label = "usb_in_i_uv"; + qcom,pre-scaling = <1 1>; + }; + + usb_in_v_div_16 { + reg = ; + label = "usb_in_v_div_16"; + qcom,pre-scaling = <1 16>; + }; +}; + +&pm8150_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + xo_therm { + reg = ; + label = "xo_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + quiet_therm { + reg = ; + label = "quiet_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm0 { + reg = ; + label = "pa_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150l_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + cam_therm0 { + reg = ; + label = "cam_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + cam_therm1 { + reg = ; + label = "cam_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm1 { + reg = ; + label = "pa_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150b_adc_tm { + wp_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150_adc_tm { + xo_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + quiet_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150l_adc_tm { + cam_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + cam_therm1 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm1 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&thermal_zones { + wp_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150b_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + xo_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_XO_THERM_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + quiet_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + pa_therm0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cam_therm0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cam_therm1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + pa_therm1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM3_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; +}; + +&pm8150b_haptics { + qcom,vmax-mv = <2800>; + qcom,play-rate-us = <5102>; + + wf_0 { + /* CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_1 { + /* DOUBLE CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 3e]; + qcom,wf-brake-pattern = [03 01 01 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_2 { + /* TICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 3e]; + qcom,wf-brake-pattern = [03 01 01 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_3 { + /* THUD */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_4 { + /* POP */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_5 { + /* HEAVY CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 7e 7e]; + qcom,wf-brake-pattern = [03 03 01 00]; + qcom,wf-play-rate-us = <5102>; + }; +}; + +&soc { + ssc_sensors: qcom,msm-ssc-sensors { + compatible = "qcom,msm-ssc-sensors"; + status = "ok"; + qcom,firmware-name = "slpi_cp"; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/batterydata-E5G-coslight-3700mah.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/batterydata-E5G-coslight-3700mah.dtsi new file mode 100644 index 000000000000..ff2a37519ffd --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/batterydata-E5G-coslight-3700mah.dtsi @@ -0,0 +1,136 @@ + +qcom,3811462_xiaomi_bm3gcos_3700mah_slave_jan3rd2019 { + qcom,profile-revision = <24>; + /* #3811462_Xiaomi_BM3Gcos_3700mAh_Slave_Jan3rd2019*/ + qcom,fastchg-current-ma = <3700>; + qcom,jeita-fcc-ranges = <0 50 370000 + 51 100 1110000 + 101 150 1850000 + 151 450 3700000 + 451 580 1850000>; + qcom,jeita-fv-ranges = <0 50 4450000 + 51 100 4450000 + 101 150 4450000 + 151 450 4450000 + 451 580 4100000>; + qcom,max-voltage-uv = <4450000>; + qcom,fg-cc-cv-threshold-mv = <4440>; + qcom,nom-batt-capacity-mah = <3800>; + qcom,batt-id-kohm = <100>; + qcom,battery-beta = <4250>; + qcom,therm-room-temp = <100000>; + qcom,battery-type = "e5g_cos"; + qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>; + qcom,therm-center-offset = <0x70>; + qcom,therm-pull-up = <100>; + qcom,rslow-normal-coeffs = <0x4a 0x15 0x95 0x12>; + qcom,rslow-low-coeffs = <0x9f 0x06 0x70 0x1a>; + qcom,checksum = <0xB9FD>; + qcom,gui-version = "PM855GUI - 1.0.0.13"; + qcom,fg-profile-data = [ + 09 00 99 EA + EF ED 05 F2 + B6 07 00 00 + 69 BD 45 83 + 01 80 15 8C + 8C 80 09 80 + 13 00 4A 15 + 95 12 1B 06 + EB F3 CE 07 + 32 00 76 EA + 01 E4 5B DA + D1 02 95 E5 + 67 BD 1E 2A + 26 0B 64 D3 + 60 00 4C 00 + 4F 00 43 00 + 2F 00 31 00 + 35 00 3E 00 + 40 00 48 00 + 43 00 60 00 + 42 00 4F 00 + 58 00 52 00 + 4F 00 9C 00 + 6C 64 5B 00 + 5E 00 74 00 + 60 F0 57 00 + 5F 00 83 10 + 67 10 67 00 + AD 20 76 40 + 68 60 64 09 + 71 00 D8 00 + C3 1E 6D 0E + C1 03 23 04 + 82 1C 36 0B + 8E 0D F4 22 + E4 1A 5B 42 + 23 5C 46 02 + 5A 11 33 1F + ED 05 61 0A + 6C FE C8 1C + 49 FA 24 05 + 69 03 2B 17 + FE 23 76 44 + 26 52 6A 13 + 40 1F F7 ED + 4C E2 0F ED + DE 1C 4D E3 + FB 04 C5 BB + A7 17 66 83 + 37 85 1F A3 + 7C A8 09 80 + 54 FA BF 0D + 8F FA 91 04 + 00 00 D7 D5 + 66 EA 02 10 + 5D E2 7B CC + 41 01 0F F0 + BF BC 91 03 + CD 04 E6 00 + CE 07 32 00 + 81 01 A3 02 + 2F 05 29 02 + F7 02 F3 05 + C3 06 AA 02 + F0 03 50 00 + 3F 00 41 00 + 40 64 40 00 + 3D 08 40 10 + 3C 08 3F 00 + 54 00 79 08 + 5C 08 48 00 + 58 28 58 50 + 61 70 6F 07 + 4F 00 57 00 + 57 08 67 00 + FF 00 57 00 + 51 10 5F 10 + 61 00 78 28 + 91 48 5D 58 + 5D 0D 50 00 + 5B 00 FF 08 + D8 00 B5 22 + 03 05 BD 12 + A2 15 3F 1D + 60 22 F4 4C + 6D 5B 93 18 + D0 03 03 04 + D6 02 7D 0E + 3F 0A 43 20 + D8 04 34 03 + 96 05 D3 1C + 04 03 E9 05 + 58 02 74 18 + 0A 02 AF 05 + A5 03 6B 00 + A0 1F 54 05 + 16 03 80 05 + A6 1C 56 03 + 7F 05 03 03 + 7E 18 C6 03 + F2 05 1D 03 + 5F 00 88 01 + C0 00 FA 00 + 67 0F 00 00 + ]; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/batterydata-F1-atl-3300mah.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/batterydata-F1-atl-3300mah.dtsi new file mode 100644 index 000000000000..e749822f0db0 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/batterydata-F1-atl-3300mah.dtsi @@ -0,0 +1,156 @@ +/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +qcom,scud { + qcom,profile-revision = <24>; + /* #3675702_Xiaomi_F1sun_3300mAh_averaged_MasterSlave_Oct22nd2018*/ + qcom,fastchg-current-ma = <4800>; + qcom,jeita-fcc-ranges = <0 50 300000 + 51 100 1600000 + 101 150 3200000 + 151 450 4800000 + 451 580 1600000>; + qcom,jeita-fv-ranges = <0 50 4400000 + 51 100 4400000 + 101 150 4400000 + 151 450 4400000 + 451 580 4100000>; + qcom,step-chg-ranges = <3600000 4200000 3000000 + 4201000 4300000 3000000 + 4301000 4340000 2500000>; + qcom,dynamic-fv-ranges = <0 100 4400000 + 101 200 4380000 + 201 300 4360000 + 301 400 4340000 + 401 500 4340000>; + qcom,max-voltage-uv = <4400000>; + qcom,fg-cc-cv-threshold-mv = <4390>; + qcom,nom-batt-capacity-mah = <3300>; + qcom,batt-id-kohm = <68>; + qcom,battery-beta = <4250>; + qcom,therm-room-temp = <100000>; + qcom,battery-type = "f1_atl"; + qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>; + qcom,therm-center-offset = <0x70>; + qcom,therm-pull-up = <100>; + qcom,rslow-normal-coeffs = <0x85 0x01 0x71 0x13>; + qcom,rslow-low-coeffs = <0xc6 0x15 0x65 0x02>; + qcom,checksum = <0xBE6A>; + qcom,gui-version = "PM855GUI - 1.0.0.10"; + qcom,fg-profile-data = [ + A9 1F 09 EA + 30 D4 F1 DA + 38 D5 00 00 + 5A BD 85 8A + FA 87 7F A4 + 75 92 06 81 + 1B FC 85 01 + 71 13 39 FC + 86 01 CE 1F + 32 0A 5D EB + DA ED B1 D4 + 2D 0A 69 D4 + 27 BD E8 1A + AB FB 8F BA + 60 00 4E FC + 47 FD 44 F4 + 33 33 30 10 + 35 0B 43 00 + 40 01 43 00 + 43 00 60 00 + 37 00 3C 00 + 46 00 40 00 + 39 00 76 00 + 5C 64 46 00 + 3F 00 3D 08 + 60 00 4C 00 + 49 00 57 10 + 4D 10 47 00 + 86 28 5E 48 + 4F 60 46 0D + 4E 00 D8 F8 + FE 1F 0C 0D + D4 FA 17 06 + 89 1C 32 0B + C5 0D 67 2A + 18 17 85 42 + 1E 5D 45 02 + 6C 10 36 1F + 09 04 31 0A + 25 FD DD 1C + 05 02 A3 05 + BE 02 3F 17 + 1C 22 05 44 + 91 52 70 12 + 60 1F DE E5 + 4D CA E9 A4 + E5 1C 7D C9 + 8C 05 08 BB + 1C 17 D9 8B + BF 84 BF 93 + 83 A0 09 80 + D3 03 01 05 + 21 FC 8D FA + 00 F8 59 D5 + FF EA F6 07 + DD F3 10 CD + 92 18 16 F0 + 2F D7 26 02 + 57 05 2B 02 + CE 01 32 00 + 15 03 28 03 + D9 05 44 07 + 43 02 94 04 + 55 03 8F 05 + 51 03 49 00 + 3A 00 42 00 + 43 64 48 00 + 4C 00 42 08 + 49 00 4A 00 + 49 00 3B 10 + 3A 10 3A 00 + 4A 20 4C 48 + 56 58 64 0E + 42 00 4D 00 + 58 08 61 00 + 50 00 3F 00 + 3F 10 4F 10 + 4C 00 5B 20 + 6D 40 48 58 + 54 0F 59 00 + 50 00 31 08 + D8 00 9F 20 + C9 04 F1 0A + ED 0D D7 1C + 19 23 F5 45 + 17 52 71 18 + D6 03 FA 05 + F6 02 73 12 + 3F 0A DC 1F + 6D 05 A4 02 + 1C 06 C0 1C + 0E 03 EC 05 + 44 02 7A 18 + 81 03 8E 04 + 5B 02 6A 00 + 2D 20 03 05 + FC 02 C3 05 + E3 1C 1C 02 + BA 05 80 02 + 92 18 EF 02 + 90 05 CD 02 + 7C 00 3B 01 + C0 00 FA 00 + BB 0C 00 00 + ]; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/batterydata-F1-coslight-3300mah.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/batterydata-F1-coslight-3300mah.dtsi new file mode 100644 index 000000000000..6af436c42516 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/batterydata-F1-coslight-3300mah.dtsi @@ -0,0 +1,156 @@ +/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +qcom,coslight { + qcom,profile-revision = <24>; + /* #3675676_Xiaomi_F1cos_3300mAh_averaged_MasterSlave_Oct22nd2018*/ + qcom,fastchg-current-ma = <4800>; + qcom,jeita-fcc-ranges = <0 50 300000 + 51 100 1600000 + 101 150 3200000 + 151 450 4800000 + 451 580 1600000>; + qcom,jeita-fv-ranges = <0 50 4400000 + 51 100 4400000 + 101 150 4400000 + 151 450 4400000 + 451 580 4100000>; + qcom,step-chg-ranges = <3600000 4200000 3000000 + 4201000 4300000 3000000 + 4301000 4340000 2500000>; + qcom,dynamic-fv-ranges = <0 100 4400000 + 101 200 4380000 + 201 300 4360000 + 301 400 4340000 + 401 500 4340000>; + qcom,max-voltage-uv = <4400000>; + qcom,fg-cc-cv-threshold-mv = <4390>; + qcom,nom-batt-capacity-mah = <3300>; + qcom,batt-id-kohm = <100>; + qcom,battery-beta = <4250>; + qcom,therm-room-temp = <100000>; + qcom,battery-type = "f1_cos"; + qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>; + qcom,therm-center-offset = <0x70>; + qcom,therm-pull-up = <100>; + qcom,rslow-normal-coeffs = <0xe4 0x04 0x3a 0x12>; + qcom,rslow-low-coeffs = <0x21 0x15 0x15 0x06>; + qcom,checksum = <0xC822>; + qcom,gui-version = "PM855GUI - 1.0.0.10"; + qcom,fg-profile-data = [ + A9 1F 6C EA + 8F E5 33 EA + 8C E5 00 00 + C4 BC AC 8A + FC 87 EC 82 + 71 87 10 80 + 20 FC E4 04 + 3A 12 C9 04 + 0F 02 CE 1F + 32 0A FB EB + 65 ED 6E DC + F6 0A FA DC + 38 C5 3A 12 + 84 02 D1 D3 + 60 00 36 FC + 3D FD 3E F4 + 38 33 30 10 + 33 0B 37 00 + 3F 01 47 00 + 4D 00 60 00 + 36 00 3B 00 + 3D 00 38 00 + 35 00 6A 00 + 4D 64 42 00 + 3F F8 42 00 + 60 F0 55 00 + 5E 00 84 08 + 64 08 5D 00 + BB 20 7D 40 + 67 58 60 10 + 6C 00 D8 F8 + 05 1F EF 04 + 76 EB 6A 04 + D2 1C 6D 0A + F9 0C 5E 2B + 96 18 55 4B + CD 5C 20 02 + 6A 0F 86 1E + E3 05 A8 02 + 42 04 C5 1C + 78 02 9C 04 + FD 03 AC 17 + 1E 22 D0 45 + 19 5B 5F 11 + AB 1E C3 EE + FC CA 59 C7 + DE 1C A1 C9 + E4 04 AA BB + 92 17 D8 93 + 78 84 37 A2 + 78 A0 09 80 + 46 02 82 04 + 66 05 FF FB + 00 F8 68 DC + 06 EA F3 FF + 77 E3 FA C4 + 15 18 16 00 + 0E E7 FE 02 + F3 05 CB 02 + CE 01 32 00 + 15 03 CA 02 + D1 05 5B 03 + 27 04 F4 03 + 9D 03 94 02 + D2 05 54 00 + 3F 00 40 00 + 44 64 47 00 + 46 E8 47 F8 + 49 E8 48 00 + 4A 00 45 10 + 4F 10 3E 00 + 49 28 4B 48 + 53 58 62 0D + 40 00 4E F8 + 52 00 58 F8 + 4D 00 47 00 + 43 10 54 10 + 52 00 66 28 + 7E 48 4D 60 + 5D 0D 5E 00 + 50 F8 36 00 + D8 F0 A7 1E + 12 04 6F 0A + 87 0A E3 1C + 43 23 A7 45 + 95 5A 8C 18 + 08 02 B3 05 + 9E 03 5A 10 + 3F 0A 6B 1F + 33 04 E7 03 + D7 05 B6 1C + 4B 03 A7 05 + 92 02 6D 18 + 15 02 8D 05 + 00 02 64 00 + 05 1F EF 04 + 76 03 6A 04 + D2 1C 6D 02 + F9 04 5E 03 + 96 18 55 03 + CD 04 20 02 + 6A 00 56 01 + C0 00 FA 00 + F0 0C 00 00 + ]; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/batterydata-F11-gyu-4000mah.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/batterydata-F11-gyu-4000mah.dtsi new file mode 100644 index 000000000000..ec564aafcb64 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/batterydata-F11-gyu-4000mah.dtsi @@ -0,0 +1,159 @@ +/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +qcom,gyu{ + qcom,profile-revision = <24>; + /* #3927828_Xiaomi_F11gyu_4000mAh_averaged_MasterSlave_2019*/ + qcom,fastchg-current-ma = <5100>; + qcom,jeita-fcc-ranges = <0 50 390000 + 51 100 1100000 + 101 150 2700000 + 151 450 5100000 + 451 580 1900000>; + qcom,jeita-fv-ranges = <0 50 4400000 + 51 100 4400000 + 101 150 4400000 + 151 450 4400000 + 451 580 4100000>; + qcom,step-chg-ranges = <3000000 3100000 1000000 + 3101000 3200000 1000000 + 3201000 3300000 1000000 + 3301000 4200000 5100000 + 4201000 4400000 4000000>; + qcom,dynamic-fv-ranges = <0 100 4400000 + 101 200 4380000 + 201 300 4360000 + 301 400 4340000 + 401 500 4340000>; + qcom,max-voltage-uv = <4400000>; + qcom,fg-cc-cv-threshold-mv = <4390>; + qcom,nom-batt-capacity-mah = <4000>; + qcom,batt-id-kohm = <100>; + qcom,battery-beta = <4250>; + qcom,therm-room-temp = <100000>; + qcom,battery-type = "f11_gyu"; + qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>; + qcom,therm-center-offset = <0x70>; + qcom,therm-pull-up = <100>; + qcom,rslow-normal-coeffs = <0x12 0x0c 0x6a 0x02>; + qcom,rslow-low-coeffs = <0x4e 0x15 0x4a 0x06>; + qcom,checksum = <0xD688>; + qcom,gui-version = "PM855GUI - 1.0.0.13"; + qcom,fg-profile-data = [ + 09 00 46 00 + 2D DC 99 E3 + FB E5 00 00 + 7C BD 24 8A + FC 87 02 8D + E7 82 FD 87 + 22 00 12 0C + 6A 02 58 05 + A1 FB CE 07 + 32 00 5F EB + DF ED 2F CD + C1 02 4D D3 + 36 AB 44 1A + E7 FA 52 BD + 60 00 39 00 + 3F 00 41 00 + 39 00 34 00 + 35 00 3B 00 + 43 00 4F 00 + 5A 00 60 00 + 3C 00 3F 00 + 3D 00 36 00 + 33 00 5C 00 + 4D 64 43 00 + 43 00 41 08 + 60 00 52 00 + 4F 00 5B 10 + 4E 10 44 00 + 85 28 60 48 + 52 60 4C 0B + 4B 00 D8 00 + C9 1F 69 0D + 60 02 AD 06 + 82 1C 35 0B + C5 0D 5C 22 + 13 17 F0 42 + 0B 54 A9 03 + 6C 12 36 1F + F4 FD 40 0A + 85 FE D8 1C + 1A 02 65 05 + 0B 0B 17 18 + 4D 23 2A 45 + 59 53 6D 12 + 12 1F 39 EC + 24 CA 2F C5 + D6 1C B4 C9 + 97 04 0B BA + BF 17 81 8B + F9 84 95 93 + 77 A0 09 80 + 16 FA 6D 04 + 24 02 05 02 + 00 F8 4C DD + C5 EA F8 FF + 07 E2 C2 BD + 78 18 16 F8 + B3 D5 38 02 + 85 06 1C 01 + CE 07 32 00 + 07 03 79 02 + 06 05 41 03 + 26 02 4F 04 + 63 02 89 02 + CD 05 53 00 + 3F 00 40 00 + 42 64 45 00 + 46 F8 47 00 + 49 00 47 00 + 49 00 41 08 + 4F 08 3F 00 + 46 20 49 48 + 50 58 5D 0E + 40 00 46 00 + 4E 08 56 F8 + 49 00 46 00 + 3B 10 48 10 + 4B 00 5C 28 + 6C 48 48 58 + 53 0D 4D 00 + 47 00 33 08 + D8 F8 8D 1F + 8F 04 56 0B + 35 0F F6 1C + CD 22 69 44 + AF 5B 96 18 + ED 03 D8 05 + 45 03 6E 0F + 3F 0A E4 1F + 64 05 A5 02 + 3F 04 BB 1C + 38 03 BC 05 + 7A 02 7F 18 + 0F 02 94 05 + F4 03 68 00 + 97 1F 99 05 + 99 02 31 04 + C2 1C A8 02 + 92 04 D5 03 + 96 18 66 03 + A4 04 4D 02 + 6B 00 58 01 + C0 00 FA 00 + A9 0F 00 00 + ]; +}; + diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/batterydata-F11-sun-4000mah.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/batterydata-F11-sun-4000mah.dtsi new file mode 100644 index 000000000000..b446defee8ec --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/batterydata-F11-sun-4000mah.dtsi @@ -0,0 +1,159 @@ +/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +qcom,sun { + qcom,profile-revision = <24>; + /* #3827828_Xiaomi_F11sun_4000mAh_averaged_MasterSlave_Jan23rd2019*/ + qcom,fastchg-current-ma = <5100>; + qcom,jeita-fcc-ranges = <0 50 390000 + 51 100 1100000 + 101 150 2700000 + 151 450 5100000 + 451 580 1900000>; + qcom,jeita-fv-ranges = <0 50 4400000 + 51 100 4400000 + 101 150 4400000 + 151 450 4400000 + 451 580 4100000>; + qcom,step-chg-ranges = <3000000 3100000 1000000 + 3101000 3200000 1000000 + 3201000 3300000 1000000 + 3301000 4200000 5100000 + 4201000 4400000 4000000>; + qcom,dynamic-fv-ranges = <0 100 4400000 + 101 200 4380000 + 201 300 4360000 + 301 400 4340000 + 401 500 4340000>; + qcom,max-voltage-uv = <4400000>; + qcom,fg-cc-cv-threshold-mv = <4390>; + qcom,nom-batt-capacity-mah = <4000>; + qcom,batt-id-kohm = <68>; + qcom,battery-beta = <4250>; + qcom,therm-room-temp = <100000>; + qcom,battery-type = "f11_sun"; + qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>; + qcom,therm-center-offset = <0x70>; + qcom,therm-pull-up = <100>; + qcom,rslow-normal-coeffs = <0xae 0xe3 0x0e 0x13>; + qcom,rslow-low-coeffs = <0x58 0x15 0x1a 0xec>; + qcom,checksum = <0x585A>; + qcom,gui-version = "PM855GUI - 1.0.0.13"; + qcom,fg-profile-data = [ + 09 00 D1 E3 + 5B D4 39 DB + 83 D4 00 00 + F8 BD A8 83 + FB 87 01 A5 + 2A 9A 91 80 + 1D 00 AE E3 + 0E 13 FE 05 + 0C 02 CE 07 + 32 00 89 00 + 92 ED 75 E5 + EC 03 96 E4 + 7F C5 A6 13 + 1E 02 45 D2 + 60 00 44 00 + 42 00 42 00 + 38 00 32 00 + 37 00 3F 00 + 3F 00 43 00 + 45 00 60 00 + 31 00 35 00 + 3F 00 3A 00 + 34 00 63 00 + 52 64 42 00 + 3C 00 3C 08 + 60 F8 51 00 + 4B 00 53 10 + 44 10 40 00 + 70 28 54 48 + 4A 60 46 0D + 43 00 D8 00 + BC 1F 69 0D + 7E 02 E7 FC + 8C 1C 29 03 + CB 0D 62 22 + 95 17 4E 42 + 5F 55 12 02 + 6A 13 C5 1F + 68 05 9C 02 + 33 F6 EA 1C + 7B 03 72 04 + 0F 0A 81 17 + 71 23 42 45 + FF 52 7E 12 + A5 1E AF E6 + 68 CB 07 CC + D4 1C B9 D1 + 9C 04 0A B2 + D1 17 74 83 + 05 85 87 83 + 72 A0 09 80 + A4 03 9B FD + 7A FD 90 FA + 00 00 18 CC + 8B EB FB EF + EE E2 E0 C4 + B5 18 17 F0 + 92 D7 8D 03 + FB 05 5B 02 + CE 07 32 00 + 7F 01 46 05 + C4 05 C1 02 + B6 03 E6 05 + 48 03 1A 03 + 07 05 49 00 + 3D 00 43 00 + 44 64 49 00 + 4B 00 43 08 + 4A F8 49 00 + 48 00 3E 10 + 3E 10 39 00 + 44 28 47 48 + 51 60 5D 0D + 3E 00 49 00 + 4F 08 50 F8 + 3C 00 3F 00 + 39 10 45 10 + 45 00 57 20 + 62 40 45 58 + 4F 0F 45 00 + 39 F8 23 08 + D8 F8 F2 1F + 94 05 5B 0A + ED 0C C4 1C + 66 23 A2 45 + 80 52 65 18 + 20 02 80 05 + 0A 02 69 10 + 3F 0A D1 1F + 88 05 89 02 + 71 04 C1 1C + 0C 03 F4 05 + 36 02 7A 18 + 9E 03 51 04 + 9B 02 6A 00 + 4E 1F 0D 04 + 3F 02 DF 04 + C0 1C 9C 02 + C4 04 97 03 + 90 18 36 03 + 06 05 D4 03 + 6B 00 43 01 + C0 00 FA 00 + 8B 0F 00 00 + ]; +}; + diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/fg-gen4-batterydata-alium-3600mah.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/fg-gen4-batterydata-alium-3600mah.dtsi new file mode 100644 index 000000000000..cf398ae46599 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/fg-gen4-batterydata-alium-3600mah.dtsi @@ -0,0 +1,160 @@ +/* + * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + + +qcom,alium_860_89032_0000_3600mah_averaged_masterslave_sep24th2018 { + /* #Alium_860_89032_0000_3600mAh_averaged_MasterSlave_Sept24th2018*/ + qcom,max-voltage-uv = <4400000>; + qcom,fastchg-current-ma = <4800>; + qcom,jeita-fcc-ranges = <0 50 300000 + 51 100 1600000 + 101 150 3200000 + 151 450 4800000 + 451 580 1600000>; + qcom,jeita-fv-ranges = <0 50 4400000 + 51 100 4400000 + 101 150 4400000 + 151 450 4400000 + 451 580 4100000>; + qcom,step-chg-ranges = <3600000 4200000 3000000 + 4201000 4300000 3000000 + 4301000 4340000 2500000>; + qcom,nom-batt-capacity-mah = <3300>; + qcom,batt-id-kohm = <300>; + /* COLD = 0 DegC, HOT = 45 DegC */ + /* qcom,jeita-hard-thresholds = <0x58cd 0x20b8>; */ + /* COOL = 10 DegC, WARM = 40 DegC */ + /* qcom,jeita-soft-thresholds = <0x4ccc 0x25e3>; */ + /* COLD hys = 13 DegC, WARM hys = 37 DegC */ + /*qcom,jeita-soft-hys-thresholds = <0x48d4 0x2943>; + qcom,jeita-soft-fcc-ua = <2500000 2500000>; + qcom,jeita-soft-fv-uv = <4250000 4250000>;*/ + qcom,ocv-based-step-chg; + qcom,battery-beta = <4250>; + qcom,therm-room-temp = <100000>; + qcom,fg-cc-cv-threshold-mv = <4390>; + qcom,battery-type = "itech_3000mah"; + qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>; + qcom,therm-center-offset = <0x70>; + qcom,therm-pull-up = <100>; + qcom,rslow-normal-coeffs = <0xdf 0x02 0x77 0x1a>; + qcom,rslow-low-coeffs = <0x51 0x04 0xd0 0x13>; + qcom,checksum = <0x1538>; + qcom,gui-version = "PM855GUI - 1.0.0.10"; + qcom,fg-profile-data = [ + 09 00 C7 EA + C4 DC 8E E2 + 3A DD 00 00 + 15 BC A5 8A + 02 80 D1 92 + AB 9D 47 80 + 10 00 DF 02 + 77 1A 85 EC + E1 FD CE 07 + 32 00 75 EB + AA ED F3 CD + 0C 0A 7A E4 + ED C5 40 1B + D0 02 1F CA + FF 00 52 00 + 4D 00 4A 00 + 3C 00 35 00 + 38 00 39 00 + 48 00 43 00 + 3F 00 FF 00 + 38 00 40 00 + 46 00 50 00 + 45 00 5C 00 + 7E 64 60 00 + 50 08 50 10 + FF 00 6A 00 + 5F 00 63 00 + 6E 00 60 00 + 7D 20 96 40 + 75 50 6B 13 + 63 00 D8 00 + 14 22 7E 0D + 21 02 AA 04 + ED 1C D4 09 + 64 0C D3 23 + A4 18 D3 42 + B5 55 91 02 + 90 12 2A 1F + 02 06 1F 0A + A3 06 AE 1C + 8D 02 96 04 + D2 03 D1 17 + 51 23 3F 45 + 28 53 69 14 + 93 20 8E EC + 18 CB C8 C5 + DB 1C 7B C9 + 7C 05 E6 C2 + B9 17 2C 93 + 87 85 A2 92 + 91 A8 09 80 + 92 F2 1A 0D + F4 FC 5E EB + 00 F8 FB ED + 15 E2 F6 0F + 75 02 72 05 + 49 01 10 00 + FA E5 E2 03 + 8D 05 85 02 + CE 07 32 00 + 23 03 46 02 + 9C 04 03 02 + 48 07 0A 00 + BA 03 97 02 + 65 05 50 00 + 3A 00 41 00 + 43 64 45 00 + 45 10 45 18 + 46 08 44 00 + 47 00 3A 08 + 4B 08 37 00 + 47 20 4E 40 + 54 58 60 10 + 57 00 5F 00 + 57 08 55 00 + 4B 00 50 00 + 3E 08 52 08 + 52 00 5C 20 + 6F 40 7D 58 + 67 10 63 00 + 69 08 4F 10 + D8 00 8C 2A + DB 04 28 02 + AD 04 0B 1D + 50 22 A7 45 + 0D 52 A2 18 + 74 03 AD 04 + 35 02 AE 13 + 3F 0A 5A 20 + DD 04 F1 02 + D8 05 C7 1C + DD 02 3D 04 + EB 03 97 18 + 52 03 D5 04 + 19 02 72 00 + 14 22 7E 05 + 21 02 AA 04 + ED 1C D4 01 + 64 04 D3 03 + A4 18 D3 02 + B5 05 91 02 + 90 00 7C 01 + C0 00 FA 00 + 04 0E 00 00 + ]; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/fg-gen4-batterydata-alium-3600mah_E5G.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/fg-gen4-batterydata-alium-3600mah_E5G.dtsi new file mode 100644 index 000000000000..f4dd321ba524 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/fg-gen4-batterydata-alium-3600mah_E5G.dtsi @@ -0,0 +1,158 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + + +qcom,alium_860_89032_0000_3600mah_averaged_masterslave_sep24th2018 { + /* #Alium_860_89032_0000_3600mAh_averaged_MasterSlave_Sept24th2018*/ + qcom,max-voltage-uv = <4450000>; + qcom,fastchg-current-ma = <3700>; + qcom,jeita-fcc-ranges = <0 50 370000 + 51 100 1110000 + 101 150 1850000 + 151 450 3700000 + 451 580 1850000>; + qcom,jeita-fv-ranges = <0 50 4450000 + 51 100 4450000 + 101 150 4450000 + 151 450 4450000 + 451 580 4100000>; + qcom,nom-batt-capacity-mah = <3800>; + qcom,batt-id-kohm = <100>; + /* COLD = 0 DegC, HOT = 45 DegC */ + /* qcom,jeita-hard-thresholds = <0x58cd 0x20b8>; */ + /* COOL = 10 DegC, WARM = 40 DegC */ + /* qcom,jeita-soft-thresholds = <0x4ccc 0x25e3>; */ + /* COLD hys = 13 DegC, WARM hys = 37 DegC */ + /*qcom,jeita-soft-hys-thresholds = <0x48d4 0x2943>; + qcom,jeita-soft-fcc-ua = <2500000 2500000>; + qcom,jeita-soft-fv-uv = <4250000 4250000>;*/ + qcom,ocv-based-step-chg; + qcom,battery-beta = <4250>; + qcom,therm-room-temp = <100000>; + qcom,fg-cc-cv-threshold-mv = <4440>; + qcom,battery-type = "itech_3700mah"; + qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>; + qcom,therm-center-offset = <0x70>; + qcom,therm-pull-up = <100>; + qcom,rslow-normal-coeffs = <0xdf 0x02 0x77 0x1a>; + qcom,rslow-low-coeffs = <0x51 0x04 0xd0 0x13>; + qcom,checksum = <0x1538>; + qcom,gui-version = "PM855GUI - 1.0.0.10"; + qcom,fg-profile-data = [ + 09 00 C7 EA + C4 DC 8E E2 + 3A DD 00 00 + 15 BC A5 8A + 02 80 D1 92 + AB 9D 47 80 + 10 00 DF 02 + 77 1A 85 EC + E1 FD CE 07 + 32 00 75 EB + AA ED F3 CD + 0C 0A 7A E4 + ED C5 40 1B + D0 02 1F CA + FF 00 52 00 + 4D 00 4A 00 + 3C 00 35 00 + 38 00 39 00 + 48 00 43 00 + 3F 00 FF 00 + 38 00 40 00 + 46 00 50 00 + 45 00 5C 00 + 7E 64 60 00 + 50 08 50 10 + FF 00 6A 00 + 5F 00 63 00 + 6E 00 60 00 + 7D 20 96 40 + 75 50 6B 13 + 63 00 D8 00 + 14 22 7E 0D + 21 02 AA 04 + ED 1C D4 09 + 64 0C D3 23 + A4 18 D3 42 + B5 55 91 02 + 90 12 2A 1F + 02 06 1F 0A + A3 06 AE 1C + 8D 02 96 04 + D2 03 D1 17 + 51 23 3F 45 + 28 53 69 14 + 93 20 8E EC + 18 CB C8 C5 + DB 1C 7B C9 + 7C 05 E6 C2 + B9 17 2C 93 + 87 85 A2 92 + 91 A8 09 80 + 92 F2 1A 0D + F4 FC 5E EB + 00 F8 FB ED + 15 E2 F6 0F + 75 02 72 05 + 49 01 10 00 + FA E5 E2 03 + 8D 05 85 02 + CE 07 32 00 + 23 03 46 02 + 9C 04 03 02 + 48 07 0A 00 + BA 03 97 02 + 65 05 50 00 + 3A 00 41 00 + 43 64 45 00 + 45 10 45 18 + 46 08 44 00 + 47 00 3A 08 + 4B 08 37 00 + 47 20 4E 40 + 54 58 60 10 + 57 00 5F 00 + 57 08 55 00 + 4B 00 50 00 + 3E 08 52 08 + 52 00 5C 20 + 6F 40 7D 58 + 67 10 63 00 + 69 08 4F 10 + D8 00 8C 2A + DB 04 28 02 + AD 04 0B 1D + 50 22 A7 45 + 0D 52 A2 18 + 74 03 AD 04 + 35 02 AE 13 + 3F 0A 5A 20 + DD 04 F1 02 + D8 05 C7 1C + DD 02 3D 04 + EB 03 97 18 + 52 03 D5 04 + 19 02 72 00 + 14 22 7E 05 + 21 02 AA 04 + ED 1C D4 01 + 64 04 D3 03 + A4 18 D3 02 + B5 05 91 02 + 90 00 7C 01 + C0 00 FA 00 + 04 0E 00 00 + ]; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/fg-gen4-batterydata-nabu-sunwoda-8720mah.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/fg-gen4-batterydata-nabu-sunwoda-8720mah.dtsi new file mode 100644 index 000000000000..c152f8ed1934 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/fg-gen4-batterydata-nabu-sunwoda-8720mah.dtsi @@ -0,0 +1,153 @@ +qcom,5119583_xiaomi_k82_p86120aa1_8720mah_averaged_masterslave_apr8th2021 { + qcom,profile-revision = <24>; + /* #5119583_XIAOMI_K82_8720mAH_averaged_MasterSlave_Apr8th2021*/ + qcom,max-voltage-uv = <4480000>; + qcom,fastchg-current-ma = <5900>; + qcom,jeita-fcc-ranges = <(-100) 0 820000 + 1 50 820000 + 51 100 2500000 + 101 150 5964000 + 151 480 5900000 + 481 590 4260000>; + qcom,jeita-fv-ranges = <(-100) 0 4450000 + 1 50 4450000 + 51 100 4450000 + 101 150 4450000 + 151 480 4480000 + 481 600 4100000>; +// qcom,step-chg-ranges = <3001000 4150000 6000000 +// 4150001 4230000 6000000 +// 4230001 4350000 6000000 +// 4350001 4400000 6000000 +// 4400001 4430000 6000000 +// 4430001 4480000 4000000>; +// qcom,taper-fcc; + qcom,jeita-too-hot = <590>; + qcom,jeita-too-cold = <(-100)>; + qcom,jeita-warm-th= <480>; + qcom,jeita-cool-th= <150>; + qcom,use-bq-pump; + mi,six-pin-battery; + qcom,ffc-low-temp-term-current-ma = <(-1278)>; + qcom,ffc-high-temp-term-current-ma = <(-1363)>; + qcom,fg-cc-cv-threshold-mv = <4450>; + qcom,fg-ffc-cc-cv-threshold-mv = <4480>; + qcom,nom-batt-capacity-mah = <8720>; + qcom,batt-id-kohm = <10>; + qcom,battery-beta = <3800>; + qcom,therm-room-temp = <100000>; + qcom,battery-type = "K82_sunwoda_8720mah"; + qcom,therm-coefficients = <0x2319 0xcb5 0xdb70 0xc48e 0x856b>; + qcom,therm-center-offset = <0x70>; + qcom,therm-pull-up = <100>; + qcom,rslow-normal-coeffs = <0x33 0xfc 0xe8 0x12>; + qcom,rslow-low-coeffs = <0x36 0x05 0xc4 0x12>; + qcom,checksum = <0xBEEA>; + qcom,gui-version = "PM855GUI - 1.0.0.14"; + qcom,fg-profile-data = [ + 09 00 9B DB + 1B D5 75 DA + 68 D5 00 00 + 99 B5 42 83 + FA 87 1E 93 + 02 8D EA 87 + 18 00 33 FC + E8 12 C5 04 + 50 02 CE 07 + 32 00 11 EA + BB E4 48 E3 + 5E 0B B5 E2 + 1D AC 12 22 + C9 FA 3A CC + 60 00 40 00 + 3F 00 38 00 + 2C 00 2D 00 + 3A 00 46 00 + 41 00 46 00 + 3E 00 60 00 + 44 00 3B 00 + 4B 00 47 00 + 3D 00 8C 00 + 59 64 4B 00 + 49 00 4C 08 + 60 00 4C 00 + 4F 00 6F 10 + 5E 10 57 00 + A3 28 6B 48 + 5B 60 54 0C + 58 00 D8 08 + 06 20 B1 14 + 6F 0B 51 FD + 4B 1C AE 03 + 5B 05 F7 2A + B6 17 51 42 + 2A 5D 68 02 + 66 12 54 23 + AD 0C DE 12 + 9D 0D F3 1C + 21 FB 58 FD + 50 03 FE 16 + 09 2A 76 44 + 18 5A 95 11 + 9E 24 29 DC + 21 C3 72 C5 + F3 1C 97 AA + FB 04 2D B2 + 0A 17 12 82 + 4A 84 43 8A + A4 90 09 80 + 48 03 13 05 + 87 02 D7 05 + 00 00 FB CD + 78 E2 FC 07 + 17 EA 39 CD + 1D 18 15 08 + 80 ED 35 03 + 76 05 A7 01 + CE 07 32 00 + 9E 01 EE 05 + 5C 05 1C 03 + D4 05 0E 02 + BD 03 9D 02 + C6 05 48 00 + 39 00 42 00 + 44 64 45 00 + 49 00 40 08 + 40 00 44 00 + 44 00 3B 10 + 3F 10 3F 00 + 53 28 54 48 + 57 58 62 0D + 43 00 48 00 + 52 08 54 00 + 43 00 47 00 + 49 10 59 10 + 51 00 5F 20 + 75 40 49 58 + 56 0F 5D 00 + 4C 08 31 10 + D8 08 FC 20 + 54 FC 6D 03 + 67 0D C7 1C + 62 23 C5 45 + 4B 52 63 18 + 0F 02 AC 05 + A9 03 72 12 + 3F 0A 6B 20 + 93 04 89 03 + 20 05 BE 1C + 3C 03 C0 05 + 85 02 77 18 + A0 03 51 04 + 9A 02 6A 00 + 35 22 4D 05 + 7A 02 EB 05 + FB 1C AF 03 + 82 04 0B 02 + 86 18 17 03 + 59 05 23 03 + 8A 00 92 00 + C0 00 FA 00 + F0 21 00 00 + ]; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/fg-gen4-batterydata-vayu-NVT-5160mah.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/fg-gen4-batterydata-vayu-NVT-5160mah.dtsi new file mode 100644 index 000000000000..732853672c91 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/fg-gen4-batterydata-vayu-NVT-5160mah.dtsi @@ -0,0 +1,153 @@ +qcom,xiaomi_j20s_nvt_5160mah_averaged_masterslave_aug26th2019 { + qcom,profile-revision = <24>; + /* #4174016_Xiaomi_J20S_5160mAh_averaged_MasterSlave_Aug26th2019*/ + qcom,max-voltage-uv = <4475000>; + qcom,fastchg-current-ma = <5900>; + qcom,jeita-fcc-ranges = <(-100) 0 500000 + 1 50 1000000 + 51 100 2500000 + 101 150 4000000 + 151 450 5900000 + 451 580 2500000>; + qcom,jeita-fv-ranges = <(-100) 0 4450000 + 1 50 4450000 + 51 100 4450000 + 101 150 4450000 + 151 450 4475000 + 451 600 4100000>; + qcom,step-chg-ranges = <3001000 4150000 5900000 + 4150001 4230000 5900000 + 4230001 4350000 5400000 + 4350001 4400000 5400000 + 4400001 4430000 5400000 + 4430001 4475000 4000000>; + qcom,taper-fcc; + qcom,jeita-too-hot = <590>; + qcom,jeita-too-cold = <(-100)>; + qcom,jeita-warm-th= <450>; + qcom,jeita-cool-th= <150>; + qcom,use-bq-pump; + mi,six-pin-battery; + qcom,ffc-low-temp-term-current-ma = <(-723)>; + qcom,ffc-high-temp-term-current-ma = <(-774)>; + qcom,fg-cc-cv-threshold-mv = <4440>; + qcom,fg-ffc-cc-cv-threshold-mv = <4490>; + qcom,nom-batt-capacity-mah = <5160>; + qcom,batt-id-kohm = <100>; + qcom,battery-beta = <4250>; + qcom,therm-room-temp = <100000>; + qcom,battery-type = "J20S_nvt_5160mah"; + qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>; + qcom,therm-center-offset = <0x70>; + qcom,therm-pull-up = <100>; + qcom,rslow-normal-coeffs = <0x3c 0x05 0x2a 0x0b>; + qcom,rslow-low-coeffs = <0xe7 0x00 0x6a 0x12>; + qcom,checksum = <0x65B6>; + qcom,gui-version = "PM855GUI - 1.0.0.14"; + qcom,fg-profile-data = [ + 09 00 6B E2 + D8 DD C7 DB + FD DD 00 00 + FD B4 92 83 + FA 87 9C 80 + 06 8D 19 80 + 20 00 3C 05 + 2A 0B BF 04 + 44 02 CE 07 + 32 00 6C EA + 29 E4 A4 DB + C8 03 54 DD + 9F 86 4B 23 + 4D 0A 88 D5 + 60 00 41 00 + 45 00 3D 00 + 2E 00 30 00 + 39 00 43 00 + 40 00 44 00 + 3D 00 60 00 + 39 00 36 00 + 47 00 40 00 + 3A 00 79 00 + 52 64 45 00 + 46 00 47 10 + 60 00 47 00 + 4C 08 71 10 + 5C 10 53 00 + 99 28 6A 48 + 5B 60 53 0C + 4E 00 D8 08 + 7D 20 0B 14 + 03 0A AD FC + 36 1C 0D 02 + F5 0C 66 23 + FA 17 3F 42 + 28 5D 83 02 + 66 11 41 22 + 2B 0D 96 12 + D2 05 F0 1C + 6B 03 B5 04 + 05 02 B4 17 + CD 23 83 44 + 2F 5A 8A 11 + 0C 21 DE E5 + 15 C2 8D AC + E2 1C A2 C1 + 2C 05 92 B3 + 63 17 DF 83 + 8C 84 1A A2 + 87 A0 09 80 + 3C 02 5B 04 + 1C 05 54 FB + 00 00 5C BD + FC E2 FC 07 + 1D E2 D3 C5 + 10 18 19 00 + A7 E6 33 03 + 9A 05 1F 03 + CE 07 32 00 + 96 01 BE 05 + 0F 05 27 03 + 67 04 6E 03 + AE 02 2B 03 + 38 05 55 00 + 3A 00 42 00 + 44 64 46 00 + 4C 00 42 08 + 43 00 46 00 + 47 08 3B 10 + 43 10 3E 00 + 52 28 54 50 + 5A 68 64 0A + 47 00 4C 00 + 56 10 55 00 + 46 00 4B 00 + 45 10 59 10 + 52 00 62 20 + 77 40 4C 58 + 59 0E 5B 00 + 50 08 2E 10 + D8 08 83 20 + B0 04 4E 0B + 6B 0D 9F 1C + 02 22 0F 45 + 34 53 23 18 + D1 02 D7 05 + 4D 02 66 11 + 3F 0A D1 20 + 08 04 02 02 + 9E 04 C4 1C + 33 03 C8 05 + 7B 02 86 18 + B6 03 18 04 + DB 02 6C 00 + 04 22 59 05 + 7E 02 DD 05 + F3 1C 02 02 + F2 05 61 02 + 98 18 34 03 + 17 05 A4 03 + 85 00 C2 00 + C0 00 FA 00 + 64 14 00 00 + ]; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/fg-gen4-batterydata-vayu-sunwoda-5160mah.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/fg-gen4-batterydata-vayu-sunwoda-5160mah.dtsi new file mode 100644 index 000000000000..165a4be41364 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/battery/fg-gen4-batterydata-vayu-sunwoda-5160mah.dtsi @@ -0,0 +1,153 @@ +qcom,xiaomi_j20s_sunwoda_5160mah_averaged_masterslave_aug26th2019 { + qcom,profile-revision = <24>; + /* #4174016_Xiaomi_J20S_5160mAh_averaged_MasterSlave_Aug26th2019*/ + qcom,max-voltage-uv = <4475000>; + qcom,fastchg-current-ma = <5900>; + qcom,jeita-fcc-ranges = <(-100) 0 500000 + 1 50 1000000 + 51 100 2500000 + 101 150 4000000 + 151 450 5900000 + 451 580 2500000>; + qcom,jeita-fv-ranges = <(-100) 0 4450000 + 1 50 4450000 + 51 100 4450000 + 101 150 4450000 + 151 450 4475000 + 451 600 4100000>; + qcom,step-chg-ranges = <3001000 4150000 5900000 + 4150001 4230000 5900000 + 4230001 4350000 5400000 + 4350001 4400000 5400000 + 4400001 4430000 5400000 + 4430001 4475000 4000000>; + qcom,taper-fcc; + qcom,jeita-too-hot = <590>; + qcom,jeita-too-cold = <(-100)>; + qcom,jeita-warm-th= <450>; + qcom,jeita-cool-th= <150>; + qcom,use-bq-pump; + mi,six-pin-battery; + qcom,ffc-low-temp-term-current-ma = <(-723)>; + qcom,ffc-high-temp-term-current-ma = <(-774)>; + qcom,fg-cc-cv-threshold-mv = <4440>; + qcom,fg-ffc-cc-cv-threshold-mv = <4490>; + qcom,nom-batt-capacity-mah = <5160>; + qcom,batt-id-kohm = <100>; + qcom,battery-beta = <4250>; + qcom,therm-room-temp = <100000>; + qcom,battery-type = "J20S_sunwoda_5160mah"; + qcom,therm-coefficients = <0x2318 0xd0c 0xdaf7 0xc556 0x848d>; + qcom,therm-center-offset = <0x70>; + qcom,therm-pull-up = <100>; + qcom,rslow-normal-coeffs = <0x71 0x04 0x9c 0x12>; + qcom,rslow-low-coeffs = <0x9d 0x15 0x4c 0x02>; + qcom,checksum = <0x7304>; + qcom,gui-version = "PM855GUI - 1.0.0.14"; + qcom,fg-profile-data = [ + 09 00 8B E2 + 99 D4 2B DB + 9D D4 00 00 + 95 B4 2D 83 + FD 87 E3 9D + 61 86 4B 80 + 24 00 71 04 + 9C 12 05 FC + EE F3 CE 07 + 32 00 B1 EA + FC ED 33 DA + 2E 12 37 DB + 8B BC 31 12 + E8 01 63 C5 + 60 00 49 00 + 4B 00 48 00 + 31 00 2F 00 + 37 00 40 00 + 3E 00 43 00 + 38 00 60 00 + 35 00 3B 00 + 4D 00 44 00 + 3A 00 71 00 + 57 64 49 00 + 44 08 40 10 + 60 08 47 00 + 43 08 58 10 + 55 10 45 00 + 8B 28 62 48 + 4E 60 44 0C + 41 00 D8 08 + 16 21 97 15 + 60 0A F9 FD + 1A 1C 20 02 + DF 04 70 23 + 0E 17 A9 42 + 9D 54 FF 02 + 69 15 B0 23 + 63 0C 28 13 + 48 05 F3 1C + 15 03 66 05 + 5F 03 EA 16 + 8C 23 5D 45 + AD 52 93 14 + 22 21 C4 E5 + 35 C2 3A B4 + D6 1C A9 C9 + 27 05 A1 B3 + 49 17 70 8B + 53 85 D9 9A + 86 A0 09 80 + 77 FA 99 FC + 29 FC 27 F2 + 00 F8 42 DC + 29 E2 FA F7 + B1 E2 77 BD + 44 18 1A 00 + 6D D4 D9 03 + 11 05 C3 02 + CE 07 32 00 + 01 03 C7 02 + 68 04 86 02 + 87 02 E1 05 + 38 02 43 01 + 69 04 46 00 + 38 00 44 00 + 44 64 48 00 + 4F 08 46 10 + 46 00 47 00 + 46 00 41 08 + 41 10 3D 00 + 53 20 52 40 + 5D 58 69 0F + 48 00 52 08 + 5E 10 62 00 + 4E 00 44 00 + 42 10 54 10 + 4B 00 5E 20 + 75 40 46 50 + 56 10 5E 00 + 5A 08 3B 10 + D8 08 3E 22 + 5A FD 5D 02 + 1E 0C C9 1C + 26 23 02 44 + 08 52 66 18 + 98 03 77 04 + 6B 02 7C 13 + 3F 0A CD 20 + F7 05 19 02 + 5E 04 A6 1C + 74 03 8E 05 + C0 02 65 18 + 4F 03 F7 04 + E4 03 6A 00 + EF 22 CB 04 + F1 02 67 05 + EB 1C E7 03 + 3E 04 34 02 + 89 18 E4 02 + A8 05 A0 02 + 8A 00 BF 00 + C0 00 FA 00 + 22 14 00 00 + ]; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-j20s-36-02-0a-lcd-dsc-vid.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-j20s-36-02-0a-lcd-dsc-vid.dtsi new file mode 100644 index 000000000000..7caf6f84bcac --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-j20s-36-02-0a-lcd-dsc-vid.dtsi @@ -0,0 +1,334 @@ +/* Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&mdss_mdp { + dsi_j20s_36_02_0a_video: qcom,mdss_dsi_j20s_36_02_0a_dsc_video { + qcom,mdss-dsi-panel-name = "xiaomi 36 02 0a video mode dsc dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "xiaomi 36 02 0a VIDEO PANEL"; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-color-order = "rgb_swap_rgb"; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,ulps-enabled; + qcom,mdss-dsi-reset-sequence = <1 5>, <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <70>; + qcom,mdss-pan-physical-height-dimension = <154>; + qcom,mdss-dsi-tx-eot-append; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,disp-panel-offon-mode-enabled; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4200000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + qcom,esd-err-irq-gpio = <&tlmm 5 0x2002>; + /* qcom,mdss-dsi-qsync-min-refresh-rate = <60>; */ + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = + "dfps_immediate_porch_mode_vfp"; + qcom,dsi-supported-dfps-list = <120 90 60 50 48 30>; + + qcom,dispparam-enabled; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-framerate = <120>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2400>; + qcom,mdss-dsi-h-pulse-width = <12>; + qcom,mdss-dsi-h-back-porch = <40>; + qcom,mdss-dsi-h-front-porch = <67>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-v-back-porch = <30>; + qcom,mdss-dsi-v-front-porch = <33>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + + qcom,mdss-dsi-on-command = [ + /* DDIC Initical Code */ + 15 00 00 00 00 00 02 FF 24 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 4D 02 + 15 00 00 00 00 00 02 4E 30 + 15 00 00 00 00 00 02 4F 30 + 15 00 00 00 00 00 02 53 30 + 15 00 00 00 00 00 02 7A 01 + 15 00 00 00 00 00 02 7B 8C + 15 00 00 00 00 00 02 7D 05 + 15 00 00 00 00 00 02 80 05 + 15 00 00 00 00 00 02 81 05 + 15 00 00 00 00 00 02 A0 0C + 15 00 00 00 00 00 02 A2 0C + 15 00 00 00 00 00 02 A3 01 + 15 00 00 00 00 00 02 A4 05 + 15 00 00 00 00 00 02 A5 05 + 15 00 00 00 00 00 02 C4 80 + 15 00 00 00 00 00 02 C6 C0 + 15 01 00 00 00 00 02 E9 02 + 15 00 00 00 00 00 02 FF 25 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 DA 00 + 15 00 00 00 00 00 02 E0 00 + 15 01 00 00 00 00 02 F1 04 + 15 00 00 00 00 00 02 FF 2B + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 B7 08 + 15 00 00 00 00 00 02 B8 1A + 15 01 00 00 00 00 02 C0 04 + 15 00 00 00 00 00 02 FF F0 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 1C 01 + 15 01 00 00 00 00 02 33 01 + /* CABC Setting */ + 15 00 00 00 00 00 02 FF 23 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 00 80 + 15 00 00 00 00 00 02 01 84 + 15 00 00 00 00 00 02 05 2D + 15 00 00 00 00 00 02 06 00 + 15 00 00 00 00 00 02 07 00 + 15 00 00 00 00 00 02 08 01 + 15 00 00 00 00 00 02 09 45 + 15 00 00 00 00 00 02 11 01 + 15 00 00 00 00 00 02 12 95 + 15 00 00 00 00 00 02 15 68 + 15 00 00 00 00 00 02 16 0B + 15 00 00 00 00 00 02 29 0A + 15 00 00 00 00 00 02 30 FF + 15 00 00 00 00 00 02 31 FE + 15 00 00 00 00 00 02 32 FD + 15 00 00 00 00 00 02 33 FB + 15 00 00 00 00 00 02 34 F8 + 15 00 00 00 00 00 02 35 F5 + 15 00 00 00 00 00 02 36 F3 + 15 00 00 00 00 00 02 37 F2 + 15 00 00 00 00 00 02 38 F2 + 15 00 00 00 00 00 02 39 F2 + 15 00 00 00 00 00 02 3A EF + 15 00 00 00 00 00 02 3B EC + 15 00 00 00 00 00 02 3D E9 + 15 00 00 00 00 00 02 3F E5 + 15 00 00 00 00 00 02 40 E5 + 15 00 00 00 00 00 02 41 E5 + 15 00 00 00 00 00 02 2A 13 + 15 00 00 00 00 00 02 45 FF + 15 00 00 00 00 00 02 46 F4 + 15 00 00 00 00 00 02 47 E7 + 15 00 00 00 00 00 02 48 DA + 15 00 00 00 00 00 02 49 CD + 15 00 00 00 00 00 02 4A C0 + 15 00 00 00 00 00 02 4B B3 + 15 00 00 00 00 00 02 4C B2 + 15 00 00 00 00 00 02 4D B2 + 15 00 00 00 00 00 02 4E B2 + 15 00 00 00 00 00 02 4F 99 + 15 00 00 00 00 00 02 50 80 + 15 00 00 00 00 00 02 51 68 + 15 00 00 00 00 00 02 52 66 + 15 00 00 00 00 00 02 53 66 + 15 00 00 00 00 00 02 54 66 + 15 00 00 00 00 00 02 2B 0E + 15 00 00 00 00 00 02 58 FF + 15 00 00 00 00 00 02 59 FB + 15 00 00 00 00 00 02 5A F7 + 15 00 00 00 00 00 02 5B F3 + 15 00 00 00 00 00 02 5C EF + 15 00 00 00 00 00 02 5D E3 + 15 00 00 00 00 00 02 5E DA + 15 00 00 00 00 00 02 5F D8 + 15 00 00 00 00 00 02 60 D8 + 15 00 00 00 00 00 02 61 D8 + 15 00 00 00 00 00 02 62 CB + 15 00 00 00 00 00 02 63 BF + 15 00 00 00 00 00 02 64 B3 + 15 00 00 00 00 00 02 65 B2 + 15 00 00 00 00 00 02 66 B2 + 15 01 00 00 00 00 02 67 B2 + /* ESD Setting */ + 15 00 00 00 00 00 02 FF 27 + 15 00 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 40 20 + 15 00 00 00 00 00 02 FF 10 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 C0 03 + 39 00 00 00 00 00 03 51 0D B5 + 15 01 00 00 00 00 02 53 24 + 15 00 00 00 00 00 02 FF 10 + 15 01 00 00 46 00 02 11 00 + 15 01 00 00 00 00 02 29 00 + 15 00 00 00 00 00 02 FF 27 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 3F 01 + 15 00 00 00 00 00 02 43 08 + 15 00 00 00 00 00 02 40 25 + 15 01 00 00 00 00 02 FF 10]; + qcom,mdss-dsi-post-off-command = [ + 15 00 00 00 00 00 02 FF 27 + 15 00 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 3F 00 + 15 00 00 00 00 00 02 FF 10 + 05 00 00 00 00 00 02 28 00 + 05 01 00 00 46 00 02 10 00]; + qcom,mdss-dsi-displayoff-command = [05 01 00 00 20 00 02 28 00]; + qcom,mdss-dsi-displayon-command = [05 01 00 00 14 00 02 29 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-post-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-displayoff-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-displayon-command-state = "dsi_hs_mode"; + + + qcom,mdss-dsi-dispparam-cabcuion-command = [ + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 01 + ]; + qcom,mdss-dsi-dispparam-cabcstillon-command = [ + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 02 + ]; + qcom,mdss-dsi-dispparam-cabcmovieon-command = [ + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 03 + ]; + qcom,mdss-dsi-dispparam-cabcoff-command = [ + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 00 + ]; + qcom,mdss-dsi-dispparam-cabcuion-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-cabcstillon-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-cabcmovieon-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-cabcoff-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-dispparam-lcd-hbm-l1-on-command = [ + 15 00 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 0E A0]; + qcom,mdss-dsi-dispparam-lcd-hbm-l1-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-lcd-hbm-l2-on-command = [ + 15 00 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 FF FF]; + qcom,mdss-dsi-dispparam-lcd-hbm-l2-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-lcd-hbm-off-command = [ + 15 00 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 0D B5]; + qcom,mdss-dsi-dispparam-lcd-hbm-off-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,compression-mode = "dsc"; + qcom,mdss-dsc-version = <0x11>; + qcom,mdss-dsc-scr-version = <0x0>; + qcom,mdss-dsc-slice-height = <20>; + qcom,mdss-dsc-slice-width = <540>; + qcom,mdss-dsc-slice-per-pkt = <2>; + qcom,mdss-dsc-bit-per-component = <8>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; + }; + }; +}; + +&dsi_j20s_36_02_0a_video { + mi,feature-enabled; + mi,is-tddi-flag; + mi,mdss-panel-on-dimming-delay = <120>; + mi,esd-err-irq-gpio = <&tlmm 24 0x2002>; /* trig-flags: falling-0x0002 rasing-0x0001*/ + mi,mdss-dsi-panel-xy-coordinate = <0x6 0x3>; + mi,mdss-dsi-panel-max-luminance = <0x6 0x4>; + mi,mdss-dsi-panel-status-value-ignore; + mi,esd-check-interval = <3000>; + mi,mdss-panel-idle-time = <1100>; + mi,mdss-panel-idle-fps = <50>; + //mi,mdss-dsi-pan-enable-smart-fps; + mi,mdss-dsi-dfps-dec-vfp-list = <20 0 20 0 0 0 + 0 0 0 0 0 0>; + mi,mdss-dsi-dfps-dec-hfp-list = <0 0 0 0 0 0 + 4 0 4 0 0 0>; + mi,mdss-dsi-post-off-msleep = <20>; + + qcom,mdss-dsi-display-timings { + timing@0{ + mi,mdss-dsi-read-lockdown-info-command = [ + 15 00 00 00 00 00 02 FF 21 + 06 01 00 00 00 00 01 F1]; + mi,mdss-dsi-read-lockdown-info-command-state = "dsi_lp_mode"; + + mi,mdss-dsi-cabcuion-command = [ + 15 00 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 01 + ]; + mi,mdss-dsi-cabcuion-command-state = "dsi_hs_mode"; + + mi,mdss-dsi-cabcstillon-command = [ + 15 00 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 02 + ]; + mi,mdss-dsi-cabcstillon-command-state = "dsi_hs_mode"; + + mi,mdss-dsi-cabcmovieon-command = [ + 15 00 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 03 + ]; + mi,mdss-dsi-cabcmovieon-command-state = "dsi_hs_mode"; + + mi,mdss-dsi-cabcoff-command = [ + 15 00 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 00 + ]; + mi,mdss-dsi-cabcoff-command-state = "dsi_hs_mode"; + + mi,mdss-dsi-cabc-dimmming-command = [ + 15 00 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 53 2C + ]; + mi,mdss-dsi-cabc-dimmming-command-state = "dsi_hs_mode"; + + mi,mdss-dsi-xy-coordinate-command = [ + 15 00 00 00 00 00 02 FF 10 + 06 01 00 00 00 00 01 A1]; + mi,mdss-dsi-xy-coordinate-command-state = "dsi_lp_mode"; + + mi,mdss-dsi-max-luminance-write-command = [ + 15 01 00 00 00 00 02 FF 10]; + mi,mdss-dsi-max-luminance-write-command-state = "dsi_lp_mode"; + + mi,mdss-dsi-max-luminance-read-command = [ + 06 01 00 00 00 00 01 A1]; + mi,mdss-dsi-max-luminance-read-command-state = "dsi_lp_mode"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-j20s-42-02-0b-lcd-dsc-vid.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-j20s-42-02-0b-lcd-dsc-vid.dtsi new file mode 100644 index 000000000000..c9421342f92b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-j20s-42-02-0b-lcd-dsc-vid.dtsi @@ -0,0 +1,318 @@ +/* Copyright (c) 2020, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&mdss_mdp { + dsi_j20s_42_02_0b_video: qcom,mdss_dsi_j20s_42_02_0b_dsc_video { + qcom,mdss-dsi-panel-name = "xiaomi 42 02 0b video mode dsc dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "xiaomi 42 02 0b VIDEO PANEL"; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-color-order = "rgb_swap_rgb"; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,ulps-enabled; + qcom,mdss-dsi-reset-sequence = <1 5>, <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <70>; + qcom,mdss-pan-physical-height-dimension = <154>; + qcom,mdss-dsi-tx-eot-append; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,disp-panel-offon-mode-enabled; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4200000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + qcom,esd-err-irq-gpio = <&tlmm 5 0x2002>; + /* qcom,mdss-dsi-qsync-min-refresh-rate = <60>; */ + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = + "dfps_immediate_porch_mode_vfp"; + qcom,dsi-supported-dfps-list = <120 90 60 50 48 30>; + + qcom,dispparam-enabled; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-framerate = <120>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2400>; + qcom,mdss-dsi-h-pulse-width = <12>; + qcom,mdss-dsi-h-back-porch = <40>; + qcom,mdss-dsi-h-front-porch = <67>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-v-back-porch = <30>; + qcom,mdss-dsi-v-front-porch = <33>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + + qcom,mdss-dsi-on-command = [ + /* DDIC Initical Code */ + 15 00 00 00 00 00 02 FF 20 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 EE 60 + 15 01 00 00 00 00 02 EF 06 + /* CABC Setting */ + 15 00 00 00 00 00 02 FF 23 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 00 80 + 15 00 00 00 00 00 02 01 84 + 15 00 00 00 00 00 02 05 2D + 15 00 00 00 00 00 02 06 00 + 15 00 00 00 00 00 02 07 00 + 15 00 00 00 00 00 02 08 01 + 15 00 00 00 00 00 02 09 45 + 15 00 00 00 00 00 02 11 01 + 15 00 00 00 00 00 02 12 95 + 15 00 00 00 00 00 02 15 68 + 15 00 00 00 00 00 02 16 0B + 15 00 00 00 00 00 02 29 0A + 15 00 00 00 00 00 02 30 FF + 15 00 00 00 00 00 02 31 FE + 15 00 00 00 00 00 02 32 FD + 15 00 00 00 00 00 02 33 FB + 15 00 00 00 00 00 02 34 F8 + 15 00 00 00 00 00 02 35 F5 + 15 00 00 00 00 00 02 36 F3 + 15 00 00 00 00 00 02 37 F2 + 15 00 00 00 00 00 02 38 F2 + 15 00 00 00 00 00 02 39 F2 + 15 00 00 00 00 00 02 3A EF + 15 00 00 00 00 00 02 3B EC + 15 00 00 00 00 00 02 3D E9 + 15 00 00 00 00 00 02 3F E5 + 15 00 00 00 00 00 02 40 E5 + 15 00 00 00 00 00 02 41 E5 + 15 00 00 00 00 00 02 2A 13 + 15 00 00 00 00 00 02 45 FF + 15 00 00 00 00 00 02 46 F4 + 15 00 00 00 00 00 02 47 E7 + 15 00 00 00 00 00 02 48 DA + 15 00 00 00 00 00 02 49 CD + 15 00 00 00 00 00 02 4A C0 + 15 00 00 00 00 00 02 4B B3 + 15 00 00 00 00 00 02 4C B2 + 15 00 00 00 00 00 02 4D B2 + 15 00 00 00 00 00 02 4E B2 + 15 00 00 00 00 00 02 4F 99 + 15 00 00 00 00 00 02 50 80 + 15 00 00 00 00 00 02 51 68 + 15 00 00 00 00 00 02 52 66 + 15 00 00 00 00 00 02 53 66 + 15 00 00 00 00 00 02 54 66 + 15 00 00 00 00 00 02 2B 0E + 15 00 00 00 00 00 02 58 FF + 15 00 00 00 00 00 02 59 FB + 15 00 00 00 00 00 02 5A F7 + 15 00 00 00 00 00 02 5B F3 + 15 00 00 00 00 00 02 5C EF + 15 00 00 00 00 00 02 5D E3 + 15 00 00 00 00 00 02 5E DA + 15 00 00 00 00 00 02 5F D8 + 15 00 00 00 00 00 02 60 D8 + 15 00 00 00 00 00 02 61 D8 + 15 00 00 00 00 00 02 62 CB + 15 00 00 00 00 00 02 63 BF + 15 00 00 00 00 00 02 64 B3 + 15 00 00 00 00 00 02 65 B2 + 15 00 00 00 00 00 02 66 B2 + 15 01 00 00 00 00 02 67 B2 + + /*decrease MUX EQ for desense*/ + 15 00 00 00 00 00 02 FF 20 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 1F C0 + 15 00 00 00 00 00 02 20 C0 + + 15 00 00 00 00 00 02 FF 25 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 D6 80 + 15 00 00 00 00 00 02 D7 02 + 15 00 00 00 00 00 02 DD 02 + + /* ESD Setting */ + 15 00 00 00 00 00 02 FF 27 + 15 00 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 40 20 + 15 00 00 00 00 00 02 FF 10 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 C0 03 + 39 00 00 00 00 00 03 51 0D B5 + 15 01 00 00 00 00 02 53 24 + 15 00 00 00 00 00 02 FF 10 + 15 01 00 00 46 00 02 11 00 + 15 01 00 00 00 00 02 29 00 + 15 00 00 00 00 00 02 FF 27 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 3F 01 + 15 00 00 00 00 00 02 43 08 + 15 00 00 00 00 00 02 40 25 + 15 01 00 00 00 00 02 FF 10]; + qcom,mdss-dsi-post-off-command = [ + 15 00 00 00 00 00 02 FF 27 + 15 00 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 3F 00 + 15 00 00 00 00 00 02 FF 10 + 05 00 00 00 00 00 02 28 00 + 05 01 00 00 46 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-post-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-displayoff-command = [05 01 00 00 20 00 02 28 00]; + qcom,mdss-dsi-displayon-command = [05 01 00 00 14 00 02 29 00]; + qcom,mdss-dsi-displayoff-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-displayon-command-state = "dsi_hs_mode"; + + + qcom,mdss-dsi-dispparam-cabcuion-command = [ + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 01 + ]; + qcom,mdss-dsi-dispparam-cabcstillon-command = [ + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 02 + ]; + qcom,mdss-dsi-dispparam-cabcmovieon-command = [ + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 03 + ]; + qcom,mdss-dsi-dispparam-cabcoff-command = [ + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 00 + ]; + qcom,mdss-dsi-dispparam-cabcuion-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-cabcstillon-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-cabcmovieon-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-cabcoff-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-dispparam-lcd-hbm-l1-on-command = [ + 15 00 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 0E A0]; + qcom,mdss-dsi-dispparam-lcd-hbm-l1-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-lcd-hbm-l2-on-command = [ + 15 00 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 FF FF]; + qcom,mdss-dsi-dispparam-lcd-hbm-l2-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-lcd-hbm-off-command = [ + 15 00 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 0D B5]; + qcom,mdss-dsi-dispparam-lcd-hbm-off-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-h-sync-pulse = <1>; + qcom,compression-mode = "dsc"; + qcom,mdss-dsc-version = <0x11>; + qcom,mdss-dsc-scr-version = <0x0>; + qcom,mdss-dsc-slice-height = <20>; + qcom,mdss-dsc-slice-width = <540>; + qcom,mdss-dsc-slice-per-pkt = <2>; + qcom,mdss-dsc-bit-per-component = <8>; + qcom,mdss-dsc-bit-per-pixel = <8>; + qcom,mdss-dsc-block-prediction-enable; + }; + }; + }; +}; + +&dsi_j20s_42_02_0b_video { + mi,feature-enabled; + mi,is-tddi-flag; + mi,mdss-panel-on-dimming-delay = <120>; + mi,esd-err-irq-gpio = <&tlmm 24 0x2002>; /* trig-flags: falling-0x0002 rasing-0x0001*/ + mi,mdss-dsi-panel-xy-coordinate = <0x6 0x3>; + mi,mdss-dsi-panel-max-luminance = <0x6 0x4>; + mi,mdss-dsi-panel-status-value-ignore; + mi,esd-check-interval = <3000>; + mi,mdss-panel-idle-time = <1100>; + mi,mdss-panel-idle-fps = <50>; +// mi,mdss-dsi-pan-enable-smart-fps; + mi,mdss-dsi-dfps-dec-vfp-list = <20 0 20 0 0 0 + 0 0 0 0 0 0>; + mi,mdss-dsi-dfps-dec-hfp-list = <0 0 0 0 0 0 + 4 0 4 0 0 0>; + mi,mdss-dsi-post-off-msleep = <20>; + + qcom,mdss-dsi-display-timings { + timing@0{ + mi,mdss-dsi-read-lockdown-info-command = [ + 15 00 00 00 00 00 02 FF 21 + 06 01 00 00 00 00 01 F1]; + mi,mdss-dsi-read-lockdown-info-command-state = "dsi_lp_mode"; + + mi,mdss-dsi-cabcuion-command = [ + 15 00 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 01 + ]; + mi,mdss-dsi-cabcuion-command-state = "dsi_hs_mode"; + + mi,mdss-dsi-cabcstillon-command = [ + 15 00 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 02 + ]; + mi,mdss-dsi-cabcstillon-command-state = "dsi_hs_mode"; + + mi,mdss-dsi-cabcmovieon-command = [ + 15 00 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 03 + ]; + mi,mdss-dsi-cabcmovieon-command-state = "dsi_hs_mode"; + + mi,mdss-dsi-cabcoff-command = [ + 15 00 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 55 00 + ]; + mi,mdss-dsi-cabcoff-command-state = "dsi_hs_mode"; + + mi,mdss-dsi-cabc-dimmming-command = [ + 15 00 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 53 2C + ]; + mi,mdss-dsi-cabc-dimmming-command-state = "dsi_hs_mode"; + + mi,mdss-dsi-xy-coordinate-command = [ + 15 00 00 00 00 00 02 FF 10 + 06 01 00 00 00 00 01 A1]; + mi,mdss-dsi-xy-coordinate-command-state = "dsi_lp_mode"; + + mi,mdss-dsi-max-luminance-write-command = [ + 15 01 00 00 00 00 02 FF 10]; + mi,mdss-dsi-max-luminance-write-command-state = "dsi_lp_mode"; + + mi,mdss-dsi-max-luminance-read-command = [ + 06 01 00 00 00 00 01 A1]; + mi,mdss-dsi-max-luminance-read-command-state = "dsi_lp_mode"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-k82-36-02-0b-video.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-k82-36-02-0b-video.dtsi new file mode 100644 index 000000000000..90b7af7b72e0 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-k82-36-02-0b-video.dtsi @@ -0,0 +1,368 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&mdss_mdp { + dsi_k82_36_02_0b_dual_cphy_video: qcom,mdss_dsi_k82_36_02_0b_dual_cphy_video { + qcom,mdss-dsi-panel-name = "xiaomi 36 02 0b video mode dual dsi cphy panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "xiaomi 36 02 0b VIDEO PANEL"; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-color-order = "rgb_swap_rgb"; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-reset-sequence = <0 12>, <1 12>, <0 12>, <1 12>; + qcom,mdss-pan-physical-width-dimension = <1474>; + qcom,mdss-pan-physical-height-dimension = <2359>; + qcom,mdss-dsi-tx-eot-append; + qcom,mdss-dsi-rx-eot-ignore; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,cmd-sync-wait-broadcast; + qcom,panel-cphy-mode; + qcom,mdss-dsi-cphy-strength; + qcom,cphy-esd-check; + qcom,sync-pen-fps; + mi,is-tddi-flag; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = + "dfps_immediate_porch_mode_vfp"; + qcom,dsi-supported-dfps-list = <120 60>; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4200000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-framerate = <120>; + qcom,mdss-dsi-panel-width = <800>; // 1600/2 + qcom,mdss-dsi-panel-height = <2560>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-back-porch = <20>; + qcom,mdss-dsi-h-front-porch = <44>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-pulse-width = <4>; + qcom,mdss-dsi-v-back-porch = <168>; + qcom,mdss-dsi-v-front-porch = <26>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + + qcom,mdss-dsi-on-command= [ + 15 00 00 00 00 00 02 FF 10 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 B9 05 + 15 00 00 00 00 00 02 FF 20 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 18 40 + 15 00 00 00 00 00 02 FF 10 + 15 00 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 B9 02 + /*CABC start*/ + 15 00 00 00 00 00 02 FF 23 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 00 80 + 15 00 00 00 00 00 02 01 84 + 15 00 00 00 00 00 02 05 2D + 15 00 00 00 00 00 02 06 00 + 15 00 00 00 00 00 02 07 00 + 15 00 00 00 00 00 02 08 01 + 15 00 00 00 00 00 02 09 45 + 15 00 00 00 00 00 02 11 02 + 15 00 00 00 00 00 02 12 80 + 15 00 00 00 00 00 02 15 83 + 15 01 00 00 00 00 02 16 0C + 15 00 00 00 00 00 02 29 0A + 15 00 00 00 00 00 02 30 FF + 15 00 00 00 00 00 02 31 FE + 15 00 00 00 00 00 02 32 FD + 15 00 00 00 00 00 02 33 FB + 15 00 00 00 00 00 02 34 F8 + 15 00 00 00 00 00 02 35 F5 + 15 00 00 00 00 00 02 36 F3 + 15 00 00 00 00 00 02 37 F2 + 15 00 00 00 00 00 02 38 F2 + 15 00 00 00 00 00 02 39 F2 + 15 00 00 00 00 00 02 3A EF + 15 00 00 00 00 00 02 3B EC + 15 00 00 00 00 00 02 3D E9 + 15 00 00 00 00 00 02 3F E5 + 15 00 00 00 00 00 02 40 E5 + 15 00 00 00 00 00 02 41 E5 + 15 00 00 00 00 00 02 2A 13 + 15 01 00 00 00 00 02 45 FF + 15 00 00 00 00 00 02 46 F4 + 15 00 00 00 00 00 02 47 E7 + 15 00 00 00 00 00 02 48 DA + 15 00 00 00 00 00 02 49 CD + 15 00 00 00 00 00 02 4A C0 + 15 00 00 00 00 00 02 4B B3 + 15 00 00 00 00 00 02 4C B2 + 15 00 00 00 00 00 02 4D B2 + 15 00 00 00 00 00 02 4E B2 + 15 00 00 00 00 00 02 4F 99 + 15 00 00 00 00 00 02 50 80 + 15 00 00 00 00 00 02 51 68 + 15 00 00 00 00 00 02 52 66 + 15 00 00 00 00 00 02 53 66 + 15 00 00 00 00 00 02 54 66 + 15 01 00 00 00 00 02 2B 0E + 15 00 00 00 00 00 02 58 FF + 15 00 00 00 00 00 02 59 FB + 15 00 00 00 00 00 02 5A F7 + 15 00 00 00 00 00 02 5B F3 + 15 00 00 00 00 00 02 5C EF + 15 00 00 00 00 00 02 5D E3 + 15 00 00 00 00 00 02 5E DA + 15 00 00 00 00 00 02 5F D8 + 15 00 00 00 00 00 02 60 D8 + 15 00 00 00 00 00 02 61 D8 + 15 00 00 00 00 00 02 62 CB + 15 00 00 00 00 00 02 63 BF + 15 00 00 00 00 00 02 64 B3 + 15 00 00 00 00 00 02 65 B2 + 15 00 00 00 00 00 02 66 B2 + 15 01 00 00 00 00 02 67 B2 + /*CABC end*/ + /*ESD start*/ + 15 00 00 00 00 00 02 FF F0 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 84 08 + 15 00 00 00 00 00 02 85 0C + 15 00 00 00 00 00 02 FF 20 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 51 00 + 15 00 00 00 00 00 02 FF 25 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 91 1F + 15 00 00 00 00 00 02 92 0F + 15 00 00 00 00 00 02 93 01 + 15 00 00 00 00 00 02 94 18 + 15 01 00 00 00 00 02 95 03 + 15 00 00 00 00 00 02 96 01 + 15 00 00 00 00 00 02 FF 10 + 15 00 00 00 00 00 02 B0 01 + 15 00 00 00 00 00 02 FF 25 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 19 1F + 15 00 00 00 00 00 02 1B 1B + 15 00 00 00 00 00 02 FF 24 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 B8 28 + 15 00 00 00 00 00 02 FF 27 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 D0 31 + 15 00 00 00 00 00 02 DE 80 + 15 00 00 00 00 00 02 DF 02 + 15 00 00 00 00 00 02 D1 20 + 15 00 00 00 00 00 02 D2 30 + 15 01 00 00 00 00 02 D4 08 + /*ESD end*/ + /*OSC start*/ + 15 00 00 00 00 00 02 FF 26 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 00 81 + 15 00 00 00 00 00 02 01 B0 + 15 00 00 00 00 00 02 FF 22 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 6F 01 + 15 00 00 00 00 00 02 70 11 + 15 00 00 00 00 00 02 73 01 + 15 00 00 00 00 00 02 74 46 + 15 00 00 00 00 00 02 A0 3F + 15 00 00 00 00 00 02 A9 50 + 15 00 00 00 00 00 02 AA 28 + 15 00 00 00 00 00 02 AB 28 + 15 01 00 00 00 00 02 AD 10 + 15 00 00 00 00 00 02 B8 00 + 15 00 00 00 00 00 02 B9 46 + 15 00 00 00 00 00 02 BA 8C + 15 00 00 00 00 00 02 BB 46 + 15 00 00 00 00 00 02 BE 0A + 15 00 00 00 00 00 02 BF 46 + 15 00 00 00 00 00 02 C0 0A + 15 00 00 00 00 00 02 C1 56 + 15 00 00 00 00 00 02 C2 00 + 15 00 00 00 00 00 02 C5 00 + 15 00 00 00 00 00 02 C6 00 + 15 01 00 00 00 00 02 C7 30 + 15 00 00 00 00 00 02 CA 00 + 15 00 00 00 00 00 02 CB 3C + 15 00 00 00 00 00 02 CE 00 + 15 00 00 00 00 00 02 CF 00 + 15 00 00 00 00 00 02 D0 38 + 15 00 00 00 00 00 02 D3 08 + 15 00 00 00 00 00 02 D4 3D + 15 00 00 00 00 00 02 FF 25 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 BC 01 + 15 00 00 00 00 00 02 BD 1C + 15 00 00 00 00 00 02 FF 2A + 15 00 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 9A 03 + /*OSC end*/ + 15 00 00 00 00 00 02 FF D0 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 00 32 + 15 00 00 00 00 00 02 02 FF + 15 00 00 00 00 00 02 09 FF + 15 00 00 00 00 00 02 53 22 + 15 00 00 00 00 00 02 54 02 + 15 00 00 00 00 00 02 1C 99 + 15 00 00 00 00 00 02 1D 09 + 15 00 00 00 00 00 02 FF E0 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 14 60 + 15 00 00 00 00 00 02 16 C0 + 15 00 00 00 00 00 02 4F 02 + 15 01 00 00 00 00 02 FF F0 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 3A 08 + 15 00 00 00 00 00 02 FF 10 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 BB 13 + 39 00 00 00 00 00 06 3B 03 AC 1A 04 04 + 15 00 00 00 00 00 02 35 00 + 39 00 00 00 00 00 03 51 0F FF + 15 01 00 00 00 00 02 53 2C + 05 01 00 00 46 00 02 11 00 + 15 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 46 00 02 10 00]; + qcom,mdss-dsi-displayoff-command = [05 01 00 00 20 00 02 28 00]; + qcom,mdss-dsi-displayon-command = [05 01 00 00 14 00 02 29 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-displayoff-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-displayon-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-sync-pen-120hz-command = [ + 15 00 00 00 00 00 02 FF 2A + 15 00 00 00 00 00 02 23 0D + 15 01 00 00 00 00 02 FF 10]; + qcom,mdss-dsi-sync-pen-60hz-command = [ + 15 00 00 00 00 00 02 FF 2A + 15 00 00 00 00 00 02 23 0C + 15 01 00 00 00 00 02 FF 10]; + qcom,mdss-dsi-sync-pen-120hz-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-sync-pen-60hz-command-state = "dsi_lp_mode"; + + /* max brightness 85% */ + qcom,mdss-dsi-dispparam-lcd-hbm-l1-on-command = [ + 15 01 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 0F FF]; + qcom,mdss-dsi-dispparam-lcd-hbm-l1-on-command-state = "dsi_lp_mode"; + /* max brightness 91% */ + qcom,mdss-dsi-dispparam-lcd-hbm-l2-on-command = [ + 15 01 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 0F FF]; + qcom,mdss-dsi-dispparam-lcd-hbm-l2-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-lcd-hbm-off-command = [ + 15 01 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 0F FF]; + qcom,mdss-dsi-dispparam-lcd-hbm-off-command-state = "dsi_lp_mode"; + }; + }; + }; +}; + +&dsi_k82_36_02_0b_dual_cphy_video { + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <120>; + qcom,esd-err-irq-gpio = <&tlmm 37 0x2002>; /* trig-flags: falling-0x0002 rasing-0x0001*/ + mi,mdss-dsi-panel-xy-coordinate = <0x3 0x3>; + mi,mdss-dsi-panel-max-luminance = <0x3 0x4>; + qcom,mdss-dsi-display-timings { + timing@0{ + mi,mdss-dsi-read-lockdown-info-command = [ + 15 01 00 00 00 00 02 FF 22 + 06 01 00 00 00 00 01 01 + 06 01 00 00 00 00 01 02 + 06 01 00 00 00 00 01 03 + 06 01 00 00 00 00 01 04 + 06 01 00 00 00 00 01 05 + 06 01 00 00 00 00 01 06 + 06 01 00 00 00 00 01 07 + 06 01 00 00 00 00 01 08]; + mi,mdss-dsi-read-lockdown-info-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-cabcuion-command = [ + 15 01 00 00 00 00 02 55 01 + ]; + qcom,mdss-dsi-dispparam-cabcstillon-command = [ + 15 01 00 00 00 00 02 55 02 + ]; + qcom,mdss-dsi-dispparam-cabcmovieon-command = [ + 15 01 00 00 00 00 02 55 03 + ]; + qcom,mdss-dsi-dispparam-cabcoff-command = [ + 15 01 00 00 00 00 02 55 00 + ]; + qcom,mdss-dsi-dispparam-dimmingon-command = [ + /* CABC DIMMING ON */ + 15 01 00 00 00 00 02 53 2C + ]; + qcom,mdss-dsi-dispparam-dimmingoff-command = [ + 15 01 00 00 00 00 02 53 24 + ]; + + qcom,mdss-dsi-dispparam-cabcuion-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-cabcstillon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-cabcmovieon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-cabcoff-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingoff-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-esd-check-read-command = [ + /* esd detect */ + 15 01 00 00 00 00 02 FF 27 + 15 01 00 00 00 00 02 D1 28 + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 53 2C + ]; + qcom,mdss-dsi-esd-check-read-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-xy-coordinate-command = [ + 15 01 00 00 00 00 02 FF 10 + 06 01 00 00 00 00 01 A1 + ]; + qcom,mdss-dsi-dispparam-xy-coordinate-command-state = "dsi_lp_mode"; + + mi,mdss-dsi-max-luminance-write-command = [ + 15 01 00 00 00 00 02 FF 10]; + mi,mdss-dsi-max-luminance-write-command-state = "dsi_lp_mode"; + mi,mdss-dsi-max-luminance-read-command = [ + 06 01 00 00 00 00 01 A1]; + mi,mdss-dsi-max-luminance-read-command-state = "dsi_lp_mode"; + }; + }; +}; + + diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-k82-42-02-0a-video.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-k82-42-02-0a-video.dtsi new file mode 100644 index 000000000000..651b814864cf --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-k82-42-02-0a-video.dtsi @@ -0,0 +1,382 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&mdss_mdp { + dsi_k82_42_02_0a_dual_cphy_video: qcom,mdss_dsi_k82_42_02_0a_dual_cphy_video { + qcom,mdss-dsi-panel-name = "xiaomi 42 02 0a video mode dual dsi cphy panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "xiaomi 42 02 0a VIDEO PANEL"; + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-color-order = "rgb_swap_rgb"; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-reset-sequence = <0 12>, <1 12>, <0 12>, <1 12>; + qcom,mdss-pan-physical-width-dimension = <1474>; + qcom,mdss-pan-physical-height-dimension = <2359>; + qcom,mdss-dsi-tx-eot-append; + qcom,mdss-dsi-rx-eot-ignore; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,cmd-sync-wait-broadcast; + qcom,panel-cphy-mode; + qcom,mdss-dsi-cphy-strength; + qcom,cphy-esd-check; + qcom,sync-pen-fps; + mi,is-tddi-flag; + qcom,mdss-dsi-pan-enable-dynamic-fps; + qcom,mdss-dsi-pan-fps-update = + "dfps_immediate_porch_mode_vfp"; + qcom,dsi-supported-dfps-list = <120 60>; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4200000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-framerate = <120>; + qcom,mdss-dsi-panel-width = <800>; // 1600/2 + qcom,mdss-dsi-panel-height = <2560>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-back-porch = <20>; + qcom,mdss-dsi-h-front-porch = <44>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-pulse-width = <4>; + qcom,mdss-dsi-v-back-porch = <168>; + qcom,mdss-dsi-v-front-porch = <26>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + + qcom,mdss-dsi-on-command= [ + 15 00 00 00 00 00 02 FF 10 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 B9 05 + 15 00 00 00 00 00 02 FF 20 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 18 40 + 15 01 00 00 00 00 02 FF 10 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 B9 02 + 15 00 00 00 00 00 02 FF D0 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 02 AF + 15 00 00 00 00 00 02 00 30 + 15 00 00 00 00 00 02 09 EE + 15 00 00 00 00 00 02 1C 99 + 15 01 00 00 00 00 02 1D 09 + 15 00 00 00 00 00 02 FF F0 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 3A 08 + 15 00 00 00 00 00 02 FF E0 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 4F 02 + 15 00 00 00 00 00 02 FF 10 + 15 00 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 35 00 + /* CABC SETTING CFG Start*/ + 15 00 00 00 00 00 02 FF 23 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 00 80 + 15 00 00 00 00 00 02 01 84 + 15 00 00 00 00 00 02 05 2D + 15 00 00 00 00 00 02 06 00 + 15 00 00 00 00 00 02 07 00 + 15 00 00 00 00 00 02 08 01 + 15 00 00 00 00 00 02 09 45 + 15 00 00 00 00 00 02 11 02 + 15 00 00 00 00 00 02 12 80 + 15 00 00 00 00 00 02 15 83 + 15 00 00 00 00 00 02 16 0C + 15 01 00 00 00 00 02 29 0A + 15 00 00 00 00 00 02 30 FF + 15 00 00 00 00 00 02 31 FE + 15 00 00 00 00 00 02 32 FD + 15 00 00 00 00 00 02 33 FB + 15 00 00 00 00 00 02 34 F8 + 15 00 00 00 00 00 02 35 F5 + 15 00 00 00 00 00 02 36 F3 + 15 00 00 00 00 00 02 37 F2 + 15 00 00 00 00 00 02 38 F2 + 15 00 00 00 00 00 02 39 F2 + 15 00 00 00 00 00 02 3A EF + 15 00 00 00 00 00 02 3B EC + 15 00 00 00 00 00 02 3D E9 + 15 00 00 00 00 00 02 3F E5 + 15 00 00 00 00 00 02 40 E5 + 15 01 00 00 00 00 02 41 E5 + 15 00 00 00 00 00 02 2A 13 + 15 00 00 00 00 00 02 45 FF + 15 00 00 00 00 00 02 46 F4 + 15 00 00 00 00 00 02 47 E7 + 15 00 00 00 00 00 02 48 DA + 15 00 00 00 00 00 02 49 CD + 15 00 00 00 00 00 02 4A C0 + 15 00 00 00 00 00 02 4B B3 + 15 00 00 00 00 00 02 4C B2 + 15 00 00 00 00 00 02 4D B2 + 15 00 00 00 00 00 02 4E B2 + 15 00 00 00 00 00 02 4F 99 + 15 00 00 00 00 00 02 50 80 + 15 00 00 00 00 00 02 51 68 + 15 00 00 00 00 00 02 52 66 + 15 00 00 00 00 00 02 53 66 + 15 01 00 00 00 00 02 54 66 + 15 00 00 00 00 00 02 2B 0E + 15 00 00 00 00 00 02 58 FF + 15 00 00 00 00 00 02 59 FB + 15 00 00 00 00 00 02 5A F7 + 15 00 00 00 00 00 02 5B F3 + 15 00 00 00 00 00 02 5C EF + 15 00 00 00 00 00 02 5D E3 + 15 00 00 00 00 00 02 5E DA + 15 00 00 00 00 00 02 5F D8 + 15 00 00 00 00 00 02 60 D8 + 15 00 00 00 00 00 02 61 D8 + 15 00 00 00 00 00 02 62 CB + 15 00 00 00 00 00 02 63 BF + 15 00 00 00 00 00 02 64 B3 + 15 00 00 00 00 00 02 65 B2 + 15 00 00 00 00 00 02 66 B2 + 15 00 00 00 00 00 02 67 B2 + 15 00 00 00 00 00 02 FF 10 + 15 00 00 00 00 00 02 FB 01 + 39 00 00 00 00 00 03 51 0F FF + 15 01 00 00 00 00 02 53 24 + /* CABC SETTING CFG END */ + 15 00 00 00 00 00 02 55 00 + 15 00 00 00 00 00 02 BB 13 + 39 01 00 00 00 00 06 3B 03 AC 1A 04 04 + /* 30HZ pen code Start*/ + 15 00 00 00 00 00 02 FF 2A + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 25 46 + 15 00 00 00 00 00 02 30 46 + 15 00 00 00 00 00 02 39 46 + 15 00 00 00 00 00 02 FF 26 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 01 B0 + 15 00 00 00 00 00 02 19 10 + 15 00 00 00 00 00 02 1A E0 + 15 00 00 00 00 00 02 1B 10 + 15 00 00 00 00 00 02 1C 00 + 15 00 00 00 00 00 02 2A 10 + 15 01 00 00 00 00 02 2B E0 + /* 30HZ pen code END*/ + /* ESD code*/ + 15 01 00 00 00 00 02 FF 26 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 01 B0 + 15 01 00 00 00 00 02 FF F0 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 84 08 + 15 00 00 00 00 00 02 85 0C + 15 01 00 00 00 00 02 FF 20 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 51 00 + 15 01 00 00 00 00 02 FF 25 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 91 1F + 15 00 00 00 00 00 02 92 0F + 15 00 00 00 00 00 02 93 01 + 15 00 00 00 00 00 02 94 18 + 15 00 00 00 00 00 02 95 03 + 15 00 00 00 00 00 02 96 01 + 15 01 00 00 00 00 02 FF 10 + 15 00 00 00 00 00 02 B0 01 + 15 01 00 00 00 00 02 FF 25 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 19 1F + 15 00 00 00 00 00 02 1B 1B + 15 01 00 00 00 00 02 FF 24 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 B8 28 + 15 01 00 00 00 00 02 FF 27 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 D0 31 + 15 00 00 00 00 00 02 DE 80 + 15 00 00 00 00 00 02 DF 02 + 15 00 00 00 00 00 02 D1 20 + 15 01 00 00 00 00 02 D4 08 + 15 00 00 00 00 00 02 FF 26 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 00 81 + 15 00 00 00 00 00 02 01 B0 + 15 01 00 00 00 00 02 FF 22 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 6F 01 + 15 00 00 00 00 00 02 70 11 + 15 00 00 00 00 00 02 73 01 + 15 00 00 00 00 00 02 74 4D + 15 00 00 00 00 00 02 A0 3F + 15 00 00 00 00 00 02 A9 50 + 15 00 00 00 00 00 02 AA 28 + 15 00 00 00 00 00 02 AB 28 + 15 00 00 00 00 00 02 AD 10 + 15 00 00 00 00 00 02 B8 00 + 15 00 00 00 00 00 02 B9 4B + 15 01 00 00 00 00 02 BA 96 + 15 00 00 00 00 00 02 BB 4B + 15 00 00 00 00 00 02 BE 07 + 15 00 00 00 00 00 02 BF 4B + 15 00 00 00 00 00 02 C0 07 + 15 00 00 00 00 00 02 C1 5C + 15 00 00 00 00 00 02 C2 00 + 15 00 00 00 00 00 02 C5 00 + 15 00 00 00 00 00 02 C6 3F + 15 00 00 00 00 00 02 C7 00 + 15 00 00 00 00 00 02 CA 08 + 15 00 00 00 00 00 02 CB 40 + 15 00 00 00 00 00 02 CE 00 + 15 01 00 00 00 00 02 CF 08 + 15 00 00 00 00 00 02 D0 40 + 15 00 00 00 00 00 02 D3 08 + 15 00 00 00 00 00 02 D4 40 + 15 00 00 00 00 00 02 FF 25 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 BC 01 + 15 00 00 00 00 00 02 BD 1C + 15 00 00 00 00 00 02 FF 2A + 15 00 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 9A 03 + 15 01 00 00 00 00 02 FF 10 + 05 01 00 00 46 00 02 11 00 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 46 00 02 10 00]; + qcom,mdss-dsi-displayoff-command = [05 01 00 00 20 00 02 28 00]; + qcom,mdss-dsi-displayon-command = [05 01 00 00 14 00 02 29 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-displayoff-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-displayon-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-sync-pen-120hz-command = [ + 15 00 00 00 00 00 02 FF 2A + 15 00 00 00 00 00 02 23 0D + 15 01 00 00 00 00 02 FF 10]; + qcom,mdss-dsi-sync-pen-60hz-command = [ + 15 00 00 00 00 00 02 FF 2A + 15 00 00 00 00 00 02 23 0C + 15 01 00 00 00 00 02 FF 10]; + qcom,mdss-dsi-sync-pen-120hz-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-sync-pen-60hz-command-state = "dsi_lp_mode"; + + /* max brightness 85% */ + qcom,mdss-dsi-dispparam-lcd-hbm-l1-on-command = [ + 15 01 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 0F FF]; + qcom,mdss-dsi-dispparam-lcd-hbm-l1-on-command-state = "dsi_lp_mode"; + /* max brightness 91% */ + qcom,mdss-dsi-dispparam-lcd-hbm-l2-on-command = [ + 15 01 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 0F FF]; + qcom,mdss-dsi-dispparam-lcd-hbm-l2-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-lcd-hbm-off-command = [ + 15 01 00 00 00 00 02 FF 10 + 39 01 00 00 00 00 03 51 0F FF]; + qcom,mdss-dsi-dispparam-lcd-hbm-off-command-state = "dsi_lp_mode"; + }; + }; + }; +}; + +&dsi_k82_42_02_0a_dual_cphy_video { + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <120>; + qcom,esd-err-irq-gpio = <&tlmm 37 0x2002>; /* trig-flags: falling-0x0002 rasing-0x0001*/ + mi,mdss-dsi-panel-xy-coordinate = <0x3 0x3>; + mi,mdss-dsi-panel-max-luminance = <0x3 0x4>; + qcom,mdss-dsi-display-timings { + timing@0{ + mi,mdss-dsi-read-lockdown-info-command = [ + 15 01 00 00 00 00 02 FF 22 + 06 01 00 00 00 00 01 01 + 06 01 00 00 00 00 01 02 + 06 01 00 00 00 00 01 03 + 06 01 00 00 00 00 01 04 + 06 01 00 00 00 00 01 05 + 06 01 00 00 00 00 01 06 + 06 01 00 00 00 00 01 07 + 06 01 00 00 00 00 01 08]; + mi,mdss-dsi-read-lockdown-info-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-cabcuion-command = [ + 15 01 00 00 00 00 02 55 01 + ]; + qcom,mdss-dsi-dispparam-cabcstillon-command = [ + 15 01 00 00 00 00 02 55 02 + ]; + qcom,mdss-dsi-dispparam-cabcmovieon-command = [ + 15 01 00 00 00 00 02 55 03 + ]; + qcom,mdss-dsi-dispparam-cabcoff-command = [ + 15 01 00 00 00 00 02 55 00 + ]; + qcom,mdss-dsi-dispparam-dimmingon-command = [ + /* CABC DIMMING ON */ + 15 01 00 00 00 00 02 53 2C + ]; + qcom,mdss-dsi-dispparam-dimmingoff-command = [ + 15 01 00 00 00 00 02 53 24 + ]; + + qcom,mdss-dsi-dispparam-cabcuion-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-cabcstillon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-cabcmovieon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-cabcoff-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingoff-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-esd-check-read-command = [ + /* esd detect */ + 15 01 00 00 00 00 02 FF 27 + 15 01 00 00 00 00 02 D1 28 + 15 01 00 00 00 00 02 FF 10 + 15 01 00 00 00 00 02 53 2C + ]; + qcom,mdss-dsi-esd-check-read-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-xy-coordinate-command = [ + 15 01 00 00 00 00 02 FF 10 + 06 01 00 00 00 00 01 A1 + ]; + qcom,mdss-dsi-dispparam-xy-coordinate-command-state = "dsi_lp_mode"; + + mi,mdss-dsi-max-luminance-write-command = [ + 15 01 00 00 00 00 02 FF 10]; + mi,mdss-dsi-max-luminance-write-command-state = "dsi_lp_mode"; + mi,mdss-dsi-max-luminance-read-command = [ + 06 01 00 00 00 00 01 A1]; + mi,mdss-dsi-max-luminance-read-command-state = "dsi_lp_mode"; + }; + }; +}; + diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-cmd.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-cmd.dtsi new file mode 100644 index 000000000000..2ac5ce46c238 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-cmd.dtsi @@ -0,0 +1,270 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&soc { + dsi_samsung_fhd_ea8076_cmd: qcom,mdss_dsi_samsung_fhd_ea8076_cmd { + qcom,mdss-dsi-panel-name = "samsung ea8076 fhd cmd dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "SAMSUNG FHD EA8076 CMD PANEL"; + qcom,mdss-dsi-panel-sleepwrmod = <0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,ulps-enabled; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-brightness-max-level = <2047>; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-dcs-type-ss; + qcom,mdss-dsi-reset-sequence = <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <68>; + qcom,mdss-pan-physical-height-dimension = <147>; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-tx-eot-append; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4300000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <120>; + qcom,disp-doze-backlight-threshold = <8>; + qcom,disp-fod-dim-lut = < + /* brightness, alpha */ + 0 0xFF + 4 0xEB + 8 0xEA + 12 0xE9 + 13 0xE8 + 20 0xE5 + 24 0xE3 + 30 0xE0 + 68 0xD0 + 133 0xC0 + 218 0xB0 + 328 0xA0 + 486 0x90 + 642 0x80 + 832 0x70 + 1043 0x60 + 1267 0x50 + 1500 0x40 + 1770 0x30 + 2000 0x24 + 2047 0x21 + >; + + /* IRQF_ONESHOT | IRQF_TRIGGER_FALLING */ + qcom,esd-err-irq-gpio = <&tlmm 27 0x2002>; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2340>; + qcom,mdss-dsi-h-front-porch = <64>; + qcom,mdss-dsi-h-back-porch = <64>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <64>; + qcom,mdss-dsi-v-front-porch = <64>; + qcom,mdss-dsi-v-pulse-width = <20>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-panel-clockrate = <1100000000>; + qcom,mdss-dsi-panel-jitter = <0x5 0x1>; + qcom,mdss-dsi-on-command = [ + /* delay 2ms for VCI1 power */ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 FF 10 + 39 00 00 00 00 00 02 B0 2F + 39 00 00 00 00 00 02 D1 01 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 01 00 03 FC A5 A5 + /* Sleep Out */ + 05 01 00 00 0A 00 02 11 00 + 39 00 00 00 00 00 03 F0 5A 5A + /* TE OUT(Vsync On) */ + 39 00 00 00 00 00 02 35 00 + /* DBV Smooth Transition */ + 39 00 00 00 00 00 03 B7 01 4B + /* Timing set */ + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 03 D9 88 2E + /* Edge Dimming */ + 39 00 00 00 00 00 02 B0 09 + 39 00 00 00 00 00 02 D8 00 + 39 01 00 00 00 00 03 F0 A5 A5 + /* Page Address Set */ + 39 01 00 00 00 00 05 2B 00 00 09 23 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 FC 5A 5A + /* ERR_FG Setting */ + 39 00 00 00 00 00 07 E1 00 00 02 02 42 02 + 39 00 00 00 00 00 07 E2 00 00 00 00 00 00 + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 E1 19 + /* OFC Setting 82.6Mhz*/ + 39 00 00 00 00 00 0C E9 11 55 A6 75 A3 B8 BB 2A 00 1A B8 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 03 FC A5 A5 + /* Brightness Control */ + 39 00 00 00 00 00 02 53 20 + 39 00 00 00 00 00 03 51 00 00 + 39 01 00 00 43 00 02 55 00 + /* Display On */ + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-doze-hbm-command = [ + /* AOD ON Sequence (Normal To AOD HBM) */ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 00 00 00 01 00 02 53 22 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-doze-lbm-command = [ + /* AOD ON Sequence (Normal To AOD LBM) */ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 00 00 00 00 00 02 53 23 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-nolp-command = [ + /* AOD OFF Sequence (AOD To Normal) */ + 05 01 00 00 22 00 02 28 00 + 39 01 00 00 00 00 02 53 20 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-doze-hbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-doze-lbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-nolp-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-acl-off-command = [39 01 00 00 00 00 02 55 00]; + qcom,mdss-dsi-dispparam-acl-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l1-command = [39 01 00 00 00 00 02 55 01];/* 50% */ + qcom,mdss-dsi-dispparam-acl-l1-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l2-command = [39 01 00 00 00 00 02 55 02];/* 40% */ + qcom,mdss-dsi-dispparam-acl-l2-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l3-command = [39 01 00 00 00 00 02 55 03];/* 30% */ + qcom,mdss-dsi-dispparam-acl-l3-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-hbm-off-command = [39 01 00 00 00 00 02 53 28]; + qcom,mdss-dsi-dispparam-hbm-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-on-command = [39 01 00 00 00 00 02 53 E8]; + qcom,mdss-dsi-dispparam-hbm-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-off-command = [ + 15 01 00 00 10 00 02 53 20]; + qcom,mdss-dsi-dispparam-hbm-fod-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-on-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 15 00 00 00 00 00 02 B0 03 + 15 00 00 00 00 00 02 B7 C9 + 39 00 00 00 00 00 03 F0 A5 A5 + 15 01 00 00 10 00 02 53 E0]; + qcom,mdss-dsi-dispparam-hbm-fod-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod2norm-command = [39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 B2 00 40 + 39 00 00 00 00 00 02 B0 04 + 39 00 00 00 00 00 02 B2 80 + 39 00 00 00 00 00 02 F7 03 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-hbm-fod2norm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingon-command = [39 01 00 00 01 00 02 53 28]; + qcom,mdss-dsi-dispparam-dimmingon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingoff-command = [39 01 00 00 01 00 02 53 20]; + qcom,mdss-dsi-dispparam-dimmingoff-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-srgb-on-command = [ + /* CRC Enable + sRGB mode */ + 39 01 00 00 00 00 02 81 90 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 BD 02 00 14 D1 00 04 07 AA 0C EC CB C8 0F DD D9 E4 05 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-srgb-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command = [ + /* CRC Enable + DCI-P3 mode */ + 39 01 00 00 00 00 02 81 91 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 CB 0B 01 0B EC 03 05 08 CF 14 FA FA E7 05 EE EE F2 00 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-off-command = [ + /* CRC Disable (Normal mode) */ + 39 01 00 00 00 00 02 81 00 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Bypass */ + 39 01 00 00 00 00 02 B1 01 + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-off-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-h-sync-pulse = <0>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-f1-cmd.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-f1-cmd.dtsi new file mode 100644 index 000000000000..894fb94ffdf7 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-f1-cmd.dtsi @@ -0,0 +1,267 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&soc { + dsi_samsung_fhd_ea8076_f1_cmd: qcom,mdss_dsi_samsung_fhd_ea8076_f1_cmd { + qcom,mdss-dsi-panel-name = "samsung ea8076 fhd cmd dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "SAMSUNG FHD EA8076 CMD PANEL"; + qcom,mdss-dsi-panel-sleepwrmod = <0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,ulps-enabled; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-brightness-max-level = <2047>; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-dcs-type-ss; + qcom,mdss-dsi-reset-sequence = <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <68>; + qcom,mdss-pan-physical-height-dimension = <147>; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-tx-eot-append; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4300000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <200>; + /* IRQF_ONESHOT | IRQF_TRIGGER_FALLING */ + qcom,esd-err-irq-gpio = <&tlmm 5 0x2002>; + + qcom,disp-doze-backlight-threshold = <8>; + qcom,disp-fod-off-dimming-delay = <85>; + qcom,disp-fod-dim-lut = < + /* brightness, alpha */ + 0 0xFF + 4 0xEB + 8 0xEA + 12 0xE9 + 13 0xE8 + 20 0xE5 + 24 0xE3 + 30 0xE0 + 68 0xD0 + 133 0xC0 + 218 0xB0 + 328 0xA0 + 486 0x90 + 642 0x80 + 832 0x70 + 1043 0x60 + 1267 0x50 + 1500 0x40 + 1770 0x30 + 2000 0x24 + 2047 0x21 + >; + + qcom,elvss_dimming_check_enable; + qcom,mdss-dsi-panel-elvss-dimming-read-length = <1>; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command = [39 01 00 00 00 00 02 B0 07]; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command = [06 01 00 01 00 00 01 B7]; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2340>; + qcom,mdss-dsi-h-front-porch = <64>; + qcom,mdss-dsi-h-back-porch = <64>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <64>; + qcom,mdss-dsi-v-front-porch = <64>; + qcom,mdss-dsi-v-pulse-width = <20>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-panel-clockrate = <1100000000>; + qcom,mdss-dsi-panel-jitter = <0x5 0x1>; + qcom,mdss-dsi-on-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 FF 10 + 39 00 00 00 00 00 02 B0 2F + 39 01 00 00 00 00 02 D1 01 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 03 FC A5 A5 + 05 01 00 00 0A 00 02 11 00 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 35 00 + 39 00 00 00 00 00 03 B7 01 4B + 39 00 00 00 00 00 02 B0 06 + 39 00 00 00 00 00 02 B7 10 + 39 01 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 05 2B 00 00 09 23 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 23 + 39 00 00 00 00 00 02 D1 33 + 39 00 00 00 00 00 0C E9 11 55 A6 75 A3 A6 37 BE 00 1A B8 + 39 00 00 00 00 00 0C D9 14 00 00 8F 6E 00 00 8F 2E 6E 34 + 39 00 00 00 00 00 6D C0 31 01 03 00 06 00 00 00 00 00 00 00 00 00 00 00 00 50 00 00 40 3D 00 5E 00 00 00 20 07 20 30 58 00 00 00 00 00 00 E0 0B 75 D8 00 00 00 00 FC 00 00 00 F6 97 0F 6D E6 CD 05 21 8B EC ED ED ED 0D 3F 60 00 67 FD 6D 51 BC DD DD 00 00 07 00 00 20 00 00 00 00 00 00 00 00 00 00 00 00 70 2F 00 00 03 2E 3C 20 E0 00 00 00 00 00 06 8C + 39 01 00 00 00 00 02 C0 31 + 39 00 00 00 00 00 07 E1 00 00 02 02 42 02 + 39 00 00 00 00 00 07 E2 00 00 00 00 00 00 + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 E1 19 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 03 FC A5 A5 + 39 00 00 00 00 00 02 53 20 + 39 00 00 00 00 00 03 51 00 00 + 39 01 00 00 43 00 02 55 00 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-doze-hbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 01 00 02 53 22 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-doze-lbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 00 00 02 53 23 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-nolp-command = [ + 05 01 00 00 22 00 02 28 00 + 39 01 00 00 00 00 02 53 20 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-doze-hbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-doze-lbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-nolp-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-acl-off-command = [39 01 00 00 00 00 02 55 00]; + qcom,mdss-dsi-dispparam-acl-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l1-command = [39 01 00 00 00 00 02 55 01];/* 50% */ + qcom,mdss-dsi-dispparam-acl-l1-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l2-command = [39 01 00 00 00 00 02 55 02];/* 40% */ + qcom,mdss-dsi-dispparam-acl-l2-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l3-command = [39 01 00 00 00 00 02 55 03];/* 30% */ + qcom,mdss-dsi-dispparam-acl-l3-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-hbm-off-command = [39 01 00 00 00 00 02 53 28]; + qcom,mdss-dsi-dispparam-hbm-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-on-command = [39 01 00 00 00 00 02 53 E8]; + qcom,mdss-dsi-dispparam-hbm-on-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-dimmingon-command = [39 01 00 00 01 00 02 53 28]; + qcom,mdss-dsi-dispparam-dimmingon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingoff-command = [39 01 00 00 01 00 02 53 20]; + qcom,mdss-dsi-dispparam-dimmingoff-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-srgb-on-command = [ + /* CRC Enable + sRGB mode */ + 39 01 00 00 00 00 02 81 90 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 BD 02 00 14 D1 00 04 07 AA 0C EC CB C8 0F DD D9 E4 05 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-srgb-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command = [ + /* CRC Enable + DCI-P3 mode */ + 39 01 00 00 00 00 02 81 91 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 CB 0B 01 0B EC 03 05 08 CF 14 FA FA E7 05 EE EE F2 00 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-off-command = [ + /* CRC Disable (Normal mode) */ + 39 01 00 00 00 00 02 81 00 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Bypass */ + 39 01 00 00 00 00 02 B1 01 + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 02 B7 91 + 39 01 00 00 01 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + + qcom,mdss-dsi-dispparam-hbm-fod-off-command = [ + 15 01 00 00 10 00 02 53 20]; + qcom,mdss-dsi-dispparam-hbm-fod-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-on-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 15 00 00 00 00 00 02 B0 03 + 15 00 00 00 00 00 02 B7 C9 + 39 00 00 00 00 00 03 F0 A5 A5 + 15 01 00 00 10 00 02 53 E0]; + qcom,mdss-dsi-dispparam-hbm-fod-on-command-state = "dsi_hs_mode"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-f1mp-cmd.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-f1mp-cmd.dtsi new file mode 100644 index 000000000000..297b26708ef9 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-f1mp-cmd.dtsi @@ -0,0 +1,267 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&soc { + dsi_samsung_fhd_ea8076_f1mp_cmd: qcom,mdss_dsi_samsung_fhd_ea8076_f1mp_cmd { + qcom,mdss-dsi-panel-name = "samsung ea8076 fhd cmd dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "SAMSUNG FHD EA8076 CMD PANEL"; + qcom,mdss-dsi-panel-sleepwrmod = <0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,ulps-enabled; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-brightness-max-level = <2047>; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-dcs-type-ss; + qcom,mdss-dsi-reset-sequence = <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <68>; + qcom,mdss-pan-physical-height-dimension = <147>; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-tx-eot-append; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4300000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <200>; + /* IRQF_ONESHOT | IRQF_TRIGGER_FALLING */ + qcom,esd-err-irq-gpio = <&tlmm 5 0x2002>; + + qcom,disp-doze-backlight-threshold = <8>; + qcom,disp-fod-off-dimming-delay = <85>; + qcom,disp-fod-dim-lut = < + /* brightness, alpha */ + 0 0xFF + 4 0xEB + 8 0xEA + 12 0xE9 + 13 0xE8 + 20 0xE5 + 24 0xE3 + 30 0xE0 + 68 0xD0 + 133 0xC0 + 218 0xB0 + 328 0xA0 + 486 0x90 + 642 0x80 + 832 0x70 + 1043 0x60 + 1267 0x50 + 1500 0x40 + 1770 0x30 + 2000 0x24 + 2047 0x21 + >; + + qcom,elvss_dimming_check_enable; + qcom,mdss-dsi-panel-elvss-dimming-read-length = <1>; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command = [39 01 00 00 00 00 02 B0 07]; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command = [06 01 00 01 00 00 01 B7]; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2340>; + qcom,mdss-dsi-h-front-porch = <64>; + qcom,mdss-dsi-h-back-porch = <64>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <64>; + qcom,mdss-dsi-v-front-porch = <64>; + qcom,mdss-dsi-v-pulse-width = <20>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-panel-clockrate = <1100000000>; + qcom,mdss-dsi-panel-jitter = <0x5 0x1>; + qcom,mdss-dsi-on-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 FF 10 + 39 00 00 00 00 00 02 B0 2F + 39 01 00 00 00 00 02 D1 01 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 03 FC A5 A5 + 05 01 00 00 0A 00 02 11 00 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 35 00 + 39 00 00 00 00 00 03 B7 01 4B + 39 00 00 00 00 00 02 B0 06 + 39 00 00 00 00 00 02 B7 10 + 39 01 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 05 2B 00 00 09 23 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 23 + 39 00 00 00 00 00 02 D1 33 + 39 00 00 00 00 00 0C E9 11 55 A6 75 A3 A6 37 BE 00 1A B8 + 39 00 00 00 00 00 0C D9 14 00 00 8F 6E 00 00 8F 2E 6E 34 + 39 00 00 00 00 00 6D C0 31 01 03 00 06 00 00 00 00 00 00 00 00 00 00 00 00 50 00 00 40 3D 00 5E 00 00 00 20 07 20 30 58 00 00 00 00 00 00 E0 0B 75 D8 00 00 00 00 FC 00 00 00 F6 97 0F 6D E6 CD 05 21 8B EC ED ED ED 0D 3F 60 00 67 FD 6D 51 BC DD DD 00 00 07 00 00 20 00 00 00 00 00 00 00 00 00 00 00 00 70 2F 00 00 03 2E 3C 20 E0 00 00 00 00 00 06 8C + 39 01 00 00 00 00 02 C0 31 + 39 00 00 00 00 00 07 E1 00 00 02 02 42 02 + 39 00 00 00 00 00 07 E2 00 00 00 00 00 00 + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 E1 19 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 03 FC A5 A5 + 39 00 00 00 00 00 02 53 20 + 39 00 00 00 00 00 03 51 00 00 + 39 01 00 00 43 00 02 55 00 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-doze-hbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 01 00 02 53 22 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-doze-lbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 00 00 02 53 23 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-nolp-command = [ + 05 01 00 00 22 00 02 28 00 + 39 01 00 00 00 00 02 53 20 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-doze-hbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-doze-lbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-nolp-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-acl-off-command = [39 01 00 00 00 00 02 55 00]; + qcom,mdss-dsi-dispparam-acl-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l1-command = [39 01 00 00 00 00 02 55 01];/* 50% */ + qcom,mdss-dsi-dispparam-acl-l1-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l2-command = [39 01 00 00 00 00 02 55 02];/* 40% */ + qcom,mdss-dsi-dispparam-acl-l2-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l3-command = [39 01 00 00 00 00 02 55 03];/* 30% */ + qcom,mdss-dsi-dispparam-acl-l3-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-hbm-off-command = [39 01 00 00 00 00 02 53 28]; + qcom,mdss-dsi-dispparam-hbm-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-on-command = [39 01 00 00 00 00 02 53 E8]; + qcom,mdss-dsi-dispparam-hbm-on-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-dimmingon-command = [39 01 00 00 01 00 02 53 28]; + qcom,mdss-dsi-dispparam-dimmingon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingoff-command = [39 01 00 00 01 00 02 53 20]; + qcom,mdss-dsi-dispparam-dimmingoff-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-srgb-on-command = [ + /* CRC Enable + sRGB mode */ + 39 01 00 00 00 00 02 81 90 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 BD 02 00 14 D1 00 04 07 AA 0C EC CB C8 0F DD D9 E4 05 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-srgb-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command = [ + /* CRC Enable + DCI-P3 mode */ + 39 01 00 00 00 00 02 81 91 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 CB 0B 01 0B EC 03 05 08 CF 14 FA FA E7 05 EE EE F2 00 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-off-command = [ + /* CRC Disable (Normal mode) */ + 39 01 00 00 00 00 02 81 00 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Bypass */ + 39 01 00 00 00 00 02 B1 01 + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 02 B7 91 + 39 01 00 00 01 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + + qcom,mdss-dsi-dispparam-hbm-fod-off-command = [ + 15 01 00 00 10 00 02 53 20]; + qcom,mdss-dsi-dispparam-hbm-fod-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-on-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 15 00 00 00 00 00 02 B0 03 + 15 00 00 00 00 00 02 B7 C9 + 39 00 00 00 00 00 03 F0 A5 A5 + 15 01 00 00 10 00 02 53 E0]; + qcom,mdss-dsi-dispparam-hbm-fod-on-command-state = "dsi_hs_mode"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-f1p2-2-cmd.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-f1p2-2-cmd.dtsi new file mode 100644 index 000000000000..b9a0a4d5877b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-f1p2-2-cmd.dtsi @@ -0,0 +1,267 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&soc { + dsi_samsung_fhd_ea8076_f1p2_2_cmd: qcom,mdss_dsi_samsung_fhd_ea8076_f1p2_2_cmd { + qcom,mdss-dsi-panel-name = "samsung ea8076 fhd cmd dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "SAMSUNG FHD EA8076 CMD PANEL"; + qcom,mdss-dsi-panel-sleepwrmod = <0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,ulps-enabled; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-brightness-max-level = <2047>; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-dcs-type-ss; + qcom,mdss-dsi-reset-sequence = <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <68>; + qcom,mdss-pan-physical-height-dimension = <147>; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-tx-eot-append; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4300000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <200>; + /* IRQF_ONESHOT | IRQF_TRIGGER_FALLING */ + qcom,esd-err-irq-gpio = <&tlmm 5 0x2002>; + + qcom,disp-doze-backlight-threshold = <8>; + qcom,disp-fod-off-dimming-delay = <85>; + qcom,disp-fod-dim-lut = < + /* brightness, alpha */ + 0 0xFF + 4 0xEB + 8 0xEA + 12 0xE9 + 13 0xE8 + 20 0xE5 + 24 0xE3 + 30 0xE0 + 68 0xD0 + 133 0xC0 + 218 0xB0 + 328 0xA0 + 486 0x90 + 642 0x80 + 832 0x70 + 1043 0x60 + 1267 0x50 + 1500 0x40 + 1770 0x30 + 2000 0x24 + 2047 0x21 + >; + + qcom,elvss_dimming_check_enable; + qcom,mdss-dsi-panel-elvss-dimming-read-length = <1>; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command = [39 01 00 00 00 00 02 B0 07]; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command = [06 01 00 01 00 00 01 B7]; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2340>; + qcom,mdss-dsi-h-front-porch = <64>; + qcom,mdss-dsi-h-back-porch = <64>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <64>; + qcom,mdss-dsi-v-front-porch = <64>; + qcom,mdss-dsi-v-pulse-width = <20>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-panel-clockrate = <1100000000>; + qcom,mdss-dsi-panel-jitter = <0x5 0x1>; + qcom,mdss-dsi-on-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 FF 10 + 39 00 00 00 00 00 02 B0 2F + 39 01 00 00 00 00 02 D1 01 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 03 FC A5 A5 + 05 01 00 00 0A 00 02 11 00 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 35 00 + 39 00 00 00 00 00 03 B7 01 4B + 39 00 00 00 00 00 02 B0 06 + 39 00 00 00 00 00 02 B7 10 + 39 01 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 05 2B 00 00 09 23 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 24 + 39 00 00 00 00 00 02 D1 33 + 39 00 00 00 00 00 0C E9 11 55 A6 75 A3 A6 37 BE 00 1A B8 + 39 00 00 00 00 00 0C D9 14 00 00 8F 6E 00 00 8F 2E 6E 34 + 39 00 00 00 00 00 6D C0 31 01 03 00 06 00 00 00 00 00 00 00 00 00 00 00 00 50 00 00 40 3D 00 5E 00 00 00 20 07 20 30 58 00 00 00 00 00 00 E0 0B 75 D8 00 00 00 00 FC 00 00 00 F6 97 0F 6D E6 CD 05 21 8B EC ED ED ED 0D 3F 60 00 67 FD 6D 51 BC DD DD 00 00 07 00 00 20 00 00 00 00 00 00 00 00 00 00 00 00 70 2F 00 00 03 2E 3C 20 E0 00 00 00 00 00 06 8C + 39 01 00 00 00 00 02 C0 31 + 39 00 00 00 00 00 07 E1 00 00 02 02 42 02 + 39 00 00 00 00 00 07 E2 00 00 00 00 00 00 + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 E1 19 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 03 FC A5 A5 + 39 00 00 00 00 00 02 53 20 + 39 00 00 00 00 00 03 51 00 00 + 39 01 00 00 43 00 02 55 00 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-doze-hbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 01 00 02 53 22 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-doze-lbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 00 00 02 53 23 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-nolp-command = [ + 05 01 00 00 22 00 02 28 00 + 39 01 00 00 00 00 02 53 20 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-doze-hbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-doze-lbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-nolp-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-acl-off-command = [39 01 00 00 00 00 02 55 00]; + qcom,mdss-dsi-dispparam-acl-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l1-command = [39 01 00 00 00 00 02 55 01];/* 50% */ + qcom,mdss-dsi-dispparam-acl-l1-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l2-command = [39 01 00 00 00 00 02 55 02];/* 40% */ + qcom,mdss-dsi-dispparam-acl-l2-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l3-command = [39 01 00 00 00 00 02 55 03];/* 30% */ + qcom,mdss-dsi-dispparam-acl-l3-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-hbm-off-command = [39 01 00 00 00 00 02 53 28]; + qcom,mdss-dsi-dispparam-hbm-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-on-command = [39 01 00 00 00 00 02 53 E8]; + qcom,mdss-dsi-dispparam-hbm-on-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-dimmingon-command = [39 01 00 00 01 00 02 53 28]; + qcom,mdss-dsi-dispparam-dimmingon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingoff-command = [39 01 00 00 01 00 02 53 20]; + qcom,mdss-dsi-dispparam-dimmingoff-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-srgb-on-command = [ + /* CRC Enable + sRGB mode */ + 39 01 00 00 00 00 02 81 90 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 BD 02 00 14 D1 00 04 07 AA 0C EC CB C8 0F DD D9 E4 05 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-srgb-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command = [ + /* CRC Enable + DCI-P3 mode */ + 39 01 00 00 00 00 02 81 91 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 CB 0B 01 0B EC 03 05 08 CF 14 FA FA E7 05 EE EE F2 00 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-off-command = [ + /* CRC Disable (Normal mode) */ + 39 01 00 00 00 00 02 81 00 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Bypass */ + 39 01 00 00 00 00 02 B1 01 + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 02 B7 91 + 39 01 00 00 01 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + + qcom,mdss-dsi-dispparam-hbm-fod-off-command = [ + 15 01 00 00 10 00 02 53 20]; + qcom,mdss-dsi-dispparam-hbm-fod-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-on-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 15 00 00 00 00 00 02 B0 03 + 15 00 00 00 00 00 02 B7 C9 + 39 00 00 00 00 00 03 F0 A5 A5 + 15 01 00 00 10 00 02 53 E0]; + qcom,mdss-dsi-dispparam-hbm-fod-on-command-state = "dsi_hs_mode"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-f1p2-cmd.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-f1p2-cmd.dtsi new file mode 100644 index 000000000000..e607bdc1e905 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-f1p2-cmd.dtsi @@ -0,0 +1,267 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&soc { + dsi_samsung_fhd_ea8076_f1p2_cmd: qcom,mdss_dsi_samsung_fhd_ea8076_f1p2_cmd { + qcom,mdss-dsi-panel-name = "samsung ea8076 fhd cmd dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "SAMSUNG FHD EA8076 CMD PANEL"; + qcom,mdss-dsi-panel-sleepwrmod = <0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,ulps-enabled; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-brightness-max-level = <2047>; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-dcs-type-ss; + qcom,mdss-dsi-reset-sequence = <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <68>; + qcom,mdss-pan-physical-height-dimension = <147>; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-tx-eot-append; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4300000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <200>; + /* IRQF_ONESHOT | IRQF_TRIGGER_FALLING */ + qcom,esd-err-irq-gpio = <&tlmm 5 0x2002>; + + qcom,disp-doze-backlight-threshold = <8>; + qcom,disp-fod-off-dimming-delay = <85>; + qcom,disp-fod-dim-lut = < + /* brightness, alpha */ + 0 0xFF + 4 0xEB + 8 0xEA + 12 0xE9 + 13 0xE8 + 20 0xE5 + 24 0xE3 + 30 0xE0 + 68 0xD0 + 133 0xC0 + 218 0xB0 + 328 0xA0 + 486 0x90 + 642 0x80 + 832 0x70 + 1043 0x60 + 1267 0x50 + 1500 0x40 + 1770 0x30 + 2000 0x24 + 2047 0x21 + >; + + qcom,elvss_dimming_check_enable; + qcom,mdss-dsi-panel-elvss-dimming-read-length = <1>; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command = [39 01 00 00 00 00 02 B0 07]; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command = [06 01 00 01 00 00 01 B7]; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2340>; + qcom,mdss-dsi-h-front-porch = <64>; + qcom,mdss-dsi-h-back-porch = <64>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <64>; + qcom,mdss-dsi-v-front-porch = <64>; + qcom,mdss-dsi-v-pulse-width = <20>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-panel-clockrate = <1100000000>; + qcom,mdss-dsi-panel-jitter = <0x5 0x1>; + qcom,mdss-dsi-on-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 FF 10 + 39 00 00 00 00 00 02 B0 2F + 39 01 00 00 00 00 02 D1 01 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 03 FC A5 A5 + 05 01 00 00 0A 00 02 11 00 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 35 00 + 39 00 00 00 00 00 03 B7 01 4B + 39 00 00 00 00 00 02 B0 06 + 39 00 00 00 00 00 02 B7 10 + 39 01 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 05 2B 00 00 09 23 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 23 + 39 00 00 00 00 00 02 D1 33 + 39 00 00 00 00 00 0C E9 11 55 A6 75 A3 A6 37 BE 00 1A B8 + 39 00 00 00 00 00 0C D9 14 00 00 8F 6E 00 00 8F 2E 6E 34 + 39 00 00 00 00 00 6D C0 31 01 03 00 06 00 00 00 00 00 00 00 00 00 00 00 00 50 00 00 40 3D 00 5E 00 00 00 20 07 20 30 58 00 00 00 00 00 00 E0 0B 75 D8 00 00 00 00 FC 00 00 00 F6 97 0F 6D E6 CD 05 21 8B EC ED ED ED 0D 3F 60 00 67 FD 6D 51 BC DD DD 00 00 07 00 00 20 00 00 00 00 00 00 00 00 00 00 00 00 70 2F 00 00 03 2E 3C 20 E0 00 00 00 00 00 06 8C + 39 01 00 00 00 00 02 C0 31 + 39 00 00 00 00 00 07 E1 00 00 02 02 42 02 + 39 00 00 00 00 00 07 E2 00 00 00 00 00 00 + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 E1 19 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 03 FC A5 A5 + 39 00 00 00 00 00 02 53 20 + 39 00 00 00 00 00 03 51 00 00 + 39 01 00 00 43 00 02 55 00 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-doze-hbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 01 00 02 53 22 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-doze-lbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 00 00 02 53 23 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-nolp-command = [ + 05 01 00 00 22 00 02 28 00 + 39 01 00 00 00 00 02 53 20 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-doze-hbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-doze-lbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-nolp-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-acl-off-command = [39 01 00 00 00 00 02 55 00]; + qcom,mdss-dsi-dispparam-acl-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l1-command = [39 01 00 00 00 00 02 55 01];/* 50% */ + qcom,mdss-dsi-dispparam-acl-l1-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l2-command = [39 01 00 00 00 00 02 55 02];/* 40% */ + qcom,mdss-dsi-dispparam-acl-l2-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l3-command = [39 01 00 00 00 00 02 55 03];/* 30% */ + qcom,mdss-dsi-dispparam-acl-l3-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-hbm-off-command = [39 01 00 00 00 00 02 53 28]; + qcom,mdss-dsi-dispparam-hbm-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-on-command = [39 01 00 00 00 00 02 53 E8]; + qcom,mdss-dsi-dispparam-hbm-on-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-dimmingon-command = [39 01 00 00 01 00 02 53 28]; + qcom,mdss-dsi-dispparam-dimmingon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingoff-command = [39 01 00 00 01 00 02 53 20]; + qcom,mdss-dsi-dispparam-dimmingoff-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-srgb-on-command = [ + /* CRC Enable + sRGB mode */ + 39 01 00 00 00 00 02 81 90 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 BD 02 00 14 D1 00 04 07 AA 0C EC CB C8 0F DD D9 E4 05 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-srgb-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command = [ + /* CRC Enable + DCI-P3 mode */ + 39 01 00 00 00 00 02 81 91 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 CB 0B 01 0B EC 03 05 08 CF 14 FA FA E7 05 EE EE F2 00 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-off-command = [ + /* CRC Disable (Normal mode) */ + 39 01 00 00 00 00 02 81 00 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Bypass */ + 39 01 00 00 00 00 02 B1 01 + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 02 B7 91 + 39 01 00 00 01 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + + qcom,mdss-dsi-dispparam-hbm-fod-off-command = [ + 15 01 00 00 10 00 02 53 20]; + qcom,mdss-dsi-dispparam-hbm-fod-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-on-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 15 00 00 00 00 00 02 B0 03 + 15 00 00 00 00 00 02 B7 C9 + 39 00 00 00 00 00 03 F0 A5 A5 + 15 01 00 00 10 00 02 53 E0]; + qcom,mdss-dsi-dispparam-hbm-fod-on-command-state = "dsi_hs_mode"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-f1s-cmd.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-f1s-cmd.dtsi new file mode 100644 index 000000000000..64f128a19cd0 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-samsung-fhd-ea8076-f1s-cmd.dtsi @@ -0,0 +1,290 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&soc { + dsi_samsung_fhd_ea8076_f1s_cmd: qcom,mdss_dsi_samsung_fhd_ea8076_f1s_cmd { + qcom,mdss-dsi-panel-name = "samsung ea8076 fhd cmd dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "SAMSUNG FHD EA8076 CMD PANEL"; + qcom,mdss-dsi-panel-sleepwrmod = <0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,ulps-enabled; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-brightness-max-level = <2047>; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-dcs-type-ss; + qcom,mdss-dsi-reset-sequence = <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <68>; + qcom,mdss-pan-physical-height-dimension = <147>; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-tx-eot-append; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4300000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <200>; + qcom,mdss-dsi-panel-dc-threshold = <610>; + /* IRQF_ONESHOT | IRQF_TRIGGER_FALLING */ + qcom,esd-err-irq-gpio = <&tlmm 5 0x2002>; + + qcom,disp-doze-backlight-threshold = <8>; + qcom,disp-fod-dim-lut = < + /* brightness, alpha */ + 0 0xFF + 4 0xEB + 8 0xEA + 12 0xE9 + 13 0xE8 + 20 0xE5 + 24 0xE3 + 30 0xE0 + 68 0xD0 + 133 0xC0 + 218 0xB0 + 328 0xA0 + 486 0x90 + 642 0x80 + 832 0x70 + 1043 0x60 + 1267 0x50 + 1500 0x40 + 1770 0x30 + 2000 0x24 + 2047 0x21 + >; + + qcom,elvss_dimming_check_enable; + qcom,mdss-dsi-panel-elvss-dimming-read-length = <1>; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command = [39 01 00 00 00 00 02 B0 07]; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command = [06 01 00 01 00 00 01 B7]; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command-state = "dsi_hs_mode"; + + /* WHITE POINT COMMAND */ + qcom,mdss-dsi-panel-white-point-read-length = <8>; + qcom,mdss-dsi-dispparam-whitepoint-read-command = [06 01 00 01 00 00 01 EF]; + qcom,mdss-dsi-dispparam-whitepoint-read-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2340>; + qcom,mdss-dsi-h-front-porch = <64>; + qcom,mdss-dsi-h-back-porch = <64>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <64>; + qcom,mdss-dsi-v-front-porch = <88>; + qcom,mdss-dsi-v-pulse-width = <20>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-panel-clockrate = <1110000000>; + qcom,mdss-dsi-panel-jitter = <0x5 0x1>; + qcom,mdss-dsi-on-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 FF 10 + 39 00 00 00 00 00 02 B0 2F + 39 01 00 00 00 00 02 D1 01 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 03 FC A5 A5 + 05 01 00 00 0A 00 02 11 00 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 35 00 + 39 00 00 00 00 00 03 B7 01 4B + 39 00 00 00 00 00 02 B0 06 + 39 00 00 00 00 00 02 B7 10 + 39 01 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 05 2B 00 00 09 23 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 FC 5A 5A + + /* OSC frequency to 91.8M/89.8M */ + 39 00 00 00 00 00 02 B0 23 + 39 00 00 00 00 00 02 D1 2C + /*39 00 00 00 00 00 0C E9 11 55 A6 75 A3 A6 37 BE 00 1A B8*/ + 39 00 00 00 00 00 0C E9 11 55 A6 75 A3 A9 EB 71 00 1A B8 + 39 00 00 00 00 00 0C D9 14 00 00 8F 6E 00 00 8F 2E 6E 34 + 39 00 00 00 00 00 6D C0 31 01 03 00 06 00 00 00 00 00 00 00 00 00 00 00 00 50 00 00 40 3D 00 5E 00 00 00 20 07 20 30 58 00 00 00 00 00 00 E0 0B 75 D8 00 00 00 00 FC 00 00 00 F6 97 0F 6D E6 CD 05 21 8B EC ED ED ED 0D 3F 60 00 67 FD 6D 51 BC DD DD 00 00 07 00 00 20 00 00 00 00 00 00 00 00 00 00 00 00 70 2F 00 00 03 2E 3C 20 E0 00 00 00 00 00 06 8C + 39 01 00 00 00 00 02 C0 31 + /* ESD config */ + 39 00 00 00 00 00 07 E1 00 00 02 02 42 02 + 39 00 00 00 00 00 07 E2 00 00 00 00 00 00 + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 E1 19 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 03 FC A5 A5 + 39 00 00 00 00 00 02 53 20 + 39 00 00 00 00 00 03 51 00 00 + 39 01 00 00 43 00 02 55 00 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-doze-hbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 01 00 02 53 22 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-doze-lbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 00 00 02 53 23 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-nolp-command = [ + 05 01 00 00 22 00 02 28 00 + 39 01 00 00 00 00 02 53 20 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-doze-hbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-doze-lbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-nolp-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-acl-off-command = [39 01 00 00 00 00 02 55 00]; + qcom,mdss-dsi-dispparam-acl-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l1-command = [39 01 00 00 00 00 02 55 01];/* 50% */ + qcom,mdss-dsi-dispparam-acl-l1-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l2-command = [39 01 00 00 00 00 02 55 02];/* 40% */ + qcom,mdss-dsi-dispparam-acl-l2-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l3-command = [39 01 00 00 00 00 02 55 03];/* 30% */ + qcom,mdss-dsi-dispparam-acl-l3-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-hbm-off-command = [39 01 00 00 00 00 02 53 28]; + qcom,mdss-dsi-dispparam-hbm-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-on-command = [39 01 00 00 00 00 02 53 E8]; + qcom,mdss-dsi-dispparam-hbm-on-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-dimmingon-command = [39 01 00 00 01 00 02 53 28]; + qcom,mdss-dsi-dispparam-dimmingon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingoff-command = [39 01 00 00 01 00 02 53 20]; + qcom,mdss-dsi-dispparam-dimmingoff-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-srgb-on-command = [ + /* CRC Enable + sRGB mode */ + 39 01 00 00 00 00 02 81 90 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 BD 02 00 14 D1 00 04 07 AA 0C EC CB C8 0F DD D9 E4 05 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-srgb-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command = [ + /* CRC Enable + DCI-P3 mode */ + 39 01 00 00 00 00 02 81 91 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 CB 0B 01 0B EC 03 05 08 CF 14 FA FA E7 05 EE EE F2 00 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-off-command = [ + /* CRC Disable (Normal mode) */ + 39 01 00 00 00 00 02 81 00 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Bypass */ + 39 01 00 00 00 00 02 B1 01 + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 02 B7 91 + 39 01 00 00 01 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-flat-on-command = [ + 39 01 00 00 00 00 03 F0 5A 5A + 39 01 00 00 00 00 1D BE 82 29 00 00 00 30 30 30 40 40 40 4B 4B 4B 50 50 50 5C 4D 89 9B 73 00 33 69 12 7A 70 + 39 01 00 00 00 00 02 F7 01 + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-flat-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-flat-off-command = [ + 39 01 00 00 00 00 03 F0 5A 5A + 39 01 00 00 00 00 1D BE 82 09 00 00 00 30 30 30 40 40 40 4B 4B 4B 50 50 50 5C 4D 89 CB B8 00 33 69 12 7A 70 + 39 01 00 00 00 00 02 F7 01 + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-flat-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + + qcom,mdss-dsi-dispparam-hbm-fod-off-command = [ + 15 01 00 00 10 00 02 53 20]; + qcom,mdss-dsi-dispparam-hbm-fod-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-on-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 15 00 00 00 00 00 02 B0 03 + 15 00 00 00 00 00 02 B7 C9 + 39 00 00 00 00 00 03 F0 A5 A5 + 15 01 00 00 10 00 02 53 E0]; + qcom,mdss-dsi-dispparam-hbm-fod-on-command-state = "dsi_hs_mode"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-ss-fhd-ea8076-cmd.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-ss-fhd-ea8076-cmd.dtsi new file mode 100644 index 000000000000..056e7e3c5d21 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-ss-fhd-ea8076-cmd.dtsi @@ -0,0 +1,291 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&soc { + dsi_ss_fhd_ea8076_cmd: qcom,mdss_dsi_ss_fhd_ea8076_cmd { + qcom,mdss-dsi-panel-name = "samsung ea8076 fhd cmd dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "SAMSUNG FHD EA8076 CMD PANEL"; + qcom,mdss-dsi-panel-sleepwrmod = <0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,ulps-enabled; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-brightness-max-level = <2047>; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-dcs-type-ss; + qcom,mdss-dsi-reset-sequence = <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <68>; + qcom,mdss-pan-physical-height-dimension = <147>; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-tx-eot-append; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4300000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <120>; + /* IRQF_ONESHOT | IRQF_TRIGGER_FALLING */ + /* trig-flags: falling-0x0002 rasing-0x0001 */ + qcom,esd-err-irq-gpio = <&tlmm 5 0x2002>; + + qcom,disp-doze-backlight-threshold = <8>; + qcom,disp-fod-off-dimming-delay = <85>; + qcom,disp-fod-dim-lut = < + /* brightness, alpha */ + 1 239 + 9 233 + 21 226 + 42 216 + 63 208 + 83 202 + 104 197 + 125 191 + 145 187 + 166 184 + 187 180 + 207 175 + 228 173 + 267 166 + 356 153 + 445 143 + 534 132 + 623 126 + 712 117 + 801 110 + 890 102 + 979 95 + 1068 89 + 1157 83 + 1246 77 + 1335 72 + 1424 66 + 1513 61 + 1602 55 + 1691 50 + 1780 45 + 1869 41 + 1958 35 + 2047 31 + >; + qcom,disp-dc-dim-lut = < + /* brightness, alpha */ + 1 205 + 23 191 + 45 164 + 67 145 + 89 130 + 111 122 + 133 109 + 155 97 + 177 85 + 199 76 + 221 67 + 243 60 + 265 51 + 287 42 + 309 34 + 331 27 + 353 22 + 375 16 + 397 7 + 420 0 + >; + + qcom,elvss_dimming_check_enable; + qcom,mdss-dsi-panel-elvss-dimming-read-length = <1>; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command = [39 01 00 00 00 00 02 B0 07]; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command = [06 01 00 01 00 00 01 B7]; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2340>; + qcom,mdss-dsi-h-front-porch = <64>; + qcom,mdss-dsi-h-back-porch = <64>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <64>; + qcom,mdss-dsi-v-front-porch = <64>; + qcom,mdss-dsi-v-pulse-width = <20>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-panel-clockrate = <1100000000>; + qcom,mdss-dsi-panel-jitter = <0x5 0x1>; + qcom,mdss-dsi-on-command = [ + 05 01 00 00 0A 00 02 11 00 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 35 00 + 39 00 00 00 00 00 03 B7 01 4B + 39 01 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 05 2B 00 00 09 23 + 39 00 00 00 00 00 03 F0 5A 5A /* esd */ + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 23 //osc + 39 00 00 00 00 00 02 D1 0F + 39 00 00 00 00 00 0C E9 11 55 A6 75 A3 B9 A1 4A 00 1A B8 + 39 00 00 00 00 00 07 E1 00 00 02 02 42 02 + 39 00 00 00 00 00 07 E2 00 00 00 00 00 00 + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 E1 19 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 03 FC A5 A5 + 39 00 00 00 00 00 02 53 20 + 39 00 00 00 00 00 03 51 00 00 + 39 01 00 00 43 00 02 55 00 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-doze-hbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 01 00 02 53 22 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-doze-lbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 00 00 02 53 23 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-nolp-command = [ + 05 01 00 00 10 00 02 28 00 + 39 01 00 00 00 00 02 53 20 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-doze-hbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-doze-lbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-nolp-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-acl-off-command = [39 01 00 00 00 00 02 55 00]; + qcom,mdss-dsi-dispparam-acl-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l1-command = [39 01 00 00 00 00 02 55 01];/* 50% */ + qcom,mdss-dsi-dispparam-acl-l1-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l2-command = [39 01 00 00 00 00 02 55 02];/* 40% */ + qcom,mdss-dsi-dispparam-acl-l2-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l3-command = [39 01 00 00 00 00 02 55 03];/* 30% */ + qcom,mdss-dsi-dispparam-acl-l3-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-hbm-off-command = [39 01 00 00 00 00 02 53 28]; + qcom,mdss-dsi-dispparam-hbm-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-on-command = [39 01 00 00 00 00 02 53 E8]; + qcom,mdss-dsi-dispparam-hbm-on-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-dimmingon-command = [39 01 00 00 01 00 02 53 28]; + qcom,mdss-dsi-dispparam-dimmingon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingoff-command = [39 01 00 00 01 00 02 53 20]; + qcom,mdss-dsi-dispparam-dimmingoff-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-srgb-on-command = [ + /* CRC Enable + sRGB mode */ + 39 01 00 00 00 00 02 81 90 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 BD 02 00 14 D1 00 04 07 AA 0C EC CB C8 0F DD D9 E4 05 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-srgb-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command = [ + /* CRC Enable + DCI-P3 mode */ + 39 01 00 00 00 00 02 81 91 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 D2 0A 05 1A E6 00 04 07 F5 0C DC DB E8 0F DD EE E9 05 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-off-command = [ + /* CRC Disable (Normal mode) */ + 39 01 00 00 00 00 02 81 00 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Bypass */ + 39 01 00 00 00 00 02 B1 01 + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 02 B7 91 + 39 01 00 00 01 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + + qcom,mdss-dsi-dispparam-hbm-fod-off-command = [ + 15 01 00 00 10 00 02 53 20]; + qcom,mdss-dsi-dispparam-hbm-fod-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-on-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 15 00 00 00 00 00 02 B0 03 + 15 00 00 00 00 00 02 B7 C9 + 39 00 00 00 00 00 03 F0 A5 A5 + 15 01 00 00 10 00 02 53 E0]; + qcom,mdss-dsi-dispparam-hbm-fod-on-command-state = "dsi_hs_mode"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-ss-fhd-ea8076-global-cmd.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-ss-fhd-ea8076-global-cmd.dtsi new file mode 100644 index 000000000000..bcb98bbad92f --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-ss-fhd-ea8076-global-cmd.dtsi @@ -0,0 +1,291 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&soc { + dsi_ss_fhd_ea8076_global_cmd: qcom,mdss_dsi_ss_fhd_ea8076_global_cmd { + qcom,mdss-dsi-panel-name = "samsung ea8076 fhd cmd dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "SAMSUNG FHD EA8076 CMD PANEL"; + qcom,mdss-dsi-panel-sleepwrmod = <0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,ulps-enabled; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-brightness-max-level = <2047>; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-dcs-type-ss; + qcom,mdss-dsi-reset-sequence = <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <68>; + qcom,mdss-pan-physical-height-dimension = <147>; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-tx-eot-append; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4300000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <120>; + /* IRQF_ONESHOT | IRQF_TRIGGER_FALLING */ + /* trig-flags: falling-0x0002 rasing-0x0001 */ + qcom,esd-err-irq-gpio = <&tlmm 5 0x2002>; + + qcom,disp-doze-backlight-threshold = <8>; + qcom,disp-fod-off-dimming-delay = <85>; + qcom,disp-fod-dim-lut = < + /* brightness, alpha */ + 1 239 + 9 233 + 21 226 + 42 216 + 63 208 + 83 202 + 104 197 + 125 191 + 145 187 + 166 184 + 187 180 + 207 175 + 228 173 + 267 166 + 356 153 + 445 143 + 534 132 + 623 126 + 712 117 + 801 110 + 890 102 + 979 95 + 1068 89 + 1157 83 + 1246 77 + 1335 72 + 1424 66 + 1513 61 + 1602 55 + 1691 50 + 1780 45 + 1869 41 + 1958 35 + 2047 31 + >; + qcom,disp-dc-dim-lut = < + /* brightness, alpha */ + 1 205 + 23 191 + 45 164 + 67 145 + 89 130 + 111 122 + 133 109 + 155 97 + 177 85 + 199 76 + 221 67 + 243 60 + 265 51 + 287 42 + 309 34 + 331 27 + 353 22 + 375 16 + 397 7 + 420 0 + >; + + qcom,elvss_dimming_check_enable; + qcom,mdss-dsi-panel-elvss-dimming-read-length = <1>; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command = [39 01 00 00 00 00 02 B0 07]; + qcom,mdss-dsi-dispparam-elvss-dimming-offset-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command = [06 01 00 01 00 00 01 B7]; + qcom,mdss-dsi-dispparam-elvss-dimming-read-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2340>; + qcom,mdss-dsi-h-front-porch = <64>; + qcom,mdss-dsi-h-back-porch = <64>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <64>; + qcom,mdss-dsi-v-front-porch = <64>; + qcom,mdss-dsi-v-pulse-width = <27>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-panel-clockrate = <1103000000>; + qcom,mdss-dsi-panel-jitter = <0x5 0x1>; + qcom,mdss-dsi-on-command = [ + 05 01 00 00 0A 00 02 11 00 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 35 00 + 39 00 00 00 00 00 03 B7 01 4B + 39 01 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 05 2B 00 00 09 23 + 39 00 00 00 00 00 03 F0 5A 5A /* esd */ + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 23 //osc + 39 00 00 00 00 00 02 D1 11 + 39 00 00 00 00 00 0C E9 11 55 A6 75 A3 B9 A1 4A 00 1A B8 + 39 00 00 00 00 00 07 E1 00 00 02 02 42 02 + 39 00 00 00 00 00 07 E2 00 00 00 00 00 00 + 39 00 00 00 00 00 02 B0 0C + 39 00 00 00 00 00 02 E1 19 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 03 FC A5 A5 + 39 00 00 00 00 00 02 53 20 + 39 00 00 00 00 00 03 51 00 00 + 39 01 00 00 43 00 02 55 00 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-doze-hbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 01 00 02 53 22 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-doze-lbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 D4 8B + 39 00 00 00 00 00 02 B0 A5 + 39 00 00 00 00 00 02 C7 00 + 39 00 00 00 00 00 02 B0 69 + 39 00 00 00 00 00 03 B9 08 8F + 39 01 00 00 00 00 02 53 23 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-nolp-command = [ + 05 01 00 00 10 00 02 28 00 + 39 01 00 00 00 00 02 53 20 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-doze-hbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-doze-lbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-nolp-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-acl-off-command = [39 01 00 00 00 00 02 55 00]; + qcom,mdss-dsi-dispparam-acl-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l1-command = [39 01 00 00 00 00 02 55 01];/* 50% */ + qcom,mdss-dsi-dispparam-acl-l1-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l2-command = [39 01 00 00 00 00 02 55 02];/* 40% */ + qcom,mdss-dsi-dispparam-acl-l2-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l3-command = [39 01 00 00 00 00 02 55 03];/* 30% */ + qcom,mdss-dsi-dispparam-acl-l3-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-hbm-off-command = [39 01 00 00 00 00 02 53 28]; + qcom,mdss-dsi-dispparam-hbm-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-on-command = [39 01 00 00 00 00 02 53 E8]; + qcom,mdss-dsi-dispparam-hbm-on-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-dimmingon-command = [39 01 00 00 01 00 02 53 28]; + qcom,mdss-dsi-dispparam-dimmingon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingoff-command = [39 01 00 00 01 00 02 53 20]; + qcom,mdss-dsi-dispparam-dimmingoff-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-srgb-on-command = [ + /* CRC Enable + sRGB mode */ + 39 01 00 00 00 00 02 81 90 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 BD 02 00 14 D1 00 04 07 AA 0C EC CB C8 0F DD D9 E4 05 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-srgb-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command = [ + /* CRC Enable + DCI-P3 mode */ + 39 01 00 00 00 00 02 81 91 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Enable */ + 39 01 00 00 00 00 02 B1 00 + /* Set Offset P2*/ + 39 01 00 00 00 00 02 B0 01 + /* CRC LUT(sRGB mode) */ + 39 01 00 00 00 00 16 B1 AE 0C 05 3F C6 14 05 07 AA 4A DD C8 C3 14 C0 E8 DC 19 FF F4 D9 + /* Set Offset P23*/ + 39 01 00 00 00 00 02 B0 16 + /* CRC LUT(DCI-P3 mode) */ + 39 01 00 00 00 00 16 B1 D2 0A 05 1A E6 00 04 07 F5 0C DC DB E8 0F DD EE E9 05 FF FF FF + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-off-command = [ + /* CRC Disable (Normal mode) */ + 39 01 00 00 00 00 02 81 00 + 39 01 00 00 00 00 03 F0 5A 5A + /* CRC Bypass */ + 39 01 00 00 00 00 02 B1 01 + 39 01 00 00 00 00 03 F0 A5 A5 + ]; + qcom,mdss-dsi-dispparam-crc-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 B0 07 + 39 00 00 00 00 00 02 B7 91 + 39 01 00 00 01 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-elvss-dimming-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + + qcom,mdss-dsi-dispparam-hbm-fod-off-command = [ + 15 01 00 00 10 00 02 53 20]; + qcom,mdss-dsi-dispparam-hbm-fod-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-on-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 15 00 00 00 00 00 02 B0 03 + 15 00 00 00 00 00 02 B7 C9 + 39 00 00 00 00 00 03 F0 A5 A5 + 15 01 00 00 10 00 02 53 E0]; + qcom,mdss-dsi-dispparam-hbm-fod-on-command-state = "dsi_hs_mode"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-ss-notch-fhd-ea8074-cmd.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-ss-notch-fhd-ea8074-cmd.dtsi new file mode 100644 index 000000000000..e0041d04d281 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-ss-notch-fhd-ea8074-cmd.dtsi @@ -0,0 +1,163 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&soc { + dsi_ss_notch_fhd_ea8074_cmd: qcom,mdss_dsi_ss_notch_fhd_ea8074_cmd { + qcom,mdss-dsi-panel-name = "ss notch fhd cmd dsi panel"; + qcom,mdss-dsi-panel-controller = <&mdss_dsi0>; + qcom,mdss-dsi-panel-model = "SS NOTCH FHD EA8074 CMD PANEL"; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,ulps-enabled; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-dcs-type-ss; + qcom,mdss-dsi-reset-sequence = <1 1>, <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <68>; + qcom,mdss-pan-physical-height-dimension = <142>; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-tx-eot-append; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4300000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <120>; + //qcom,esd-err-irq-gpio = <&tlmm 52 0x2002>; /* trig-flags: falling-0x0002 rasing-0x0001*/ + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2248>; + qcom,mdss-dsi-h-front-porch = <56>; + qcom,mdss-dsi-h-back-porch = <56>; + qcom,mdss-dsi-h-pulse-width = <18>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <24>; + qcom,mdss-dsi-v-front-porch = <26>; + qcom,mdss-dsi-v-pulse-width = <12>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-on-command = [ + 05 01 00 00 0a 00 02 11 00 + 39 00 00 00 00 00 05 2B 00 00 08 c7 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 B0 05 + 39 00 00 00 00 00 02 B1 10 + 39 00 00 00 00 00 02 B0 02 + 39 00 00 00 00 00 05 D5 02 17 54 14 + 39 01 00 00 00 00 03 F0 A5 A5 + 39 00 00 00 00 00 02 35 00 + 39 00 00 00 00 00 03 51 00 00 + 39 00 00 00 00 00 02 53 20 + 39 01 00 00 6E 00 02 55 00 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-doze-hbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 ef b0 + 39 00 00 00 00 00 02 b0 17 + 39 00 00 00 00 00 04 E3 00 00 00 + 39 01 00 00 01 00 02 53 22 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-doze-lbm-command = [ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 ef b0 + 39 00 00 00 00 00 02 b0 17 + 39 00 00 00 00 00 04 E3 00 00 00 + 39 01 00 00 01 00 02 53 23 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-nolp-command = [ + 05 01 00 00 00 00 02 28 00 + 39 00 00 00 00 00 03 51 00 00 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 b0 17 + 39 00 00 00 00 00 04 E3 86 80 01 + 39 00 00 00 00 00 02 53 28 + 39 01 00 00 00 00 03 F0 A5 A5 + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-doze-hbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-doze-lbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-nolp-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-off-command = [39 01 00 00 00 00 02 55 00]; + qcom,mdss-dsi-dispparam-acl-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l1-command = [39 01 00 00 00 00 02 55 01];/* 50% */ + qcom,mdss-dsi-dispparam-acl-l1-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l2-command = [39 01 00 00 00 00 02 55 02];/* 40% */ + qcom,mdss-dsi-dispparam-acl-l2-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l3-command = [39 01 00 00 00 00 02 55 03];/* 30% */ + qcom,mdss-dsi-dispparam-acl-l3-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-off-command = [39 01 00 00 00 00 02 53 28]; + qcom,mdss-dsi-dispparam-hbm-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-on-command = [39 01 00 00 00 00 02 53 e8]; + qcom,mdss-dsi-dispparam-hbm-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-off-command = [39 00 00 00 00 00 02 53 20 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 B2 00 40 + 39 00 00 00 00 00 02 B0 04 + 39 00 00 00 00 00 02 B2 80 + 39 00 00 00 00 00 02 F7 03 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-hbm-fod-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-on-command = [39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 B2 00 10 + 39 00 00 00 00 00 02 B0 04 + 39 00 00 00 00 00 02 B2 00 + 39 00 00 00 00 00 02 F7 03 + 39 00 00 00 00 00 03 F0 A5 A5 + 39 01 00 00 00 00 02 53 e0]; + qcom,mdss-dsi-dispparam-hbm-fod-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod2norm-command = [39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 B2 00 40 + 39 00 00 00 00 00 02 B0 04 + 39 00 00 00 00 00 02 B2 80 + 39 00 00 00 00 00 02 F7 03 + 39 01 00 00 00 00 03 F0 A5 A5]; + qcom,mdss-dsi-dispparam-hbm-fod2norm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingon-command = [39 01 00 00 01 00 02 53 28]; + qcom,mdss-dsi-dispparam-dimmingon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-h-sync-pulse = <0>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-tianma-fhd-nt36672a-video.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-tianma-fhd-nt36672a-video.dtsi new file mode 100644 index 000000000000..be6ecd084189 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-tianma-fhd-nt36672a-video.dtsi @@ -0,0 +1,387 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&soc { + dsi_tianma_fhd_nt36672a_video: qcom,mdss_dsi_tianma_fhd_nt36672a_video { + qcom,mdss-dsi-panel-name = "tianma fhd vide dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "TIANMA FHD NT36672A VIDE PANEL"; + qcom,mdss-dsi-panel-sleepwrmod = <0>; + +// + qcom,mdss-dsi-panel-type = "dsi_video_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-color-order = "rgb_swap_rgb"; + qcom,mdss-dsi-underflow-color = <0x0>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <255>; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-reset-sequence = <0 10>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <68>; + qcom,mdss-pan-physical-height-dimension = <136>; + qcom,cont-splash-enabled; + qcom,mdss-dsi-tx-eot-append; + qcom,esd-err-irq-gpio = <&tlmm 5 0x2001>; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <120>; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2340>; + qcom,mdss-dsi-h-front-porch = <40>; + qcom,mdss-dsi-h-back-porch = <44>;//debug + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <8>; + qcom,mdss-dsi-v-front-porch = <15>; + qcom,mdss-dsi-v-pulse-width = <2>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + + qcom,mdss-dsi-on-command = [ + /* skin enhancement mode */ + 15 01 00 00 00 00 02 FF 22 + 15 00 00 00 00 00 02 00 40 + 15 00 00 00 00 00 02 01 C0 + 15 00 00 00 00 00 02 02 40 + 15 00 00 00 00 00 02 03 40 + 15 00 00 00 00 00 02 04 40 + 15 00 00 00 00 00 02 05 40 + 15 00 00 00 00 00 02 06 40 + 15 00 00 00 00 00 02 07 40 + 15 00 00 00 00 00 02 08 40 + 15 00 00 00 00 00 02 09 40 + 15 00 00 00 00 00 02 0A 40 + 15 00 00 00 00 00 02 0B 40 + 15 00 00 00 00 00 02 0C 40 + 15 00 00 00 00 00 02 0D 40 + 15 00 00 00 00 00 02 0E 40 + 15 00 00 00 00 00 02 0F 40 + 15 00 00 00 00 00 02 10 40 + 15 00 00 00 00 00 02 11 50 + 15 00 00 00 00 00 02 12 60 + 15 00 00 00 00 00 02 13 70 + 15 00 00 00 00 00 02 14 58 + 15 00 00 00 00 00 02 15 68 + 15 00 00 00 00 00 02 16 78 + 15 01 00 00 00 00 02 17 77 + 15 00 00 00 00 00 02 18 39 + 15 00 00 00 00 00 02 19 2D + 15 00 00 00 00 00 02 1A 2E + 15 00 00 00 00 00 02 1B 32 + 15 00 00 00 00 00 02 1C 37 + 15 00 00 00 00 00 02 1D 3A + 15 00 00 00 00 00 02 1E 40 + 15 00 00 00 00 00 02 1F 40 + 15 00 00 00 00 00 02 20 40 + 15 00 00 00 00 00 02 21 40 + 15 00 00 00 00 00 02 22 40 + 15 00 00 00 00 00 02 23 40 + 15 00 00 00 00 00 02 24 40 + 15 00 00 00 00 00 02 25 40 + 15 00 00 00 00 00 02 26 40 + 15 00 00 00 00 00 02 27 40 + 15 00 00 00 00 00 02 28 40 + 15 00 00 00 00 00 02 2D 00 + 15 00 00 00 00 00 02 2F 40 + 15 00 00 00 00 00 02 30 40 + 15 00 00 00 00 00 02 31 40 + 15 00 00 00 00 00 02 32 40 + 15 00 00 00 00 00 02 33 40 + 15 00 00 00 00 00 02 34 40 + 15 01 00 00 00 00 02 35 40 + 15 00 00 00 00 00 02 36 40 + 15 00 00 00 00 00 02 37 40 + 15 00 00 00 00 00 02 38 40 + 15 00 00 00 00 00 02 39 40 + 15 00 00 00 00 00 02 3A 40 + 15 00 00 00 00 00 02 3B 40 + 15 00 00 00 00 00 02 3D 40 + 15 00 00 00 00 00 02 3F 40 + 15 00 00 00 00 00 02 40 40 + 15 00 00 00 00 00 02 41 40 + 15 00 00 00 00 00 02 42 40 + 15 00 00 00 00 00 02 43 40 + 15 00 00 00 00 00 02 44 40 + 15 00 00 00 00 00 02 45 40 + 15 00 00 00 00 00 02 46 40 + 15 00 00 00 00 00 02 47 40 + 15 00 00 00 00 00 02 48 40 + 15 00 00 00 00 00 02 49 40 + 15 00 00 00 00 00 02 4A 40 + 15 00 00 00 00 00 02 4B 40 + 15 00 00 00 00 00 02 4C 40 + 15 00 00 00 00 00 02 4D 40 + 15 00 00 00 00 00 02 4E 40 + 15 00 00 00 00 00 02 4F 40 + 15 01 00 00 00 00 02 50 40 + 15 00 00 00 00 00 02 51 40 + 15 00 00 00 00 00 02 52 40 + 15 00 00 00 00 00 02 53 01 + 15 00 00 00 00 00 02 54 01 + 15 00 00 00 00 00 02 55 FE + 15 00 00 00 00 00 02 56 77 + 15 00 00 00 00 00 02 58 CD + 15 00 00 00 00 00 02 59 D0 + 15 00 00 00 00 00 02 5A D0 + 15 00 00 00 00 00 02 5B 50 + 15 00 00 00 00 00 02 5C 50 + 15 00 00 00 00 00 02 5D 50 + 15 00 00 00 00 00 02 5E 50 + 15 00 00 00 00 00 02 5F 50 + 15 00 00 00 00 00 02 60 50 + 15 00 00 00 00 00 02 61 50 + 15 00 00 00 00 00 02 62 50 + 15 00 00 00 00 00 02 63 50 + 15 00 00 00 00 00 02 64 50 + 15 00 00 00 00 00 02 65 50 + 15 00 00 00 00 00 02 66 50 + 15 00 00 00 00 00 02 67 50 + 15 00 00 00 00 00 02 68 50 + 15 00 00 00 00 00 02 69 50 + 15 01 00 00 00 00 02 6A 50 + 15 00 00 00 00 00 02 6B 50 + 15 00 00 00 00 00 02 6C 50 + 15 00 00 00 00 00 02 6D 50 + 15 00 00 00 00 00 02 6E 50 + 15 00 00 00 00 00 02 6F 50 + 15 00 00 00 00 00 02 70 07 + 15 00 00 00 00 00 02 71 00 + 15 00 00 00 00 00 02 72 00 + 15 00 00 00 00 00 02 73 00 + 15 00 00 00 00 00 02 74 06 + 15 00 00 00 00 00 02 75 0C + 15 00 00 00 00 00 02 76 03 + 15 00 00 00 00 00 02 77 09 + 15 00 00 00 00 00 02 78 0F + 15 00 00 00 00 00 02 79 68 + 15 00 00 00 00 00 02 7A 88 + 15 00 00 00 00 00 02 7C 80 + 15 00 00 00 00 00 02 7D 80 + 15 00 00 00 00 00 02 7E 80 + 15 00 00 00 00 00 02 7F 00 + 15 00 00 00 00 00 02 80 00 + 15 00 00 00 00 00 02 81 00 + 15 00 00 00 00 00 02 83 01 + 15 00 00 00 00 00 02 84 00 + 15 01 00 00 00 00 02 85 80 + 15 00 00 00 00 00 02 86 80 + 15 00 00 00 00 00 02 87 80 + 15 00 00 00 00 00 02 88 40 + 15 00 00 00 00 00 02 89 91 + 15 00 00 00 00 00 02 8A 98 + 15 00 00 00 00 00 02 8B 80 + 15 00 00 00 00 00 02 8C 80 + 15 00 00 00 00 00 02 8D 80 + 15 00 00 00 00 00 02 8E 80 + 15 00 00 00 00 00 02 8F 80 + 15 00 00 00 00 00 02 90 80 + 15 00 00 00 00 00 02 91 80 + 15 00 00 00 00 00 02 92 80 + 15 00 00 00 00 00 02 93 80 + 15 00 00 00 00 00 02 94 80 + 15 00 00 00 00 00 02 95 80 + 15 00 00 00 00 00 02 96 80 + 15 00 00 00 00 00 02 97 80 + 15 00 00 00 00 00 02 98 80 + 15 00 00 00 00 00 02 99 80 + 15 00 00 00 00 00 02 9A 80 + 15 00 00 00 00 00 02 9B 80 + 15 00 00 00 00 00 02 9C 80 + 15 00 00 00 00 00 02 9D 80 + 15 01 00 00 00 00 02 9E 80 + 15 00 00 00 00 00 02 9F 80 + 15 00 00 00 00 00 02 A0 8A + 15 00 00 00 00 00 02 A2 80 + 15 00 00 00 00 00 02 A6 80 + 15 00 00 00 00 00 02 A7 80 + 15 00 00 00 00 00 02 A9 80 + 15 00 00 00 00 00 02 AA 80 + 15 00 00 00 00 00 02 AB 80 + 15 00 00 00 00 00 02 AC 80 + 15 00 00 00 00 00 02 AD 80 + 15 00 00 00 00 00 02 AE 80 + 15 00 00 00 00 00 02 AF 80 + 15 00 00 00 00 00 02 B7 76 + 15 00 00 00 00 00 02 B8 76 + 15 00 00 00 00 00 02 B9 05 + 15 00 00 00 00 00 02 BA 0D + 15 00 00 00 00 00 02 BB 14 + 15 00 00 00 00 00 02 BC 0F + 15 00 00 00 00 00 02 BD 18 + 15 00 00 00 00 00 02 BE 1F + 15 00 00 00 00 00 02 BF 05 + 15 00 00 00 00 00 02 C0 0D + 15 00 00 00 00 00 02 C1 14 + 15 00 00 00 00 00 02 C2 03 + 15 01 00 00 00 00 02 C3 07 + 15 00 00 00 00 00 02 C4 0A + 15 00 00 00 00 00 02 C5 A0 + 15 00 00 00 00 00 02 C6 55 + 15 00 00 00 00 00 02 C7 FF + 15 00 00 00 00 00 02 C8 39 + 15 00 00 00 00 00 02 C9 44 + 15 00 00 00 00 00 02 CA 12 + 15 00 00 00 00 00 02 CD 80 + 15 00 00 00 00 00 02 DB 80 + 15 00 00 00 00 00 02 DC 80 + 15 00 00 00 00 00 02 DD 80 + 15 00 00 00 00 00 02 E0 80 + 15 00 00 00 00 00 02 E1 80 + 15 00 00 00 00 00 02 E2 80 + 15 00 00 00 00 00 02 E3 80 + 15 00 00 00 00 00 02 E4 80 + 15 00 00 00 00 00 02 E5 40 + 15 00 00 00 00 00 02 E6 40 + 15 00 00 00 00 00 02 E7 40 + 15 00 00 00 00 00 02 E8 40 + 15 00 00 00 00 00 02 E9 40 + 15 00 00 00 00 00 02 EA 40 + 15 00 00 00 00 00 02 EB 40 + 15 00 00 00 00 00 02 EC 40 + 15 00 00 00 00 00 02 ED 40 + 15 00 00 00 00 00 02 EE 40 + 15 00 00 00 00 00 02 EF 40 + 15 00 00 00 00 00 02 F0 40 + 15 00 00 00 00 00 02 F1 40 + 15 00 00 00 00 00 02 F2 40 + 15 00 00 00 00 00 02 F3 40 + 15 00 00 00 00 00 02 F4 40 + 15 00 00 00 00 00 02 F5 40 + 15 00 00 00 00 00 02 F6 40 + 15 01 00 00 00 00 02 FB 01 + 15 01 00 00 00 00 02 FF 23 + 15 00 00 00 00 00 02 FB 01 + /* dimming enable */ + 15 00 00 00 00 00 02 01 84 + 15 00 00 00 00 00 02 05 2D + 15 00 00 00 00 00 02 06 00 + /* resolution 1080*2246 */ + 15 00 00 00 00 00 02 11 01 + 15 00 00 00 00 00 02 12 7B + 15 00 00 00 00 00 02 15 6F + 15 00 00 00 00 00 02 16 0B + /* UI mode */ + 15 00 00 00 00 00 02 29 0A + 15 00 00 00 00 00 02 30 FF + 15 00 00 00 00 00 02 31 FF + 15 00 00 00 00 00 02 32 FF + 15 00 00 00 00 00 02 33 FF + 15 00 00 00 00 00 02 34 FF + 15 00 00 00 00 00 02 35 FF + 15 00 00 00 00 00 02 36 FF + 15 00 00 00 00 00 02 37 FF + 15 00 00 00 00 00 02 38 FC + 15 01 00 00 00 00 02 39 F8 + 15 00 00 00 00 00 02 3A F4 + 15 00 00 00 00 00 02 3B F1 + 15 00 00 00 00 00 02 3D EE + 15 00 00 00 00 00 02 3F EB + 15 00 00 00 00 00 02 40 E8 + 15 00 00 00 00 00 02 41 E5 + /* STILL mode */ + 15 00 00 00 00 00 02 2A 13 + 15 00 00 00 00 00 02 45 FF + 15 00 00 00 00 00 02 46 FF + 15 00 00 00 00 00 02 47 FF + 15 00 00 00 00 00 02 48 FF + 15 00 00 00 00 00 02 49 FF + 15 00 00 00 00 00 02 4A FF + 15 00 00 00 00 00 02 4B FF + 15 00 00 00 00 00 02 4C FF + 15 00 00 00 00 00 02 4D ED + 15 00 00 00 00 00 02 4E D5 + 15 00 00 00 00 00 02 4F BF + 15 00 00 00 00 00 02 50 A6 + 15 01 00 00 00 00 02 51 96 + 15 00 00 00 00 00 02 52 86 + 15 00 00 00 00 00 02 53 76 + 15 00 00 00 00 00 02 54 66 + /* MOVING mode */ + 15 00 00 00 00 00 02 2B 0E + 15 00 00 00 00 00 02 58 FF + 15 00 00 00 00 00 02 59 FF + 15 00 00 00 00 00 02 5A FF + 15 00 00 00 00 00 02 5B FF + 15 00 00 00 00 00 02 5C FF + 15 00 00 00 00 00 02 5D FF + 15 00 00 00 00 00 02 5E FF + 15 00 00 00 00 00 02 5F FF + 15 00 00 00 00 00 02 60 F6 + 15 00 00 00 00 00 02 61 EA + 15 00 00 00 00 00 02 62 E1 + 15 00 00 00 00 00 02 63 D8 + 15 00 00 00 00 00 02 64 CE + 15 00 00 00 00 00 02 65 C3 + 15 00 00 00 00 00 02 66 BA + 15 01 00 00 00 00 02 67 B3 + 15 01 00 00 00 00 02 FF 25 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 05 04 + 15 01 00 00 00 00 02 FF 26 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 1C AF + 15 01 00 00 00 00 02 FF 10 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 51 FF + 15 00 00 00 00 00 02 53 24 + 15 00 00 00 00 00 02 55 00 + 05 01 00 00 00 00 02 29 00 + 05 01 00 00 46 00 02 11 00 + 15 01 00 00 00 00 02 FF 24 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 C3 01 + 15 00 00 00 00 00 02 C4 55 + 15 00 00 00 00 00 02 C5 55 + 15 01 00 00 00 00 02 FF 10 + ]; + + qcom,mdss-dsi-off-command = [ + 15 01 00 00 00 00 02 FF 24 + 15 00 00 00 00 00 02 FB 01 + 15 00 00 00 00 00 02 C3 00 + 15 01 00 00 00 00 02 FF 10 + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 3C 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-h-sync-pulse = <1>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-visionox-fhd-r66456-f11-cmd.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-visionox-fhd-r66456-f11-cmd.dtsi new file mode 100644 index 000000000000..d11acb5b345f --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/display/dsi-panel-visionox-fhd-r66456-f11-cmd.dtsi @@ -0,0 +1,167 @@ +/* Copyright (c) 2019, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/*--------------------------------------------------------------------------- + * This file is autogenerated file using gcdb parser. Please do not edit it. + * Update input XML file to add a new entry or update variable in this file + * VERSION = "1.0" + *---------------------------------------------------------------------------*/ +&soc { + dsi_visionox_fhd_r66456_f11_cmd: qcom,mdss_dsi_visionox_fhd_r66456_f11_cmd { + qcom,mdss-dsi-panel-name = "visionox r66456 fhd cmd dsi panel"; + qcom,mdss-dsi-panel-id = <0>; + qcom,mdss-dsi-panel-model = "VISIONOX FHD R66456 CMD PANEL"; + qcom,mdss-dsi-panel-sleepwrmod = <0>; + qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; + qcom,mdss-dsi-virtual-channel-id = <0>; + qcom,mdss-dsi-stream = <0>; + qcom,mdss-dsi-bpp = <24>; + qcom,mdss-dsi-underflow-color = <0xff>; + qcom,mdss-dsi-border-color = <0>; + qcom,mdss-dsi-traffic-mode = "burst_mode"; + qcom,mdss-dsi-bllp-eof-power-mode; + qcom,mdss-dsi-bllp-power-mode; + qcom,ulps-enabled; + qcom,mdss-dsi-lp11-init; + qcom,mdss-dsi-lane-0-state; + qcom,mdss-dsi-lane-1-state; + qcom,mdss-dsi-lane-2-state; + qcom,mdss-dsi-lane-3-state; + qcom,mdss-brightness-remap; + qcom,mdss-brightness-max-level = <2047>; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,mdss-dsi-dma-trigger = "trigger_sw"; + qcom,mdss-dsi-mdp-trigger = "none"; + qcom,mdss-dsi-bl-dcs-type-ss; + qcom,mdss-dsi-reset-sequence = <0 1>, <1 10>; + qcom,mdss-pan-physical-width-dimension = <68>; + qcom,mdss-pan-physical-height-dimension = <147>; + qcom,mdss-dsi-te-pin-select = <1>; + qcom,mdss-dsi-wr-mem-start = <0x2c>; + qcom,mdss-dsi-wr-mem-continue = <0x3c>; + qcom,mdss-dsi-te-dcs-command = <1>; + qcom,mdss-dsi-te-check-enable; + qcom,mdss-dsi-te-using-te-pin; + qcom,mdss-dsi-tx-eot-append; + qcom,mdss-dsi-panel-hdr-enabled; + qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 + 17000 15500 30000 8000 3000>; + qcom,mdss-dsi-panel-peak-brightness = <4300000>; + qcom,mdss-dsi-panel-blackness-level = <3230>; + + qcom,dispparam-enabled; + qcom,mdss-panel-on-dimming-delay = <120>; + /* IRQF_ONESHOT | IRQF_TRIGGER_FALLING */ + qcom,esd-err-irq-gpio = <&tlmm 5 0x2002>; + + qcom,disp-doze-backlight-threshold = <8>; + qcom,disp-fod-off-dimming-delay = <85>; + + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-width = <1080>; + qcom,mdss-dsi-panel-height = <2340>; + qcom,mdss-dsi-h-front-porch = <64>; + qcom,mdss-dsi-h-back-porch = <64>; + qcom,mdss-dsi-h-pulse-width = <20>; + qcom,mdss-dsi-h-sync-skew = <0>; + qcom,mdss-dsi-v-back-porch = <64>; + qcom,mdss-dsi-v-front-porch = <64>; + qcom,mdss-dsi-v-pulse-width = <20>; + qcom,mdss-dsi-h-left-border = <0>; + qcom,mdss-dsi-h-right-border = <0>; + qcom,mdss-dsi-v-top-border = <0>; + qcom,mdss-dsi-v-bottom-border = <0>; + qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-panel-clockrate = <1100000000>; + qcom,mdss-dsi-panel-jitter = <0x5 0x1>; + qcom,mdss-dsi-on-command = [ + 39 01 00 00 00 00 02 B0 00 + 39 00 00 00 00 00 2C BB 59 FF FF FF EF CF AB 87 63 3F 4A 48 46 44 42 40 3E 3C 3A 64 00 FF FF FF FF FF FF FF FF FF 00 00 00 00 00 00 00 00 00 02 02 42 00 + 39 00 00 00 00 00 03 D4 00 8D + 39 00 00 00 00 00 02 FA 0F + 39 01 00 00 00 00 02 B0 80 + /* NVM load control */ + 39 00 00 00 00 00 02 E6 00 + /* TE Control*/ + 39 00 00 00 00 00 02 35 00 + /* SET Column Start Adress*/ + 39 00 00 00 00 00 05 2A 00 00 04 37 + /* SET Row Start Adress*/ + 39 00 00 00 00 00 05 2B 00 00 09 23 + /* brightness control */ + 39 00 00 00 00 00 03 51 01 00 + /* sleep out */ + 05 01 00 00 6E 00 02 11 00 + /* display on */ + 05 01 00 00 00 00 02 29 00]; + qcom,mdss-dsi-off-command = [ + 05 01 00 00 00 00 02 28 00 + 05 01 00 00 78 00 02 10 00]; + qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-off-command = [ + 39 01 00 00 00 00 02 53 20]; + qcom,mdss-dsi-dispparam-hbm-fod-off-command-state = "dsi_hs_mode"; + qcom,mdss-dsi-dispparam-hbm-fod-on-command = [ + 39 00 00 00 00 00 02 88 00 + 39 01 00 00 00 00 02 53 E0]; + qcom,mdss-dsi-dispparam-hbm-fod-on-command-state = "dsi_hs_mode"; + + qcom,mdss-dsi-doze-hbm-command = [ + 39 00 00 00 00 00 03 51 00 FF + 39 01 00 00 00 00 02 88 01]; + qcom,mdss-dsi-doze-lbm-command = [ + 39 00 00 00 00 00 03 51 00 00 + 39 01 00 00 00 00 02 88 01]; + qcom,mdss-dsi-nolp-command = [ + 39 00 00 00 00 00 02 88 00]; + qcom,mdss-dsi-doze-hbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-doze-lbm-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-nolp-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-acl-off-command = [39 01 00 00 00 00 02 55 00]; + qcom,mdss-dsi-dispparam-acl-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l1-command = [39 01 00 00 00 00 02 55 01];/* 50% */ + qcom,mdss-dsi-dispparam-acl-l1-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l2-command = [39 01 00 00 00 00 02 55 02];/* 40% */ + qcom,mdss-dsi-dispparam-acl-l2-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-acl-l3-command = [39 01 00 00 00 00 02 55 03];/* 30% */ + qcom,mdss-dsi-dispparam-acl-l3-command-state = "dsi_lp_mode"; + + qcom,mdss-dsi-dispparam-hbm-off-command = [39 01 00 00 00 00 02 53 28]; + qcom,mdss-dsi-dispparam-hbm-off-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-hbm-on-command = [39 01 00 00 00 00 02 53 E8]; + qcom,mdss-dsi-dispparam-hbm-on-command-state = "dsi_lp_mode"; + + + qcom,mdss-dsi-dispparam-dimmingon-command = [39 01 00 00 01 00 02 53 28]; + qcom,mdss-dsi-dispparam-dimmingon-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-dimmingoff-command = [39 01 00 00 01 00 02 53 20]; + qcom,mdss-dsi-dispparam-dimmingoff-command-state = "dsi_lp_mode"; + /* + qcom,mdss-dsi-dispparam-crc-srgb-on-command = [ + ]; + qcom,mdss-dsi-dispparam-crc-srgb-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command = [ + ]; + qcom,mdss-dsi-dispparam-crc-dcip3-on-command-state = "dsi_lp_mode"; + qcom,mdss-dsi-dispparam-crc-off-command = [ + ]; + qcom,mdss-dsi-dispparam-crc-off-command-state = "dsi_lp_mode"; + */ + qcom,mdss-dsi-h-sync-pulse = <0>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/ir.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/ir.dtsi new file mode 100644 index 000000000000..538d11a8b054 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/ir.dtsi @@ -0,0 +1,17 @@ +&soc { + irda_regulator: irda-regulator { + compatible = "regulator-dummy"; + regulator-name = "irda_regulator"; + }; +}; + +&qupv3_se1_spi { + status = "ok"; + irled@0 { + compatible = "ir-spi-led"; + reg = <0x0>; + power-supply = <&irda_regulator>; + status = "ok"; + spi-max-frequency = <19200000>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/pm8150.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/pm8150.dtsi new file mode 100644 index 000000000000..6b2f14bcefc6 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/pm8150.dtsi @@ -0,0 +1,35 @@ +&spmi_bus { + qcom,pm8150@0 { + qcom,power-on@800 { + interrupts = <0x0 0x8 0x0 IRQ_TYPE_NONE>, + <0x0 0x8 0x1 IRQ_TYPE_NONE>, + <0x0 0x8 0x4 IRQ_TYPE_NONE>, + <0x0 0x8 0x5 IRQ_TYPE_NONE>; + interrupt-names = "kpdpwr", "resin", + "resin-bark", "kpdpwr-resin-bark"; + qcom,pon-dbc-delay = <62500>; + + qcom,pon_1 { + qcom,support-reset = <1>; + qcom,pull-up = <1>; + qcom,s1-timer = <4480>; + qcom,s2-timer = <2000>; + qcom,s2-type = <0x7>; + }; + + qcom,pon_3 { + qcom,pon-type = ; + qcom,support-reset = <1>; + qcom,pull-up = <1>; + qcom,s1-timer = <1352>; + qcom,s2-timer = <2000>; + qcom,s2-type = <0x1>; + qcom,use-bark; + }; + }; + }; +}; + +&pm8150_rtc { + qcom,qpnp-rtc-alarm-pwrup = <1>; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/pm8150b.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/pm8150b.dtsi new file mode 100644 index 000000000000..684a1284886d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/pm8150b.dtsi @@ -0,0 +1,33 @@ +&pm8150b_gpios { + interrupts = <0x2 0xc0 0 IRQ_TYPE_NONE>, + <0x2 0xc1 0 IRQ_TYPE_NONE>, + <0x2 0xc4 0 IRQ_TYPE_NONE>, + <0x2 0xc5 0 IRQ_TYPE_NONE>, + <0x2 0xc6 0 IRQ_TYPE_NONE>, + <0x2 0xc7 0 IRQ_TYPE_NONE>, + <0x2 0xc8 0 IRQ_TYPE_NONE>, + <0x2 0xc9 0 IRQ_TYPE_NONE>, + <0x2 0xca 0 IRQ_TYPE_NONE>, + <0x2 0xcb 0 IRQ_TYPE_NONE>; + interrupt-names = "pm8150b_gpio1", "pm8150b_gpio2", + "pm8150b_gpio5", "pm8150b_gpio6", + "pm8150b_gpio7", + "pm8150b_gpio8", "pm8150b_gpio9", + "pm8150b_gpio10", "pm8150b_gpio11", + "pm8150b_gpio12"; + qcom,gpios-disallowed = <3 4>; +}; + +&ibat_lvl0 { + temperature = <5500>; +}; + +&ibat_lvl1 { + temperature = <8000>; +}; + +&thermal_zones { + soc { + disable-thermal-zone; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/pm8150l.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/pm8150l.dtsi new file mode 100644 index 000000000000..a0544c78b85e --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/pm8150l.dtsi @@ -0,0 +1,59 @@ +&pm8150l_gpios { + interrupts = <0x4 0xc0 0 IRQ_TYPE_NONE>, + <0x4 0xc1 0 IRQ_TYPE_NONE>, + <0x4 0xc2 0 IRQ_TYPE_NONE>, + <0x4 0xc3 0 IRQ_TYPE_NONE>, + <0x4 0xc4 0 IRQ_TYPE_NONE>, + <0x4 0xc5 0 IRQ_TYPE_NONE>, + <0x4 0xc6 0 IRQ_TYPE_NONE>, + <0x4 0xc7 0 IRQ_TYPE_NONE>, + <0x4 0xc8 0 IRQ_TYPE_NONE>, + <0x4 0xc9 0 IRQ_TYPE_NONE>, + <0x4 0xca 0 IRQ_TYPE_NONE>, + <0x4 0xcb 0 IRQ_TYPE_NONE>; + interrupt-names = "pm8150l_gpio1", "pm8150l_gpio2", + "pm8150l_gpio3", "pm8150l_gpio4", + "pm8150l_gpio5", "pm8150l_gpio6", + "pm8150l_gpio7", + "pm8150l_gpio8", "pm8150l_gpio9", + "pm8150l_gpio10", "pm8150l_gpio11", + "pm8150l_gpio12"; + /delete-property/ qcom,gpios-disallowed; +}; + +&pm8150l_adc_tm { + io-channels = <&pm8150l_vadc ADC_AMUX_THM1_PU2>, + <&pm8150l_vadc ADC_AMUX_THM2_PU2>, + <&pm8150l_vadc ADC_GPIO3_PU2>; +}; + +&pm8150l_flash2 { + status = "ok"; +}; + +&pm8150l_torch2 { + status = "ok"; +}; + +&flash_led { + pm8150l_flashlight: qcom,flashlight { + label = "flash"; + qcom,led-name = "flashlight"; + qcom,max-current = <750>; + qcom,default-led-trigger = "flashlight_trigger"; + qcom,id = <3>; + qcom,current-ma = <500>; + qcom,duration-ms = <1280>; + qcom,ires-ua = <12500>; + qcom,hdrm-voltage-mv = <325>; + qcom,hdrm-vol-hi-lo-win-mv = <100>; + }; +}; + +&pm8150l_pwm { + status = "disabled"; +}; + +&red_led { + /delete-property/ linux,default-trigger; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/sm8150-audio-overlay.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/sm8150-audio-overlay.dtsi new file mode 100644 index 000000000000..f92cf102314c --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/sm8150-audio-overlay.dtsi @@ -0,0 +1,57 @@ +#include "../../../sm8150-audio-overlay.dtsi" + +&snd_9360 { + status = "disabled"; +}; + +&snd_934x { + qcom,audio-routing = + "AIF4 VI", "MCLK", + "RX_BIAS", "MCLK", + "MADINPUT", "MCLK", + "hifi amp", "LINEOUT1", + "hifi amp", "LINEOUT2", + "AMIC1", "MIC BIAS1", + "AMIC2", "MIC BIAS2", + "MIC BIAS2", "Headset Mic", + "AMIC3", "MIC BIAS3", + "MIC BIAS2", "ANCRight Headset Mic", + "AMIC4", "MIC BIAS2", + "MIC BIAS2", "ANCLeft Headset Mic", + "AMIC5", "MIC BIAS3", + "MIC BIAS3", "Handset Mic", + "DMIC0", "MIC BIAS1", + "MIC BIAS1", "Digital Mic0", + "DMIC1", "MIC BIAS1", + "MIC BIAS1", "Digital Mic1", + "DMIC2", "MIC BIAS3", + "MIC BIAS3", "Digital Mic2", + "DMIC3", "MIC BIAS3", + "MIC BIAS3", "Digital Mic3", + "DMIC4", "MIC BIAS4", + "MIC BIAS4", "Digital Mic4", + "DMIC5", "MIC BIAS4", + "MIC BIAS4", "Digital Mic5", + "SpkrLeft IN", "SPK1 OUT", + "SpkrRight IN", "SPK2 OUT"; + + qcom,msm-mbhc-hphl-swh = <0>; + qcom,msm-mbhc-gnd-swh = <0>; + + qcom,wsa-max-devs = <0>; + + pinctrl-names = "quat_mi2s_enable", "quat_mi2s_disable", + "quat_tdm_enable", "quat_tdm_disable"; + pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active + &quat_mi2s_sd1_active>; + pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep + &quat_mi2s_sd1_sleep>; + pinctrl-2 = <&quat_tdm_active &quat_tdm_dout_active>; + pinctrl-3 = <&quat_tdm_sleep &quat_tdm_dout_sleep>; +}; + +&wcd934x_cdc { + qcom,cdc-micbias1-mv = <2700>; + qcom,cdc-micbias3-mv = <2700>; + qcom,cdc-micbias4-mv = <2700>; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/sm8150-pmic-overlay.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/sm8150-pmic-overlay.dtsi new file mode 100644 index 000000000000..28c6e41ad394 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/sm8150-pmic-overlay.dtsi @@ -0,0 +1,28 @@ +#include "../../../sm8150-pmic-overlay.dtsi" + +#include "pm8150.dtsi" +#include "pm8150b.dtsi" +#include "pm8150l.dtsi" + +&pm8150b_gpios { + otg_vbus_boost { + otg_vbus_boost_default: otg_vbus_boost_default { + pins = "gpio12"; + function = "normal"; + output-low; + power-source = <0>; + }; + }; + + power_good { + /*Get the DC Power Good signal*/ + power_good_default: power_good_default { + pins = "gpio7"; + function = "normal"; + qcom,drive-strength = <2>; /* 2 MA */ + bias-disable; /* NO pull */ + power-source = <1>; + input-enable; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/sm8150-sde-display.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/sm8150-sde-display.dtsi new file mode 100644 index 000000000000..be96cd1252af --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/sm8150-sde-display.dtsi @@ -0,0 +1,532 @@ +#include "../../../sm8150-sde-display.dtsi" + +#include "display/dsi-panel-ss-notch-fhd-ea8074-cmd.dtsi" +#include "display/dsi-panel-samsung-fhd-ea8076-cmd.dtsi" +#include "display/dsi-panel-samsung-fhd-ea8076-f1-cmd.dtsi" +#include "display/dsi-panel-samsung-fhd-ea8076-f1p2-cmd.dtsi" +#include "display/dsi-panel-samsung-fhd-ea8076-f1p2-2-cmd.dtsi" +#include "display/dsi-panel-samsung-fhd-ea8076-f1mp-cmd.dtsi" +#include "display/dsi-panel-tianma-fhd-nt36672a-video.dtsi" +#include "display/dsi-panel-ss-fhd-ea8076-cmd.dtsi" +#include "display/dsi-panel-ss-fhd-ea8076-global-cmd.dtsi" +#include "display/dsi-panel-visionox-fhd-r66456-f11-cmd.dtsi" +#include "display/dsi-panel-samsung-fhd-ea8076-f1s-cmd.dtsi" +#include "display/dsi-panel-j20s-36-02-0a-lcd-dsc-vid.dtsi" +#include "display/dsi-panel-j20s-42-02-0b-lcd-dsc-vid.dtsi" +#include "display/dsi-panel-k82-42-02-0a-video.dtsi" +#include "display/dsi-panel-k82-36-02-0b-video.dtsi" + +&display_panel_avdd_eldo { + status = "disabled"; +}; + +&soc { + dsi_amoled_panel_pwr_supply: dsi_amoled_panel_pwr_supply { + #address-cells = <1>; + #size-cells = <0>; + + qcom,panel-supply-entry@0 { + reg = <0>; + qcom,supply-name = "vddio"; + qcom,supply-min-voltage = <1800000>; + qcom,supply-max-voltage = <1800000>; + qcom,supply-enable-load = <62000>; + qcom,supply-disable-load = <80>; + //qcom,supply-post-on-sleep = <20>; + }; + + qcom,panel-supply-entry@1 { + reg = <1>; + qcom,supply-name = "vci"; + qcom,supply-min-voltage = <3000000>; + qcom,supply-max-voltage = <3000000>; + qcom,supply-enable-load = <62000>; + qcom,supply-disable-load = <80>; + qcom,supply-post-on-sleep = <10>; + qcom,supply-pre-off-sleep = <10>; + }; + }; + + dsi_amoled_panel_pwr_external_supply: dsi_amoled_panel_pwr_external_supply { + #address-cells = <1>; + #size-cells = <0>; + + qcom,panel-supply-entry@0 { + reg = <0>; + qcom,supply-name = "vddio"; + qcom,supply-min-voltage = <1800000>; + qcom,supply-max-voltage = <1800000>; + qcom,supply-enable-load = <62000>; + qcom,supply-disable-load = <80>; + //qcom,supply-post-on-sleep = <20>; + }; + + qcom,panel-supply-entry@1 { + reg = <1>; + qcom,supply-name = "vcie"; + qcom,supply-min-voltage = <3000000>; + qcom,supply-max-voltage = <3000000>; + qcom,supply-enable-load = <62000>; + qcom,supply-disable-load = <80>; + qcom,supply-post-on-sleep = <10>; + qcom,supply-pre-off-sleep = <10>; + }; + }; + + dsi_panel_pwr_supply_k82_vddio: dsi_panel_pwr_supply_k82_vddio { + #address-cells = <1>; + #size-cells = <0>; + + qcom,panel-supply-entry@0 { + reg = <0>; + qcom,supply-name = "vddio"; + qcom,supply-min-voltage = <1800000>; + qcom,supply-max-voltage = <1800000>; + qcom,supply-enable-load = <62000>; + qcom,supply-disable-load = <80>; + qcom,supply-post-on-sleep = <20>; + qcom,supply-post-off-sleep = <10>; + }; + qcom,panel-supply-entry@1 { + reg = <1>; + qcom,supply-name = "enp"; + qcom,supply-min-voltage = <5500000>; + qcom,supply-max-voltage = <5500000>; + qcom,supply-enable-load = <100000>; + qcom,supply-disable-load = <100>; + qcom,supply-pre-on-sleep = <0>; + qcom,supply-pre-off-sleep = <0>; + qcom,supply-post-on-sleep = <10>; + qcom,supply-post-off-sleep = <10>; + }; + qcom,panel-supply-entry@2 { + reg = <2>; + qcom,supply-name = "enn"; + qcom,supply-min-voltage = <5500000>; + qcom,supply-max-voltage = <5500000>; + qcom,supply-enable-load = <100000>; + qcom,supply-disable-load = <100>; + qcom,supply-pre-on-sleep = <0>; + qcom,supply-pre-off-sleep = <0>; + qcom,supply-post-on-sleep = <10>; + qcom,supply-post-off-sleep = <10>; + }; + }; +}; + +&soc { + dsi_ss_ea8074_fhd_cmd_display: qcom,dsi-display@24 { + label = "dsi_ss_ea8074_fhd_cmd_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + + qcom,dsi-panel = <&dsi_ss_notch_fhd_ea8074_cmd>; + }; + + dsi_samsung_fhd_ea8076_cmd_display: qcom,dsi-display@25 { + label = "dsi_samsung_fhd_ea8076_cmd_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + + qcom,dsi-panel = <&dsi_samsung_fhd_ea8076_cmd>; + }; + + dsi_samsung_fhd_ea8076_f1_cmd_display: qcom,dsi-display@26 { + label = "dsi_samsung_fhd_ea8076_f1_cmd_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + + qcom,dsi-panel = <&dsi_samsung_fhd_ea8076_f1_cmd>; + }; + + dsi_samsung_fhd_ea8076_f1mp_cmd_display: qcom,dsi-display@27 { + label = "dsi_samsung_fhd_ea8076_f1mp_cmd_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + + qcom,dsi-panel = <&dsi_samsung_fhd_ea8076_f1mp_cmd>; + }; + + dsi_samsung_fhd_ea8076_f1p2_2_cmd_display: qcom,dsi-display@28 { + label = "dsi_samsung_fhd_ea8076_f1p2_2_cmd_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + + qcom,dsi-panel = <&dsi_samsung_fhd_ea8076_f1p2_2_cmd>; + }; + + dsi_samsung_fhd_ea8076_f1p2_cmd_display: qcom,dsi-display@29 { + label = "dsi_samsung_fhd_ea8076_f1p2_cmd_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + + qcom,dsi-panel = <&dsi_samsung_fhd_ea8076_f1p2_cmd>; + }; + + dsi_tianma_fhd_nt36672a_video_display: qcom,dsi-display@30 { + label = "dsi_tianma_fhd_nt36672a_video_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + + qcom,dsi-panel = <&dsi_tianma_fhd_nt36672a_video>; + }; + + dsi_ss_fhd_ea8076_cmd_display: qcom,dsi-display@31 { + label = "dsi_ss_fhd_ea8076_cmd_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + + qcom,dsi-panel = <&dsi_ss_fhd_ea8076_cmd>; + }; + + dsi_visionox_fhd_r66456_f11_cmd_display: qcom,dsi-display@32 { + label = "dsi_visionox_fhd_r66456_f11_cmd_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + + qcom,dsi-panel = <&dsi_visionox_fhd_r66456_f11_cmd>; + }; + + dsi_ss_fhd_ea8076_global_cmd_display: qcom,dsi-display@33 { + label = "dsi_ss_fhd_ea8076_global_cmd_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + + qcom,dsi-panel = <&dsi_ss_fhd_ea8076_global_cmd>; + }; + + dsi_samsung_fhd_ea8076_f1s_cmd_display: qcom,dsi-display@34 { + label = "dsi_samsung_fhd_ea8076_f1s_cmd_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + + qcom,dsi-panel = <&dsi_samsung_fhd_ea8076_f1s_cmd>; + }; + + dsi_j20s_36_02_0a_video_display: qcom,dsi-display@35{ + label = "dsi_j20s_36_02_0a_video_display"; + qcom,display-type = "primary"; + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0", + "src_byte_clk0", "src_pixel_clk0", + "shadow_byte_clk0", "shadow_pixel_clk0"; + qcom,ulps-enabled; + qcom,dsi-panel = <&dsi_j20s_36_02_0a_video>; + }; + + dsi_j20s_42_02_0b_video_display: qcom,dsi-display@36 { + label = "dsi_j20s_42_02_0b_video_display"; + qcom,display-type = "primary"; + qcom,dsi-ctrl-num = <0>; + qcom,dsi-phy-num = <0>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0", + "src_byte_clk0", "src_pixel_clk0", + "shadow_byte_clk0", "shadow_pixel_clk0"; + qcom,ulps-enabled; + qcom,dsi-panel = <&dsi_j20s_42_02_0b_video>; + }; + + dsi_k82_42_02_0a_dual_cphy_vid_display: qcom,dsi-display@37 { + label = "dsi_k82_42_02_0a_dual_cphy_vid_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0 1>; + qcom,dsi-phy-num = <0 1>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0", + "cphy_byte_clk0", "cphy_pixel_clk0"; + + qcom,dsi-panel = <&dsi_k82_42_02_0a_dual_cphy_video>; + }; + + dsi_k82_36_02_0b_dual_cphy_vid_display: qcom,dsi-display@38 { + label = "dsi_k82_36_02_0b_dual_cphy_vid_display"; + qcom,display-type = "primary"; + + qcom,dsi-ctrl-num = <0 1>; + qcom,dsi-phy-num = <0 1>; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0", + "cphy_byte_clk0", "cphy_pixel_clk0"; + + qcom,dsi-panel = <&dsi_k82_36_02_0b_dual_cphy_video>; + }; +}; + +&sde_dsi { + /delete-property/ vdd-supply; + vci-supply = <&pm8150_l13>; + + qcom,dsi-display-list = + <&dsi_sharp_4k_dsc_video_display + &dsi_sharp_4k_dsc_cmd_display + &dsi_sharp_1080_cmd_display + &dsi_dual_sharp_1080_120hz_cmd_display + &dsi_dual_nt35597_truly_video_display + &dsi_dual_nt35597_truly_cmd_display + &dsi_nt35597_truly_dsc_cmd_display + &dsi_nt35597_truly_dsc_video_display + &dsi_sim_vid_display + &dsi_dual_sim_vid_display + &dsi_sim_cmd_display + &dsi_dual_sim_cmd_display + &dsi_sim_dsc_375_cmd_display + &dsi_dual_sim_dsc_375_cmd_display + &dsi_sw43404_amoled_cmd_display + &dsi_nt35695b_truly_fhd_cmd_display + &dsi_nt35695b_truly_fhd_video_display + &dsi_sw43404_amoled_video_display + &dsi_sw43404_amoled_fhd_plus_cmd_display + &dsi_ss_ea8074_fhd_cmd_display + &dsi_samsung_fhd_ea8076_cmd_display + &dsi_samsung_fhd_ea8076_f1_cmd_display + &dsi_samsung_fhd_ea8076_f1mp_cmd_display + &dsi_samsung_fhd_ea8076_f1p2_2_cmd_display + &dsi_samsung_fhd_ea8076_f1p2_cmd_display + &dsi_tianma_fhd_nt36672a_video_display + &dsi_dual_nt36850_truly_cmd_display + &dsi_ss_fhd_ea8076_cmd_display + &dsi_visionox_fhd_r66456_f11_cmd_display + &dsi_ss_fhd_ea8076_global_cmd_display + &dsi_samsung_fhd_ea8076_f1s_cmd_display + &dsi_rm69299_visionox_amoled_vid_display + &dsi_j20s_36_02_0a_video_display + &dsi_j20s_42_02_0b_video_display + &dsi_k82_42_02_0a_dual_cphy_vid_display + &dsi_k82_36_02_0b_dual_cphy_vid_display>; +}; + +&sde_dsi1 { + /delete-property/ vdd-supply; +}; + +/* +&sde_dp { + /delete-property/ qcom,dp-aux-switch; +}; +*/ + +&dsi_ss_notch_fhd_ea8074_cmd { + qcom,mdss-dsi-t-clk-post = <0x19>; + qcom,mdss-dsi-t-clk-pre = <0x1C>; + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 22 08 09 25 23 09 + 09 06 03 04 00 1C 19]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_samsung_fhd_ea8076_cmd { + qcom,mdss-dsi-t-clk-post = <0x1A>; + qcom,mdss-dsi-t-clk-pre = <0x1E>; + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 24 0A 0A 26 25 09 + 0A 06 03 04 00 1E 1A]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_samsung_fhd_ea8076_f1_cmd { + qcom,mdss-dsi-t-clk-post = <0x1A>; + qcom,mdss-dsi-t-clk-pre = <0x1E>; + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 24 0A 0A 26 25 09 + 0A 06 03 04 00 1E 1A]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_samsung_fhd_ea8076_f1mp_cmd { + qcom,mdss-dsi-t-clk-post = <0x1A>; + qcom,mdss-dsi-t-clk-pre = <0x1E>; + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 24 0A 0A 26 25 09 + 0A 06 03 04 00 1E 1A]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_samsung_fhd_ea8076_f1p2_cmd { + qcom,mdss-dsi-t-clk-post = <0x1A>; + qcom,mdss-dsi-t-clk-pre = <0x1E>; + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 24 0A 0A 26 25 09 + 0A 06 03 04 00 1E 1A]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_samsung_fhd_ea8076_f1p2_2_cmd { + qcom,mdss-dsi-t-clk-post = <0x1A>; + qcom,mdss-dsi-t-clk-pre = <0x1E>; + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 24 0A 0A 26 25 09 + 0A 06 03 04 00 1E 1A]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_tianma_fhd_nt36672a_video { + qcom,mdss-dsi-t-clk-post = <0x18>; + qcom,mdss-dsi-t-clk-pre = <0x1B>; + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 21 08 08 25 22 09 + 08 06 03 04 00 1B 18]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_ss_fhd_ea8076_cmd { + qcom,mdss-dsi-t-clk-post = <0x0F>; + qcom,mdss-dsi-t-clk-pre = <0x37>; + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 24 0A 0A 26 25 09 + 0A 06 03 04 00 1E 1A]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_visionox_fhd_r66456_f11_cmd { + qcom,mdss-dsi-t-clk-post = <0x0F>; + qcom,mdss-dsi-t-clk-pre = <0x37>; + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 24 0A 0A 26 25 09 + 0A 06 03 04 00 1E 1A]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_ss_fhd_ea8076_global_cmd { + qcom,mdss-dsi-t-clk-post = <0x1A>; + qcom,mdss-dsi-t-clk-pre = <0x1E>; + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 24 0A 0A 26 24 0A + 0A 06 03 04 00 1E 1A]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_samsung_fhd_ea8076_f1s_cmd { + qcom,mdss-dsi-t-clk-post = <0x1A>; + qcom,mdss-dsi-t-clk-pre = <0x1E>; + qcom,mdss-dsi-clk-strength = <0xFF>; + qcom,mdss-dsi-display-timings { + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 24 0A 0A 26 24 0A + 0A 06 02 04 00 1E 1A]; + qcom,display-topology = <1 0 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_j20s_36_02_0a_video { + qcom,mdss-dsi-t-clk-post = <0x17>; + qcom,mdss-dsi-t-clk-pre = <0x18>; + qcom,mdss-dsi-display-timings { + /* 60 Hz */ + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 1C 08 07 23 22 07 + 07 05 02 04 00 18 17]; + qcom,display-topology = <1 1 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_j20s_42_02_0b_video { + qcom,mdss-dsi-t-clk-post = <0x17>; + qcom,mdss-dsi-t-clk-pre = <0x18>; + qcom,mdss-dsi-display-timings { + /* 120 Hz */ + timing@0{ + qcom,mdss-dsi-panel-phy-timings = [00 1C 08 07 23 22 07 + 07 05 02 04 00 18 17]; + qcom,display-topology = <1 1 1>; + qcom,default-topology-index = <0>; + }; + }; +}; + +&dsi_k82_42_02_0a_dual_cphy_video { + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 27 2B 0A + 19 0A 02 04 00 00 00]; + qcom,display-topology = <2 0 2>; + qcom,default-topology-index = <0>; + }; + }; +}; +&dsi_k82_36_02_0b_dual_cphy_video { + qcom,mdss-dsi-display-timings { + timing@0 { + qcom,mdss-dsi-panel-phy-timings = [00 00 00 00 27 2B 0A + 19 0A 02 04 00 00 00]; + qcom,display-topology = <2 0 2>; + qcom,default-topology-index = <0>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/smb1390.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/smb1390.dtsi new file mode 100644 index 000000000000..471e1db26a75 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/smb1390.dtsi @@ -0,0 +1,15 @@ +&qupv3_se4_i2c { + #include "../../../smb1390.dtsi" +}; + +&smb1390_slave { + interrupt-parent = <&spmi_bus>; + interrupts = <0x2 0xC5 0x0 IRQ_TYPE_LEVEL_LOW>; + interrupt_names = "smb1390_slave"; + interrupt-controller; + #interrupt-cells = <3>; +}; + +&smb1390_slave_charger { + interrupt-parent = <&smb1390_slave>; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/xiaomi-sdx50-sm8150-common.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/xiaomi-sdx50-sm8150-common.dtsi new file mode 100644 index 000000000000..d2eea3d10995 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/xiaomi-sdx50-sm8150-common.dtsi @@ -0,0 +1,407 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include + +#include "sm8150-pmic-overlay.dtsi" +#include "sm8150-sde-display.dtsi" +#include "../../../sm8150-thermal-overlay.dtsi" + +#include "../common/smb1390.dtsi" + +&qupv3_se4_i2c { +#include "../../../smb1355.dtsi" +}; + +&qupv3_se12_2uart { + status = "ok"; +}; + +&vendor { + bluetooth: bt_wcn3990 { + compatible = "qca,wcn3990"; + qca,bt-vdd-core-supply = <&pm8150_l7>; + qca,bt-vdd-pa-supply = <&pm8150l_l2>; + qca,bt-vdd-ldo-supply = <&pm8150l_l11>; + + qca,bt-vdd-core-voltage-level = <1800000 1800000>; + qca,bt-vdd-pa-voltage-level = <1304000 1304000>; + qca,bt-vdd-ldo-voltage-level = <3312000 3312000>; + + qca,bt-vdd-core-current-level = <0>; /* LPM/PFM */ + qca,bt-vdd-pa-current-level = <0>; /* LPM/PFM */ + qca,bt-vdd-ldo-current-level = <0>; /* LPM/PFM */ + }; + + + extcon_usb1: extcon_usb1 { + compatible = "linux,extcon-usb-gpio"; + vbus-gpio = <&pm8150_gpios 10 GPIO_ACTIVE_HIGH>; + id-gpio = <&tlmm 101 GPIO_ACTIVE_HIGH>; + vbus-out-gpio = <&pm8150_gpios 9 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&usb2_vbus_det_default + &usb2_id_det_default + &usb2_vbus_boost_default>; + }; +}; + +&qupv3_se13_4uart { + status = "ok"; +}; + +&qupv3_se3_spi { + status = "ok"; +}; + +&qupv3_se4_i2c { + status = "ok"; +}; + +&soc { + gpio_keys { + compatible = "gpio-keys"; + label = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&key_vol_up_default>; + + vol_up { + label = "volume_up"; + gpios = <&pm8150_gpios 6 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + gpio-key,wakeup; + debounce-interval = <15>; + linux,can-disable; + }; + }; + + ext_5v_boost: ext_5v_boost { + compatible = "regulator-fixed"; + status = "disabled"; + regulator-name = "ext_5v_boost"; + gpio = <&pm8150b_gpios 12 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-enable-ramp-delay = <1600>; + + pinctrl-names = "default"; + pinctrl-0 = <&otg_vbus_boost_default>; + }; + + qcom_qbt1000: qcom,qbt1000 { + compatible = "qcom,qbt1000"; + clock-names = "core", "iface"; + clock-frequency = <25000000>; + qcom,ipc-gpio = <&tlmm 118 0>; + pinctrl-names = "default"; + pinctrl-0 = <&key_home_default>; + qcom,finger-detect-gpio = <&pm8150_gpios 1 0>; + }; +}; + +&dsi_sharp_4k_dsc_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sharp_4k_dsc_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sim_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sim_vid { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_sim_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_sim_vid { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_nt35597_truly_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_nt35597_truly_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sim_dsc_375_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_sim_dsc_375_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_nt35597_truly_dsc_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_nt35597_truly_dsc_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_nt35695b_truly_fhd_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_nt35695b_truly_fhd_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_samsung_fhd_ea8076_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <2047>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_samsung_fhd_ea8076_f1s_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <2047>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 11 0>; +}; + +&dsi_samsung_fhd_ea8076_cmd_display { + qcom,dsi-display-active; +}; + +&qupv3_se9_i2c { + status = "ok"; + nq@28 { + compatible = "qcom,nq-nci"; + reg = <0x28>; + qcom,nq-irq = <&tlmm 47 0x00>; + qcom,nq-ven = <&tlmm 41 0x00>; + qcom,nq-firm = <&tlmm 48 0x00>; + qcom,nq-clkreq = <&tlmm 113 0x00>; + //qcom,nq-esepwr = <&tlmm 42 0x00>; + interrupt-parent = <&tlmm>; + interrupts = <47 0>; + interrupt-names = "nfc_irq"; + pinctrl-names = "nfc_active", "nfc_suspend"; + pinctrl-0 = <&nfc_int_active &nfc_enable_active + &nfc_clk_req_active>; + pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend + &nfc_clk_req_suspend>; + }; +}; + +&ufsphy_mem { + compatible = "qcom,ufs-phy-qmp-v4"; + + vdda-phy-supply = <&pm8150_l5>; + vdda-phy-always-on; + vdda-pll-supply = <&pm8150l_l3>; + vdda-phy-max-microamp = <90200>; + vdda-pll-max-microamp = <19000>; + + status = "ok"; +}; + +&spmi_debug_bus { + status = "ok"; +}; + +&pm8150l_wled { + qcom,string-cfg= <7>; + qcom,leds-per-string = <6>; + status = "ok"; +}; + +&pm8150l_lcdb { + status = "ok"; +}; + +&pm8150b_fg { + qcom,battery-data = <&mtp_batterydata>; + /* ESR fast calibration */ + qcom,fg-esr-timer-chg-fast = <0 7>; + qcom,fg-esr-timer-dischg-fast = <0 7>; + qcom,fg-esr-timer-chg-slow = <0 96>; + qcom,fg-esr-timer-dischg-slow = <0 96>; + qcom,fg-esr-cal-soc-thresh = <26 230>; + qcom,fg-esr-cal-temp-thresh = <10 40>; +}; + +&sdhc_2 { + vdd-supply = <&pm8150l_l9>; + qcom,vdd-voltage-level = <2950000 2960000>; + qcom,vdd-current-level = <200 800000>; + + vdd-io-supply = <&pm8150l_l6>; + qcom,vdd-io-voltage-level = <1808000 2960000>; + qcom,vdd-io-current-level = <200 22000>; + + pinctrl-names = "active", "sleep"; + pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &storage_cd>; + pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &storage_cd>; + + cd-gpios = <&tlmm 96 GPIO_ACTIVE_LOW>; + + status = "ok"; +}; + +&wil6210 { + status = "ok"; +}; + +&mhi_0 { + mhi,fw-name = "debug.mbn"; +}; + +&pm8150b_charger { + qcom,sec-charger-config = <3>; + io-channels = <&pm8150b_vadc ADC_MID_CHG_DIV6>, + <&pm8150b_vadc ADC_USB_IN_I>, + <&pm8150b_vadc ADC_SBUx>, + <&pm8150b_vadc ADC_VPH_PWR>, + <&pm8150b_vadc ADC_CHG_TEMP>; + io-channel-names = "mid_voltage", + "usb_in_current", + "sbux_res", + "vph_voltage", + "chg_temp"; + qcom,battery-data = <&mtp_batterydata>; + qcom,sw-jeita-enable; + qcom,wd-bark-time-secs = <16>; +}; + +&smb1390 { + pinctrl-names = "default"; + pinctrl-0 = <&smb_stat_default>; + status = "ok"; +}; + +&smb1390_charger { + io-channels = <&pm8150b_vadc ADC_AMUX_THM2>; + io-channel-names = "cp_die_temp"; + status = "ok"; +}; + +&usb1 { + extcon = <&extcon_usb1>; + status = "ok"; +}; + +&usb2_phy1 { + status = "ok"; +}; + +&usb_qmp_phy { + status = "ok"; +}; + +&smb1355 { + status = "ok"; +}; + +&smb1355_charger { + io-channels = <&pm8150b_vadc ADC_AMUX_THM2>; + io-channel-names = "charger_temp"; + status = "ok"; +}; + +&reserved_memory { + ramdump_fb_mem: ramdump_fb_region@af000000 { + compatible = "removed-dma-pool"; + no-map; + reg = <0 0xaf000000 0 0x1000000>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/xiaomi-sm8150-common.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/xiaomi-sm8150-common.dtsi new file mode 100644 index 000000000000..9516bb174226 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/common/xiaomi-sm8150-common.dtsi @@ -0,0 +1,527 @@ +/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include + +#include "sm8150-pmic-overlay.dtsi" +#include "sm8150-sde-display.dtsi" +#include "../../../sm8150-thermal-overlay.dtsi" + +&qupv3_se12_2uart { + status = "ok"; +}; + +&vendor { + bluetooth: bt_wcn3990 { + compatible = "qca,wcn3990"; + qca,bt-vdd-core-supply = <&pm8150_l7>; + qca,bt-vdd-pa-supply = <&pm8150l_l2>; + qca,bt-vdd-ldo-supply = <&pm8150l_l11>; + + qca,bt-vdd-core-voltage-level = <1800000 1800000>; + qca,bt-vdd-pa-voltage-level = <1304000 1304000>; + qca,bt-vdd-ldo-voltage-level = <3312000 3312000>; + + qca,bt-vdd-core-current-level = <0>; /* LPM/PFM */ + qca,bt-vdd-pa-current-level = <0>; /* LPM/PFM */ + qca,bt-vdd-ldo-current-level = <0>; /* LPM/PFM */ + }; + + extcon_usb1: extcon_usb1 { + compatible = "linux,extcon-usb-gpio"; + vbus-gpio = <&pm8150_gpios 10 GPIO_ACTIVE_HIGH>; + id-gpio = <&tlmm 101 GPIO_ACTIVE_HIGH>; + vbus-out-gpio = <&pm8150_gpios 9 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&usb2_vbus_det_default + &usb2_id_det_default + &usb2_vbus_boost_default>; + }; +}; + +&qupv3_se13_4uart { + status = "ok"; +}; + +&qupv3_se3_spi { + status = "ok"; +}; + +&qupv3_se4_i2c { + status = "ok"; +}; + +&soc { + gpio_keys { + compatible = "gpio-keys"; + label = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&key_vol_up_default>; + + vol_up { + label = "volume_up"; + gpios = <&pm8150_gpios 6 GPIO_ACTIVE_LOW>; + linux,input-type = <1>; + linux,code = ; + gpio-key,wakeup; + debounce-interval = <15>; + linux,can-disable; + }; + + }; + + ext_5v_boost: ext_5v_boost { + compatible = "regulator-fixed"; + status = "disabled"; + regulator-name = "ext_5v_boost"; + gpio = <&pm8150b_gpios 12 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-enable-ramp-delay = <1600>; + + pinctrl-names = "default"; + pinctrl-0 = <&otg_vbus_boost_default>; + }; + + qcom,qbt1000 { + compatible = "qcom,qbt1000"; + clock-names = "core", "iface"; + clock-frequency = <25000000>; +/* qcom,ipc-gpio = <&tlmm 118 0>; */ + qcom,finger-detect-gpio = <&pm8150_gpios 1 0>; + status = "disabled"; + }; + + wdog: qcom,wdt@17c10000 { + qcom,bark-time = <20000>; + qcom,pet-time = <15000>; + }; +}; + + +&dsi_sharp_4k_dsc_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sharp_4k_dsc_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sim_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sim_vid { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_sim_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_sim_vid { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_nt35597_truly_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_nt35597_truly_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sim_dsc_375_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_dual_sim_dsc_375_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_nt35597_truly_dsc_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_nt35597_truly_dsc_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_sharp_1080_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_nt35695b_truly_fhd_cmd { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_nt35695b_truly_fhd_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_ss_notch_fhd_ea8074_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <1023>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_samsung_fhd_ea8076_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <2047>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_samsung_fhd_ea8076_f1_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <2047>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_samsung_fhd_ea8076_f1mp_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <2047>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_samsung_fhd_ea8076_f1p2_2_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <2047>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_samsung_fhd_ea8076_f1p2_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <2047>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_tianma_fhd_nt36672a_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,panel-mode-gpio = <&tlmm 7 0>; +// qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_ss_fhd_ea8076_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_external_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <2047>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_ss_fhd_ea8076_global_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_external_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <2047>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_visionox_fhd_r66456_f11_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_external_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; + qcom,mdss-dsi-bl-min-level = <256>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + //qcom,panel-mode-gpio = <&tlmm 7 0>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_j20s_36_02_0a_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_j20s_42_02_0b_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-bl-min-level = <1>; + qcom,mdss-dsi-bl-max-level = <4095>; + qcom,mdss-brightness-max-level = <4095>; + qcom,mdss-dsi-mode-sel-gpio-state = "single_port"; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_k82_42_02_0a_dual_cphy_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_k82_vddio>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <2047>; + qcom,mdss-brightness-max-level = <2047>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&dsi_k82_36_02_0b_dual_cphy_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_k82_vddio>; + qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; + qcom,mdss-dsi-mode-sel-gpio-state = "dual_port"; + qcom,mdss-dsi-bl-min-level = <2>; + qcom,mdss-dsi-bl-max-level = <2047>; + qcom,mdss-brightness-max-level = <2047>; + qcom,platform-te-gpio = <&tlmm 8 0>; + qcom,platform-reset-gpio = <&tlmm 6 0>; +}; + +&qupv3_se9_i2c { + status = "ok"; + nq@28 { + compatible = "qcom,nq-nci"; + reg = <0x28>; + qcom,nq-irq = <&tlmm 47 0x00>; + qcom,nq-ven = <&tlmm 103 0x00>; + qcom,nq-firm = <&tlmm 48 0x00>; + qcom,nq-clkreq = <&tlmm 113 0x00>; + //qcom,nq-esepwr = <&tlmm 42 0x00>; + interrupt-parent = <&tlmm>; + interrupts = <47 0>; + interrupt-names = "nfc_irq"; + pinctrl-names = "nfc_active", "nfc_suspend"; + pinctrl-0 = <&nfc_int_active &nfc_enable_active + &nfc_clk_req_active>; + pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend + &nfc_clk_req_suspend>; + }; +}; + +&dsi_sim_vid_display { + qcom,dsi-display-active; +}; + +&ufsphy_mem { + compatible = "qcom,ufs-phy-qmp-v4"; + + vdda-phy-supply = <&pm8150_l5>; + vdda-phy-always-on; + vdda-pll-supply = <&pm8150l_l3>; + vdda-phy-max-microamp = <90200>; + vdda-pll-max-microamp = <19000>; + + status = "ok"; +}; + +&ufshc_mem { + vdd-hba-supply = <&ufs_phy_gdsc>; + vdd-hba-fixed-regulator; + vcc-supply = <&pm8150_l10>; + vcc-voltage-level = <2950000 2960000>; + vccq2-supply = <&pm8150_s4>; + vcc-max-microamp = <750000>; + vccq2-max-microamp = <750000>; + + qcom,vddp-ref-clk-supply = <&pm8150_l9>; + qcom,vddp-ref-clk-max-microamp = <100>; + + status = "ok"; +}; + +&sdhc_2 { + vdd-supply = <&pm8150l_l9>; + qcom,vdd-voltage-level = <2950000 2960000>; + qcom,vdd-current-level = <200 800000>; + + vdd-io-supply = <&pm8150l_l6>; + qcom,vdd-io-voltage-level = <1808000 2960000>; + qcom,vdd-io-current-level = <200 22000>; + + pinctrl-names = "active", "sleep"; + pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &storage_cd>; + pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &storage_cd>; + + cd-gpios = <&tlmm 96 GPIO_ACTIVE_LOW>; + + status = "disabled"; +}; + +&spmi_debug_bus { + status = "ok"; +}; + +&pm8150l_wled { + qcom,string-cfg= <7>; + qcom,leds-per-string = <6>; + status = "ok"; +}; + +&pm8150l_lcdb { + status = "ok"; +}; + +&pm8150b_charger { + io-channels = <&pm8150b_vadc ADC_USB_IN_V_16>, + <&pm8150b_vadc ADC_USB_IN_I>, + <&pm8150b_vadc ADC_CHG_TEMP>; + io-channel-names = "usb_in_voltage", + "usb_in_current", + "chg_temp"; +}; + +&wil6210 { + status = "ok"; +}; + +&mhi_0 { + mhi,fw-name = "debug.mbn"; +}; + +&pcie0 { + qcom,no-l1-supported; +}; + +&usb1 { + /*extcon = <&extcon_usb1>;*/ + status = "ok"; +}; + +&usb2_phy1 { + status = "ok"; +}; + +&usb_qmp_phy { + status = "ok"; +}; + +&reserved_memory { + ramdump_fb_mem: ramdump_fb_region@af000000 { + compatible = "removed-dma-pool"; + no-map; + reg = <0 0xaf000000 0 0x1000000>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/crux/crux-audio-overlay.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/crux/crux-audio-overlay.dtsi new file mode 100644 index 000000000000..81046219851a --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/crux/crux-audio-overlay.dtsi @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "../common/sm8150-audio-overlay.dtsi" + +&snd_934x { + qcom,audio-routing = + "AIF4 VI", "MCLK", + "RX_BIAS", "MCLK", + "MADINPUT", "MCLK", + "hifi amp", "LINEOUT1", + "hifi amp", "LINEOUT2", + "AMIC2", "MIC BIAS2", + "MIC BIAS2", "Headset Mic", + "AMIC3", "MIC BIAS3", + "MIC BIAS3", "ANCRight Headset Mic", + "AMIC1", "MIC BIAS1", + "MIC BIAS1", "ANCLeft Headset Mic", + "AMIC4", "MIC BIAS3", + "MIC BIAS3", "ANCRight Headset Mic", + "AMIC5", "MIC BIAS4", + "MIC BIAS4", "Analog Mic5"; + + qcom,uart-audio-sw-gpio = <&sbu_uart_en>; + /* qcom,adc2-switch-gpio = <&adc2_switch_gpio>; */ + qcom,msm-mbhc-usbc-audio-supported = <1>; + qcom,fsa4476-gpio-support = <1>; + qcom,usbc-analog-en1_gpio = <&wcd_usbc_analog_en1_gpio>; + qcom,usbc-analog-en2_n_gpio = <&wcd_usbc_analog_en2n_gpio>; + qcom,usbc-analog-en2-gpio = <&tlmm 32 0>; + + pinctrl-names = "quat_mi2s_enable", "quat_mi2s_disable", + "quat_tdm_enable", "quat_tdm_disable"; + pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active &quat_mi2s_sd1_active>; + pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep &quat_mi2s_sd1_sleep>; + pinctrl-2 = <&quat_tdm_active &quat_tdm_dout_active>; + pinctrl-3 = <&quat_tdm_sleep &quat_tdm_dout_sleep>; +}; + +&soc { + sbu_uart_en: msm_cdc_pinctrl@25 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&sbu_uart_en_active>; + pinctrl-1 = <&sbu_uart_en_idle>; + }; + + adc2_switch_gpio: msm_cdc_pinctrl@142 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&adc2_switch_gpio_active>; + pinctrl-1 = <&adc2_switch_gpio_idle>; + }; + + wcd_usbc_analog_en1_gpio: msm_cdc_pinctrl@35 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wcd_usbc_analog_en1_active>; + pinctrl-1 = <&wcd_usbc_analog_en1_idle>; + }; + + wcd_usbc_analog_en2n_gpio: msm_cdc_pinctrl_usbc_audio_en2 { + compatible = "qcom,msm-cdc-pinctrl"; + pinctrl-names = "aud_active", "aud_sleep"; + pinctrl-0 = <&wcd_usbc_analog_en2n_active>; + pinctrl-1 = <&wcd_usbc_analog_en2n_idle>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/crux/crux-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/crux/crux-pinctrl.dtsi new file mode 100644 index 000000000000..1106980222e3 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/crux/crux-pinctrl.dtsi @@ -0,0 +1,796 @@ +/*for F1X pinctrl*/ + +&tlmm { + pmx_ts_active { + ts_active: ts_active { + mux { + pins = "gpio122", "gpio12", "gpio31"; + function = "gpio"; + }; + config { + pins = "gpio122", "gpio12", "gpio31"; + drive-strength = <8>; + bias-pull-up; + }; + }; + }; + + pmx_ts_int_suspend { + ts_int_suspend: ts_int_suspend { + mux { + pins = "gpio122"; + function = "gpio"; + }; + config { + pins = "gpio122"; + drive-strength = <2>; + bias-pull-down; + input-enable; + }; + }; + }; + + pmx_ts_reset_suspend { + ts_reset_suspend: ts_reset_suspend { + mux { + pins = "gpio12"; + function = "gpio"; + }; + config { + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + }; + + /* GPIO_119 : FP_RESET_N */ + msm_gpio_119: msm_gpio_119 { + mux { + pins = "gpio119"; + function = "gpio"; + }; + + config { + pins = "gpio119"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + /* GPIO_119 : FP_RESET_N, state device active*/ + msm_gpio_119_output_high: msm_gpio_119_output_high { + mux { + pins = "gpio119"; + function = "gpio"; + }; + + config { + pins = "gpio119"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + /* GPIO_6 : AW8697_RESET_N */ + msm_gpio_6: msm_gpio_6 { + mux { + pins = "gpio6"; + function = "gpio"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + /* GPIO_6 : AW8697_RESET_N, state device active*/ + msm_gpio_6_output_high: msm_gpio_6_output_high { + mux { + pins = "gpio6"; + function = "gpio"; + }; + + config { + pins = "gpio6"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + /* GPIO_27 : AW8697_INTERRUPT_N */ + msm_gpio_27: msm_gpio_27 { + mux { + pins = "gpio27"; + function = "gpio"; + }; + + config { + pins = "gpio27"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + }; + + txon_enable_active: txon_enable_active { + /* active state */ + mux { + pins = "gpio130"; + function = "gpio"; + }; + + config { + pins = "gpio130"; + drive-strength = <2>; + bias-pull-up; + output-high; + }; + }; + + txon_enable_suspend: txon_enable_suspend { + /* sleep state */ + mux { + pins = "gpio130"; + function = "gpio"; + }; + + config { + pins = "gpio130"; + drive-strength = <2>; + bias-disable; + bias-pull-down; + output-low; + }; + }; + nu_int_active: nu_int_active { + /* active state */ + mux { + pins = "gpio90"; + function = "gpio"; + }; + + config { + pins = "gpio90"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + }; + + nu_int_suspend: nu_int_suspend { + /* sleep state */ + mux { + pins = "gpio90"; + function = "gpio"; + }; + + config { + pins = "gpio90"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + }; + nu_sleep_active: nu_sleep_active { + /* active state */ + mux { + pins = "gpio7"; + function = "gpio"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; + bias-disable; + bias-pull-down; + output-low; + }; + }; + + nu_sleep_suspend: nu_sleep_suspend { + /* sleep state */ + mux { + pins = "gpio7"; + function = "gpio"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; + bias-disable; + bias-pull-down; + output-low; + }; + }; + + ln8282_enable_active: ln8282_enable_active { + mux { + pins = "gpio41"; + function = "gpio"; + }; + + config { + pins = "gpio41"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + ln8282_enable_suspend: ln8282_enable_suspend { + mux { + pins = "gpio41"; + function = "gpio"; + }; + + config { + pins = "gpio41"; + drive-strength = <2>; + bias-pull-up; + output-high; + }; + }; + + halo7221_enable_active: halo7221_enable_active { + mux { + pins = "gpio41"; + function = "gpio"; + }; + + config { + pins = "gpio41"; + drive-strength = <2>; + bias-pull-up; + output-high; + }; + }; + halo7221_enable_suspend: halo7221_enable_suspend { + mux { + pins = "gpio41"; + function = "gpio"; + }; + + config { + pins = "gpio41"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + idt { + idt_int_active: idt_int_active { + /* active state */ + mux { + pins = "gpio90"; + function = "gpio"; + }; + + config { + pins = "gpio90"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + idt_int_suspend: idt_int_suspend { + /* sleep state */ + mux { + pins = "gpio90"; + function = "gpio"; + }; + + config { + pins = "gpio90"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + idt_enable_active: idt_enable_active { + /* active state */ + mux { + pins = "gpio7"; + function = "gpio"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; + bias-disable; + bias-pull-down; + output-low; + }; + }; + + idt_enable_suspend: idt_enable_suspend { + /* sleep state */ + mux { + pins = "gpio7"; + function = "gpio"; + }; + + config { + pins = "gpio7"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + adc2_switch_gpio_ctrl { + adc2_switch_gpio_idle: adc2_switch_idle { + mux { + pins = "gpio134"; + function = "gpio"; + }; + config { + pins = "gpio134"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + adc2_switch_gpio_active: adc2_switch_active { + mux { + pins = "gpio134"; + function = "gpio"; + }; + config { + pins = "gpio134"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + vbus_disable { + vbus_disable_active: usb_vbus_active { + /* active state */ + mux { + pins = "gpio87"; + function = "gpio"; + }; + + config { + pins = "gpio87"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + output-high; + + }; + }; + + vbus_disable_suspend: usb_vbus_suspend { + mux { + pins = "gpio87"; + function = "gpio"; + }; + + config { + pins = "gpio87"; + drive-strength = <2>; /* 2 MA */ + bias-pull-down; + output-low; + }; + }; + }; + + sbu_uart_en_ctrl { + sbu_uart_en_idle: uart_audio_en_idle { + mux { + pins = "gpio25"; + function = "gpio"; + }; + config { + pins = "gpio25"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + sbu_uart_en_active: uart_audio_en_active { + mux { + pins = "gpio25"; + function = "gpio"; + }; + config { + pins = "gpio25"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + nfc { + nfc_int_active: nfc_int_active { + /* active state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_int_suspend: nfc_int_suspend { + /* sleep state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_active: nfc_enable_active { + /* active state */ + mux { + /* 36: NFC ENABLE 42:ESE Enable */ + pins = "gpio36", "gpio48"; + function = "gpio"; + }; + + config { + pins = "gpio36", "gpio48"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_suspend: nfc_enable_suspend { + /* sleep state */ + mux { + /* 36: NFC ENABLE 42:ESE Enable */ + pins = "gpio36", "gpio48"; + function = "gpio"; + }; + + config { + pins = "gpio36", "gpio48"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + + nfc_clk_req_active: nfc_clk_req_active { + /* active state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_clk_req_suspend: nfc_clk_req_suspend { + /* sleep state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + }; + + wcd_usbc_analog_en2n { + wcd_usbc_analog_en2n_idle: wcd_usbc_ana_en2n_idle { + mux { + pins = "gpio32"; + function = "gpio"; + }; + config { + pins = "gpio32"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + wcd_usbc_analog_en2n_active: wcd_usbc_ana_en2n_active { + mux { + pins = "gpio32"; + function = "gpio"; + }; + config { + pins = "gpio32"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + sde_dsi_active: sde_dsi_active { + mux { + pins = "gpio11"; + function = "gpio"; + }; + + config { + pins = "gpio11"; + drive-strength = <8>; /* 8 mA */ + bias-disable = <0>; /* no pull */ + }; + }; + sde_dsi_suspend: sde_dsi_suspend { + mux { + pins = "gpio11"; + function = "gpio"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + }; + }; +}; + + +//camera voltage start +&cam_sensor_mclk0_active { + /* MCLK0 */ + mux { + pins = "gpio13"; + function = "cam_mclk"; + }; + + config { + pins = "gpio13"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk0_suspend { + /* MCLK0 */ + mux { + pins = "gpio13"; + function = "cam_mclk"; + }; + + config { + pins = "gpio13"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk1_active { + /* MCLK1 */ + mux { + pins = "gpio14"; + function = "cam_mclk"; + }; + + config { + pins = "gpio14"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk1_suspend { + /* MCLK1 */ + mux { + pins = "gpio14"; + function = "cam_mclk"; + }; + + config { + pins = "gpio14"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk2_active { + /* MCLK2 */ + mux { + pins = "gpio15"; + function = "cam_mclk"; + }; + + config { + pins = "gpio15"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk2_suspend { + /* MCLK2 */ + mux { + pins = "gpio15"; + function = "cam_mclk"; + }; + + config { + pins = "gpio15"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk3_active { + /* MCLK3 */ + mux { + pins = "gpio16"; + function = "cam_mclk"; + }; + + config { + pins = "gpio16"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk3_suspend { + /* MCLK3 */ + mux { + pins = "gpio16"; + function = "cam_mclk"; + }; + + config { + pins = "gpio16"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_active_rear { + /* RESET REAR2 */ + mux { + pins = "gpio30", "gpio59"; + function = "gpio"; + }; + + config { + pins = "gpio30", "gpio59"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_rear { + /* RESET REAR2 */ + mux { + pins = "gpio30", "gpio59"; + function = "gpio"; + }; + + config { + pins = "gpio30", "gpio59"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +&cam_sensor_active_rear_aux { + /* RESET REARAUX, VANA REARAUX */ + mux { + pins = "gpio23", "gpio29"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio29"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_rear_aux { + /* RESET REARAUX, VANA REARAUX */ + mux { + pins = "gpio23", "gpio29"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio29"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +&cam_sensor_active_front { + /* RESET FRONT, VANA FRONT*/ + mux { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio54","gpio118"; + function = "gpio"; + }; + + config { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio54","gpio118"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_front { + /* RESET FRONT, VANA FRONT*/ + mux { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio54","gpio118"; + function = "gpio"; + }; + + config { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio54","gpio118"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +&cam_sensor_active_iris { + /* RESET ULTRA, VANA VDIG ULTRA*/ + mux { + pins = "gpio28","gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio28","gpio94"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_iris { + /* RESET ULTRA, VANA VDIG ULTRA*/ + mux { + pins = "gpio28","gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio28","gpio94"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +//camera voltage end diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/crux/crux-sm8150-camera-sensor-mtp.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/crux/crux-sm8150-camera-sensor-mtp.dtsi new file mode 100644 index 000000000000..fc4332cb1d7a --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/crux/crux-sm8150-camera-sensor-mtp.dtsi @@ -0,0 +1,537 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + reg = <0x00 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_rear_aux1: qcom,camera-flash@1 { + cell-index = <1>; + reg = <0x01 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_front: qcom,camera-flash@2 { + cell-index = <2>; + reg = <0x02 0x00>; + compatible = "qcom,camera-flash"; + wled-flash-support; + flash-source = <&wled_flash>; + torch-source = <&wled_torch>; + switch-source = <&wled_switch>; + status = "ok"; + }; + + led_flash_rear_aux2: qcom,camera-flash@3 { + cell-index = <3>; + reg = <0x03 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + camera_viodd_ldo: gpio-regulator@0 { + compatible = "regulator-fixed"; + reg = <0x00 0x00>; + regulator-name = "camera_viodd_ldo"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <135>; + enable-active-high; + gpio = <&tlmm 132 0>; + vin-supply = <&pm8150_s4>; + }; + + actuator_rear_regulator: gpio-regulator@1 { + compatible = "regulator-fixed"; + reg = <0x01 0x00>; + regulator-name = "actuator_rear_regulator"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <135>; + enable-active-high; + gpio = <&tlmm 24 0>; + vin-supply = <&pm8150l_bob>; + }; + + actuator_rear_aux_ldo: gpio-regulator@2 { + compatible = "regulator-fixed"; + reg = <0x02 0x00>; + regulator-name = "actuator_rear_aux_ldo"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <135>; + enable-active-high; + gpio = <&tlmm 152 0>; + vin-supply = <&pm8150l_bob>; + }; + + actuator_ultra_ldo: gpio-regulator@3 { + compatible = "regulator-fixed"; + reg = <0x03 0x00>; + regulator-name = "actuator_ultra_ldo"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <135>; + enable-active-high; + gpio = <&tlmm 95 0>; + vin-supply = <&pm8150l_bob>; + }; +}; + +&cam_cci1 { + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; + + actuator_rear: qcom,actuator@0 { + cell-index = <0>; + reg = <0x0>; + compatible = "qcom,actuator"; + cci-device = <0>; + cci-master = <1>; + cam_vaf-supply = <&actuator_rear_regulator>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + actuator_rear_aux: qcom,actuator@1 { + cell-index = <1>; + reg = <0x1>; + compatible = "qcom,actuator"; + cci-device = <1>; + cci-master = <1>; + cam_vaf-supply = <&actuator_rear_aux_ldo>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + actuator_front: qcom,actuator@2 { + cell-index = <2>; + reg = <0x2>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&actuator_rear_aux_ldo>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + actuator_ultra_rear: qcom,actuator@3 { + cell-index = <3>; + reg = <0x3>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&actuator_ultra_ldo>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + eeprom_rear: qcom,eeprom@0 { + cell-index = <0>; + reg = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150_s5>; + cam_vdig-supply = <&pm8150_l17>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 1904000 2856000 0>; + rgltr-max-voltage = <1800000 2040000 3008000 0>; + rgltr-load-current = <180000 112000 519000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 14 0>, + <&tlmm 30 0>, + <&tlmm 59 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0", + "CAM_VDIG0"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux: qcom,eeprom@1 { + cell-index = <1>; + reg = <0x1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150_s5>; + cam_vdig-supply = <&pm8150_l17>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 1904000 2856000 0>; + rgltr-max-voltage = <1800000 2040000 3008000 0>; + rgltr-load-current = <180000 112000 519000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 14 0>, + <&tlmm 30 0>, + <&tlmm 59 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0", + "CAM_VDIG0"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_ultra: qcom,eeprom@3 { + cell-index = <3>; + reg = <0x3>; + compatible = "qcom,eeprom"; + qcom,slave-addr = <0xa0>; + qcom,num-blocks = <1>; + qcom,page0 = <0 0 0 0 0 0 >; + qcom,poll0 = <0 0 0 0 0 0>; + qcom,mem0 = <8192 0x0 2 0 1 0>; + qcom,cam-power-seq-type = "cam_vio"; + qcom,cam-power-seq-val = <1>; + qcom,cam-power-seq-cfg-val = <1>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150_l17>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 2856000 0>; + rgltr-max-voltage = <1800000 4000000 3000000 0>; + rgltr-load-current = <180000 2000000 300000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active &cam_sensor_active_iris>; + pinctrl-1 = <&cam_sensor_mclk0_suspend &cam_sensor_suspend_iris>; + gpios = <&tlmm 13 0>,//mclk + <&tlmm 28 0>,//reset + <&tlmm 94 0>;//vana,vdig + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3", + "CAM_VDIG3"; + sensor-position = <0>; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_front: qcom,eeprom@2 { + cell-index = <2>; + reg = <0x2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150_l17>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk";//, "cam_bob"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 3000000 0>; + rgltr-max-voltage = <1800000 4000000 3000000 0>; + rgltr-load-current = <180000 2000000 30000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>,//mclk + <&tlmm 54 0>,//reset + //<&tlmm 132 0>,//vio + <&tlmm 118 0>;//vana,vidg + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + sensor-position = <1>; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + reg = <0x0>; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear>; + actuator-src = <&actuator_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150_s5>; + cam_vdig-supply = <&pm8150_l17>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 1904000 2856000 0>; + rgltr-max-voltage = <1800000 2040000 3008000 0>; + rgltr-load-current = <180000 112000 519000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 14 0>, + <&tlmm 30 0>, + <&tlmm 59 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0", + "CAM_VDIG0"; + sensor-mode = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + + qcom,cam-sensor@1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + reg = <0x1>; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear_aux>; + led-flash-src = <&led_flash_rear_aux1>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vdig-supply = <&pm8150_l17>; + cam_vana-supply = <&pm8150l_bob>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk";//, "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 3000000 0>; + rgltr-max-voltage = <1800000 4000000 3000000 0>; + rgltr-load-current = <180000 2000000 300000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 16 0>,//mclk + <&tlmm 23 0>,//reset + <&tlmm 29 0>;//vana,vdig + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1", + "CAM_VANA1"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + + qcom,cam-sensor@2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + reg = <0x02>; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + actuator-src = <&actuator_front>; + //led-flash-src = <&led_flash_front>; + cam_vio-supply = <&camera_viodd_ldo>; + //cam_bob-supply = <&pm8150l_bob>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150_l17>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk";//, "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 3000000 0>; + rgltr-max-voltage = <1800000 4000000 3000000 0>; + rgltr-load-current = <180000 2000000 30000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>,//mclk + <&tlmm 54 0>,//reset + //<&tlmm 132 0>,//vio + <&tlmm 118 0>;//vana,vidg + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2", + "CAM_VANA2"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + +qcom,cam-sensor@3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + reg = <0x03>; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_ultra_rear>; + eeprom-src = <&eeprom_rear_ultra>; + led-flash-src = <&led_flash_rear_aux2>; + cam_vio-supply = <&camera_viodd_ldo>; + //cam_bob-supply = <&pm8150l_bob>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150_l17>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk";//, "cam_bob"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 2856000 0>; + rgltr-max-voltage = <1800000 4000000 3000000 0>; + rgltr-load-current = <180000 2000000 300000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_iris>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_iris>; + gpios = <&tlmm 13 0>,//mclk + <&tlmm 28 0>,//reset + <&tlmm 94 0>;//vana,vdig + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3", + "CAM_VDIG3"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + +}; + +&cam_cci1 { + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci3_active>; + pinctrl-1 = <&cci3_suspend>; + gpios = <&tlmm 33 0>, + <&tlmm 34 0>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA3", + "CCI_I2C_CLK3"; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/crux/crux-sm8150.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/crux/crux-sm8150.dtsi new file mode 100644 index 000000000000..63bf537c35e6 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/crux/crux-sm8150.dtsi @@ -0,0 +1,996 @@ +/* +this file is for attribution only of andromeda +And public attribution of xiaomi platforms(like F1X and so and) +*/ + +#include "crux-pinctrl.dtsi" +#include "../common/xiaomi-sdx50-sm8150-common.dtsi" + +#include "crux-sm8150-camera-sensor-mtp.dtsi" + +&soc { + touch_vddio_vreg: touch_vddio_vreg { + compatible = "regulator-fixed"; + regulator-name = "disp_vddio_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + gpio = <&tlmm 31 0>; + }; + vdd_boost_vreg: vdd_boost_vreg { + compatible = "regulator-fixed"; + regulator-name = "vdd_boost_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-always-on; + gpio = <&pm8150b_gpios 5 0>; + }; + disp_vci_vreg: disp_vci_vreg { + compatible = "regulator-fixed"; + regulator-name = "disp_vci_vreg"; + start-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + gpio = <&tlmm 7 0>; + }; + + fingerprint_goodix { + compatible = "goodix,fingerprint"; + goodix,gpio-reset = <&tlmm 37 0x0>; + goodix,gpio-irq = <&tlmm 120 0x0>; + /* fp-gpio-pwr = <&tlmm 125 0>; */ + status = "ok"; + }; + fp_vdd_vreg: fp_vdd_vreg { + compatible = "regulator-fixed"; + regulator-name = "fp_vdd_vreg"; + startup-delay-us = <4000>; + enable-active-high; + gpio = <&tlmm 125 0>; + regulator-always-on; + }; + fingerprint_fpc { + status = "ok"; + compatible = "fpc,fpc1020"; + interrupt-parent = <&tlmm>; + interrupts = <118 0x0>; + fpc,gpio_irq = <&tlmm 118 0x0>; + /* fpc,enable-on-boot; */ + /* fpc,enable-wakeup; */ + + pinctrl-names = "fpc1020_reset_reset", + "fpc1020_reset_active"; + + pinctrl-0 = <&msm_gpio_119>; + pinctrl-1 = <&msm_gpio_119_output_high>; + }; + pcie0: qcom,pcie@1c00000 { + status = "disabled"; + }; + + disp_vci_vreg_f1x: disp_vci_vreg_f1x { + compatible = "regulator-fixed"; + regulator-name = "disp_vci_vreg"; + start-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + gpio = <&tlmm 21 0>; + }; + xiaomi_touch { + compatible = "xiaomi-touch"; + status = "ok"; + touch,name = "xiaomi-touch"; + }; + thermal_message: thermal-message { + board-sensor = "VIRTUAL-SENSOR"; + }; +}; + +&sde_dsi { + vcie-supply = <&disp_vci_vreg_f1x>; +}; + +&pm8150l_lpg { + qcom,lut-patterns = <0 1 2 3 4 5 7 9 11 13 15 + 13 11 9 7 5 4 3 2 1 0>; +}; + +&pwm_lpg1 { + qcom,lpg-chan-id = <1>; + qcom,ramp-step-ms = <100>; + qcom,ramp-pause-hi-count = <2>; + qcom,ramp-pause-lo-count = <2>; + qcom,ramp-low-index = <0>; + qcom,ramp-high-index = <20>; + qcom,ramp-from-low-to-high; + qcom,ramp-pattern-repeat; +}; + +&red_led { + label = "white"; +}; + +&green_led { + status = "disabled"; +}; + +&blue_led { + status = "disabled"; +}; + +&qcom_qbt1000 { + status = "disabled"; +}; + +&qcom_seecom { + reg = <0x87900000 0x3E00000>; +}; + +&qcom_smcinvoke { + reg = <0x87900000 0x3E00000>; +}; + +&qupv3_se4_i2c { + status = "ok"; + + fsa4480@43 { + status = "disabled"; + }; +}; + +&qupv3_se8_i2c { + status = "ok"; + /*smart PA*/ + tas2557@4c{ + compatible = "ti,tas2557"; + reg = <0x4c>; + //ti,cdc-reset-gpio = <&tlmm 59 0>; + ti,irq-gpio = <&tlmm 115 0>; + ti,i2s-bits = <16>; + ti,bypass-tmax = <0>; + }; +}; + +&qupv3_se17_i2c { + status = "ok"; + fts@49 { + compatible = "st,fts"; + reg = <0x49>; + interrupt-parent = <&tlmm>; + interrupts = <122 0x2008>; + pinctrl-names = "pmx_ts_active", "pmx_ts_suspend"; + pinctrl-0 = <&ts_active>; + pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; + avdd-supply = <&pm8150l_l1>; + vdd-supply = <&touch_vddio_vreg>; + fts,pwr-reg-name = "avdd"; + fts,bus-reg-name = "vdd"; + fts,irq-gpio = <&tlmm 122 0x2008>; + fts,irq-gpio-name = "fts_irq"; + fts,reset-gpio-enable; + fts,reset-gpio = <&tlmm 12 0x00>; + fts,reset-gpio-name = "fts_rst"; + fts,irq-flags = <0x2008>; /* IRQF_ONESHOT | IRQF_TRIGGER_LOW */ + fts,x-max = <1080>; + fts,y-max = <2340>; + fts,default-fw-name = "st_fts_f1x.ftb"; + fts,config-array-size = <1>; + fts,dump-click-count; + fts,touch-up-threshold-min = <40>; + fts,touch-up-threshold-max = <120>; + fts,touch-up-threshold-def = <80>; + fts,touch-tolerance-min = <5>; + fts,touch-tolerance-max = <35>; + fts,touch-tolerance-def = <25>; + fts,edgefilter-leftrigt-def = <45>; + fts,edgefilter-topbottom-def = <0>; + fts,edgefilter-top-ingamemode = <65>; + fts,edgefilter-bottom-ingamemode = <0>; + fts,edgefilter-area-step1 = <100>; + fts,edgefilter-area-step2 = <150>; + fts,edgefilter-area-step3 = <250>; + fts,touch-idletime-min = <0>; + fts,touch-idletime-max = <12750>; + fts,touch-idletime-def = <12450>; + fts,cfg_0 { + fts,tp-vendor = <0x48>; + fts,fw-name = "st_fts_f1x.ftb"; + fts,limit-name = "stm_fts_production_limits.csv"; + fts,clicknum-file-name = "fts+sdc"; + }; + }; + goodix@5d { + compatible = "goodix,gt9885"; + reg = <0x5d>; + status = "ok"; + interrupt-parent = <&tlmm>; + interrupts = <122 0x2800>; + vtouch-source-supply = <&vdd_boost_vreg>; + vtouch-supply = <&touch_vddio_vreg>; + iotouch-supply = <&pm8150l_l1>; + vtouch-load = <600000>; + pinctrl-names = "pmx_ts_active","pmx_ts_suspend"; + pinctrl-0 = <&ts_active>; + pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; + goodix,reset-gpio = <&tlmm 12 0x0>; + goodix,irq-gpio = <&tlmm 122 0x2800>; + goodix,irq-flags = <2>; /* 1:trigger rising, 2:trigger falling;*/ + goodix,panel-max-id = <10>; + goodix,panel-max-x = <1079>; + goodix,panel-max-y = <2339>; + goodix,panel-max-w = <127>; + goodix,panel-max-p = <127>; + goodix,panel-max-fod = <127>; + /* goodix,panel-key-map = <158 172 217>; */ /*KEY_BACK, KEY_HOMEPAGE, KEY_SEARCH*/ + goodix,power-on-delay-us = <300000>; /*300ms*/ + goodix,power-off-delay-us = <5000>; + goodix,cfg-name = "goodix_gt9885_cfg_f1u.bin"; + /* goodix,swap-axis; */ + /* goodix,pen-enable; */ + /* goodix,key-of-pen = <331 332>; */ /*BTN_STYLUS, BTN_STYLUS2*/ + sensor1 { + normal-cfg = [ + ]; + goodix,fw-name = "goodix_gt9885_fw_f1u.bin"; + }; + }; +}; + +&pm8150b_fg { + qcom,battery-data = <&mtp_batterydata>; + qcom,rapid-soc-dec-en; + qcom,fg-sys-term-current = <(-300)>; + qcom,fg-cutoff-voltage = <3400>; + qcom,fg-cutoff-current = <200>; + qcom,fg-empty-voltage = <3100>; + qcom,fg-batt-temp-delta = <6>; + qcom,fg-force-load-profile; + /* ESR fast calibration */ + qcom,fg-esr-timer-chg-fast = <0 7>; + qcom,fg-esr-timer-dischg-fast = <0 7>; + qcom,fg-esr-timer-chg-slow = <0 96>; + qcom,fg-esr-timer-dischg-slow = <0 96>; + qcom,fg-esr-cal-soc-thresh = <26 230>; + qcom,fg-esr-cal-temp-thresh = <10 40>; +}; + +&vendor { + mtp_batterydata: qcom,battery-data { + qcom,batt-id-range-pct = <15>; + #include "../common/battery/batterydata-F1-atl-3300mah.dtsi" + #include "../common/battery/batterydata-F1-coslight-3300mah.dtsi" + #include "../common/battery/fg-gen4-batterydata-alium-3600mah.dtsi" + }; +}; + +&pm8150_gpios { + vbus_disable { + vbus_disable_default: vbus_disable_default { + pins = "gpio10"; + function = "normal"; + output-low; + power-source = <1>; /* 1.8V input supply */ + }; + }; +}; + +&pm8150b_charger { + qcom,cp-mode = <2>; + qcom,sec-charger-config = <1>; + qcom,usb-icl-ua = <4000000>; + qcom,fcc-max-ua = <8000000>; + qcom,fv-max-uv = <4480000>; + qcom,dc-icl-ua = <500000>; + qcom,auto-recharge-vbat-mv = <4380>; + qcom,step-charging-enable; + qcom,sw-jeita-enable; + qcom,chg-term-src = <1>; + qcom,chg-term-current-ma = <(-220)>; + qcom,chg-term-base-current-ma = <50>; + qcom,thermal-mitigation = <3000000 2800000 2600000 2400000 2200000 2100000 2000000 + 1800000 1600000 1500000 1400000 1200000 1000000 900000 + 800000 500000>; + qcom,thermal-mitigation-icl + = <2800000 2700000 2600000 2400000 2400000 2400000 2400000 + 2400000 2400000 2100000 1900000 1700000 1500000 1300000 + 1000000 750000>; + qcom,thermal-mitigation-dcp + = <1800000 1800000 1800000 1800000 1800000 1800000 1800000 + 1800000 1800000 1700000 1600000 1400000 1200000 1100000 + 1100000 1000000>; + qcom,thermal-mitigation-qc2 + = <1500000 1500000 1500000 1500000 1450000 1400000 1350000 + 1300000 1300000 1200000 1000000 900000 850000 750000 + 650000 500000>; + qcom,thermal-fcc-qc3-normal + = <3200000 3000000 2800000 2600000 2500000 2400000 2300000 + 2200000 2100000 1800000 1600000 1400000 1200000 1000000 + 750000 750000>; + qcom,thermal-fcc-qc3-cp + = <3600000 3600000 3600000 3600000 3200000 3200000 3200000 + 3200000 3100000 2800000 2400000 2200000 2000000 1300000 + 750000 700000>; + qcom,thermal-fcc-qc3-classb-cp + = <4800000 4700000 4600000 4500000 4400000 4200000 4200000 + 4200000 4000000 3600000 3400000 3200000 3000000 2200000 + 1000000 700000>; + qcom,thermal-mitigation-pd-base + = <4000000 3600000 3200000 2800000 2800000 2800000 2800000 + 2800000 2800000 2400000 2400000 2000000 1600000 1300000 + 1000000 500000>; + qcom,thermal-fcc-pps-cp + = <8000000 7500000 7000000 6500000 6000000 5500000 5350000 + 4500000 4000000 3500000 3000000 3000000 3000000 2000000 + 1500000 100000>; + qcom,thermal-mitigation-dc + = <3100000 2200000 1800000 1600000 1400000 1200000 1100000 + 1000000 900000 800000 700000 600000 500000 400000 + 300000 200000>; + qcom,thermal-mitigation-epp + = <1200000 1200000 1200000 1100000 1100000 1000000 1000000 + 1000000 900000 700000 700000 600000 500000 400000 + 300000 200000>; + qcom,thermal-mitigation-bpp-qc3 + = <1400000 1300000 1200000 1200000 1100000 1000000 900000 + 800000 700000 700000 700000 600000 500000 400000 + 300000 200000>; + qcom,thermal-mitigation-bpp-qc2 + = <1100000 1100000 1100000 1100000 1100000 1000000 1000000 + 1000000 700000 700000 700000 600000 500000 400000 + 300000 200000>; + qcom,thermal-mitigation-bpp + = <700000 700000 700000 700000 700000 700000 700000 + 700000 700000 600000 600000 500000 400000 300000 + 200000 200000>; + qcom,thermal-mitigation-dc-20w + = <2200000 1400000 1300000 1200000 700000 600000 500000 + 400000 400000 400000 400000 400000 400000 400000 + 400000 400000>; + + io-channels = <&pm8150b_vadc ADC_MID_CHG_DIV6>, + <&pm8150b_vadc ADC_USB_IN_V_16>, + <&pm8150b_vadc ADC_USB_IN_I>, + <&pm8150b_vadc ADC_SBUx>, + <&pm8150b_vadc ADC_VPH_PWR>, + <&pm8150b_vadc ADC_CHG_TEMP>, + <&pm8150b_vadc ADC_AMUX_THM3_PU2>; + + io-channel-names = "mid_voltage", + "usb_in_voltage", + "usb_in_current", + "sbux_res", + "vph_voltage", + "chg_temp", + "conn_therm"; + + qcom,battery-data = <&mtp_batterydata>; + dpdm-supply = <&usb2_phy0>; + qcom,distinguish-qc-class-ab; + qcom,wd-bark-time-secs = <16>; + qcom,support-wireless; + qcom,support-conn-therm; + qcom,support-ext-fg; + + vbus-disable-gpio = <&pm8150_gpios 10 GPIO_ACTIVE_HIGH>; + + pinctrl-names = "default"; + pinctrl-0 = <&vbus_disable_default>; +}; + +&smb1390 { + pinctrl-names = "default"; + pinctrl-0 = <&smb_stat_default>; + status = "ok"; +}; + +&smb1390_charger { + io-channels = <&pm8150b_vadc ADC_AMUX_THM2>; + io-channel-names = "smb1390_therm"; + qcom,parallel-output-mode = <2>; + status = "ok"; +}; + +&smb1390_slave { + status = "ok"; +}; + +&smb1390_slave_charger { + status = "ok"; +}; + + + +&ext_5v_boost { + status = "ok"; +}; + +&pm8150b_pdphy { + vbus-supply = <&ext_5v_boost>; + mi,pd_curr_limit = <1>; + mi,pd_max_curr_limit = <4000000>; +}; + +&usb0 { + dwc3@a600000 { + usb-phy = <&usb2_phy0>, <&usb_nop_phy>; + maximum-speed = "high-speed"; + }; +}; + +&usb2_phy0 { + qcom,param-override-seq = + <0x33 0x70 + 0x2c 0x74>; +}; + +&usb_qmp_dp_phy { + status = "disabled"; +}; + +&usb1 { + extcon = <&extcon_usb1>; + status = "disabled"; +}; + +&usb2_phy1 { + status = "disabled"; +}; + +&usb_qmp_phy { + status = "disabled"; +}; + +&pm8150b_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + wp_therm { + reg = ; + label = "wp_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + conn_therm { + reg = ; + label = "conn_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + chg_sbux { + reg = ; + label = "chg_sbux"; + qcom,pre-scaling = <1 3>; + }; + + mid_chg_div6 { + reg = ; + label = "chg_mid"; + qcom,pre-scaling = <1 6>; + }; + + usb_in_i_uv { + reg = ; + label = "usb_in_i_uv"; + qcom,pre-scaling = <1 1>; + }; + + usb_in_v_div_16 { + reg = ; + label = "usb_in_v_div_16"; + qcom,pre-scaling = <1 16>; + }; +}; + +&pm8150_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + xo_therm { + reg = ; + label = "xo_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + quiet_therm { + reg = ; + label = "quiet_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm0 { + reg = ; + label = "pa_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150l_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + cam_therm0 { + reg = ; + label = "cam_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + cam_therm1 { + reg = ; + label = "cam_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm1 { + reg = ; + label = "pa_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150b_adc_tm { + wp_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150_adc_tm { + xo_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + quiet_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150l_adc_tm { + cam_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + cam_therm1 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm1 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&thermal_zones { + wp_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150b_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + xo_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_XO_THERM_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + quiet_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + pa_therm0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cam_therm0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cam_therm1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + pa_therm1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM3_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; +}; + +&qupv3_se4_i2c { + status = "ok"; + bq27z561@55 { + compatible = "ti,bq27z561"; + reg = <0x55>; + bq,charge-full-design = <4000000>; + bq,recharge-voltage = <4380>; + bq,soc_decimal_rate = < + 0 38 + 10 35 + 20 33 + 30 33 + 40 33 + 50 33 + 60 33 + 70 30 + 80 25 + 90 20 + 95 10 + 99 5 >; + bq,cold_thermal_seq = < + 1 0 100 1700 + 2 (-300) 0 1000 >; + }; + + fsa4480@43 { + status = "disabled"; + }; + + cs35l41@40 { + #sound-dai-cells = <1>; + compatible = "cirrus,cs35l41"; + cs,cdc-reset-gpio = <&tlmm 89 0x01>; + reg = <0x40>; + pinctrl-names = "cs35l41_irq_default"; + pinctrl-0 = <&cs35l41_int_default>; + interrupt-parent = <&tlmm>; + interrupts = <10 8>; + + cirrus,temp-warn_threshold = <3>; + cirrus,boost-peak-milliamp = <4000>; + cirrus,boost-ind-nanohenry = <1000>; + cirrus,boost-cap-microfarad = <15>; + cirrus,gpio-config2 { + cirrus,gpio-src-select = <0x4>; + cirrus,gpio-output-enable; + }; + /* + VA-supply = <&dummy_vreg>; + VP-supply = <&dummy_vreg>; + interrupt-parent = <&tlmm>; + interrupts = <11 8>; + reset-gpios = <&tlmm 7 0x01>; + VA-supply = <&pm8998_s4>; + VP-supply = <&audio_vsys>; + cirrus,boost-peak-milliamp = <4500>; + cirrus,boost-ind-nanohenry = <1000>; + cirrus,boost-cap-microfarad = <15>; + cirrus,gpio-config2 { + cirrus,gpio-src-select = <0x4>; + cirrus,gpio-output-enable; + }; + */ + }; +}; + +&dsi_samsung_fhd_ea8076_f1s_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_external_supply>; + /* IRQF_ONESHOT | IRQF_TRIGGER_FALLING */ + qcom,esd-err-irq-gpio = <&tlmm 101 0x2002>; +}; + +//&dsi_visionox_fhd_rm692a9_f1u_cmd { +// qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_external_supply>; + /* IRQF_ONESHOT | IRQF_TRIGGER_FALLING */ +// qcom,esd-err-irq-gpio = <&tlmm 101 0x2002>; +//}; + +#include "../common/ir.dtsi" + +&qupv3_se7_i2c { + status = "ok"; + aw8697_haptic@5A { + compatible = "awinic,aw8697_haptic"; + reg = <0x5A>; + reset-gpio = <&tlmm 6 0>; + irq-gpio = <&tlmm 27 0>; + vib_mode = < 0 >; /*mode: RAM mode->0; CONT mode -> 1*/ + vib_f0_pre = < 1700 >; + vib_f0_cali_percen = < 7 >; + vib_cont_drv_lev = < 88 >; + vib_cont_drv_lvl_ov = < 88 >; + vib_cont_td = < 0xf06c >; + vib_cont_zc_thr = < 0x08f8 >; /*hq 0x08F8 */ + vib_cont_num_brk = < 3 >; + vib_f0_coeff = < 260 >; /*Don't modify it 2.604167*/ + vib_f0_trace_parameter = < 9 3 1 31 >; + vib_bemf_config = < 0 0x08 0x03 0xf8 >; + vib_sw_brake = < 0x2c >; + vib_tset = < 0x12 >; + vib_r_spare = < 0x68 >; + vib_bstdbg = < 0x30 0xeb 0xd4 0 0 0 >; + vib_effect_id_boundary = < 10 >; + vib_effect_max = < 170 >; + vib_trig_config = < 0 1 0 1 2 + 0 1 0 1 2 + 0 1 0 1 2 >; + vib_bst_vol_default = < 0x1b >; + vib_bst_vol_ram = < 0x1b >; + vib_bst_vol_rtp = < 0x16 >; + vib_rtp_time = < 20 20 20 20 20 20 20 20 20000 15000 + 15000 20000 25000 15000 30000 25000 20000 20000 20000 20000 + 20000 20000 20000 20000 20000 20000 20000 20000 20000 20000 + 20000 20000 20000 20000 20000 20000 20000 20000 20000 20000 + 20000 20000 20000 20000 20000 20000 20000 20000 20000 20000 + 20000 20000 20000 20000 20000 20000 20000 20000 20000 20000 + 20000 20000 20000 20000 20000 20000 20000 20000 20000 20000 + 20000 20000 20000 20000 20000 20000 20000 20000 20000 20000 + 20000 20000 20000 20000 20000 20000 20000 20000 20000 20000 + 20000 20000 20000 20000 20000 20000 20000 20000 20000 20000 + 20000 20000 20000 20000 20000 20000 20000 20000 20000 20000 + 20000 20000 20000 20000 20000 20000 20000 20000 20000 20000 + 20000 20000 20000 20000 20000 20000 20000 20000 20000 20000 + 20000 20000 20000 20000 20000 20000 20000 20000 20000 20000 + 20000 20000 20000 20000 20000 20000 20000 20000 20000 20000 + 20000 20000 20000 20000 20000 20000 20000 20000 20000 20000 + 20000 20000 20000 20000 20000 20000 20000 20000 20000 20000 + 20000 20000 20000 20000 20000 >; + pinctrl-names = "aw8697_reset_reset","aw8697_reset_active","aw8697_interrupt_active"; + pinctrl-0 = <&msm_gpio_6>; + pinctrl-1 = <&msm_gpio_6_output_high>; + pinctrl-2 = <&msm_gpio_27>; + status = "ok"; + wf_0 { + /*CLICK*/ + qcom,effect-id = <0>; + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <20000>; + }; + wf_1 { + /*DOUBLE CLICK*/ + qcom,effect-id = <1>; + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 3e]; + qcom,wf-brake-pattern = [03 01 00 00]; + qcom,wf-play-rate-us = <20000>; + }; + wf_2 { + /*TICK*/ + qcom,effect-id = <2>; + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <20000>; + }; + wf_3 { + /*THUD*/ + qcom,effect-id = <3>; + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <20000>; + }; + wf_4 { + /*POP*/ + qcom,effect-id = <4>; + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <28000>; + }; + wf_5 { + /*HEAVY CLICK*/ + qcom,effect-id = <5>; + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 7e 7e]; + qcom,wf-brake-pattern = [03 03 01 00]; + qcom,wf-play-rate-us = <20000>; + }; + wf_6 { + /*id 6*/ + qcom,effect-id = <6>; + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <20000>; + }; + wf_7 { + /*id 7*/ + qcom,effect-id = <7>; + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <20000>; + }; + wf_8 { + /*id 8*/ + qcom,effect-id = <8>; + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <20000>; + }; + wf_9 { + /*id 9*/ + qcom,effect-id = <9>; + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <20000>; + }; + }; + + rx1619@61 { + compatible = "nuvolta,wl_charger_rx1619"; + reg = <0x61>; + rx,irq_gpio = <&tlmm 90 0x00>; + rx,tx_on_gpio = <&tlmm 130 0x00>; + rx,wpc-det = <&pm8150b_gpios 7 GPIO_ACTIVE_HIGH>; + rx,enable = <&tlmm 7 0x00>; + pinctrl-names = "default","nu_active","nu_suspend"; + pinctrl-0 = <&power_good_default>; + pinctrl-1 = <&nu_int_active &txon_enable_active &nu_sleep_active>; + pinctrl-2 = <&nu_int_suspend &txon_enable_suspend &nu_sleep_suspend>; + }; + rx1619@67 { + compatible = "nuvolta,wl_rx1619_trim"; + reg = <0x67>; + }; + ln8282@55 { + compatible = "lionsemi,ln8282"; + reg = <0x55>; + ln,enable = <&tlmm 41 0x00>; + ln,irq = <&tlmm 92 0x00>; + pinctrl-names = "ln8282_active","ln8282_suspend"; + pinctrl-0 = <&ln8282_enable_active>; + pinctrl-1 = <&ln8282_enable_suspend>; + }; + idtp9220: idtp9220@3b { + compatible = "idt,p9220"; + reg = <0x3b>; + idt,irq = <&tlmm 90 0x00>; + idt,enable = <&tlmm 7 0x00>; + idt,reverse-enable = <&tlmm 130 0x00>; + idt,wpc-det = <&pm8150b_gpios 7 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default", "idt_active", "idt_suspend"; + pinctrl-0 = <&power_good_default>; + pinctrl-1 = <&idt_int_active &idt_enable_active>; + pinctrl-2 = <&idt_int_suspend &idt_enable_suspend>; + }; + halo7221@1b { + compatible = "halo7221,halo7221_cp"; + reg = <0x1b>; + halo,enable = <&tlmm 41 0x00>; + pinctrl-names = "halo7221_active","halo7221_suspend"; + pinctrl-0 = <&halo7221_enable_active>; + pinctrl-1 = <&halo7221_enable_suspend>; + }; +}; + +&ssc_sensors { + qcom,firmware-name = "slpi_cr"; +}; + +&ufshc_mem { + vdd-hba-supply = <&ufs_phy_gdsc>; + vdd-hba-fixed-regulator; + vcc-supply = <&pm8150_l10>; + vcc-voltage-level = <2504000 2950000>; + vcc-low-voltage-sup; + vccq-supply = <&pm8150_l9>; + vccq2-supply = <&pm8150_s4>; + vcc-max-microamp = <750000>; + vccq-max-microamp = <700000>; + vccq2-max-microamp = <750000>; + + qcom,vddp-ref-clk-supply = <&pm8150_l9>; + qcom,vddp-ref-clk-max-microamp = <100>; + + status = "ok"; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/nabu/nabu-audio-overlay.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/nabu/nabu-audio-overlay.dtsi new file mode 100644 index 000000000000..859a74896ba7 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/nabu/nabu-audio-overlay.dtsi @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "../common/sm8150-audio-overlay.dtsi" + +&snd_934x { + qcom,audio-routing = + "AIF4 VI", "MCLK", + "RX_BIAS", "MCLK", + "MADINPUT", "MCLK", + "hifi amp", "LINEOUT1", + "hifi amp", "LINEOUT2", + "AMIC2", "MIC BIAS2", + "MIC BIAS2", "Headset Mic", + "AMIC1", "MIC BIAS3", + "MIC BIAS3", "ANCRight Headset Mic", + "AMIC3", "MIC BIAS4", + "MIC BIAS4", "Analog Mic5"; + + qcom,wsa-max-devs = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; + qcom,msm-mbhc-usbc-audio-supported = <1>; + qcom,msm-mbhc-hs-mic-max-threshold-mv = <2600>; + qcom,msm-mbhc-hs-mic-min-threshold-mv = <50>; + fsa4480-i2c-handle = <&fsa4480>; + pinctrl-names = "quat_mi2s_enable", "quat_mi2s_disable", + "quat_tdm_enable", "quat_tdm_disable"; + pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active &quat_mi2s_sd1_active>; + pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep &quat_mi2s_sd1_sleep>; + pinctrl-2 = <&quat_tdm_active &quat_tdm_dout_active &quat_tdm_din_active>; + pinctrl-3 = <&quat_tdm_sleep &quat_tdm_dout_sleep &quat_tdm_din_sleep>; +}; + +&wcd934x_cdc { + qcom,cdc-micbias1-mv = <1800>; + qcom,cdc-micbias2-mv = <2750>; + qcom,cdc-micbias3-mv = <1800>; + qcom,cdc-micbias4-mv = <1800>; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/nabu/nabu-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/nabu/nabu-pinctrl.dtsi new file mode 100644 index 000000000000..9b468dee741c --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/nabu/nabu-pinctrl.dtsi @@ -0,0 +1,904 @@ +/*for xiaomi pinctrl*/ +&tlmm { + /* display_panel_enp +5V */ + display_panel_enp_default: display_panel_enp_default { + mux { + pins = "gpio114"; + function = "gpio"; + }; + config { + pins = "gpio114"; + drive-strength = <8>; + bias-disable = <0>; + output-high; + }; + }; + + /* display_panel_enn -5V */ + display_panel_enn_default: display_panel_enn_default { + mux { + pins = "gpio115"; + function = "gpio"; + }; + config { + pins = "gpio115"; + drive-strength = <8>; + bias-disable = <0>; + output-high; + }; + }; + + qupv3_se18_spi_pins: qupv3_se18_spi_pins { + qupv3_se18_spi_active: qupv3_se18_spi_active { + mux { + pins = "gpio23", "gpio24", "gpio25"; + function = "qup18"; + }; + + config { + pins = "gpio23", "gpio24", "gpio25"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se18_spi_sleep: qupv3_se18_spi_sleep { + mux { + pins = "gpio23", "gpio24", "gpio25"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio24", "gpio25"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + + bq2597x { + bq2597x_master_int_default: bq2597x_master_int_default { + /* active state */ + mux { + /* GPIO 36 is used for bq25970 master ic interrupt usage */ + pins = "gpio36"; + function = "gpio"; + }; + + config { + pins = "gpio36"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + bq2597x_master_int_suspend: bq2597x_master_int_suspend { + /* sleep state */ + mux { + /* GPIO 36 is used for bq25970 master ic interrupt usage */ + pins = "gpio36"; + function = "gpio"; + }; + + config { + pins = "gpio36"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + }; + + onewire_gpio_active: onewire_gpio_active { + mux { + pins = "gpio5"; + function = "gpio"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; + bias-pull-up; /* No PULL */ + }; + }; + + onewire_gpio_sleep: onewire_gpio_sleep { + mux { + pins = "gpio5"; + function = "gpio"; + }; + + config { + pins = "gpio5"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + onewire_gpio_slave_active: onewire_gpio_slave_active { + mux { + pins = "gpio10"; + function = "gpio"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; + bias-pull-up; /* No PULL */ + }; + }; + + onewire_gpio_slave_sleep: onewire_gpio_slave_sleep { + mux { + pins = "gpio10"; + function = "gpio"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pmx_ts_active { + ts_active: ts_active { + mux { + pins = "gpio122", "gpio12"; + function = "gpio"; + }; + config { + pins = "gpio122", "gpio12"; + drive-strength = <8>; + bias-pull-up; + }; + }; + }; + + pmx_ts_int_suspend { + ts_int_suspend: ts_int_suspend { + mux { + pins = "gpio122"; + function = "gpio"; + }; + config { + pins = "gpio122"; + drive-strength = <2>; + bias-pull-down; + input-enable; + }; + }; + }; + + pmx_ts_reset_suspend { + ts_reset_suspend: ts_reset_suspend { + mux { + pins = "gpio12"; + function = "gpio"; + }; + config { + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + }; + + adc2_switch_gpio_ctrl { + adc2_switch_gpio_idle: adc2_switch_idle { + mux { + pins = "gpio142"; + function = "gpio"; + }; + config { + pins = "gpio142"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + adc2_switch_gpio_active: adc2_switch_active { + mux { + pins = "gpio142"; + function = "gpio"; + }; + config { + pins = "gpio142"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + hall { + hall_intr3_active: hall_intr3_active { + /* active state */ + mux { + pins = "gpio101"; + function = "gpio"; + }; + + config { + pins = "gpio101"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + hall_intr3_suspend: hall_intr3_suspend { + /* sleep state */ + mux { + pins = "gpio101"; + function = "gpio"; + }; + + config { + pins = "gpio101"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + hall_intr4_active: hall_intr4_active { + /* active state */ + mux { + pins = "gpio134"; + function = "gpio"; + }; + + config { + pins = "gpio134"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + hall_intr4_suspend: hall_intr4_suspend { + /* sleep state */ + mux { + pins = "gpio134"; + function = "gpio"; + }; + + config { + pins = "gpio134"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + }; + + idt { + idt_int_active: idt_int_active { + /* active state */ + mux { + pins = "gpio95"; + function = "gpio"; + }; + + config { + pins = "gpio95"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + idt_int_suspend: idt_int_suspend { + /* sleep state */ + mux { + pins = "gpio95"; + function = "gpio"; + }; + + config { + pins = "gpio95"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + txon_enable_active: txon_enable_active { + /* active state */ + mux { + pins = "gpio3"; + function = "gpio"; + }; + + config { + pins = "gpio3"; + drive-strength = <16>; + bias-disable; + bias-pull-down; + output-low; + }; + }; + + txon_enable_suspend: txon_enable_suspend { + /* sleep state */ + mux { + pins = "gpio3"; + function = "gpio"; + }; + + config { + pins = "gpio3"; + drive-strength = <16>; + bias-disable; + bias-pull-down; + output-low; + }; + }; + + power_good_active: power_good_active { + /* active state */ + mux { + pins = "gpio94"; + function = "gpio"; + }; + config { + pins = "gpio94"; + drive-strength = <2>; /* 2 MA */ + bias-pull-down; + input-enable; + }; + + }; + + power_good_suspend: power_good_suspend { + /* active state */ + mux { + pins = "gpio94"; + function = "gpio"; + }; + config { + pins = "gpio94"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + reverse_booset_enable_active: reverse_booset_enable__active { + /* active state */ + mux { + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <16>; + bias-pull-down; + output-low; + }; + }; + + reverse_booset_enable_suspend: reverse_booset_enable_suspend { + /* sleep state */ + mux { + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <16>; + bias-pull-down; + output-low; + }; + }; + }; + + sbu_uart_en_ctrl { + sbu_uart_en_idle: uart_audio_en_idle { + mux { + pins = "gpio25"; + function = "gpio"; + }; + config { + pins = "gpio25"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + sbu_uart_en_active: uart_audio_en_active { + mux { + pins = "gpio25"; + function = "gpio"; + }; + config { + pins = "gpio25"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + + pcie1 { + pcie1_wake_default: pcie1_wake_default { + mux { + pins = "gpio114"; + function = "gpio"; + }; + + config { + pins = "gpio114"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + nfc { + nfc_int_active: nfc_int_active { + /* active state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_int_suspend: nfc_int_suspend { + /* sleep state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_active: nfc_enable_active { + /* active state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio48", "gpio102"; + function = "gpio"; + }; + + config { + pins = "gpio48", "gpio102"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_suspend: nfc_enable_suspend { + /* sleep state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio48", "gpio102"; + function = "gpio"; + }; + + config { + pins = "gpio48", "gpio102"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + + nfc_clk_req_active: nfc_clk_req_active { + /* active state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_clk_req_suspend: nfc_clk_req_suspend { + /* sleep state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + }; + cam_sensor_active_macro: cam_sensor_active_macro { + /* RESET macro */ + mux { + pins = "gpio27", "gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio27", "gpio94"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_macro: cam_sensor_suspend_macro { + /* RESET MACRO */ + mux { + pins = "gpio27", "gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio27", "gpio94"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + test_mode_ctrl_irq { + ant_sub_ctrl_irq: ant_sub_ctrl_irq { + mux { + pins = "gpio81"; + function = "gpio"; + }; + config { + pins = "gpio81"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + }; + ant_top_ctrl_irq: ant_top_ctrl_irq { + mux { + pins = "gpio133"; + function = "gpio"; + }; + config { + pins = "gpio133"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + }; + }; + + xiaomi_keyboard_mcu { + xiaomi_keyboard_suspend: xiaomi_keyboard_suspend { + mux { + pins = "gpio4"; + function = "gpio"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; + bias-pull-down; + }; + }; + + xiaomi_keyboard_active: xiaomi_keyboard_active { + mux { + pins = "gpio4"; + function = "gpio"; + }; + + config { + pins = "gpio4"; + drive-strength = <8>; + bias-pull-up; + }; + }; + }; + +}; + +//camera voltage start +&cam_sensor_mclk0_active { + /* MCLK0 */ + mux { + pins = "gpio13"; + function = "cam_mclk"; + }; + + config { + pins = "gpio13"; + bias-disable; /* No PULL */ + drive-strength = <6>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk0_suspend { + /* MCLK0 */ + mux { + pins = "gpio13"; + function = "cam_mclk"; + }; + + config { + pins = "gpio13"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <6>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk1_active { + /* MCLK1 */ + mux { + pins = "gpio14"; + function = "cam_mclk"; + }; + + config { + pins = "gpio14"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk1_suspend { + /* MCLK1 */ + mux { + pins = "gpio14"; + function = "cam_mclk"; + }; + + config { + pins = "gpio14"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk2_active { + /* MCLK2 */ + mux { + pins = "gpio15"; + function = "cam_mclk"; + }; + + config { + pins = "gpio15"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk2_suspend { + /* MCLK2 */ + mux { + pins = "gpio15"; + function = "cam_mclk"; + }; + + config { + pins = "gpio15"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk3_active { + /* MCLK3 */ + mux { + pins = "gpio16"; + function = "cam_mclk"; + }; + + config { + pins = "gpio16"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk3_suspend { + /* MCLK3 */ + mux { + pins = "gpio16"; + function = "cam_mclk"; + }; + + config { + pins = "gpio16"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_active_rear { + /* RESET REAR2 */ + mux { + pins = "gpio28", "gpio11"; + function = "gpio"; + }; + + config { + pins = "gpio28", "gpio11"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_rear { + /* RESET REAR2 */ + mux { + pins = "gpio28", "gpio11"; + function = "gpio"; + }; + + config { + pins = "gpio28", "gpio11"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +&cam_sensor_active_rear_aux { + /* RESET REARAUX, VANA REARAUX */ + mux { + pins = "gpio23", "gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio94"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_rear_aux { + /* RESET REARAUX, VANA REARAUX */ + mux { + pins = "gpio23", "gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio94"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +&cam_sensor_active_front { + /* RESET FRONT, VANA FRONT*/ + mux { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio30", "gpio31"; + function = "gpio"; + }; + + config { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio30", "gpio31"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_front { + /* RESET FRONT, VANA FRONT*/ + mux { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio30", "gpio31"; + function = "gpio"; + }; + + config { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio30", "gpio31"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +&cam_sensor_active_iris { + /* RESET ULTRA, VANA VDIG ULTRA*/ + mux { + pins = "gpio28","gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio28","gpio94"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_iris { + /* RESET ULTRA, VANA VDIG ULTRA*/ + mux { + pins = "gpio28","gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio28","gpio94"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; +&cam_sensor_active_macro { + /* RESET ULTRA, VANA VDIG ULTRA*/ + mux { + pins = "gpio27","gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio27","gpio94"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_macro { + /* RESET ULTRA, VANA VDIG ULTRA*/ + mux { + pins = "gpio27","gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio27","gpio94"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + + +//camera voltage end + + +&fsa_usbc_ana_en { + mux { + pins = "gpio84"; + function = "gpio"; + }; + + config { + pins = "gpio84"; + drive-strength = <2>; + bias-disable; + output-low; + }; +}; + + + diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/nabu/nabu-sm8150-camera-sensor-mtp.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/nabu/nabu-sm8150-camera-sensor-mtp.dtsi new file mode 100644 index 000000000000..a1f282917a65 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/nabu/nabu-sm8150-camera-sensor-mtp.dtsi @@ -0,0 +1,244 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +&cam_cci1 { + status = "disable"; +}; + +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + reg = <0x00 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0>; + torch-source = <&pm8150l_torch0>; + switch-source = <&pm8150l_switch0>; + status = "ok"; + }; + + actuator_rear_regulator: gpio-regulator@0 { + compatible = "regulator-fixed"; + reg = <0x00 0x00>; + regulator-name = "actuator_rear_regulator"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <135>; + enable-active-high; + gpio = <&tlmm 29 0>; + vin-supply = <&pm8150l_bob>; + }; + + camera_wide_vdig_ldo: gpio-regulator@1 { + compatible = "regulator-fixed"; + reg = <0x01 0x00>; + regulator-name = "camera_wide_vdig_ldo"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <135>; + enable-active-high; + gpio = <&pm8150l_gpios 3 0>; + vin-supply = <&pm8150_s4>; + }; + + camera_front_vdig_ldo: gpio-regulator@2 { + compatible = "regulator-fixed"; + reg = <0x02 0x00>; + regulator-name = "camera_front_vdig_ldo"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <135>; + enable-active-high; + gpio = <&tlmm 12 0>; + vin-supply = <&pm8150_s4>; + }; +}; + +&cam_cci0 { + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; + + actuator_rear: qcom,actuator@0 { + cell-index = <0>; + reg = <0x0>; + compatible = "qcom,actuator"; + cci-device = <0>; + cci-master = <0>; + cam_vaf-supply = <&actuator_rear_regulator>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + eeprom_rear: qcom,eeprom@0 { + cell-index = <0>; + reg = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8150l_l1>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio","cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 13 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK0"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_front: qcom,eeprom@2 { + cell-index = <2>; + reg = <0x2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8150l_l1>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio","cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 14 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK2"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + //ov13b10 + qcom,cam-sensor@0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + reg = <0x0>; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear>; + actuator-src = <&actuator_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&pm8150l_l1>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&camera_wide_vdig_ldo>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana","cam_vdig", "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 1200000 0>; + rgltr-max-voltage = <1800000 4000000 1200000 0>; + rgltr-load-current = <180000 2000000 100000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 13 0>, + <&tlmm 28 0>, + <&tlmm 11 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0", + "CAM_VANA0"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + //ov8856 + qcom,cam-sensor@2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + reg = <0x2>; + csiphy-sd-index = <1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&pm8150l_l1>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&camera_wide_vdig_ldo>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 1200000 0>; + rgltr-max-voltage = <1800000 4000000 1200000 0>; + rgltr-load-current = <180000 2000000 100000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 14 0>, + <&tlmm 30 0>, + <&tlmm 31 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2", + "CAM_VANA2"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; + diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/nabu/nabu-sm8150.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/nabu/nabu-sm8150.dtsi new file mode 100644 index 000000000000..2a542400b64e --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/nabu/nabu-sm8150.dtsi @@ -0,0 +1,1242 @@ +/* +this file is for attribution only of vayu +And public attribution of xiaomi platforms(like J20S and so and) +*/ +#include "nabu-pinctrl.dtsi" +#include "../common/xiaomi-sm8150-common.dtsi" +#include "nabu-sm8150-camera-sensor-mtp.dtsi" + +&ufshc_mem { + vcc-voltage-level = <2504000 2950000>; + vcc-low-voltage-sup; + qcom,vccq-parent-supply = <&pm8150l_s8>; + qcom,vccq-parent-max-microamp = <210000>; + vccq-supply = <&pm8150_l9>; + vccq-max-microamp = <700000>; + wb-support; +}; + +#include "../common/smb1390.dtsi" + + + +&pm8150b_fg { + qcom,battery-data = <&nabu_batterydata>; + qcom,rapid-soc-dec-en; + qcom,soc-scale-mode-en; + qcom,five-pin-battery; + qcom,soc-hi-res; + qcom,soc_decimal_rate = < + 0 38 + 10 35 + 20 33 + 30 33 + 40 33 + 50 33 + 60 33 + 70 30 + 80 25 + 90 20 + 95 10 >; + qcom,ki-coeff-low-chg = <315>; + qcom,ki-coeff-med-chg = <183>; + qcom,fg-sys-term-current = <(-500)>; + qcom,fg-ffc-sys-term-current = <(-1530)>; + qcom,fg-cutoff-voltage = <3400>; + qcom,fg-cutoff-current = <200>; + qcom,fg-empty-voltage = <3100>; + qcom,soc-scale-vbatt-mv = <3600>; + qcom,fg-batt-temp-delta = <6>; + qcom,fg-force-load-profile; + qcom,shutdown-delay-enable; + /* ESR fast calibration */ + qcom,fg-esr-timer-chg-fast = <0 7>; + qcom,fg-esr-timer-dischg-fast = <0 96>; + qcom,fg-esr-timer-chg-slow = <0 96>; + qcom,fg-esr-timer-dischg-slow = <0 96>; + qcom,fg-esr-cal-soc-thresh = <26 230>; + qcom,fg-esr-cal-temp-thresh = <10 40>; + qcom,ki-coeff-chg-med-hi-thresh-ma = <1000>; + qcom,ki-coeff-chg-low-med-thresh-ma = <500>; + qcom,ffc-ki-coeff-chg-med-hi-thresh-ma = <3900>; + qcom,ffc-ki-coeff-chg-low-med-thresh-ma = <3500>; +}; + +&pm8150b_charger { + qcom,sec-charger-config = <0>; + qcom,usb-icl-ua = <3000000>; + qcom,fcc-max-ua = <5900000>; + qcom,fv-max-uv = <4470000>; + qcom,non-fcc-fv-max-uv = <4450000>; + //qcom,chg-warm-th= <450>; + //qcom,chg-cool-th= <150>; + qcom,auto-recharge-soc = <99>; + qcom,chg-term-src = <1>; + qcom,chg-term-current-ma = <(-400)>; + mi,use-bq-pump; + qcom,usbpd-phandle = <&pm8150b_pdphy>; + qcom,battery-data = <&nabu_batterydata>; + //mi,six-pin-step-chg-params = <4250000 6000000 + // 4450000 5400000 + // 4480000 4000000>; + //mi,six-pin-step-chg; + //mi,six-pin-soc-th = <45>; + mi,fcc-batt-unverify-ua = <2000000>; + mi,support-ffc; + qcom,support-wireless; + mi,support-qc3p5-without-smb; + qcom,disable-suspend-on-collapse; + qcom,thermal-mitigation = <3000000 2800000 2600000 2400000 2200000 2100000 2000000 + 1800000 1600000 1500000 1400000 1200000 1000000 900000 + 800000 500000>; + qcom,thermal-mitigation-icl + = <2800000 2700000 2600000 2400000 2200000 2100000 2000000 + 1800000 1600000 1500000 1400000 1300000 1200000 1100000 + 950000 750000>; + qcom,thermal-mitigation-dcp + = <1800000 1800000 1800000 1800000 1800000 1800000 1800000 + 1800000 1800000 1700000 1600000 1400000 1200000 1100000 + 1100000 1000000>; + qcom,thermal-mitigation-qc2 + = <1500000 1500000 1500000 1500000 1450000 1400000 1350000 + 1300000 1150000 1100000 1000000 900000 850000 750000 + 650000 500000>; + qcom,thermal-fcc-qc3-normal + = <3200000 3000000 2800000 2600000 2500000 2400000 2300000 + 2200000 2100000 1800000 1600000 1400000 1200000 1000000 + 750000 750000>; + qcom,thermal-fcc-pps-cp + = <6000000 5700000 5475000 5250000 5025000 4800000 4575000 + 4350000 4100000 3500000 3000000 2400000 2000000 1500000 + 1000000 500000>; + qcom,thermal-fcc-qc3-cp + = <4800000 4600000 4400000 4200000 4000000 3800000 3600000 + 3400000 3000000 2600000 2400000 2200000 2000000 1300000 + 1000000 300000>; + qcom,thermal-fcc-qc3-classb-cp + = <5100000 4700000 4300000 4000000 3600000 3500000 3400000 + 3400000 3400000 3200000 2500000 2200000 2000000 1300000 + 1000000 300000>; + qcom,thermal-mitigation-pd-base + = <3000000 2800000 2600000 2400000 2200000 2000000 1800000 + 1600000 1600000 1400000 1200000 1100000 1050000 1000000 + 950000 500000>; + qcom,thermal-mitigation-voice + = <6000000 2200000 2200000 1000000 1000000 800000 800000 + 800000 800000 700000 700000 600000 600000 600000 + 500000 400000>; + + + io-channels = <&pm8150b_vadc ADC_MID_CHG_DIV6>, + <&pm8150b_vadc ADC_USB_IN_V_16>, + <&pm8150b_vadc ADC_USB_IN_I>, + <&pm8150b_vadc ADC_SBUx>, + <&pm8150b_vadc ADC_VPH_PWR>, + <&pm8150b_vadc ADC_CHG_TEMP>; + io-channel-names = "mid_voltage", + "usb_in_voltage", + "usb_in_current", + "sbux_res", + "vph_voltage", + "chg_temp"; +// qcom,battery-data = <&mtp_batterydata>; + dpdm-supply = <&usb2_phy0>; + qcom,distinguish-qc-class-ab; + qcom,lpd-disable; + qcom,sw-jeita-enable; +// qcom,step-charging-enable; + qcom,wd-bark-time-secs = <16>; +}; + +&ext_5v_boost { + status = "disable"; +}; + +&pm8150b_pdphy { + mi,non-qcom-pps-ctrl; +}; + +&qupv3_se4_i2c { + #address-cells = <1>; + #size-cells = <0>; + status = "ok"; + bq25970-standalone@66 { + compatible = "ti,bq2597x-standalone"; + reg = <0x66>; + interrupt-parent = <&tlmm>; + interrupts = <36 0x2002>; + pinctrl-names = "default"; + pinctrl-0 = <&bq2597x_master_int_default &bq2597x_master_int_suspend>; + + /*ti,bq2597x,bat-ovp-disable;*/ + ti,bq2597x,bat-ovp-alarm-disable; + ti,bq2597x,bat-ocp-disable; + ti,bq2597x,bat-ocp-alarm-disable; + ti,bq2597x,bat-ucp-alarm-disable; + ti,bq2597x,bat-ucp-disable; + + /*ti,bq2597x,bus-ovp-alarm-disable; + ti,bq2597x,bus-ocp-disable; + ti,bq2597x,bus-ocp-alarm-disable;*/ + ti,bq2597x,bat-therm-disable; + ti,bq2597x,bus-therm-disable; + ti,bq2597x,die-therm-disable; + + ti,bq2597x,bat-ovp-threshold = <4550>; + ti,bq2597x,bat-ovp-alarm-threshold = <4525>; + //ti,bq2597x,bat-ocp-threshold = <8000>; + //ti,bq2597x,bat-ocp-alarm-threshold = <7500>; + + ti,bq2597x,bus-ovp-threshold = <12000>; + ti,bq2597x,bus-ovp-alarm-threshold = <11000>; + ti,bq2597x,bus-ocp-threshold = <3750>; + ti,bq2597x,bus-ocp-alarm-threshold = <3500>; + + //ti,bq2597x,bat-ucp-alarm-threshold = <2000>; + + ti,bq2597x,bat-therm-threshold = <0x15>;/*4.1%*/ + ti,bq2597x,bus-therm-threshold = <0x15>;/*4.1%*/ + ti,bq2597x,die-therm-threshold = <145>; + + ti,bq2597x,ac-ovp-threshold = <14>; + //ti,bq2597x,sense-resistor-mohm = <2>; + + }; + + ln8000_charger@51 { + compatible = "lionsemi,ln8000"; + reg = <0x51>; + /* bank */ + //irq-gpios = <&tlmm 55 0x2002>; + + //interrupt-parent = <&tlmm>; + //interrupts = <55 0x2002>; + //pinctrl-names = "default"; + //pinctrl-0 = <&bq2597x_int_default &bq2597x_int_suspend>; + ln8000_charger,irq_index = <296>; + /* device configuration */ + ln8000_charger,bat-ovp-threshold = <4560>; + ln8000_charger,bat-ovp-alarm-threshold = <4525>; + ln8000_charger,bus-ovp-threshold = <13000>; + ln8000_charger,bus-ovp-alarm-threshold = <11000>; + ln8000_charger,bus-ocp-threshold = <3750>; + ln8000_charger,bus-ocp-alarm-threshold = <3500>; + ln8000_charger,ntc-alarm-cfg = <226>; + /* protection enable/disable flags + * vbat-ovp-disable + * vbat-reg-disable + * iin-ocp-disable + * iin-reg-disable + * tbus-mon-disable + * tbat-mon-disable + * tdie-prot-disable + * tdie-reg-disable + * revcurr-prot-disable + */ + ln8000_charger,tdie-prot-disable; + ln8000_charger,tbus-mon-disable; + ln8000_charger,tbat-mon-disable; + ln8000_charger,iin-ocp-disable; + ln8000_charger,iin-reg-disable; + ln8000_charger,tdie-reg-disable; + ln8000_charger,vbat-reg-disable; + }; +}; + +&qupv3_se17_i2c { + status = "ok"; + idtp9418: idtp9418@3b { + compatible = "idt,p9418"; + status = "ok"; + reg = <0x3b>; + idt,irq = <&tlmm 95 0x00>; + hall,int3 = <&tlmm 101 0x00>; + hall,int4 = <&tlmm 134 0x00>; + idt,reverse-enable = <&tlmm 3 0x00>; + idt,reverse-booset-enable = <&tlmm 47 0x00>; + idt,wpc-det = <&tlmm 94 GPIO_ACTIVE_HIGH>; + pinctrl-names = "idt_active", "idt_suspend"; + pinctrl-0 = <&idt_int_active &hall_intr3_active &hall_intr4_active &txon_enable_active &power_good_active &reverse_booset_enable_active>; + pinctrl-1 = <&idt_int_suspend &hall_intr3_suspend &hall_intr4_suspend &txon_enable_suspend &power_good_suspend &reverse_booset_enable_suspend>; + }; +}; + +&soc { + cp_qc30 { + compatible = "xiaomi,cp-qc30"; + status = "ok"; + mi,qc3-bat-volt-max = <4420>; + mi,qc3-bat-curr-max = <3600>; + mi,qc3-bus-volt-max = <12000>; + mi,qc3-bus-curr-max = <2100>; + mi,qc3-battery-warm-th = <450>; + mi,use-qcom-gauge; + mi,support-qc3p5-without-smb; + //mi,cp-sec-enable; + }; + + usbpd_pm { + compatible = "xiaomi,usbpd-pm"; + status = "ok"; + mi,pd-bat-volt-max = <4500>; + mi,pd-ffc-bat-volt-max = <4480>; + mi,pd-bat-curr-max = <6000>; + mi,pd-bus-volt-max = <12000>; + mi,pd-bus-curr-max = <3000>; + mi,pd-non-ffc-bat-volt-max = <4450>; + mi,pd-bus-curr-compensate = <0>; + mi,pd-battery-warm-th = <450>; + mi,use-qcom-gauge; + //mi,cp-sec-enable; + }; + + qcom,rmnet-ipa { + status = "disabled"; + }; + + ipa_hw: qcom,ipa@1e00000 { + status = "disabled"; + }; + + onewire_gpio: onewire_gpio { + compatible = "xiaomi,onewire_gpio"; + label = "xm_onewire"; + xiaomi,version = <1>; + xiaomi,ow_gpio = <&tlmm 5 0x00>; + mi,onewire-gpio-cfg-addr = <0x03D05000 0x4>; + xiaomi,gpio_number = <5>; + pinctrl-names = "onewire_active", "onewire_sleep"; + pinctrl-0 = <&onewire_gpio_active>; + pinctrl-1 = <&onewire_gpio_sleep>; + status = "ok"; + }; + + onewire_slave_gpio: onewire_slave_gpio { + compatible = "xiaomi,onewire_slave_gpio"; + label = "xm_slave_onewire"; + xiaomi,version = <1>; + xiaomi,ow_gpio = <&tlmm 10 0x00>; + mi,onewire-gpio-cfg-addr = <0x0390A000 0x4>; + xiaomi,gpio_number = <10>; + pinctrl-names = "onewire_slave_active", "onewire_slave_sleep"; + pinctrl-0 = <&onewire_gpio_slave_active>; + pinctrl-1 = <&onewire_gpio_slave_sleep>; + status = "ok"; + }; + + nabu_batterydata: qcom,battery-data { + qcom,batt-id-range-pct = <15>; + #include "../common/battery/fg-gen4-batterydata-nabu-sunwoda-8720mah.dtsi" + }; + + maxim_ds28e16: maxim_ds28e16 { + compatible = "maxim,ds28e16"; + label = "max_ds28e16"; + maxim,version = <1>; + status = "ok"; + }; + + maxim_ds28e16_slave: maxim_ds28e16_slave { + compatible = "maxim,ds28e16_slave"; + label = "max_ds28e16_slave"; + maxim,version = <1>; + status = "ok"; + }; +}; + +&qupv3_se7_i2c { + status = "ok"; + /*speaker UL*/ + cs35l41@43 { + #sound-dai-cells = <1>; + compatible = "cirrus,cs35l41"; + reset-gpios = <&tlmm 92 0>; + reg = <0x43>; + interrupt-parent = <&tlmm>; + interrupts = <93 8>; + cirrus,temp-warn_threshold = <3>; + cirrus,boost-peak-milliamp = <4000>; + cirrus,boost-ind-nanohenry = <1000>; + cirrus,boost-cap-microfarad = <15>; + cirrus,asp-sdout-hiz = <3>; + cirrus,fast-switch = "TL-music.txt", "TL-voice.txt", "TL-voip.txt", "TL-misc.txt"; + cirrus,gpio-config2 { + cirrus,gpio-src-select = <0x4>; + cirrus,gpio-output-enable; + }; + }; + + /*speaker UR*/ + cs35l41@41 { + #sound-dai-cells = <1>; + compatible = "cirrus,cs35l41"; + reset-gpios = <&tlmm 92 0>; + reg = <0x41>; + interrupt-parent = <&tlmm>; + interrupts = <90 8>; + cirrus,temp-warn_threshold = <3>; + cirrus,boost-peak-milliamp = <4000>; + cirrus,boost-ind-nanohenry = <1000>; + cirrus,boost-cap-microfarad = <15>; + cirrus,asp-sdout-hiz = <3>; + cirrus,fast-switch = "TR-music.txt", "TR-voice.txt", "TR-voip.txt", "TR-misc.txt"; + cirrus,gpio-config2 { + cirrus,gpio-src-select = <0x4>; + cirrus,gpio-output-enable; + }; + }; + + /*speaker DL*/ + cs35l41@42 { + #sound-dai-cells = <1>; + compatible = "cirrus,cs35l41"; + reset-gpios = <&tlmm 92 0>; + reg = <0x42>; + interrupt-parent = <&tlmm>; + interrupts = <91 8>; + cirrus,temp-warn_threshold = <3>; + cirrus,boost-peak-milliamp = <4000>; + cirrus,boost-ind-nanohenry = <1000>; + cirrus,boost-cap-microfarad = <15>; + cirrus,asp-sdout-hiz = <3>; + cirrus,fast-switch = "BL-music.txt", "BL-voice.txt", "BL-voip.txt", "BL-misc.txt"; + cirrus,gpio-config2 { + cirrus,gpio-src-select = <0x4>; + cirrus,gpio-output-enable; + }; + }; + + /*speaker DR*/ + cs35l41@40 { + #sound-dai-cells = <1>; + compatible = "cirrus,cs35l41"; + reset-gpios = <&tlmm 92 0>; + reg = <0x40>; + interrupt-parent = <&tlmm>; + interrupts = <81 8>; + cirrus,temp-warn_threshold = <3>; + cirrus,boost-peak-milliamp = <4000>; + cirrus,boost-ind-nanohenry = <1000>; + cirrus,boost-cap-microfarad = <15>; + cirrus,asp-sdout-hiz = <3>; + cirrus,fast-switch = "BR-music.txt", "BR-voice.txt", "BR-voip.txt", "BR-misc.txt"; + cirrus,gpio-config2 { + cirrus,gpio-src-select = <0x4>; + cirrus,gpio-output-enable; + }; + }; +}; + + + +&smb1390 { + status = "disabled"; +}; + +&smb1390_charger { + status = "disabled"; +}; + +&usb0 { + dwc3@a600000 { + usb-phy = <&usb2_phy0>, <&usb_nop_phy>; + maximum-speed = "high-speed"; + }; +}; + +&usb2_phy0 { + qcom,param-override-seq = + <0x04 0x70 + 0x2c 0x74>; +}; + +&usb_qmp_dp_phy { + status = "disabled"; +}; + +&usb1 { + status = "ok"; + dwc3@a800000 { + dr_mode = "host"; + }; +}; + +&usb2_phy1 { + status = "ok"; +}; + +&usb_qmp_phy { + status = "ok"; +}; + +&soc { + touch_vddio_vreg: touch_vddio_vreg { + compatible = "regulator-fixed"; + regulator-name = "disp_vddio_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + gpio = <&tlmm 100 0>; + }; + + vdd_boost_vreg: vdd_boost_vreg { + compatible = "regulator-fixed"; + regulator-name = "vdd_boost_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-always-on; + gpio = <&pm8150b_gpios 5 0>; + }; + + xiaomi_touch { + compatible = "xiaomi-touch"; + status = "ok"; + touch,name = "xiaomi-touch"; + }; + + testing_mode { + compatible = "modem,testing-mode"; + status-gpio = <&tlmm 81 0x00>, + <&tlmm 133 0x00>; + debounce-time = <30>; + pinctrl-names = "default"; + pinctrl-0 = <&ant_sub_ctrl_irq &ant_top_ctrl_irq>; + }; +}; + +&soc { + display_panel_enp: display_gpio_regulator_enp { + compatible = "regulator-fixed"; + regulator-name = "display_panel_enp"; + regulator-min-microvolt = <5500000>; + regulator-max-microvolt = <5500000>; + regulator-enable-ramp-delay = <233>; + gpio = <&tlmm 114 0>; + enable-active-high; + regulator-boot-on; + pinctrl-names = "default"; + pinctrl-0 = <&display_panel_enp_default>; + }; + display_panel_enn: display_gpio_regulator_enn { + compatible = "regulator-fixed"; + regulator-name = "display_panel_enn"; + regulator-min-microvolt = <5500000>; + regulator-max-microvolt = <5500000>; + regulator-enable-ramp-delay = <233>; + gpio = <&tlmm 115 0>; + enable-active-high; + regulator-boot-on; + pinctrl-names = "default"; + pinctrl-0 = <&display_panel_enn_default>; + }; + xiaomi_keyboard { + compatible = "xiaomi,keyboard"; + pinctrl-names = "pm_kb_active", "pm_kb_suspend"; + pinctrl-0 = <&xiaomi_keyboard_active>; + pinctrl-1 = <&xiaomi_keyboard_suspend>; + xiaomi-keyboard,rst-gpio = <&tlmm 49 0x00>; + xiaomi-keyboard,in-irq-gpio = <&tlmm 41 0x2001>; + xiaomi-keyboard,vdd-gpio = <&tlmm 82 0x00>; + status = "ok"; + }; +}; + +/* K82 Backlight Driver SE 11 pin mappings */ +&qupv3_se0_i2c { + status = "ok"; + ktz8866@11 { + compatible = "ktz,ktz8866"; + status = "ok"; + reg = <0x11>; + ktz8866,hwen-gpio = <&tlmm 27 0x00>; + ktz8866,enp-gpio = <&tlmm 114 0x00>; + ktz8866,enn-gpio = <&tlmm 115 0x00>; + }; +}; +&pm8150a_amoled { + status = "disabled"; +}; + +&pm8150l_lcdb { + status = "disabled"; +}; + +&pm8150l_wled { + status = "disabled"; + qcom,string-cfg = <7>; +}; + +&sde_dsi { + enp-supply = <&display_panel_enp>; + enn-supply = <&display_panel_enn>; +}; + +&dsi_k82_42_02_0a_dual_cphy_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_k82_vddio>; +}; + +&dsi_k82_36_02_0b_dual_cphy_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply_k82_vddio>; +}; + +&red_led { + label = "white"; +}; + +&green_led { + status = "disabled"; +}; + +&blue_led { + status = "disabled"; +}; + +&dsi_k82_42_02_0a_dual_cphy_vid_display { + qcom,dsi-display-active; +}; + +&dsi_sim_vid_display { + /delete-property/ qcom,dsi-display-active; +}; + +/*Touch SPI state init*/ +&qupv3_se18_spi_active { + mux { + pins = "gpio23", "gpio24", "gpio25"; + function = "qup18"; + }; + + config { + pins = "gpio23", "gpio24", "gpio25"; + drive-strength = <6>; + bias-disable; + }; +}; + +&qupv3_se18_spi_sleep { + mux { + pins = "gpio23", "gpio24", "gpio25"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio24", "gpio25"; + drive-strength = <6>; + bias-disable; + }; +}; + +/*IC int pin, rst pin init*/ +&tlmm { + ts_mux { + ts_int_active: ts_int_active { + mux { + pins = "gpio39"; + function = "gpio"; + }; + + config { + pins = "gpio39"; + drive-strength = <16>; + bias-pull-down; + }; + }; +/* + ts_reset_active: ts_reset_active { + mux { + pins = "gpio12"; + function = "gpio"; + }; + + config { + pins = "gpio12"; + drive-strength = <16>; + bias-pull-up; + }; + }; +*/ + ts_cs_active: ts_cs_active { + mux { + pins = "gpio26"; + function = "qup18"; + }; + + config { + pins = "gpio26"; + drive-strength = <6>; + bias-disable; + }; + }; + + ts_cs_suspend: ts_cs_suspend { + mux { + pins = "gpio26"; + function = "gpio"; + }; + + config { + pins = "gpio26"; + drive-strength = <6>; + bias-pull-down; + output-low; + }; + }; + }; +}; + +&ts_int_suspend { + mux { + pins = "gpio39"; + function = "gpio"; + }; + + config { + pins = "gpio39"; + drive-strength = <16>; + bias-disable; + input-enable; + }; +}; + +/* +&ts_reset_suspend { + mux { + pins = "gpio12"; + function = "gpio"; + }; + + config { + pins = "gpio12"; + drive-strength = <16>; + bias-disable; + }; +}; +*/ + +&qupv3_se18_spi { + status = "ok"; + pinctrl-0 = <&qupv3_se18_spi_active>; + pinctrl-1 = <&qupv3_se18_spi_sleep>; + novatek@0 { + compatible = "novatek,NVT-ts-spi"; + reg = <0>; //Same as CS ID + status = "ok"; + + pinctrl-names = "pmx_ts_active", "pmx_ts_suspend"; + pinctrl-0 = <&ts_cs_active>; + pinctrl-1 = <&ts_cs_suspend>; + spi-max-frequency = <9600000>; //4800000,9600000,15000000,19200000 + //novatek,reset-gpio = <&tlmm 75 0x00>; + novatek,irq-gpio = <&tlmm 39 0x2001>; + + novatek,pen-support; + novatek,wgp-stylus; + + /* 523 */ + novatek,swrst-n8-addr = <0x03F0FE>; + novatek,spi-rd-fast-addr = <0x03F310>; + + /* MP */ + novatek,mp-support-dt; + /*new touch faeature default param*/ + novatek,touch-game-param-config1 = <2 2 1 2 1>; + novatek,touch-game-param-config2 = <2 2 2 2 1>; + novatek,touch-game-param-config3 = <2 2 3 2 1>; + + novatek,config-array-size = <2>; + novatek,cfg_0 { + novatek,display-maker = <0x42>; + novatek,fw-name = "novatek_nt36523_fw01.bin"; + novatek,mp-name = "novatek_nt36523_mp01.bin"; + }; + novatek,cfg_1 { + novatek,display-maker = <0x36>; + novatek,fw-name = "novatek_nt36523_fw02.bin"; + novatek,mp-name = "novatek_nt36523_mp02.bin"; + }; + + }; +}; + + +&qupv3_se9_i2c { + status = "ok"; + nq@28 { + compatible = "qcom,nq-nci"; + reg = <0x28>; + qcom,nq-irq = <&tlmm 47 0x00>; + qcom,nq-ven = <&tlmm 102 0x00>; + qcom,nq-firm = <&tlmm 48 0x00>; + qcom,nq-clkreq = <&tlmm 113 0x00>; + //qcom,nq-esepwr = <&tlmm 42 0x00>; + interrupt-parent = <&tlmm>; + interrupts = <47 0>; + interrupt-names = "nfc_irq"; + pinctrl-names = "nfc_active", "nfc_suspend"; + pinctrl-0 = <&nfc_int_active &nfc_enable_active + &nfc_clk_req_active>; + pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend + &nfc_clk_req_suspend>; + }; +}; + +#include "../common/ir.dtsi" + +&pm8150l_lpg { + qcom,lut-patterns = <0 1 2 3 4 5 7 9 11 13 15 + 13 11 9 7 5 4 3 2 1 0>; +}; + +&pwm_lpg1 { + qcom,lpg-chan-id = <1>; + qcom,ramp-step-ms = <100>; + qcom,ramp-pause-hi-count = <2>; + qcom,ramp-pause-lo-count = <2>; + qcom,ramp-low-index = <0>; + qcom,ramp-high-index = <20>; + qcom,ramp-from-low-to-high; + qcom,ramp-pattern-repeat; +}; + +&pm8150b_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + wp_therm { + reg = ; + label = "wp_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + conn_therm { + reg = ; + label = "conn_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + chg_sbux { + reg = ; + label = "chg_sbux"; + qcom,pre-scaling = <1 3>; + }; + + mid_chg_div6 { + reg = ; + label = "chg_mid"; + qcom,pre-scaling = <1 6>; + }; + + usb_in_i_uv { + reg = ; + label = "usb_in_i_uv"; + qcom,pre-scaling = <1 1>; + }; + + usb_in_v_div_16 { + reg = ; + label = "usb_in_v_div_16"; + qcom,pre-scaling = <1 16>; + }; +}; + +&pm8150_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + xo_therm { + reg = ; + label = "xo_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + quiet_therm { + reg = ; + label = "quiet_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm0 { + reg = ; + label = "pa_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150l_vadc { + pinctrl-names = "default"; + pinctrl-0 = <&pm8150l_backlight_therm_default>; + + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + cam_therm0 { + reg = ; + label = "cam_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + cam_therm1 { + reg = ; + label = "cam_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm1 { + reg = ; + label = "pa_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + backlight_therm { + reg = ; + label = "backlight_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150l_gpios { + pm8150l_backlight_therm { + pm8150l_backlight_therm_default: pm8150l_backlight_therm_default { + pins = "gpio7"; + bias-high-impedance;/* DISABLE GPIO7 for ADC*/ + }; + }; +}; + +&pm8150b_adc_tm { + wp_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150_adc_tm { + xo_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + quiet_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150l_adc_tm { + io-channels = <&pm8150l_vadc ADC_AMUX_THM1_PU2>, + <&pm8150l_vadc ADC_AMUX_THM2_PU2>, + <&pm8150l_vadc ADC_GPIO3_PU2>; + + cam_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + cam_therm1 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + backlight_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&thermal_zones { + modem1_xo {//place close to pm8150b + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150b_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + xo_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_XO_THERM_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + quiet_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + charger_therm0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + flash_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cpu_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + backlight_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_GPIO3_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; +}; + +&pm8150b_haptics { + qcom,vmax-mv = <2800>; + qcom,play-rate-us = <5102>; + + wf_0 { + /* CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_1 { + /* DOUBLE CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 3e]; + qcom,wf-brake-pattern = [03 01 01 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_2 { + /* TICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 3e]; + qcom,wf-brake-pattern = [03 01 01 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_3 { + /* THUD */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_4 { + /* POP */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_5 { + /* HEAVY CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 7e 7e]; + qcom,wf-brake-pattern = [03 03 01 00]; + qcom,wf-play-rate-us = <5102>; + }; +}; + +&soc { + ssc_sensors: qcom,msm-ssc-sensors { + compatible = "qcom,msm-ssc-sensors"; + status = "ok"; + qcom,firmware-name = "slpi_nb"; + }; + + gpio_keys { + hall_key { + label = "hall_key"; + gpios = <&tlmm 9 GPIO_ACTIVE_LOW>; + linux,input-type = <5>; + linux,code = <0>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + hall_key1 { + label = "hall_key1"; + gpios = <&tlmm 83 GPIO_ACTIVE_LOW>; + linux,input-type = <5>; + linux,code = <1>; + gpio-key,wakeup; + debounce-interval = <15>; + }; + }; + + + thermal_message: thermal-message { + board-sensor = "VIRTUAL-SENSOR"; + }; +}; + +&sdhc_2 { + cd-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; + status = "ok"; + }; + +&tlmm { + /* GPIO_37 : FP_RESET_N */ + msm_gpio_37: msm_gpio_37 { + mux { + pins = "gpio37"; + function = "gpio"; + }; + + config { + pins = "gpio37"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + /* GPIO_37 : FP_RESET_N, state device active*/ + msm_gpio_37_output_high: msm_gpio_37_output_high { + mux { + pins = "gpio37"; + function = "gpio"; + }; + + config { + pins = "gpio37"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + /* GPIO_120 : FP_INT_N */ + msm_gpio_120: msm_gpio_120 { + mux { + pins = "gpio120"; + function = "gpio"; + }; + + config { + pins = "gpio120"; + drive-strength = <2>; + bias-pull-down; + }; + }; +}; + +&pm8150l_gpios { + /* WIDE VDIG ENABLE */ + cam_sensor_wide_vdig_enable: cam_sensor_wide_vdig_enable { + pins = "gpio3"; + function = "normal"; + power-source = <0>; + output-low; + }; + + cam_sensor_wide_vdig_disable: cam_sensor_wide_vdig_disable { + pins = "gpio3"; + function = "normal"; + power-source = <0>; + output-low; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/raphael/raphael-audio-overlay.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/raphael/raphael-audio-overlay.dtsi new file mode 100644 index 000000000000..68d020d5ddda --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/raphael/raphael-audio-overlay.dtsi @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "../common/sm8150-audio-overlay.dtsi" + +&snd_934x { + qcom,audio-routing = + "AIF4 VI", "MCLK", + "RX_BIAS", "MCLK", + "MADINPUT", "MCLK", + "hifi amp", "LINEOUT1", + "hifi amp", "LINEOUT2", + "AMIC2", "MIC BIAS2", + "MIC BIAS2", "Headset Mic", + "AMIC3", "MIC BIAS3", + "MIC BIAS3", "ANCRight Headset Mic", + "AMIC1", "MIC BIAS1", + "MIC BIAS1", "ANCLeft Headset Mic", + "AMIC4", "MIC BIAS1", + "MIC BIAS1", "ANCRight Headset Mic", + "AMIC5", "MIC BIAS4", + "MIC BIAS4", "Analog Mic5"; + + qcom,wsa-max-devs = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; + qcom,msm-mbhc-usbc-audio-supported = <0>; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/raphael/raphael-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/raphael/raphael-pinctrl.dtsi new file mode 100644 index 000000000000..09bc52610904 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/raphael/raphael-pinctrl.dtsi @@ -0,0 +1,608 @@ +/*for xiaomi pinctrl*/ +&tlmm { + idt { + idt_int_active: idt_int_active { + /* active state */ + mux { + /* GPIO 78 idt Read Interrupt */ + pins = "gpio114"; + function = "gpio"; + }; + + config { + pins = "gpio114"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + idt_int_suspend: idt_int_suspend { + /* sleep state */ + mux { + /* GPIO 78 idt Read Interrupt */ + pins = "gpio114"; + function = "gpio"; + }; + + config { + pins = "gpio114"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + idt_enable_active: idt_enable_active { + /* active state */ + mux { + /* GPIO 36 idt enable pin */ + pins = "gpio115"; + function = "gpio"; + }; + + config { + pins = "gpio115"; + drive-strength = <2>; + bias-disable; + bias-pull-down; + output-low; + }; + }; + + idt_enable_suspend: idt_enable_suspend { + /* sleep state */ + mux { + /* GPIO 36 idt enable pin */ + pins = "gpio115"; + function = "gpio"; + }; + + config { + pins = "gpio115"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + fp_mux { + fp_active: fp_active { + mux { + pins = "gpio118"; + function = "gpio"; + }; + config { + pins = "gpio118"; + drive-strength = <8>; + bias-disable; + }; + }; + + fp_suspend: fp_suspend { + mux { + pins = "gpio118"; + function = "gpio"; + }; + config { + pins = "gpio118"; + drive-strength = <2>; + bias-disable; + }; + }; + }; + + /* GPIO_37 : FP_RESET_N */ + msm_gpio_37: msm_gpio_37 { + mux { + pins = "gpio37"; + function = "gpio"; + }; + + config { + pins = "gpio37"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + /* GPIO_37 : FP_RESET_N, state device active*/ + msm_gpio_37_output_high: msm_gpio_37_output_high { + mux { + pins = "gpio37"; + function = "gpio"; + }; + + config { + pins = "gpio37"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + /* GPIO_118 : FP_INT_N */ + msm_gpio_118: msm_gpio_118 { + mux { + pins = "gpio118"; + function = "gpio"; + }; + + config { + pins = "gpio118"; + drive-strength = <2>; + bias-pull-down; + }; + }; + + smartpa_int_active: smartpa_int_active { + /* active state */ + mux { + /* GPIO 141 Interrupt */ + pins = "gpio141"; + function = "gpio"; + }; + + config { + pins = "gpio141"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + smartpa_int_suspend: smartpa_int_suspend { + /* sleep state */ + mux { + /* GPIO 141 Interrupt */ + pins = "gpio141"; + function = "gpio"; + }; + + config { + pins = "gpio141"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + smartpa_enable_active: smartpa_enable_active { + /* active state */ + mux { + /* GPIO 59 rst pin */ + pins = "gpio59"; + function = "gpio"; + }; + + config { + pins = "gpio59"; + drive-strength = <2>; + bias-disable; + bias-pull-down; + output-low; + }; + }; + + smartpa_enable_suspend: smartpa_enable_suspend { + /* sleep state */ + mux { + /* GPIO 59 rst pin */ + pins = "gpio59"; + function = "gpio"; + }; + + config { + pins = "gpio59"; + drive-strength = <2>; + bias-disable; + bias-pull-down; + output-low; + }; + }; + }; + /*touchpanel*/ + pmx_ts_active { + tp_active: tp_active { + mux { + pins = "gpio122", "gpio54"; + function = "gpio"; + }; + config { + pins = "gpio122", "gpio54"; + drive-strength = <16>; + bias-pull-up; + }; + }; + }; + + pmx_ts_int_suspend { + tp_int_suspend: tp_int_suspend { + mux { + pins = "gpio122"; + function = "gpio"; + }; + config { + pins = "gpio122"; + drive-strength = <16>; + input-enable; + slew-rate = <0>; + bias-pull-up = <00>; + }; + }; + }; + + pmx_ts_reset_suspend { + tp_reset_suspend: tp_reset_suspend { + mux { + pins = "gpio54"; + function = "gpio"; + }; + config { + pins = "gpio54"; + drive-strength = <16>; + slew-rate = <1>; + bias-disable; + output-high; + }; + }; + }; + + + akm09970_irq { + akm_irq_active: akm_irq_active { + mux { + pins = "gpio11"; + function = "gpio"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; /* No PULL */ + }; + }; + + akm_irq_suspend: akm_irq_suspend { + mux { + pins = "gpio11"; + function = "gpio"; + }; + + config { + pins = "gpio11"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + }; + + akm09970_reset { + akm_reset_active: akm_reset_active { + mux { + pins = "gpio27"; + function = "gpio"; + }; + + config { + pins = "gpio27"; + drive-strength = <2>; /* 2 MA */ + bias-pull-down; /* No PULL */ + output-low; + }; + }; + + akm_reset_suspend: akm_reset_suspend { + mux { + pins = "gpio27"; + function = "gpio"; + }; + + config { + pins = "gpio27"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + }; + + motor_gpio_default: motor_gpio_default { + mux { + pins = "gpio9", "gpio21", "gpio33", "gpio35", "gpio130"; + function = "gpio"; + }; + + config { + pins = "gpio9", "gpio21", "gpio33", "gpio35", "gpio130"; + bias-pull-up; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_active_wide: cam_sensor_active_wide { + /* WIDE RESET DVDDEN */ + mux { + pins = "gpio28", "gpio90"; + function = "gpio"; + }; + + config { + pins = "gpio28", "gpio90"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_wide: cam_sensor_suspend_wide { + /* WIDE RESET DVDDEN AVDDEN 1.8AVDDEN */ + mux { + pins = "gpio28", "gpio90"; + function = "gpio"; + }; + + config { + pins = "gpio28", "gpio90"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_tele: cam_sensor_active_tele { + /* TELE RESET DVDDEN */ + mux { + pins = "gpio30", "gpio93"; + function = "gpio"; + }; + + config { + pins = "gpio30", "gpio93"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_tele: cam_sensor_suspend_tele { + /* TELE RESET DVDDEN */ + mux { + pins = "gpio30", "gpio93"; + function = "gpio"; + }; + + config { + pins = "gpio30", "gpio93"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_ultra: cam_sensor_active_ultra { + /* ULTRA RESET DVDDEN */ + mux { + pins = "gpio23", "gpio34"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio34"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_ultra: cam_sensor_suspend_ultra { + /* ULTRA RESET DVDDEN */ + mux { + pins = "gpio23", "gpio34"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio34"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_front: cam_sensor_active_front { + /* FRONT RESET DVDDEN */ + mux { + pins = "gpio12", "gpio95"; + function = "gpio"; + }; + + config { + pins = "gpio12", "gpio95"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_front: cam_sensor_suspend_front { + /* FRONT RESET DVDDEN */ + mux { + pins = "gpio12", "gpio95"; + function = "gpio"; + }; + + config { + pins = "gpio12", "gpio95"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_actuator_wide_en: cam_actuator_wide_en { + mux { + pins = "gpio83"; + function = "gpio"; + }; + + config { + pins = "gpio83"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_actuator_tele_en: cam_actuator_tele_en { + mux { + pins = "gpio84"; + function = "gpio"; + }; + + config { + pins = "gpio84"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_viodd_en: cam_sensor_viodd_en { + mux { + pins = "gpio97"; + function = "gpio"; + }; + + config { + pins = "gpio97"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + sde_dsi_active: sde_dsi_active { + mux { + pins = "gpio6", "gpio7", "gpio5"; + function = "gpio"; + }; + + config { + pins = "gpio6", "gpio7", "gpio5"; + drive-strength = <8>; /* 8 mA */ + bias-disable = <0>; /* no pull */ + }; + }; + sde_dsi_suspend: sde_dsi_suspend { + mux { + pins = "gpio6", "gpio7", "gpio5"; + function = "gpio"; + }; + + config { + pins = "gpio6", "gpio7", "gpio5"; + drive-strength = <2>; /* 2 mA */ + bias-pull-down; /* PULL DOWN */ + }; + }; + + pcie1 { + pcie1_clkreq_default: pcie1_clkreq_default { + mux { + pins = "gpio103"; + function = "gpio"; + }; + + config { + pins = "gpio103"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + nfc { + nfc_int_active: nfc_int_active { + /* active state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_int_suspend: nfc_int_suspend { + /* sleep state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_active: nfc_enable_active { + /* active state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio48", "gpio103"; + function = "gpio"; + }; + + config { + pins = "gpio48", "gpio103"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_suspend: nfc_enable_suspend { + /* sleep state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio48", "gpio103"; + function = "gpio"; + }; + + config { + pins = "gpio48", "gpio103"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + + nfc_clk_req_active: nfc_clk_req_active { + /* active state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_clk_req_suspend: nfc_clk_req_suspend { + /* sleep state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/raphael/raphael-sm8150-camera-sensor.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/raphael/raphael-sm8150-camera-sensor.dtsi new file mode 100644 index 000000000000..ceb6c189bcaa --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/raphael/raphael-sm8150-camera-sensor.dtsi @@ -0,0 +1,483 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2019 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + reg = <0x00 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_rear_aux: qcom,camera-flash@1 { + cell-index = <1>; + reg = <0x01 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_rear_aux2: qcom,camera-flash@2 { + cell-index = <2>; + reg = <0x02 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; +/* + led_flash_front: qcom,camera-flash@2 { + cell-index = <2>; + reg = <0x02 0x00>; + compatible = "qcom,camera-flash"; + wled-flash-support; + flash-source = <&wled_flash>; + torch-source = <&wled_torch>; + switch-source = <&wled_switch>; + status = "ok"; + }; + + led_flash_iris: qcom,camera-flash@3 { + cell-index = <3>; + reg = <0x03 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash1>; + torch-source = <&pm8150l_torch1>; + switch-source = <&pm8150l_switch0>; + status = "ok"; + };*/ + + wide_actuator_regulator: gpio-regulator@0 { + compatible = "regulator-fixed"; + reg = <0x00 0x00>; + regulator-name = "actuator_regulator"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <100>; + enable-active-high; + gpio = <&tlmm 83 0>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_actuator_wide_en>; + vin-supply = <&pm8150l_bob>; + }; + + tele_actuator_regulator: gpio-regulator@1 { + compatible = "regulator-fixed"; + reg = <0x01 0x00>; + regulator-name = "actuator_regulator"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <100>; + enable-active-high; + gpio = <&tlmm 84 0>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_actuator_tele_en>; + vin-supply = <&pm8150l_bob>; + }; + + camera_viodd_ldo: gpio-regulator@2 { + compatible = "regulator-fixed"; + reg = <0x02 0x00>; + regulator-name = "camera_viodd_ldo"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-enable-ramp-delay = <135>; + enable-active-high; + gpio = <&tlmm 97 0>; + pinctrl-names = "default"; + pinctrl-0 = <&cam_sensor_viodd_en>; + vin-supply = <&pm8150_s4>; + }; +}; + +&pm8150_l17 { + regulator-min-microvolt = <3100000>; + regulator-max-microvolt = <3100000>; + qcom,init-voltage = <3100000>; +}; + +&cam_cci0 { + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; + + actuator_rear: qcom,actuator@0 { + cell-index = <0>; + reg = <0x0>; + compatible = "qcom,actuator"; + cci-master = <0>; + cam_vaf-supply = <&wide_actuator_regulator>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + actuator_rear_aux: qcom,actuator@1 { + cell-index = <1>; + reg = <0x1>; + compatible = "qcom,actuator"; + cci-master = <1>; + cam_vaf-supply = <&tele_actuator_regulator>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + eeprom_rear: qcom,eeprom@0 { + cell-index = <0>; + reg = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vaf-supply = <&wide_actuator_regulator>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vaf", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 0>; + rgltr-max-voltage = <1800000 2800000 0>; + rgltr-load-current = <1000 1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_wide>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_wide>; + gpios = <&tlmm 13 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK0"; + sensor-mode = <0>; + cci-master = <0>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_aux: qcom,eeprom@1 { + cell-index = <1>; + reg = <0x1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vaf-supply = <&tele_actuator_regulator>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vaf", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 0>; + rgltr-max-voltage = <1800000 2800000 0>; + rgltr-load-current = <1000 1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_tele>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_tele>; + gpios = <&tlmm 14 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK1"; + sensor-mode = <0>; + cci-master = <1>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_front: qcom,eeprom@2 { + cell-index = <2>; + reg = <0x2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK2"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + reg = <0x0>; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear>; + actuator-src = <&actuator_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom1-supply = <&pm8150_s5>; + cam_v_custom2-supply = <&pm8150_l17>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1", "cam_v_custom2"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0 1904000 3100000>; + rgltr-max-voltage = <1800000 4000000 1352000 0 2040000 3100000>; + rgltr-load-current = <1000 80000 1200000 0 10000 1000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_wide>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_wide>; + gpios = <&tlmm 13 0>, + <&tlmm 28 0>, + <&tlmm 90 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAMW_RESET", + "CAMW_VDIG_EN"; + sensor-mode = <0>; + cci-master = <0>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + reg = <0x1>; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + actuator-src = <&actuator_rear_aux>; + led-flash-src = <&led_flash_rear_aux>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom1-supply = <&pm8150_l17>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0 3100000>; + rgltr-max-voltage = <1800000 4000000 1352000 0 3100000>; + rgltr-load-current = <1000 80000 1200000 0 1000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_tele>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_tele>; + gpios = <&tlmm 14 0>, + <&tlmm 30 0>, + <&tlmm 93 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAMT_RESET", + "CAMT_VDIG_EN"; + sensor-mode = <0>; + cci-master = <1>; + cci-device = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + reg = <0x02>; + csiphy-sd-index = <1>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom1-supply = <&pm8150_l17>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0 3100000>; + rgltr-max-voltage = <1800000 4000000 1352000 0 3100000>; + rgltr-load-current = <1000 80000 1200000 0 1000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 15 0>, + <&tlmm 12 0>, + <&tlmm 95 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAMF_RESET", + "CAMF_VDIG_EN"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; + +&cam_cci1 { + status = "ok"; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cci2_active>; + pinctrl-1 = <&cci2_suspend>; + gpios = <&tlmm 31 0>, + <&tlmm 32 0>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 1>; + gpio-req-tbl-label = "CCI_I2C_DATA2", + "CCI_I2C_CLK2"; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; + + eeprom_ultra: qcom,eeprom@3 { + cell-index = <3>; + reg = <0x3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&camera_viodd_ldo>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_ultra>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_ultra>; + + gpios = <&tlmm 16 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK3"; + sensor-mode = <0>; + cci-master = <0>; + cci-device = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + qcom,cam-sensor@3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + reg = <0x03>; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear_aux2>; + eeprom-src = <&eeprom_ultra>; + cam_vio-supply = <&camera_viodd_ldo>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom1-supply = <&pm8150_l17>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0 3100000>; + rgltr-max-voltage = <1800000 4000000 1352000 0 3100000>; + rgltr-load-current = <1000 80000 1200000 0 1000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_ultra>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_ultra>; + + gpios = <&tlmm 16 0>, + <&tlmm 23 0>, + <&tlmm 34 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAMU_RESET", + "CAMU_VDIG_EN"; + sensor-mode = <0>; + cci-master = <0>; + cci-device = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/raphael/raphael-sm8150.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/raphael/raphael-sm8150.dtsi new file mode 100644 index 000000000000..31b245e7c25b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/raphael/raphael-sm8150.dtsi @@ -0,0 +1,736 @@ +/* +this file is for attribution only of davinci +And public attribution of xiaomi platforms(like F1 and so and) +*/ +#include "raphael-pinctrl.dtsi" +#include "../common/xiaomi-sm8150-common.dtsi" + +#include "raphael-sm8150-camera-sensor.dtsi" + +#include "../common/smb1390.dtsi" + + +&vendor { + mtp_batterydata: qcom,battery-data { + qcom,batt-id-range-pct = <15>; + #include "../common/battery/batterydata-F11-sun-4000mah.dtsi" + #include "../common/battery/batterydata-F11-gyu-4000mah.dtsi" + }; +}; + +&pm8150b_fg { + qcom,battery-data = <&mtp_batterydata>; + qcom,rapid-soc-dec-en; + qcom,fg-sys-term-current = <(-300)>; + qcom,fg-cutoff-voltage = <3400>; + qcom,fg-cutoff-current = <200>; + qcom,fg-empty-voltage = <3100>; + qcom,fg-batt-temp-delta = <6>; + qcom,fg-force-load-profile; + qcom,five-pin-battery; + /* ESR fast calibration */ + qcom,fg-esr-timer-chg-fast = <0 7>; + qcom,fg-esr-timer-dischg-fast = <0 7>; + qcom,fg-esr-timer-chg-slow = <0 96>; + qcom,fg-esr-timer-dischg-slow = <0 96>; + qcom,fg-esr-cal-soc-thresh = <26 230>; + qcom,fg-esr-cal-temp-thresh = <10 40>; +}; + +&pm8150b_charger { + qcom,sec-charger-config = <1>; + qcom,usb-icl-ua = <2800000>; + qcom,fcc-max-ua = <5100000>; + qcom,fv-max-uv = <4400000>; + qcom,auto-recharge-soc = <99>; + qcom,chg-term-src = <1>; + qcom,chg-term-current-ma = <(-220)>; + qcom,thermal-mitigation = <3000000 2800000 2600000 2400000 2200000 2100000 2000000 + 1800000 1600000 1500000 1400000 1200000 1000000 900000 + 800000 500000>; + qcom,thermal-mitigation-icl + = <2800000 2700000 2600000 2400000 2400000 2400000 2400000 + 2400000 2400000 2100000 1900000 1700000 1500000 1300000 + 1000000 750000>; + qcom,thermal-mitigation-dcp + = <1800000 1800000 1800000 1800000 1800000 1800000 1800000 + 1800000 1800000 1700000 1600000 1400000 1200000 1100000 + 1100000 1000000>; + qcom,thermal-mitigation-qc2 + = <1500000 1500000 1500000 1500000 1450000 1400000 1350000 + 1300000 1300000 1200000 1000000 900000 850000 750000 + 650000 500000>; + qcom,thermal-fcc-qc3-normal + = <3200000 3000000 2800000 2600000 2500000 2400000 2300000 + 2200000 2100000 1800000 1600000 1400000 1200000 1000000 + 750000 750000>; + qcom,thermal-fcc-qc3-cp + = <3600000 3600000 3600000 3500000 3400000 3300000 3300000 + 3200000 3100000 2800000 2400000 2200000 2000000 1300000 + 1000000 700000>; + qcom,thermal-fcc-qc3-classb-cp + = <5100000 4800000 4600000 4400000 4200000 4000000 4000000 + 4000000 4000000 3600000 3400000 3200000 3000000 2200000 + 1000000 700000>; + qcom,thermal-mitigation-pd-base + = <3000000 2800000 2600000 2500000 2500000 2500000 2500000 + 2500000 2500000 2400000 2200000 2000000 1600000 1300000 + 1000000 500000>; + qcom,thermal-fcc-pps-cp + = <5100000 5000000 4900000 4800000 4600000 4400000 4200000 + 4000000 3800000 3600000 3400000 3200000 3000000 2200000 + 1000000 500000>; + qcom,thermal-mitigation-dc + = <2200000 2000000 1800000 1600000 1400000 1200000 1100000 + 1000000 900000 800000 700000 600000 500000 400000 + 300000 200000>; + qcom,lpd_hwversion + = <43200 53600 100000 121000 232000 300000 562000 900000>; + + io-channels = <&pm8150b_vadc ADC_MID_CHG_DIV6>, + <&pm8150b_vadc ADC_USB_IN_V_16>, + <&pm8150b_vadc ADC_USB_IN_I>, + <&pm8150b_vadc ADC_SBUx>, + <&pm8150b_vadc ADC_VPH_PWR>, + <&pm8150b_vadc ADC_CHG_TEMP>, + <&pm8150l_vadc ADC_GPIO1_PU2>, + <&pm8150l_vadc ADC_GPIO2_PU2>; + + io-channel-names = "mid_voltage", + "usb_in_voltage", + "usb_in_current", + "sbux_res", + "vph_voltage", + "chg_temp", + "hw_version_gpio5", + "project_gpio6"; + + qcom,battery-data = <&mtp_batterydata>; + dpdm-supply = <&usb2_phy0>; + qcom,distinguish-qc-class-ab; + //qcom,lpd-enable; + qcom,lpd-disable; + qcom,sw-jeita-enable; + qcom,step-charging-enable; + qcom,wd-bark-time-secs = <16>; +}; + +&qupv3_se1_i2c { + status = "ok"; + tfa98xx@34 { + compatible = "nxp,tfa98xx"; + reset-gpio = <&tlmm 59 0>; + irq-gpio = <&tlmm 141 0>; + interrupt-parent = <&tlmm>; + interrupts = <141 0>; + interrupt-names = "smartpa_irq"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&smartpa_int_active &smartpa_enable_active>; + pinctrl-1 = <&smartpa_int_suspend &smartpa_enable_suspend>; + reg = <0x34>; + status = "ok"; + }; +}; + +&pm8150l_pwm { + status = "ok"; +}; + +&qupv3_se4_i2c { + status = "ok"; + fsa4480@43 { + status = "disabled"; + }; + + akm09970@c { + compatible = "akm,akm09970"; + reg = <0xC>; + interrupt-parent = <&tlmm>; + interrupts = <120 0>; + akm,gpio-reset = <&tlmm 11 0x00>; + akm,gpio-irq = <&tlmm 27 0x00>; + akm,measure-freq-hz = <100>; + vdd-supply = <&pm8150l_l8>; + + pinctrl-names = "akm09970_gpio_active", "akm09970_gpio_suspend"; + pinctrl-0 = <&akm_irq_active &akm_reset_active>; + pinctrl-1 = <&akm_irq_suspend &akm_reset_suspend>; + status = "ok"; + }; +}; + +&soc { + ti,drv8846@0 { + cell-index = <0>; + reg = <0x00 0x00>; + compatible = "ti,drv8846"; + pwms = <&pm8150l_pwm 1 1000000>; + motor,gpio-mode0 = <&tlmm 21 0x00>; + motor,gpio-mode1 = <&tlmm 33 0x00>; + motor,gpio-sleep = <&tlmm 35 0x00>; + motor,gpio-dir = <&tlmm 9 0x00>; + motor,gpio-pwren = <&tlmm 130 0x00>; + + motor,rampup-pwm-period-ns = <625000>; + motor,rampup-duration-ms = <50>; + motor,high-pwm-period-ns = <52083>; + motor,high-duration-ms = <720>; + motor,rampdown-pwm-period-ns = <625000>; + motor,rampdown-duration-ms = <50>; + motor,step-mode = <2>; + + pinctrl-names = "default"; + pinctrl-0 = <&pwm_out_gpio10_default &motor_gpio_default>; + status = "ok"; + }; + + simtray { + compatible = "xiaomi,simtray-status"; + status-gpio = <&tlmm 112 0x00>; + }; +}; + +&pm8150l_gpios { + pwm_out_gpio10 { + pwm_out_gpio10_default: pwm_out_gpio10_default { + pins = "gpio10"; + function = "func1"; + bias-disable; + power-source = <1>; + output-low; + qcom,drive-strength = <3>; + drive-push-pull; + }; + }; +}; + +&smb1390 { + pinctrl-names = "default"; + pinctrl-0 = <&smb_stat_default>; + status = "ok"; +}; + +&smb1390_charger { + io-channels = <&pm8150b_vadc ADC_AMUX_THM2>; + io-channel-names = "cp_die_temp"; + status = "ok"; +}; + +&usb0 { + dwc3@a600000 { + usb-phy = <&usb2_phy0>, <&usb_nop_phy>; + maximum-speed = "high-speed"; + }; +}; + +&usb2_phy0 { + qcom,param-override-seq = + <0x83 0x70 + 0x2c 0x74>; +}; + +&usb_qmp_dp_phy { + status = "disabled"; +}; + +&usb1 { + extcon = <&extcon_usb1>; + status = "disabled"; +}; + +&usb2_phy1 { + status = "disabled"; +}; + +&usb_qmp_phy { + status = "disabled"; +}; + +&soc { + touch_vddio_vreg: touch_vddio_vreg { + compatible = "regulator-fixed"; + regulator-name = "disp_vddio_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + //gpio = <&tlmm 99 0>; + }; + + vdd_boost_vreg: vdd_boost_vreg { + compatible = "regulator-fixed"; + regulator-name = "vdd_boost_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-always-on; + gpio = <&pm8150b_gpios 5 0>; + }; + + fingerprint_goodix { + compatible = "goodix,fingerprint"; + goodix,gpio-reset = <&tlmm 37 0x0>; + goodix,gpio-irq = <&tlmm 118 0x0>; + fp-gpio-pwr = <&tlmm 125 0>; + status = "ok"; + }; + + xiaomi_touch { + compatible = "xiaomi-touch"; + status = "ok"; + touch,name = "xiaomi-touch"; + }; + + disp_vci_vreg: disp_vci_vreg { + compatible = "regulator-fixed"; + regulator-name = "disp_vci_vreg"; + start-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + gpio = <&tlmm 99 0>; + }; +}; + +&qupv3_se19_i2c { + status = "ok"; + goodix@5d { + compatible = "goodix,gt9889"; + reg = <0x5d>; + status = "ok"; + interrupt-parent = <&tlmm>; + interrupts = <122 0x2800>; + //vtouch-supply = <&pm660l_l8>; + //iotouch-supply = <&pm660_l13>; + vtouch-load = <600000>; + pinctrl-names = "pmx_ts_active","pmx_ts_suspend"; + pinctrl-0 = <&tp_active>; + pinctrl-1 = <&tp_int_suspend &tp_reset_suspend>; + goodix,reset-gpio = <&tlmm 54 0x0>; + goodix,irq-gpio = <&tlmm 122 0x2800>; + goodix,vdd-gpio = <&tlmm 98 0x0>; /* 3v3 */ + goodix,avdd-gpio = <&tlmm 100 0x0>; /* 1v8 */ + goodix,irq-flags = <2>; /* 1:trigger rising, 2:trigger falling;*/ + goodix,panel-max-id = <10>; + goodix,panel-max-x = <1079>; + goodix,panel-max-y = <2339>; + goodix,panel-max-w = <127>; + goodix,panel-max-p = <127>; + goodix,panel-max-fod = <127>; + /* goodix,panel-key-map = <158 172 217>; */ /*KEY_BACK, KEY_HOMEPAGE, KEY_SEARCH*/ + goodix,power-on-delay-us = <300000>; /*300ms*/ + goodix,power-off-delay-us = <5000>; + goodix,cfg-name = "goodix_gt9886_cfg_f11.bin"; + normal-cfg = [ + ]; + /* goodix,swap-axis; */ + /* goodix,pen-enable; */ + /* goodix,key-of-pen = <331 332>; */ /*BTN_STYLUS, BTN_STYLUS2*/ + sensor0 { + goodix,limit-name = "goodix_gt9886_limit_f11_second.tporder"; + goodix,fw-name = "goodix_gt9886_fw_f11.bin"; + goodix,x2x; + goodix,y2y; + }; + sensor1 { + goodix,limit-name = "goodix_gt9886_limit_f11_first.tporder"; + goodix,fw-name = "goodix_gt9886_fw_f11.bin"; + }; + }; +}; + + +&pm8150b_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + wp_therm { + reg = ; + label = "wp_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + conn_therm { + reg = ; + label = "conn_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + chg_sbux { + reg = ; + label = "chg_sbux"; + qcom,pre-scaling = <1 3>; + }; + + mid_chg_div6 { + reg = ; + label = "chg_mid"; + qcom,pre-scaling = <1 6>; + }; + + usb_in_i_uv { + reg = ; + label = "usb_in_i_uv"; + qcom,pre-scaling = <1 1>; + }; + + usb_in_v_div_16 { + reg = ; + label = "usb_in_v_div_16"; + qcom,pre-scaling = <1 16>; + }; +}; + +&pm8150_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + xo_therm { + reg = ; + label = "xo_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + quiet_therm { + reg = ; + label = "quiet_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm0 { + reg = ; + label = "pa_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150l_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + cam_therm0 { + reg = ; + label = "camera_flash_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + cam_therm1 { + reg = ; + label = "skin_msm_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm1 { + reg = ; + label = "pa_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + hw_version_gpio5 { + reg = ; + label = "hw_version_gpio5"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + project_gpio6 { + reg = ; + label = "project_gpio6"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150b_adc_tm { + io-channels = <&pm8150b_vadc ADC_AMUX_THM1_PU2>, + <&pm8150b_vadc ADC_AMUX_THM2_PU2>; + wp_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + pm8150b-wp-therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150_adc_tm { + xo_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + quiet_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150l_adc_tm { + cam_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + cam_therm1 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm1 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&thermal_zones { + wp_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150b_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + xo_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_XO_THERM_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + quiet_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + pa_therm0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cam_therm0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cam_therm1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + pa_therm1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM3_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; +}; + +&pm8150b_haptics { + qcom,actuator-type = "erm"; + qcom,vmax-mv = <3000>; + + wf_0 { + /* CLICK */ + qcom,effect-id = <0>; + qcom,wf-vmax-mv = <3000>; + qcom,wf-pattern = [3e 3e 3e]; + qcom,wf-brake-pattern = [01 00 00 00]; + qcom,lra-auto-resonance-disable; + }; + wf_1 { + /* DOUBLE CLICK */ + qcom,effect-id = <1>; + qcom,wf-vmax-mv = <3000>; + qcom,wf-pattern = [7e 7e 02 02 02 02 02 02]; + qcom,wf-repeat-count = <2>; + qcom,wf-s-repeat-count = <1>; + qcom,lra-auto-resonance-disable; + }; + wf_2 { + /* TICK */ + qcom,effect-id = <2>; + qcom,wf-vmax-mv = <3000>; + qcom,wf-pattern = [7e 7e]; + qcom,lra-auto-resonance-disable; + }; + wf_3 { + /* THUD */ + qcom,effect-id = <3>; + qcom,wf-vmax-mv = <3000>; + qcom,wf-pattern = [7e 7e 7e]; + qcom,lra-auto-resonance-disable; + }; + wf_4 { + /* POP */ + qcom,effect-id = <4>; + qcom,wf-vmax-mv = <3000>; + qcom,wf-pattern = [7e 7e]; + qcom,lra-auto-resonance-disable; + }; + wf_5 { + /* HEAVY CLICK */ + qcom,effect-id = <5>; + qcom,wf-vmax-mv = <3000>; + qcom,wf-pattern = [7e 7e 7e]; + qcom,wf-brake-pattern = [03 00 00 00]; + qcom,lra-auto-resonance-disable; + }; +}; + +&pm8150l_lpg { + qcom,lut-pattern-switch; + qcom,lut-patterns = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 + 12 11 10 9 8 7 6 5 4 3 2 1 0>; + qcom,lut-patterns-camera = <0 1 3 5 8 10 12 15 18 22 26 32 38 44 50 60 72 82 90 96 98 99 100 + 99 98 96 90 82 72 60 50 44 38 32 26 22 18 15 12 10 8 5 3 1 0>; +}; + +&pwm_lpg2 { + qcom,lpg-chan-id = <2>; + qcom,ramp-step-ms = <70>; + qcom,ramp-pause-hi-count = <2>; + qcom,ramp-pause-lo-count = <30>; + qcom,ramp-low-index = <0>; + qcom,ramp-high-index = <26>; + qcom,ramp-from-low-to-high; + qcom,ramp-pattern-repeat; +}; + +&pwm_lpg3 { + qcom,lpg-chan-id = <3>; + qcom,ramp-step-ms = <70>; + qcom,ramp-pause-hi-count = <2>; + qcom,ramp-pause-lo-count = <30>; + qcom,ramp-low-index = <0>; + qcom,ramp-high-index = <26>; + qcom,ramp-from-low-to-high; + qcom,ramp-pattern-repeat; +}; + +&red_led { + status = "disabled"; +}; + +&pm8150l_wled { + qcom,string-cfg= <15>;// if use 2 string, the number is 3 + qcom,leds-per-string = <5>; + status = "ok"; +}; + +&sde_dsi { + vcie-supply = <&disp_vci_vreg>; +}; + +&soc { + ssc_sensors: qcom,msm-ssc-sensors { + compatible = "qcom,msm-ssc-sensors"; + status = "ok"; + qcom,firmware-name = "slpi_rp"; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/vayu/vayu-audio-overlay.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/vayu/vayu-audio-overlay.dtsi new file mode 100644 index 000000000000..932345af8fc4 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/vayu/vayu-audio-overlay.dtsi @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "../common/sm8150-audio-overlay.dtsi" + +&snd_934x { + qcom,audio-routing = + "AIF4 VI", "MCLK", + "RX_BIAS", "MCLK", + "MADINPUT", "MCLK", + "hifi amp", "LINEOUT1", + "hifi amp", "LINEOUT2", + "AMIC2", "MIC BIAS2", + "MIC BIAS2", "Headset Mic", + "AMIC3", "MIC BIAS3", + "MIC BIAS3", "ANCRight Headset Mic", + "AMIC1", "MIC BIAS1", + "MIC BIAS1", "ANCLeft Headset Mic", + "AMIC4", "MIC BIAS1", + "MIC BIAS1", "ANCRight Headset Mic", + "AMIC5", "MIC BIAS4", + "MIC BIAS4", "Analog Mic5"; + + qcom,wsa-max-devs = <0>; + qcom,msm-mbhc-hphl-swh = <1>; + qcom,msm-mbhc-gnd-swh = <1>; + qcom,msm-mbhc-usbc-audio-supported = <0>; + qcom,msm-mbhc-hs-mic-max-threshold-mv = <2600>; + qcom,msm-mbhc-hs-mic-min-threshold-mv = <50>; +}; + +&wcd934x_cdc { + qcom,cdc-micbias1-mv = <2700>; + qcom,cdc-micbias2-mv = <2700>; + qcom,cdc-micbias3-mv = <2700>; + qcom,cdc-micbias4-mv = <2700>; +}; diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/vayu/vayu-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/vayu/vayu-pinctrl.dtsi new file mode 100644 index 000000000000..4909875dcadf --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/vayu/vayu-pinctrl.dtsi @@ -0,0 +1,617 @@ +/*for xiaomi pinctrl*/ +&tlmm { + qupv3_se17_spi_pins: qupv3_se17_spi_pins { + qupv3_se17_spi_active: qupv3_se17_spi_active { + mux { + pins = "gpio55", "gpio56", "gpio57"; + function = "qup17"; + }; + + config { + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <6>; + bias-disable; + }; + }; + + qupv3_se17_spi_sleep: qupv3_se17_spi_sleep { + mux { + pins = "gpio55", "gpio56", "gpio57"; + function = "gpio"; + }; + + config { + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <6>; + bias-disable; + }; + }; + }; + + + bq2597x { + bq2597x_master_int_default: bq2597x_master_int_default { + /* active state */ + mux { + /* GPIO 10 is used for bq25970 master ic interrupt usage */ + pins = "gpio10"; + function = "gpio"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + + bq2597x_master_int_suspend: bq2597x_master_int_suspend { + /* sleep state */ + mux { + /* GPIO 10 is used for bq25970 master ic interrupt usage */ + pins = "gpio10"; + function = "gpio"; + }; + + config { + pins = "gpio10"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + input-enable; + }; + }; + }; + + onewire_gpio_active: onewire_gpio_active { + mux { + pins = "gpio21"; + function = "gpio"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; + bias-pull-up; /* No PULL */ + }; + }; + + onewire_gpio_sleep: onewire_gpio_sleep { + mux { + pins = "gpio21"; + function = "gpio"; + }; + + config { + pins = "gpio21"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + pmx_ts_active { + ts_active: ts_active { + mux { + pins = "gpio122", "gpio12"; + function = "gpio"; + }; + config { + pins = "gpio122", "gpio12"; + drive-strength = <8>; + bias-pull-up; + }; + }; + }; + + pmx_ts_int_suspend { + ts_int_suspend: ts_int_suspend { + mux { + pins = "gpio122"; + function = "gpio"; + }; + config { + pins = "gpio122"; + drive-strength = <2>; + bias-pull-down; + input-enable; + }; + }; + }; + + pmx_ts_reset_suspend { + ts_reset_suspend: ts_reset_suspend { + mux { + pins = "gpio12"; + function = "gpio"; + }; + config { + pins = "gpio12"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + }; + + adc2_switch_gpio_ctrl { + adc2_switch_gpio_idle: adc2_switch_idle { + mux { + pins = "gpio142"; + function = "gpio"; + }; + config { + pins = "gpio142"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + adc2_switch_gpio_active: adc2_switch_active { + mux { + pins = "gpio142"; + function = "gpio"; + }; + config { + pins = "gpio142"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + sbu_uart_en_ctrl { + sbu_uart_en_idle: uart_audio_en_idle { + mux { + pins = "gpio25"; + function = "gpio"; + }; + config { + pins = "gpio25"; + drive-strength = <2>; + bias-pull-down; + output-low; + }; + }; + + sbu_uart_en_active: uart_audio_en_active { + mux { + pins = "gpio25"; + function = "gpio"; + }; + config { + pins = "gpio25"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + }; + + + pcie1 { + pcie1_wake_default: pcie1_wake_default { + mux { + pins = "gpio114"; + function = "gpio"; + }; + + config { + pins = "gpio114"; + drive-strength = <2>; + bias-pull-up; + }; + }; + }; + + nfc { + nfc_int_active: nfc_int_active { + /* active state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_int_suspend: nfc_int_suspend { + /* sleep state */ + mux { + /* GPIO 47 NFC Read Interrupt */ + pins = "gpio47"; + function = "gpio"; + }; + + config { + pins = "gpio47"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_active: nfc_enable_active { + /* active state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio48", "gpio102"; + function = "gpio"; + }; + + config { + pins = "gpio48", "gpio102"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_enable_suspend: nfc_enable_suspend { + /* sleep state */ + mux { + /* 41: NFC ENABLE 42:ESE Enable */ + pins = "gpio48", "gpio102"; + function = "gpio"; + }; + + config { + pins = "gpio48", "gpio102"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + + nfc_clk_req_active: nfc_clk_req_active { + /* active state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-pull-up; + }; + }; + + nfc_clk_req_suspend: nfc_clk_req_suspend { + /* sleep state */ + mux { + /* 113: NFC CLOCK REQUEST */ + pins = "gpio113"; + function = "gpio"; + }; + + config { + pins = "gpio113"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + }; + cam_sensor_active_macro: cam_sensor_active_macro { + /* RESET macro */ + mux { + pins = "gpio27", "gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio27", "gpio94"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_macro: cam_sensor_suspend_macro { + /* RESET MACRO */ + mux { + pins = "gpio27", "gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio27", "gpio94"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + test_mode_ctrl_irq { + ant_sub_ctrl_irq: ant_sub_ctrl_irq { + mux { + pins = "gpio81"; + function = "gpio"; + }; + config { + pins = "gpio81"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + }; + ant_top_ctrl_irq: ant_top_ctrl_irq { + mux { + pins = "gpio133"; + function = "gpio"; + }; + config { + pins = "gpio133"; + drive-strength = <2>; + bias-pull-up; + input-enable; + }; + }; + }; +}; + +//camera voltage start +&cam_sensor_mclk0_active { + /* MCLK0 */ + mux { + pins = "gpio13"; + function = "cam_mclk"; + }; + + config { + pins = "gpio13"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk0_suspend { + /* MCLK0 */ + mux { + pins = "gpio13"; + function = "cam_mclk"; + }; + + config { + pins = "gpio13"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk1_active { + /* MCLK1 */ + mux { + pins = "gpio14"; + function = "cam_mclk"; + }; + + config { + pins = "gpio14"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk1_suspend { + /* MCLK1 */ + mux { + pins = "gpio14"; + function = "cam_mclk"; + }; + + config { + pins = "gpio14"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk2_active { + /* MCLK2 */ + mux { + pins = "gpio15"; + function = "cam_mclk"; + }; + + config { + pins = "gpio15"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk2_suspend { + /* MCLK2 */ + mux { + pins = "gpio15"; + function = "cam_mclk"; + }; + + config { + pins = "gpio15"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk3_active { + /* MCLK3 */ + mux { + pins = "gpio16"; + function = "cam_mclk"; + }; + + config { + pins = "gpio16"; + bias-disable; /* No PULL */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_mclk3_suspend { + /* MCLK3 */ + mux { + pins = "gpio16"; + function = "cam_mclk"; + }; + + config { + pins = "gpio16"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <4>; /* 2 MA */ + }; +}; + +&cam_sensor_active_rear { + /* RESET REAR2 */ + mux { + pins = "gpio30", "gpio59"; + function = "gpio"; + }; + + config { + pins = "gpio30", "gpio59"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_rear { + /* RESET REAR2 */ + mux { + pins = "gpio30", "gpio59"; + function = "gpio"; + }; + + config { + pins = "gpio30", "gpio59"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +&cam_sensor_active_rear_aux { + /* RESET REARAUX, VANA REARAUX */ + mux { + pins = "gpio23", "gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio94"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_rear_aux { + /* RESET REARAUX, VANA REARAUX */ + mux { + pins = "gpio23", "gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio23", "gpio94"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +&cam_sensor_active_front { + /* RESET FRONT, VANA FRONT*/ + mux { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio54","gpio118"; + function = "gpio"; + }; + + config { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio54","gpio118"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_front { + /* RESET FRONT, VANA FRONT*/ + mux { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio54","gpio118"; + function = "gpio"; + }; + + config { + //pins = "gpio54","gpio132","gpio118"; + pins = "gpio54","gpio118"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +&cam_sensor_active_iris { + /* RESET ULTRA, VANA VDIG ULTRA*/ + mux { + pins = "gpio28","gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio28","gpio94"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_iris { + /* RESET ULTRA, VANA VDIG ULTRA*/ + mux { + pins = "gpio28","gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio28","gpio94"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; +&cam_sensor_active_macro { + /* RESET ULTRA, VANA VDIG ULTRA*/ + mux { + pins = "gpio27","gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio27","gpio94"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; +}; + +&cam_sensor_suspend_macro { + /* RESET ULTRA, VANA VDIG ULTRA*/ + mux { + pins = "gpio27","gpio94"; + function = "gpio"; + }; + + config { + pins = "gpio27","gpio94"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; +}; + +//camera voltage end diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/vayu/vayu-sm8150-camera-sensor-mtp.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/vayu/vayu-sm8150-camera-sensor-mtp.dtsi new file mode 100644 index 000000000000..0919672f22d8 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/vayu/vayu-sm8150-camera-sensor-mtp.dtsi @@ -0,0 +1,507 @@ +/* + * Copyright (c) 2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021 XiaoMi, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +&soc { + led_flash_rear: qcom,camera-flash@0 { + cell-index = <0>; + reg = <0x00 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_rear_aux1: qcom,camera-flash@1 { + cell-index = <1>; + reg = <0x01 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + led_flash_front: qcom,camera-flash@2 { + cell-index = <2>; + reg = <0x02 0x00>; + compatible = "qcom,camera-flash"; + wled-flash-support; + flash-source = <&wled_flash>; + torch-source = <&wled_torch>; + switch-source = <&wled_switch>; + status = "ok"; + }; + + led_flash_rear_aux2: qcom,camera-flash@3 { + cell-index = <3>; + reg = <0x03 0x00>; + compatible = "qcom,camera-flash"; + flash-source = <&pm8150l_flash0 &pm8150l_flash1>; + torch-source = <&pm8150l_torch0 &pm8150l_torch1>; + switch-source = <&pm8150l_switch2>; + status = "ok"; + }; + + actuator_rear_regulator: gpio-regulator@1 { + compatible = "regulator-fixed"; + reg = <0x01 0x00>; + regulator-name = "actuator_rear_regulator"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-enable-ramp-delay = <135>; + enable-active-high; + gpio = <&tlmm 24 0>; + vin-supply = <&pm8150l_bob>; + }; + +}; + +&cam_cci0 { + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; + + actuator_rear: qcom,actuator@0 { + cell-index = <0>; + reg = <0x0>; + compatible = "qcom,actuator"; + cci-device = <0>; + cci-master = <1>; + cam_vaf-supply = <&actuator_rear_regulator>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <2800000>; + rgltr-load-current = <0>; + }; + + eeprom_rear: qcom,eeprom@0 { + cell-index = <0>; + reg = <0>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8150l_l1>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio","cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 14 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK0"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + + }; + + eeprom_front: qcom,eeprom@2 { + cell-index = <2>; + reg = <0x2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8150l_l1>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio","cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 13 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK2"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + + }; + //imx582 + qcom,cam-sensor@0 { + cell-index = <0>; + compatible = "qcom,cam-sensor"; + reg = <0x0>; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + led-flash-src = <&led_flash_rear>; + actuator-src = <&actuator_rear>; + eeprom-src = <&eeprom_rear>; + cam_vio-supply = <&pm8150l_l1>; + cam_vana-supply = <&pm8150_s5>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + cam_v_custom2-supply = <&pm8150l_bob>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk", "cam_v_custom2"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 1904000 1352000 0 3008000>; + rgltr-max-voltage = <1800000 2040000 1352000 0 4000000>; + rgltr-load-current = <180000 112000 120000 0 80000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rear>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rear>; + gpios = <&tlmm 14 0>, + <&tlmm 30 0>, + <&tlmm 59 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0", + "CAM_VDIG0"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + //s5k3t2 + qcom,cam-sensor@2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + reg = <0x2>; + csiphy-sd-index = <2>; + sensor-position-roll = <270>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&pm8150l_l1>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", + "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 1352000 0>; + rgltr-max-voltage = <1800000 4000000 1352000 0>; + rgltr-load-current = <1000 80000 120000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_front>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_front>; + gpios = <&tlmm 13 0>, + <&tlmm 54 0>, + <&tlmm 118 0>; + gpio-reset = <1>; + gpio-vdig = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2", + "CAM_VDIG2"; + sensor-mode = <0>; + cci-device = <0>; + cci-master = <0>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; + +&cam_cci1 { + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; + + eeprom_rear_aux: qcom,eeprom@1 { + cell-index = <1>; + reg = <0x1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8150l_l1>; + cam_vana-supply = <&pm8150l_bob>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 0>; + rgltr-max-voltage = <1800000 4000000 0>; + rgltr-load-current = <180000 80000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 15 0>, + <&tlmm 23 0>, + <&tlmm 94 0>, + <&tlmm 125 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-standby = <3>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1", + "CAM_VANA1", + "CAM_PWDN1"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + + }; + + eeprom_rear_ultra: qcom,eeprom@3 { + cell-index = <3>; + reg = <0x3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8150l_l1>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <1000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_iris>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_iris>; + gpios = <&tlmm 16 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK3"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + eeprom_rear_macro: qcom,eeprom@4 { + cell-index = <4>; + reg = <0x4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&pm8150l_l1>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 0>; + rgltr-max-voltage = <1800000 0>; + rgltr-load-current = <180000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_macro>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_macro>; + gpios = <&tlmm 16 0>; + gpio-req-tbl-num = <0>; + gpio-req-tbl-flags = <1>; + gpio-req-tbl-label = "CAMIF_MCLK4"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + + //ov02b1b + qcom,cam-sensor@1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + reg = <0x1>; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_rear_aux>; + cam_vio-supply = <&pm8150l_l1>; + cam_vana-supply = <&pm8150l_bob>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 0>; + rgltr-max-voltage = <1800000 4000000 0>; + rgltr-load-current = <180000 80000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rear_aux>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rear_aux>; + gpios = <&tlmm 15 0>, + <&tlmm 23 0>, + <&tlmm 94 0>, + <&tlmm 125 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-standby = <3>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1", + "CAM_VANA1", + "CAM_PWDN1"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + //ov8856 + qcom,cam-sensor@3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + reg = <0x3>; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_rear_ultra>; + led-flash-src = <&led_flash_rear_aux1>; + cam_vio-supply = <&pm8150l_l1>; + cam_vana-supply = <&pm8150l_bob>; + cam_vdig-supply = <&pm8150l_s8>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_vdig", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 3008000 1352000 0>; + rgltr-max-voltage = <1800000 4000000 1352000 0>; + rgltr-load-current = <1000 80000 12000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_iris>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_iris>; + gpios = <&tlmm 16 0>, + <&tlmm 28 0>, + <&tlmm 94 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-req-tbl-num = <0 1 2>; + gpio-req-tbl-flags = <1 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3", + "CAM_VANA3"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; + //hi259 + qcom,cam-sensor@4 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + reg = <0x4>; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_rear_macro>; + led-flash-src = <&led_flash_rear_aux2>; + cam_vio-supply = <&pm8150l_l1>; + cam_vana-supply = <&pm8150l_bob>; + cam_clk-supply = <&titan_top_gdsc>; + regulator-names = "cam_vio", "cam_vana", "cam_clk"; + rgltr-cntrl-support; + pwm-switch; + rgltr-min-voltage = <1800000 3008000 0>; + rgltr-max-voltage = <1800000 4000000 0>; + rgltr-load-current = <180000 112000 0>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_macro>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_macro>; + gpios = <&tlmm 16 0>, + <&tlmm 27 0>, + <&tlmm 94 0>, + <&tlmm 84 0>; + gpio-reset = <1>; + gpio-vana = <2>; + gpio-standby = <3>; + gpio-req-tbl-num = <0 1 2 3>; + gpio-req-tbl-flags = <1 0 0 0>; + gpio-req-tbl-label = "CAMIF_MCLK4", + "CAM_RESET4", + "CAM_VANA4", + "CAM_PWDN4"; + sensor-mode = <0>; + cci-device = <1>; + cci-master = <1>; + status = "ok"; + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "turbo"; + clock-rates = <19200000>; + }; +}; + + diff --git a/arch/arm64/boot/dts/qcom/xiaomi/overlay/vayu/vayu-sm8150.dtsi b/arch/arm64/boot/dts/qcom/xiaomi/overlay/vayu/vayu-sm8150.dtsi new file mode 100644 index 000000000000..2e2470c20d76 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/xiaomi/overlay/vayu/vayu-sm8150.dtsi @@ -0,0 +1,1991 @@ +/* +this file is for attribution only of vayu +And public attribution of xiaomi platforms(like J20S and so and) +*/ +#include "vayu-pinctrl.dtsi" +#include "../common/xiaomi-sm8150-common.dtsi" +#include "vayu-sm8150-camera-sensor-mtp.dtsi" + +&ufshc_mem { + vcc-voltage-level = <2504000 2950000>; + vcc-low-voltage-sup; + qcom,vccq-parent-supply = <&pm8150l_s8>; + qcom,vccq-parent-max-microamp = <210000>; + vccq-supply = <&pm8150_l9>; + vccq-max-microamp = <700000>; +}; + +#include "../common/smb1390.dtsi" + + + +&pm8150b_fg { + qcom,battery-data = <&vayu_batterydata>; + qcom,rapid-soc-dec-en; + qcom,soc-scale-mode-en; + qcom,five-pin-battery; + qcom,soc-hi-res; + qcom,soc_decimal_rate = < + 0 38 + 10 35 + 20 33 + 30 33 + 40 33 + 50 33 + 60 33 + 70 30 + 80 25 + 90 20 + 95 10 >; + qcom,ki-coeff-low-chg = <315>; + qcom,ki-coeff-med-chg = <183>; + qcom,fg-sys-term-current = <(-300)>; + qcom,fg-ffc-sys-term-current = <(-1160)>; + qcom,fg-cutoff-voltage = <3400>; + qcom,fg-cutoff-current = <200>; + qcom,fg-empty-voltage = <3100>; + qcom,soc-scale-vbatt-mv = <3600>; + qcom,fg-batt-temp-delta = <6>; + qcom,fg-force-load-profile; + qcom,shutdown-delay-enable; + /* ESR fast calibration */ + qcom,fg-esr-timer-chg-fast = <0 7>; + qcom,fg-esr-timer-dischg-fast = <0 7>; + qcom,fg-esr-timer-chg-slow = <0 96>; + qcom,fg-esr-timer-dischg-slow = <0 96>; + qcom,fg-esr-cal-soc-thresh = <26 230>; + qcom,fg-esr-cal-temp-thresh = <10 40>; + qcom,ki-coeff-chg-med-hi-thresh-ma = <1000>; + qcom,ki-coeff-chg-low-med-thresh-ma = <500>; + qcom,ffc-ki-coeff-chg-med-hi-thresh-ma = <3900>; + qcom,ffc-ki-coeff-chg-low-med-thresh-ma = <3500>; +}; + +&pm8150b_charger { + qcom,sec-charger-config = <0>; + qcom,usb-icl-ua = <3000000>; + qcom,fcc-max-ua = <5900000>; + qcom,fv-max-uv = <4475000>; + qcom,non-fcc-fv-max-uv = <4450000>; + //qcom,chg-warm-th= <450>; + //qcom,chg-cool-th= <150>; + qcom,auto-recharge-soc = <99>; + qcom,chg-term-src = <1>; + qcom,chg-term-current-ma = <(-200)>; + mi,use-bq-pump; + qcom,usbpd-phandle = <&pm8150b_pdphy>; + qcom,battery-data = <&vayu_batterydata>; + //mi,six-pin-step-chg-params = <4250000 6000000 + // 4450000 5400000 + // 4480000 4000000>; + //mi,six-pin-step-chg; + //mi,six-pin-soc-th = <45>; + mi,fcc-batt-unverify-ua = <2000000>; + mi,support-ffc; + qcom,disable-suspend-on-collapse; + qcom,thermal-mitigation = <3000000 2800000 2600000 2400000 2200000 2100000 2000000 + 1800000 1600000 1500000 1400000 1200000 1000000 900000 + 800000 500000>; + qcom,thermal-mitigation-icl + = <2800000 2700000 2600000 2400000 2200000 2100000 2000000 + 2000000 2000000 2000000 2000000 2000000 2000000 2000000 + 2000000 2000000>; + qcom,thermal-mitigation-dcp + = <1800000 1800000 1800000 1800000 1800000 1800000 1800000 + 1800000 1800000 1700000 1600000 1400000 1200000 1100000 + 1100000 1000000>; + qcom,thermal-mitigation-qc2 + = <1500000 1500000 1500000 1500000 1450000 1400000 1350000 + 1300000 1150000 1100000 1000000 900000 850000 750000 + 650000 500000>; + qcom,thermal-fcc-qc3-normal + = <3200000 3000000 2800000 2600000 2500000 2400000 2300000 + 2200000 2100000 1800000 1600000 1400000 1200000 1000000 + 750000 750000>; + qcom,thermal-fcc-qc3-cp + = <3600000 3600000 3600000 3600000 3200000 3200000 3200000 + 3200000 3100000 2800000 2400000 2200000 2000000 1300000 + 750000 300000>; + qcom,thermal-fcc-qc3-classb-cp + = <4800000 4700000 4600000 4500000 4400000 4200000 4200000 + 4200000 4000000 3600000 3400000 3200000 3000000 2200000 + 1000000 300000>; + qcom,thermal-mitigation-pd-base + = <3000000 2800000 2600000 2500000 2500000 2500000 2500000 + 2500000 2500000 2400000 2200000 2000000 1600000 1300000 + 1000000 500000>; + qcom,thermal-fcc-pps-cp + = <4800000 4700000 4600000 4500000 4400000 4200000 4200000 + 4200000 4000000 3600000 3400000 3200000 3000000 2200000 + 1000000 300000>; + qcom,thermal-fcc-pps-bq + = <6000000 5700000 5475000 5250000 5025000 4800000 4575000 + 4350000 4100000 3500000 3000000 2400000 2000000 1500000 + 1000000 500000>; + qcom,thermal-fcc-qc3-cp + = <4800000 4600000 4400000 4200000 4000000 3800000 3600000 + 3400000 3000000 2600000 2400000 2200000 2000000 1300000 + 1000000 300000>; + qcom,thermal-fcc-qc3-classb-cp + = <5100000 4700000 4300000 4000000 3600000 3500000 3400000 + 3400000 3400000 3200000 2500000 2200000 2000000 1300000 + 1000000 300000>; + qcom,thermal-mitigation-pd-base + = <3000000 2800000 2600000 2400000 2200000 2000000 1800000 + 1600000 1600000 1400000 1200000 1100000 1050000 1000000 + 950000 500000>; + qcom,thermal-mitigation-voice + = <6000000 2200000 2200000 1000000 1000000 800000 800000 + 800000 800000 700000 700000 600000 600000 600000 + 500000 400000>; + + + io-channels = <&pm8150b_vadc ADC_MID_CHG_DIV6>, + <&pm8150b_vadc ADC_USB_IN_V_16>, + <&pm8150b_vadc ADC_USB_IN_I>, + <&pm8150b_vadc ADC_SBUx>, + <&pm8150b_vadc ADC_VPH_PWR>, + <&pm8150b_vadc ADC_CHG_TEMP>; + io-channel-names = "mid_voltage", + "usb_in_voltage", + "usb_in_current", + "sbux_res", + "vph_voltage", + "chg_temp"; +// qcom,battery-data = <&mtp_batterydata>; + dpdm-supply = <&usb2_phy0>; + qcom,distinguish-qc-class-ab; + qcom,lpd-disable; + qcom,sw-jeita-enable; + qcom,step-charging-enable; + qcom,wd-bark-time-secs = <16>; +}; + +&ext_5v_boost { + status = "disable"; +}; + +&pm8150b_pdphy { + mi,non-qcom-pps-ctrl; +}; + +&qupv3_se4_i2c { + #address-cells = <1>; + #size-cells = <0>; + status = "ok"; + bq25970-standalone@66 { + compatible = "ti,bq2597x-standalone"; + reg = <0x66>; + interrupt-parent = <&tlmm>; + interrupts = <10 0x2002>; + pinctrl-names = "default"; + pinctrl-0 = <&bq2597x_master_int_default &bq2597x_master_int_suspend>; + + /*ti,bq2597x,bat-ovp-disable;*/ + ti,bq2597x,bat-ovp-alarm-disable; + ti,bq2597x,bat-ocp-disable; + ti,bq2597x,bat-ocp-alarm-disable; + ti,bq2597x,bat-ucp-alarm-disable; + ti,bq2597x,bat-ucp-disable; + + /*ti,bq2597x,bus-ovp-alarm-disable; + ti,bq2597x,bus-ocp-disable; + ti,bq2597x,bus-ocp-alarm-disable;*/ + ti,bq2597x,bat-therm-disable; + ti,bq2597x,bus-therm-disable; + ti,bq2597x,die-therm-disable; + + ti,bq2597x,bat-ovp-threshold = <4550>; + ti,bq2597x,bat-ovp-alarm-threshold = <4525>; + //ti,bq2597x,bat-ocp-threshold = <8000>; + //ti,bq2597x,bat-ocp-alarm-threshold = <7500>; + + ti,bq2597x,bus-ovp-threshold = <12000>; + ti,bq2597x,bus-ovp-alarm-threshold = <11000>; + ti,bq2597x,bus-ocp-threshold = <3750>; + ti,bq2597x,bus-ocp-alarm-threshold = <3500>; + + //ti,bq2597x,bat-ucp-alarm-threshold = <2000>; + + ti,bq2597x,bat-therm-threshold = <0x15>;/*4.1%*/ + ti,bq2597x,bus-therm-threshold = <0x15>;/*4.1%*/ + ti,bq2597x,die-therm-threshold = <145>; + + ti,bq2597x,ac-ovp-threshold = <14>; + //ti,bq2597x,sense-resistor-mohm = <2>; + + }; + + ln8000_charger@51 { + compatible = "lionsemi,ln8000"; + reg = <0x51>; + ln8000_charger,irq_index = <0x128>; + ln8000_charger,bat-ovp-threshold = <0x11d0>; + ln8000_charger,bat-ovp-alarm-threshold = <0x11ad>; + ln8000_charger,bus-ovp-threshold = <0x32c8>; + ln8000_charger,bus-ovp-alarm-threshold = <0x2af8>; + ln8000_charger,bus-ocp-threshold = <0xea6>; + ln8000_charger,bus-ocp-alarm-threshold = <0xdac>; + ln8000_charger,ntc-alarm-cfg = <0xe2>; + ln8000_charger,tdie-prot-disable; + ln8000_charger,tbus-mon-disable; + ln8000_charger,tbat-mon-disable; + ln8000_charger,iin-ocp-disable; + ln8000_charger,iin-reg-disable; + ln8000_charger,tdie-reg-disable; + ln8000_charger,vbat-reg-disable; + }; +}; + +&soc { + cp_qc30 { + compatible = "xiaomi,cp-qc30"; + status = "ok"; + mi,qc3-bat-volt-max = <4420>; + mi,qc3-bat-curr-max = <3600>; + mi,qc3-bus-volt-max = <12000>; + mi,qc3-bus-curr-max = <2100>; + mi,qc3-battery-warm-th = <450>; + mi,use-qcom-gauge; + //mi,cp-sec-enable; + }; + + usbpd_pm { + compatible = "xiaomi,usbpd-pm"; + status = "ok"; + mi,pd-bat-volt-max = <4500>; + mi,pd-ffc-bat-volt-max = <4480>; + mi,pd-bat-curr-max = <6000>; + mi,pd-bus-volt-max = <12000>; + mi,pd-bus-curr-max = <3000>; + mi,pd-non-ffc-bat-volt-max = <4450>; + mi,pd-bus-curr-compensate = <0>; + mi,pd-battery-warm-th = <450>; + mi,use-qcom-gauge; + //mi,cp-sec-enable; + }; + + onewire_gpio: onewire_gpio { + compatible = "xiaomi,onewire_gpio"; + label = "xm_onewire"; + xiaomi,version = <1>; + xiaomi,ow_gpio = <&tlmm 21 0x00>; + mi,onewire-gpio-cfg-addr = <0x03515000 0x4>; + xiaomi,gpio_number = <21>; + pinctrl-names = "onewire_active", "onewire_sleep"; + pinctrl-0 = <&onewire_gpio_active>; + pinctrl-1 = <&onewire_gpio_sleep>; + status = "ok"; + }; + vayu_batterydata: qcom,battery-data { + qcom,batt-id-range-pct = <15>; + #include "../common/battery/fg-gen4-batterydata-vayu-NVT-5160mah.dtsi" + #include "../common/battery/fg-gen4-batterydata-vayu-sunwoda-5160mah.dtsi" + }; + + maxim_ds28e16: maxim_ds28e16 { + compatible = "maxim,ds28e16"; + label = "max_ds28e16"; + maxim,version = <1>; + status = "ok"; + }; + + simtray { + compatible = "xiaomi,simtray-status"; + status-gpio = <&tlmm 112 0x00>; + }; +}; + +&qupv3_se4_i2c { + status = "ok"; + tas2557@4c { + status = "disabled"; + compatible = "ti,tas2557"; + reg = <0x4c>; + //ti,cdc-reset-gpio = <&tlmm 59 0>; + ti,irq-gpio = <&tlmm 60 0>; + ti,i2s-bits = <16>; + ti,bypass-tmax = <0>; + }; + + fsa4480@43 { + status = "disabled"; + }; + + cs35l41@40 { + status = "disabled"; + #sound-dai-cells = <1>; + compatible = "cirrus,cs35l41"; + cs,cdc-reset-gpio = <&tlmm 89 0x01>; + reg = <0x40>; + pinctrl-names = "cs35l41_irq_default"; + pinctrl-0 = <&cs35l41_int_default>; + interrupt-parent = <&tlmm>; + interrupts = <10 8>; + + cirrus,temp-warn_threshold = <3>; + cirrus,boost-peak-milliamp = <4000>; + cirrus,boost-ind-nanohenry = <1000>; + cirrus,boost-cap-microfarad = <15>; + cirrus,gpio-config2 { + cirrus,gpio-src-select = <0x4>; + cirrus,gpio-output-enable; + }; +/* + VA-supply = <&dummy_vreg>; + VP-supply = <&dummy_vreg>; + interrupt-parent = <&tlmm>; + interrupts = <11 8>; + reset-gpios = <&tlmm 7 0x01>; + VA-supply = <&pm8998_s4>; + VP-supply = <&audio_vsys>; + cirrus,boost-peak-milliamp = <4500>; + cirrus,boost-ind-nanohenry = <1000>; + cirrus,boost-cap-microfarad = <15>; + cirrus,gpio-config2 { + cirrus,gpio-src-select = <0x4>; + cirrus,gpio-output-enable; + }; +*/ + }; +}; + +&qupv3_se7_i2c { + status = "ok"; + tas256x:tas256x@4c { + #sound-dai-cells = <0>; + compatible = "ti,tas256x";/*or "ti,tas2564" or "ti,tas256x" */ + reg = <0x4c>;//register tas256x_i2c_driver + ti,left-channel = <0x4d>; //receiver address + ti,right-channel = <0x4c>; //speaker address + ti,channels = <2>; /* channel number */ + ti,reset-gpio = <&tlmm 89 0>; //SPKR_RST1 + ti,reset-gpio2 = <&tlmm 92 0>; //SPKR_RST2 + pinctrl-names = "default"; + //pinctrl-0 = <&reset_stat_default>; + //ti,reset-gpio = <&pm6150l_gpios 8 GPIO_ACTIVE_LOW>; + ti,irq-gpio = <&tlmm 90 0>;//spkr_int1 left + ti,irq-gpio2 = <&tlmm 91 0>;//spkr_int2 right + status = "ok"; + ti,iv-width = <16>; + ti,vbat-mon = <0>; + }; +}; + +&smb1390 { + status = "disabled"; +}; + +&smb1390_charger { + status = "disabled"; +}; + +&usb0 { + dwc3@a600000 { + usb-phy = <&usb2_phy0>, <&usb_nop_phy>; + maximum-speed = "high-speed"; + }; +}; + +&usb2_phy0 { + qcom,param-override-seq = + <0x84 0x70 + 0x2c 0x74>; +}; + +&usb_qmp_dp_phy { + status = "disabled"; +}; + +&usb1 { + extcon = <&extcon_usb1>; + status = "disabled"; +}; + +&usb2_phy1 { + status = "disabled"; +}; + +&usb_qmp_phy { + status = "disabled"; +}; + +&soc { + touch_vddio_vreg: touch_vddio_vreg { + compatible = "regulator-fixed"; + regulator-name = "disp_vddio_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + gpio = <&tlmm 100 0>; + }; + + vdd_boost_vreg: vdd_boost_vreg { + compatible = "regulator-fixed"; + regulator-name = "vdd_boost_vreg"; + startup-delay-us = <4000>; + enable-active-high; + regulator-always-on; + gpio = <&pm8150b_gpios 5 0>; + }; + + disp_vci_vreg: disp_vci_vreg { + compatible = "regulator-fixed"; + regulator-name = "disp_vci_vreg"; + start-delay-us = <4000>; + enable-active-high; + regulator-boot-on; + gpio = <&tlmm 21 0>; + }; + + fingerprint_goodix { + compatible = "goodix,fingerprint"; + goodix,gpio-reset = <&tlmm 37 0x0>; + goodix,gpio-irq = <&tlmm 120 0x0>; + //goodix.gpio_pwr = <&tlmm 125 0x0>; + //fp_vdd_vreg = <&pm8150l_l7>; + status = "ok"; + }; + + + fingerprint_fpc { + compatible = "fpc,fpc1020"; + fpc,gpio_rst = <&tlmm 37 0x0>; + fpc,gpio_irq = <&tlmm 120 0x0>; + pinctrl-names = "fpc1020_reset_reset", + "fpc1020_reset_active", + "fpc1020_irq_active"; + + pinctrl-0 = <&msm_gpio_37>; + pinctrl-1 = <&msm_gpio_37_output_high>; + pinctrl-2 = <&msm_gpio_120>; + status = "ok"; + }; + + + xiaomi_touch { + compatible = "xiaomi-touch"; + status = "ok"; + touch,name = "xiaomi-touch"; + }; + + testing_mode { + compatible = "modem,testing-mode"; + status-gpio = <&tlmm 81 0x00>, + <&tlmm 133 0x00>; + debounce-time = <30>; + pinctrl-names = "default"; + pinctrl-0 = <&ant_sub_ctrl_irq &ant_top_ctrl_irq>; + }; +}; + +/*Touch SPI state init*/ +&qupv3_se17_spi_active { + mux { + pins = "gpio55", "gpio56", "gpio57"; + function = "qup17"; + }; + + config { + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <6>; + // bias-disable; + bias-pull-down; + }; +}; + +&qupv3_se17_spi_sleep { + mux { + pins = "gpio55", "gpio56", "gpio57"; + function = "gpio"; + }; + + config { + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <6>; + bias-pull-down; + }; +}; + +&qupv3_se17_spi { + pinctrl-0 = <&qupv3_se17_spi_active>; + pinctrl-1 = <&qupv3_se17_spi_sleep>; +}; + +/*IC int pin, rst pin init*/ +&tlmm { + ts_mux { + ts_int_active: ts_int_active { + mux { + pins = "gpio122"; + function = "gpio"; + }; + + config { + pins = "gpio122"; + drive-strength = <16>; + bias-pull-down; + }; + }; + + ts_reset_active: ts_reset_active { + mux { + pins = "gpio12"; + function = "gpio"; + }; + + config { + pins = "gpio12"; + drive-strength = <16>; + bias-pull-up; + }; + }; + + ts_cs_active: ts_cs_active { + mux { + pins = "gpio58"; + function = "qup17"; + }; + + config { + pins = "gpio58"; + drive-strength = <6>; + bias-disable; + }; + }; + + ts_cs_suspend: ts_cs_suspend { + mux { + pins = "gpio58"; + function = "gpio"; + }; + + config { + pins = "gpio58"; + drive-strength = <6>; + bias-pull-down; + output-low; + }; + }; + }; +}; + +&ts_int_suspend { + mux { + pins = "gpio122"; + function = "gpio"; + }; + + config { + pins = "gpio122"; + drive-strength = <16>; + bias-disable; + input-enable; + }; +}; + +&ts_reset_suspend { + mux { + pins = "gpio12"; + function = "gpio"; + }; + + config { + pins = "gpio12"; + drive-strength = <16>; + bias-disable; + }; +}; + +&qupv3_se17_spi { + status = "ok"; + touch_spi@0 { + compatible = "xiaomi,spi-for-tp"; + reg = <0>; + status = "ok"; + spi-max-frequency = <10000000>; //10M + }; +}; + +/* Novatek device tree node */ +&soc { + ts_novatek { + compatible = "novatek,NVT-ts-spi"; + status = "ok"; + spi-max-frequency = <10000000>; /*4800000,9600000,15000000,19200000 10M*/ + novatek,reset-gpio = <&tlmm 12 0x00>; + novatek,irq-gpio = <&tlmm 122 0x2001>; + pinctrl-names = "pmx_ts_active", "pmx_ts_suspend"; + pinctrl-0 = <&ts_int_active &ts_reset_active &ts_cs_active>; + pinctrl-1 = <&ts_int_suspend &ts_reset_suspend &ts_cs_suspend>; + /* 672 */ + /*novatek,swrst-n8-addr = <0x01F01A>;*/ + /* 672A */ + novatek,swrst-n8-addr = <0x03F0FE>; + novatek,spi-rd-fast-addr = <0x03F310>; + /* MP */ + novatek,mp-support-dt; + novatek,config-array-size = <2>; + novatek,cfg_0 { + novatek,tp-vendor = <0x46>; + novatek,display-maker = <0x36>; + novatek,fw-name = "j20s_novatek_ts_fw01.bin"; + novatek,mp-name = "j20s_novatek_ts_mp01.bin"; + novatek,clicknum-file-name = "nvt+tianma"; + }; + novatek,cfg_1 { + novatek,tp-vendor = <0x53>; + novatek,display-maker = <0x42>; + novatek,fw-name = "j20s_novatek_ts_fw02.bin"; + novatek,mp-name = "j20s_novatek_ts_mp02.bin"; + novatek,clicknum-file-name = "nvt+csot"; + }; + /* for Xiaomi J20S 672C CSOT6.67" module */ + novatek-mp-criteria-594B@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "novatek-mp-criteria-594B"; + /* MP Config */ + IC_X_CFG_SIZE = <18>; + IC_Y_CFG_SIZE = <36>; + IC_KEY_CFG_SIZE = <4>; + X_Channel = <18>; + Y_Channel = <36>; + AIN_X = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17>; + AIN_Y = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 + 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35>; + AIN_KEY = <0 1 2 0xFF>; + /* MP Criteria */ + PS_Config_Lmt_Short_Rawdata_P = < + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 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14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 14008 + 14008 14008 14008>; + + PS_Config_Lmt_Short_Rawdata_N = < + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 + 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 10000 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5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 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(-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511)>; + + PS_Config_Lmt_FW_Rawdata_P = < + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 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5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 5120 + 5120 5120 5120>; + + PS_Config_Lmt_Open_Rawdata_N = < + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) (-511) + (-511) (-511) (-511)>; + + PS_Config_Lmt_FW_Rawdata_P = < + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 3840 + 3840 3840 3840>; + + PS_Config_Lmt_FW_Rawdata_N = < + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 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240 240 240 240 240 240 240 240 240 240 240 240 + 240 240 240>; + + PS_Config_Lmt_FW_CC_P = < + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 314 + 314 314 314>; + + PS_Config_Lmt_FW_CC_N = < + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 + 0 0 0>; + + PS_Config_Lmt_FW_Diff_P = < + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 75 + 75 75 75 75 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(-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) (-75) + (-75) (-75) (-75)>; + + PS_Config_Diff_Test_Frame = <50>; + }; + }; +}; + +&qupv3_se17_i2c { + status = "ok"; + fts@49 { + compatible = "st,fts"; + reg = <0x49>; + interrupt-parent = <&tlmm>; + interrupts = <122 0x2008>; + pinctrl-names = "pmx_ts_active", "pmx_ts_suspend"; + pinctrl-0 = <&ts_active>; + pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; + vdd-supply = <&touch_vddio_vreg>; + avdd-supply = <&pm8150l_l1>; + fts,pwr-reg-name = "avdd"; + fts,bus-reg-name = "vdd"; + fts,irq-gpio = <&tlmm 122 0x2008>; + fts,irq-gpio-name = "fts_irq"; + fts,reset-gpio-enable; + fts,reset-gpio = <&tlmm 12 0x00>; + fts,reset-gpio-name = "fts_rst"; + fts,irq-flags = <0x2008>; // IRQF_ONESHOT | IRQF_TRIGGER_LOW + fts,x-max = <1080>; + fts,y-max = <2340>; + fts,default-fw-name = "st_fts_f1.ftb"; + fts,config-array-size = <1>; + fts,dump-click-count; + fts,touch-up-threshold-min = <40>; + fts,touch-up-threshold-max = <120>; + fts,touch-up-threshold-def = <80>; + fts,touch-tolerance-min = <5>; + fts,touch-tolerance-max = <35>; + fts,touch-tolerance-def = <25>; + fts,touch-wgh-min-def = <1>; + fts,touch-wgh-min-max = <15>; + fts,touch-wgh-min-min = <0>; + fts,touch-wgh-max-def = <5>; + fts,touch-wgh-max-max = <15>; + fts,touch-wgh-max-min = <0>; + fts,touch-wgh-step-def = <1>; + fts,touch-wgh-step-max = <2>; + fts,touch-wgh-step-min = <0>; + fts,edgefilter-leftrigt-def = <45>; + fts,edgefilter-topbottom-def = <0>; + fts,edgefilter-top-ingamemode = <0>; + fts,edgefilter-bottom-ingamemode = <0>; + fts,edgefilter-area-step1 = <100>; + fts,edgefilter-area-step2 = <170>; + fts,edgefilter-area-step3 = <250>; + fts,cfg_0 { + fts,tp-vendor = <0x48>; + fts,fw-name = "st_fts_f1.ftb"; + fts,limit-name = "stm_fts_production_limits.csv"; + fts,clicknum-file-name = "fts+sdc"; + }; + }; +}; + +&qupv3_se9_i2c { + status = "ok"; + nq@28 { + compatible = "qcom,nq-nci"; + reg = <0x28>; + qcom,nq-irq = <&tlmm 47 0x00>; + qcom,nq-ven = <&tlmm 102 0x00>; + qcom,nq-firm = <&tlmm 48 0x00>; + qcom,nq-clkreq = <&tlmm 113 0x00>; + //qcom,nq-esepwr = <&tlmm 42 0x00>; + interrupt-parent = <&tlmm>; + interrupts = <47 0>; + interrupt-names = "nfc_irq"; + pinctrl-names = "nfc_active", "nfc_suspend"; + pinctrl-0 = <&nfc_int_active &nfc_enable_active + &nfc_clk_req_active>; + pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend + &nfc_clk_req_suspend>; + }; +}; + +#include "../common/ir.dtsi" + +&pm8150l_lpg { + qcom,lut-patterns = <0 1 2 3 4 5 7 9 11 13 15 + 13 11 9 7 5 4 3 2 1 0>; +}; + +&pwm_lpg1 { + qcom,lpg-chan-id = <1>; + qcom,ramp-step-ms = <100>; + qcom,ramp-pause-hi-count = <2>; + qcom,ramp-pause-lo-count = <2>; + qcom,ramp-low-index = <0>; + qcom,ramp-high-index = <20>; + qcom,ramp-from-low-to-high; + qcom,ramp-pattern-repeat; +}; + +&red_led { + label = "white"; +}; + +&green_led { + status = "disabled"; +}; + +&blue_led { + status = "disabled"; +}; + +&mdss_mdp { + clock-rate = <0 0 0 0 345000000 19200000 300000000 19200000>; +}; + + +&sde_dsi { + vcie-supply = <&disp_vci_vreg>; +}; + +&dsi_samsung_fhd_ea8076_f1mp_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_external_supply>; +}; + +&dsi_samsung_fhd_ea8076_f1p2_2_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_external_supply>; +}; + +&dsi_samsung_fhd_ea8076_f1p2_cmd { + qcom,panel-supply-entries = <&dsi_amoled_panel_pwr_external_supply>; +}; + +&dsi_j20s_36_02_0a_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; +}; + +&dsi_j20s_42_02_0b_video { + qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; +}; + +&pm8150l_wled { + status = "okay"; + qcom,string-cfg = <7>; + qcom,ovp = <28000>; + qcom,fs-current-limit = <22500>; + qcom,cabc-sel = <1>; +}; + + +&pm8150b_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + wp_therm { + reg = ; + label = "wp_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + conn_therm { + reg = ; + label = "conn_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + chg_sbux { + reg = ; + label = "chg_sbux"; + qcom,pre-scaling = <1 3>; + }; + + mid_chg_div6 { + reg = ; + label = "chg_mid"; + qcom,pre-scaling = <1 6>; + }; + + usb_in_i_uv { + reg = ; + label = "usb_in_i_uv"; + qcom,pre-scaling = <1 1>; + }; + + usb_in_v_div_16 { + reg = ; + label = "usb_in_v_div_16"; + qcom,pre-scaling = <1 16>; + }; +}; + +&pm8150_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + vcoin { + reg = ; + label = "vcoin"; + qcom,pre-scaling = <1 3>; + }; + + xo_therm { + reg = ; + label = "xo_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + quiet_therm { + reg = ; + label = "quiet_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm0 { + reg = ; + label = "pa_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150l_vadc { + vph_pwr { + reg = ; + label = "vph_pwr"; + qcom,pre-scaling = <1 3>; + }; + + cam_therm0 { + reg = ; + label = "cam_therm0"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + cam_therm1 { + reg = ; + label = "cam_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; + + pa_therm1 { + reg = ; + label = "pa_therm1"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,pre-scaling = <1 1>; + }; +}; + +&pm8150b_adc_tm { + wp_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150_adc_tm { + xo_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + quiet_therm { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&pm8150l_adc_tm { + cam_therm0 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + cam_therm1 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; + + pa_therm1 { + reg = ; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + }; +}; + +&thermal_zones { + wp_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150b_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + xo_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_XO_THERM_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + quiet_therm { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + pa_therm0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cam_therm0 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM1_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + cam_therm1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM2_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; + + pa_therm1 { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-governor = "user_space"; + thermal-sensors = <&pm8150l_adc_tm ADC_AMUX_THM3_PU2>; + trips { + active-config0 { + temperature = <125000>; + hysteresis = <1000>; + type = "passive"; + }; + }; + }; +}; + +&pm8150b_haptics { + qcom,vmax-mv = <2800>; + qcom,play-rate-us = <5102>; + + wf_0 { + /* CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_1 { + /* DOUBLE CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 3e]; + qcom,wf-brake-pattern = [03 01 01 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_2 { + /* TICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 3e]; + qcom,wf-brake-pattern = [03 01 01 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_3 { + /* THUD */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_4 { + /* POP */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [3e 3e]; + qcom,wf-brake-pattern = [02 01 00 00]; + qcom,wf-play-rate-us = <5102>; + }; + wf_5 { + /* HEAVY CLICK */ + qcom,wf-vmax-mv = <3600>; + qcom,wf-pattern = [7e 7e 7e]; + qcom,wf-brake-pattern = [03 03 01 00]; + qcom,wf-play-rate-us = <5102>; + }; +}; + +&soc { + ssc_sensors: qcom,msm-ssc-sensors { + compatible = "qcom,msm-ssc-sensors"; + status = "ok"; + qcom,firmware-name = "slpi_vy"; + }; + + thermal_message: thermal-message { + board-sensor = "quiet_therm"; + }; +}; + +&sdhc_2 { + cd-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; + status = "ok"; + }; + +&tlmm { + /* GPIO_37 : FP_RESET_N */ + msm_gpio_37: msm_gpio_37 { + mux { + pins = "gpio37"; + function = "gpio"; + }; + + config { + pins = "gpio37"; + drive-strength = <2>; + bias-disable; + output-low; + }; + }; + + /* GPIO_37 : FP_RESET_N, state device active*/ + msm_gpio_37_output_high: msm_gpio_37_output_high { + mux { + pins = "gpio37"; + function = "gpio"; + }; + + config { + pins = "gpio37"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; + + /* GPIO_120 : FP_INT_N */ + msm_gpio_120: msm_gpio_120 { + mux { + pins = "gpio120"; + function = "gpio"; + }; + + config { + pins = "gpio120"; + drive-strength = <2>; + bias-pull-down; + }; + }; +}; + diff --git a/arch/arm64/configs/vendor/xiaomi/andromeda.config b/arch/arm64/configs/vendor/xiaomi/andromeda.config new file mode 100644 index 000000000000..501339f6ed33 --- /dev/null +++ b/arch/arm64/configs/vendor/xiaomi/andromeda.config @@ -0,0 +1,15 @@ +# Platform +CONFIG_MACH_XIAOMI_ANDROMEDA=y + +# Audio +CONFIG_SND_SOC_CS35L41=y +CONFIG_MSM_CSPL=y + +# Camera +CONFIG_USE_ROHM_BU64753=y + +# Touchscreen +CONFIG_TOUCHSCREEN_ST_FTS_V521=y +CONFIG_FTS_FOD_AREA_REPORT=y +CONFIG_SECURE_TOUCH=y +CONFIG_I2C_BY_DMA=y diff --git a/arch/arm64/configs/vendor/xiaomi/cepheus.config b/arch/arm64/configs/vendor/xiaomi/cepheus.config new file mode 100644 index 000000000000..600752df98aa --- /dev/null +++ b/arch/arm64/configs/vendor/xiaomi/cepheus.config @@ -0,0 +1,18 @@ +# Platform +CONFIG_MACH_XIAOMI_CEPHEUS=y + +# Audio +CONFIG_SND_SOC_CS35L41=y +CONFIG_MSM_CSPL=y + +# Camera +CONFIG_VCM_AK7374=y + +# Power +CONFIG_IDT_P9220=y + +# Touchscreen +CONFIG_TOUCHSCREEN_ST_FTS_V521=y +CONFIG_FTS_FOD_AREA_REPORT=y +CONFIG_SECURE_TOUCH=y +CONFIG_I2C_BY_DMA=y diff --git a/arch/arm64/configs/vendor/xiaomi/crux.config b/arch/arm64/configs/vendor/xiaomi/crux.config new file mode 100644 index 000000000000..9b0be13a4bcf --- /dev/null +++ b/arch/arm64/configs/vendor/xiaomi/crux.config @@ -0,0 +1,21 @@ +# Platform +CONFIG_MACH_XIAOMI_CRUX=y + +# Audio +CONFIG_SND_SOC_CS35L41=y +CONFIG_MSM_CSPL=y + +# Camera +CONFIG_USE_ROHM_BU64753=y +CONFIG_VCM_AK7374=y + +# Power +CONFIG_RX1619=y +CONFIG_RX1619_TRIM=y +CONFIG_LN8282=y +CONFIG_IDT_P9220=y +CONFIG_HALO_7221=y + +# Touchscreen +CONFIG_TOUCHSCREEN_ST_FTS_V521=y +CONFIG_FTS_FOD_AREA_REPORT=y diff --git a/arch/arm64/configs/vendor/xiaomi/nabu.config b/arch/arm64/configs/vendor/xiaomi/nabu.config new file mode 100644 index 000000000000..cea9413451d6 --- /dev/null +++ b/arch/arm64/configs/vendor/xiaomi/nabu.config @@ -0,0 +1,17 @@ +# Platform +CONFIG_MACH_XIAOMI_NABU=y + +# Audio +CONFIG_SND_SOC_CS35L41_V2=y +CONFIG_MSM_CSPL_V2=y + +# Power +CONFIG_BATT_VERIFY_BY_DS28E16_NABU=y +CONFIG_ONEWIRE_GPIO_NABU=y +CONFIG_IDT_P9418=y +CONFIG_BQ2597X_CHARGE_PUMP=y +CONFIG_CHARGER_LN8000=y + +# Touchscreen +CONFIG_TOUCHSCREEN_NT36523_HOSTDL_SPI=y +CONFIG_TOUCHSCREEN_NVT_DEBUG_FS=y diff --git a/arch/arm64/configs/vendor/xiaomi/raphael.config b/arch/arm64/configs/vendor/xiaomi/raphael.config new file mode 100644 index 000000000000..a8db1f76d035 --- /dev/null +++ b/arch/arm64/configs/vendor/xiaomi/raphael.config @@ -0,0 +1,9 @@ +# Platform +CONFIG_MACH_XIAOMI_RAPHAEL=y + +# Audio +CONFIG_SND_SOC_CS35L41=y +CONFIG_MSM_CSPL=y + +# Touchscreen +CONFIG_TOUCHSCREEN_GOODIX_GTX8=y diff --git a/arch/arm64/configs/vendor/xiaomi/sm8150-common.config b/arch/arm64/configs/vendor/xiaomi/sm8150-common.config new file mode 100644 index 000000000000..e5d24e660125 --- /dev/null +++ b/arch/arm64/configs/vendor/xiaomi/sm8150-common.config @@ -0,0 +1,91 @@ +# DTBO +CONFIG_BUILD_ARM64_DT_OVERLAY=y + +# QCACLD +CONFIG_QCA_CLD_WLAN=y + +# exFAT +CONFIG_EXFAT_FS=y + +# EROFS +CONFIG_EROFS_FS=y + +# initramfs +CONFIG_INITRAMFS_IGNORE_SKIP_FLAG=y + +# pstore +CONFIG_CMDLINE="ramoops_memreserve=4M" +CONFIG_CMDLINE_EXTEND=y +CONFIG_PSTORE=y +CONFIG_PSTORE_CONSOLE=y +CONFIG_PSTORE_PMSG=y +CONFIG_PSTORE_RAM=y +CONFIG_BLK_WBT=y +CONFIG_BLK_WBT_SQ=y +CONFIG_MTD=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_OOPS=y +CONFIG_MTD_BLOCK2MTD=y + +# Audio +CONFIG_SND_SOC_TAS2557=y +CONFIG_TAS2557_REGMAP=y +CONFIG_TAS2557_CODEC=y +CONFIG_TAS2557_MISC=y +CONFIG_SND_SOC_TFA9874=y + +# Backlight +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_KTZ8866=y + +# Camera motor +CONFIG_TI_DRV8846=y + +# Fingerprint +CONFIG_INPUT_FINGERPRINT=y +CONFIG_FINGERPRINT_FPC_TEE=y +CONFIG_FINGERPRINT_GOODIX_TA=y + +# Haptics +CONFIG_INPUT_AW8697_XM_HAPTIC=y + +# IR +CONFIG_IR_SPI=y +CONFIG_LIRC=y +CONFIG_RC_CORE=y +CONFIG_RC_DECODERS=y +CONFIG_MEDIA_RC_SUPPORT=y +CONFIG_RC_DEVICES=y + +# Keyboard +CONFIG_XIAOMI_KEYBOARD=y + +# Power +# CONFIG_SMB1355_SLAVE_CHARGER is not set +# CONFIG_SMB1390_CHARGE_PUMP_PSY is not set +CONFIG_SMB1390_CHARGE_PUMP=y +CONFIG_FRAME_WARN=4096 + +# Proximity +CONFIG_US_PROXIMITY=y + +# Sensors +CONFIG_AKM09970=y + +# Simtray +CONFIG_SIMTRAY_STATUS=y + +# spk-id +CONFIG_HAS_IOMEM=y +CONFIG_MFD_SPK_ID=y + +# TEE +CONFIG_TRUSTY=y + +# Touchscreen +# CONFIG_TOUCHSCREEN_ST is not set + +# Unicode +CONFIG_UNICODE=y +# CONFIG_UNICODE_NORMALIZATION_SELFTEST is not set diff --git a/arch/arm64/configs/vendor/xiaomi/vayu.config b/arch/arm64/configs/vendor/xiaomi/vayu.config new file mode 100644 index 000000000000..f94e0c47c0ea --- /dev/null +++ b/arch/arm64/configs/vendor/xiaomi/vayu.config @@ -0,0 +1,19 @@ +# Platform +CONFIG_MACH_XIAOMI_VAYU=y + +# Audio +CONFIG_SND_SOC_CS35L41=y +CONFIG_MSM_CSPL=y +CONFIG_SND_SOC_TAS256X=y +CONFIG_TAS256X_CODEC=y +CONFIG_TAS256X_REGMAP=y +CONFIG_TAS25XX_ALGO=y + +# Power +CONFIG_BATT_VERIFY_BY_DS28E16=y +CONFIG_ONEWIRE_GPIO=y +CONFIG_BQ2597X_CHARGE_PUMP=y + +# Touchscreen +CONFIG_TOUCHSCREEN_NT36xxx_HOSTDL_SPI=y +CONFIG_TOUCHSCREEN_NVT_DEBUG_FS=y diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h index 7ebcbd1d881d..b06a3615ac43 100644 --- a/arch/x86/include/asm/mmu_context.h +++ b/arch/x86/include/asm/mmu_context.h @@ -313,11 +313,6 @@ static inline int vma_pkey(struct vm_area_struct *vma) return (vma->vm_flags & vma_pkey_mask) >> VM_PKEY_SHIFT; } -#else -static inline int vma_pkey(struct vm_area_struct *vma) -{ - return 0; -} #endif /* diff --git a/drivers/Kconfig b/drivers/Kconfig index 43377a3acb97..e9c11556ccf1 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -225,4 +225,10 @@ source "drivers/sensors/Kconfig" source "drivers/esoc/Kconfig" +source "drivers/halls/Kconfig" + +source "drivers/trusty/Kconfig" + +source "drivers/kernelsu/Kconfig" + endmenu diff --git a/drivers/Makefile b/drivers/Makefile index 4a067525bbdc..8fb865d5445b 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -188,6 +188,9 @@ obj-$(CONFIG_TEE) += tee/ obj-$(CONFIG_MULTIPLEXER) += mux/ obj-$(CONFIG_SENSORS_SSC) += sensors/ obj-$(CONFIG_ESOC) += esoc/ +obj-$(CONFIG_HALLS) += halls/ +obj-$(CONFIG_TRUSTY) += trusty/ # GNSS driver obj-$(CONFIG_GNSS_SIRF) += gnsssirf/ obj-$(CONFIG_GNSS) += gnss/ +obj-$(CONFIG_KSU) += kernelsu/ diff --git a/drivers/char/adsprpc.c b/drivers/char/adsprpc.c index 0957d29a6ee2..0417cf13313e 100644 --- a/drivers/char/adsprpc.c +++ b/drivers/char/adsprpc.c @@ -4619,15 +4619,32 @@ static int fastrpc_probe(struct platform_device *pdev) if (range.addr && !of_property_read_bool(dev->of_node, "restrict-access")) { int srcVM[1] = {VMID_HLOS}; +#ifdef CONFIG_MACH_XIAOMI_SM8150 + int destVM[4] = {VMID_HLOS, VMID_MSS_MSA, VMID_SSC_Q6, + VMID_ADSP_Q6}; +#else int destVM[3] = {VMID_HLOS, VMID_SSC_Q6, VMID_ADSP_Q6}; +#endif +#ifdef CONFIG_MACH_XIAOMI_SM8150 + int destVMperm[4] = {PERM_READ | PERM_WRITE | PERM_EXEC, +#else int destVMperm[3] = {PERM_READ | PERM_WRITE | PERM_EXEC, +#endif +#ifdef CONFIG_MACH_XIAOMI_SM8150 + PERM_READ | PERM_WRITE | PERM_EXEC, +#endif PERM_READ | PERM_WRITE | PERM_EXEC, PERM_READ | PERM_WRITE | PERM_EXEC, }; +#ifdef CONFIG_MACH_XIAOMI_SM8150 + VERIFY(err, !hyp_assign_phys(range.addr, range.size, + srcVM, 1, destVM, destVMperm, 4)); +#else VERIFY(err, !hyp_assign_phys(range.addr, range.size, srcVM, 1, destVM, destVMperm, 3)); +#endif if (err) goto bail; me->range.addr = range.addr; diff --git a/drivers/clk/qcom/mdss/mdss-dsi-pll-7nm.c b/drivers/clk/qcom/mdss/mdss-dsi-pll-7nm.c index dacb68ca8e1f..831db0488804 100644 --- a/drivers/clk/qcom/mdss/mdss-dsi-pll-7nm.c +++ b/drivers/clk/qcom/mdss/mdss-dsi-pll-7nm.c @@ -554,6 +554,12 @@ static void dsi_pll_setup_config(struct dsi_pll_7nm *pll, config->enable_ssc = rsc->ssc_en; config->ssc_center = rsc->ssc_center; +#ifdef CONFIG_MACH_XIAOMI_NABU + if (pll->cphy_enabled) { + config->enable_ssc = false; + } +#endif + if (config->enable_ssc) { if (rsc->ssc_freq) config->ssc_freq = rsc->ssc_freq; diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c index ea51a776c6ca..a8ef00ab1a07 100644 --- a/drivers/cpufreq/cpufreq.c +++ b/drivers/cpufreq/cpufreq.c @@ -2267,6 +2267,12 @@ static int cpufreq_set_policy(struct cpufreq_policy *policy, blocking_notifier_call_chain(&cpufreq_policy_notifier_list, CPUFREQ_INCOMPATIBLE, new_policy); +#ifdef CONFIG_MACH_XIAOMI_SM8150 + /* the adjusted frequency should not exceed thermal limit */ + blocking_notifier_call_chain(&cpufreq_policy_notifier_list, + CPUFREQ_THERMAL, new_policy); +#endif + /* * verify the cpu speed can be set within this limit, which might be * different to the first one diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c index 4b31f35dcc49..4aa005b5c40c 100644 --- a/drivers/gpu/drm/drm_mipi_dsi.c +++ b/drivers/gpu/drm/drm_mipi_dsi.c @@ -1058,6 +1058,20 @@ int mipi_dsi_dcs_set_tear_scanline(struct mipi_dsi_device *dsi, u16 scanline) } EXPORT_SYMBOL(mipi_dsi_dcs_set_tear_scanline); +int mipi_dsi_dcs_set_display_brightness_ss(struct mipi_dsi_device *dsi, + u16 brightness) +{ + u8 payload[2] = { brightness >> 8, brightness & 0xff }; + ssize_t err; + + err = mipi_dsi_dcs_write(dsi, MIPI_DCS_SET_DISPLAY_BRIGHTNESS, + payload, sizeof(payload)); + if (err < 0) + return err; + + return 0; +} + /** * mipi_dsi_dcs_set_display_brightness() - sets the brightness value of the * display diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_defs.h b/drivers/gpu/drm/msm/dsi-staging/dsi_defs.h index 3613e8e1588b..016be31d2732 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_defs.h +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_defs.h @@ -308,6 +308,15 @@ enum dsi_cmd_set_type { DSI_CMD_SET_POST_TIMING_SWITCH, DSI_CMD_SET_QSYNC_ON, DSI_CMD_SET_QSYNC_OFF, + DSI_CMD_SET_DISP_HBM_FOD_ON, + DSI_CMD_SET_DISP_HBM_FOD_OFF, + DSI_CMD_SET_ESD_CHECK, + DSI_CMD_SET_SYNC_PEN_30HZ, + DSI_CMD_SET_SYNC_PEN_60HZ, + DSI_CMD_SET_SYNC_PEN_120HZ, +#if defined(CONFIG_MACH_XIAOMI_VAYU) || defined(CONFIG_MACH_XIAOMI_NABU) + DSI_CMD_SET_MI_READ_LOCKDOWN_INFO, +#endif DSI_CMD_SET_MAX }; @@ -507,6 +516,7 @@ struct dsi_host_common_cfg { bool force_hs_clk_lane; enum dsi_phy_type phy_type; struct dsi_split_link_config split_link; + bool cphy_strength; }; /** diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c index 5dc4961d0a8e..5ad46bc1c4fb 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_display.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_display.c @@ -19,6 +19,8 @@ #include #include +#include + #include "msm_drv.h" #include "sde_connector.h" #include "msm_mmu.h" @@ -59,6 +61,8 @@ static const struct of_device_id dsi_display_dt_match[] = { {} }; +struct dsi_display *primary_display; + static void dsi_display_mask_ctrl_error_interrupts(struct dsi_display *display, u32 mask, bool enable) { @@ -241,7 +245,7 @@ int dsi_display_set_backlight(struct drm_connector *connector, return rc; } -static int dsi_display_cmd_engine_enable(struct dsi_display *display) +int dsi_display_cmd_engine_enable(struct dsi_display *display) { int rc = 0; int i; @@ -285,7 +289,7 @@ static int dsi_display_cmd_engine_enable(struct dsi_display *display) return rc; } -static int dsi_display_cmd_engine_disable(struct dsi_display *display) +int dsi_display_cmd_engine_disable(struct dsi_display *display) { int rc = 0; int i; @@ -471,7 +475,7 @@ static void dsi_display_register_te_irq(struct dsi_display *display) } /* Allocate memory for cmd dma tx buffer */ -static int dsi_host_alloc_cmd_tx_buffer(struct dsi_display *display) +int dsi_host_alloc_cmd_tx_buffer(struct dsi_display *display) { int rc = 0, cnt = 0; struct dsi_display_ctrl *display_ctrl; @@ -1058,6 +1062,7 @@ int dsi_display_set_power(struct drm_connector *connector, int power_mode, void *disp) { struct dsi_display *display = disp; + struct msm_drm_notifier notify_data; int rc = 0; if (!display || !display->panel) { @@ -1065,17 +1070,27 @@ int dsi_display_set_power(struct drm_connector *connector, return -EINVAL; } + notify_data.data = &power_mode; + notify_data.id = MSM_DRM_PRIMARY_DISPLAY; + switch (power_mode) { case SDE_MODE_DPMS_LP1: + msm_drm_notifier_call_chain(MSM_DRM_EARLY_EVENT_BLANK, ¬ify_data); rc = dsi_panel_set_lp1(display->panel); + msm_drm_notifier_call_chain(MSM_DRM_EVENT_BLANK, ¬ify_data); break; case SDE_MODE_DPMS_LP2: + msm_drm_notifier_call_chain(MSM_DRM_EARLY_EVENT_BLANK, ¬ify_data); rc = dsi_panel_set_lp2(display->panel); + msm_drm_notifier_call_chain(MSM_DRM_EVENT_BLANK, ¬ify_data); break; case SDE_MODE_DPMS_ON: if (display->panel->power_mode == SDE_MODE_DPMS_LP1 || - display->panel->power_mode == SDE_MODE_DPMS_LP2) + display->panel->power_mode == SDE_MODE_DPMS_LP2) { + msm_drm_notifier_call_chain(MSM_DRM_EARLY_EVENT_BLANK, ¬ify_data); rc = dsi_panel_set_nolp(display->panel); + msm_drm_notifier_call_chain(MSM_DRM_EVENT_BLANK, ¬ify_data); + } break; case SDE_MODE_DPMS_OFF: default: @@ -5031,11 +5046,82 @@ static int dsi_display_validate_split_link(struct dsi_display *display) return rc; } +static ssize_t sysfs_hbm_read(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct dsi_display *display = dev_get_drvdata(dev); + if (!display->panel) + return 0; + + return scnprintf(buf, PAGE_SIZE, "%d\n", display->panel->hbm_mode); +} + +static ssize_t sysfs_hbm_write(struct device *dev, + struct device_attribute *attr, const char *buf, size_t count) +{ + struct dsi_display *display = dev_get_drvdata(dev); + int ret, hbm_mode; + + if (!display->panel) + return -EINVAL; + + ret = kstrtoint(buf, 10, &hbm_mode); + if (ret) { + pr_err("kstrtoint failed. ret=%d\n", ret); + return ret; + } + + mutex_lock(&display->display_lock); + + display->panel->hbm_mode = hbm_mode; + if (!dsi_panel_initialized(display->panel)) + goto error; + + ret = dsi_display_clk_ctrl(display->dsi_clk_handle, + DSI_CORE_CLK, DSI_CLK_ON); + if (ret) { + pr_err("[%s] failed to enable DSI core clocks, rc=%d\n", + display->name, ret); + goto error; + } + + ret = dsi_panel_apply_hbm_mode(display->panel); + if (ret) + pr_err("unable to set hbm mode\n"); + + ret = dsi_display_clk_ctrl(display->dsi_clk_handle, + DSI_CORE_CLK, DSI_CLK_OFF); + if (ret) { + pr_err("[%s] failed to disable DSI core clocks, rc=%d\n", + display->name, ret); + goto error; + } +error: + mutex_unlock(&display->display_lock); + return ret == 0 ? count : ret; +} + +static DEVICE_ATTR(hbm, 0644, + sysfs_hbm_read, + sysfs_hbm_write); + +static struct attribute *display_fs_attrs[] = { + &dev_attr_hbm.attr, + NULL, +}; +static struct attribute_group display_fs_attrs_group = { + .attrs = display_fs_attrs, +}; + static int dsi_display_sysfs_init(struct dsi_display *display) { int rc = 0; struct device *dev = &display->pdev->dev; + rc = sysfs_create_group(&dev->kobj, &display_fs_attrs_group); + if (rc) + pr_err("failed to create display device attributes"); + if (display->panel->panel_mode == DSI_OP_CMD_MODE) rc = sysfs_create_group(&dev->kobj, &dynamic_dsi_clock_fs_attrs_group); @@ -5488,6 +5574,9 @@ int dsi_display_dev_probe(struct platform_device *pdev) display->pdev = pdev; display->boot_disp = boot_disp; display->dsi_type = dsi_type; +#if defined(CONFIG_MACH_XIAOMI_VAYU) || defined(CONFIG_MACH_XIAOMI_NABU) + display->is_first_boot = true; +#endif dsi_display_parse_cmdline_topology(display, index); @@ -6411,6 +6500,7 @@ int dsi_display_get_modes(struct dsi_display *display, exit: *out_modes = display->modes; rc = 0; + primary_display = display; error: if (rc) @@ -7528,6 +7618,17 @@ int dsi_display_enable(struct dsi_display *display) display->panel->panel_initialized = true; pr_debug("cont splash enabled, display enable not required\n"); + +#if defined(CONFIG_MACH_XIAOMI_VAYU) || defined(CONFIG_MACH_XIAOMI_NABU) + if (display->panel->is_tddi_flag) { + rc = dsi_panel_lockdowninfo_param_read(display->panel); + if (!rc) { + pr_err("[%s] failed to read lockdowninfo para, rc=%d\n", + display->name, rc); + } + } +#endif + return 0; } @@ -7804,6 +7905,34 @@ int dsi_display_unprepare(struct dsi_display *display) return rc; } +struct dsi_display *get_main_display(void) { + return primary_display; +} + +#if defined(CONFIG_MACH_XIAOMI_VAYU) || defined(CONFIG_MACH_XIAOMI_NABU) +int dsi_display_esd_irq_ctrl(struct dsi_display *display, + bool enable) +{ + int ret = 0; + + if (!display) { + pr_err("Invalid parameters\n"); + return -EINVAL; + } + + mutex_lock(&display->display_lock); + + ret = dsi_panel_esd_irq_ctrl(display->panel, enable); + if (ret) + pr_err("[%s] failed to set esd irq, rc=%d\n", + display->name, ret); + + mutex_unlock(&display->display_lock); + + return ret; +} +#endif + static int __init dsi_display_register(void) { dsi_phy_drv_register(); diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_display.h b/drivers/gpu/drm/msm/dsi-staging/dsi_display.h index 7bf06a243c5a..6546e60cf083 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_display.h +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_display.h @@ -202,6 +202,9 @@ struct dsi_display { struct drm_connector *ext_conn; const char *name; +#if defined(CONFIG_MACH_XIAOMI_VAYU) || defined(CONFIG_MACH_XIAOMI_NABU) + bool is_first_boot; +#endif const char *display_type; const char *dsi_type; struct list_head list; @@ -712,4 +715,16 @@ int dsi_display_cont_splash_config(void *display); int dsi_display_get_panel_vfp(void *display, int h_active, int v_active); +struct dsi_display *get_main_display(void); + +int dsi_display_cmd_engine_enable(struct dsi_display *display); + +int dsi_display_cmd_engine_disable(struct dsi_display *display); + +int dsi_host_alloc_cmd_tx_buffer(struct dsi_display *display); + +#if defined(CONFIG_MACH_XIAOMI_VAYU) || defined(CONFIG_MACH_XIAOMI_NABU) +int dsi_display_esd_irq_ctrl(struct dsi_display *display, bool enable); +#endif + #endif /* _DSI_DISPLAY_H_ */ diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_drm.c b/drivers/gpu/drm/msm/dsi-staging/dsi_drm.c index 3e4de45ea5b2..a78010ebb908 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_drm.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_drm.c @@ -14,6 +14,8 @@ #define pr_fmt(fmt) "dsi-drm:[%s] " fmt, __func__ +#include + #include #include @@ -172,6 +174,8 @@ static void dsi_bridge_pre_enable(struct drm_bridge *bridge) { int rc = 0; struct dsi_bridge *c_bridge = to_dsi_bridge(bridge); + struct msm_drm_notifier notify_data; + int power_mode; if (!bridge) { pr_err("Invalid params\n"); @@ -186,6 +190,11 @@ static void dsi_bridge_pre_enable(struct drm_bridge *bridge) if (bridge->encoder->crtc->state->active_changed) atomic_set(&c_bridge->display->panel->esd_recovery_pending, 0); + power_mode = sde_connector_get_lp(c_bridge->display->drm_conn); + notify_data.data = &power_mode; + notify_data.id = MSM_DRM_PRIMARY_DISPLAY; + msm_drm_notifier_call_chain(MSM_DRM_EARLY_EVENT_BLANK, ¬ify_data); + /* By this point mode should have been validated through mode_fixup */ rc = dsi_display_set_mode(c_bridge->display, &(c_bridge->dsi_mode), 0x0); @@ -221,6 +230,8 @@ static void dsi_bridge_pre_enable(struct drm_bridge *bridge) } SDE_ATRACE_END("dsi_display_enable"); + msm_drm_notifier_call_chain(MSM_DRM_EVENT_BLANK, ¬ify_data); + rc = dsi_display_splash_res_cleanup(c_bridge->display); if (rc) pr_err("Continuous splash pipeline cleanup failed, rc=%d\n", @@ -257,6 +268,10 @@ static void dsi_bridge_enable(struct drm_bridge *bridge) sde_connector_schedule_status_work(display->drm_conn, true); } + +#if defined(CONFIG_MACH_XIAOMI_VAYU) || defined(CONFIG_MACH_XIAOMI_NABU) + dsi_display_esd_irq_ctrl(display, true); +#endif } static void dsi_bridge_disable(struct drm_bridge *bridge) @@ -265,13 +280,25 @@ static void dsi_bridge_disable(struct drm_bridge *bridge) struct dsi_display *display; struct dsi_bridge *c_bridge = to_dsi_bridge(bridge); int private_flags; + struct msm_drm_notifier notify_data; + int power_mode; if (!bridge) { pr_err("Invalid params\n"); return; } + + power_mode = sde_connector_get_lp(c_bridge->display->drm_conn); + notify_data.data = &power_mode; + notify_data.id = MSM_DRM_PRIMARY_DISPLAY; + msm_drm_notifier_call_chain(MSM_DRM_R_EARLY_EVENT_BLANK, ¬ify_data); + display = c_bridge->display; +#if defined(CONFIG_MACH_XIAOMI_VAYU) || defined(CONFIG_MACH_XIAOMI_NABU) + dsi_display_esd_irq_ctrl(display, false); +#endif + private_flags = bridge->encoder->crtc->state->adjusted_mode.private_flags; @@ -292,12 +319,19 @@ static void dsi_bridge_post_disable(struct drm_bridge *bridge) { int rc = 0; struct dsi_bridge *c_bridge = to_dsi_bridge(bridge); + struct msm_drm_notifier notify_data; + int power_mode; if (!bridge) { pr_err("Invalid params\n"); return; } + power_mode = sde_connector_get_lp(c_bridge->display->drm_conn); + notify_data.data = &power_mode; + notify_data.id = MSM_DRM_PRIMARY_DISPLAY; + msm_drm_notifier_call_chain(MSM_DRM_EARLY_EVENT_BLANK, ¬ify_data); + SDE_ATRACE_BEGIN("dsi_bridge_post_disable"); SDE_ATRACE_BEGIN("dsi_display_disable"); rc = dsi_display_disable(c_bridge->display); @@ -317,6 +351,8 @@ static void dsi_bridge_post_disable(struct drm_bridge *bridge) return; } SDE_ATRACE_END("dsi_bridge_post_disable"); + + msm_drm_notifier_call_chain(MSM_DRM_EVENT_BLANK, ¬ify_data); } static void dsi_bridge_mode_set(struct drm_bridge *bridge, diff --git a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c index eb96af4751b1..b73b2696ecda 100644 --- a/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c +++ b/drivers/gpu/drm/msm/dsi-staging/dsi_panel.c @@ -20,9 +20,15 @@ #include #include