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RAM4K.hdl
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27 lines (26 loc) · 1.21 KB
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/3/b/RAM4K.hdl
/**
* Memory of 4K 16-bit registers.
* If load is asserted, the value of the register selected by
* address is set to in; Otherwise, the value does not change.
* The value of the selected register is emitted by out.
*/
CHIP RAM4K {
IN in[16], load, address[12];
OUT out[16];
PARTS:
//// Replace this comment with your code.
DMux8Way(in=load,sel=address[9..11],a=load1,b=load2,c=load3,d=load4,e=load5,f=load6,g=load7,h=load8);
RAM512(in=in,load=load1,address=address[0..8],out=out1);
RAM512(in=in,load=load2,address=address[0..8],out=out2);
RAM512(in=in,load=load3,address=address[0..8],out=out3);
RAM512(in=in,load=load4,address=address[0..8],out=out4);
RAM512(in=in,load=load5,address=address[0..8],out=out5);
RAM512(in=in,load=load6,address=address[0..8],out=out6);
RAM512(in=in,load=load7,address=address[0..8],out=out7);
RAM512(in=in,load=load8,address=address[0..8],out=out8);
Mux8Way16(a=out1,b=out2,c=out3,d=out4,e=out5,f=out6,g=out7,h=out8,sel=address[9..11],out=out);
}