diff --git a/arch/arm64/boot/dts/apple/t6041-j614c-j616c.dtsi b/arch/arm64/boot/dts/apple/t6041-j614c-j616c.dtsi index 67dc437f38d07..5deaa75a0ab8c 100644 --- a/arch/arm64/boot/dts/apple/t6041-j614c-j616c.dtsi +++ b/arch/arm64/boot/dts/apple/t6041-j614c-j616c.dtsi @@ -75,20 +75,63 @@ }; thermal-zones { + /* + * The PMP's fast die loop is off on these boards (no + * apple,fast-die-effort), so these zones are the CPU's only + * throttle. The ADT (temp-sensor, fast-die-ctrl-loop) gives the + * J614c and J616c the M4 Pro's die limits: a 110 C target and a + * 125 C maximum, the sochot level. + * + * - A zone per SMC core-die sensor runs the power allocator from + * 75 C, controls at the 110 C target and throttles only the + * cluster its sensor sits on: Tpx0-5 follow a load on P0, + * Tpx8-D one on P1, Tex0-3 the E cluster. The die zone on TCMz, + * their maximum, controls all three clusters from 115 C as a + * backstop; controlling at 110 C itself, it divided its budget + * by requested power and held P0 at 2.4-2.9 GHz while P1 ran at + * 4.1 GHz. The 1 s samples jump by about 10 C, so the zones are + * integral-led. + * - The SMC fans follow a power-weighted hot spot (dDT*), not + * TCMz: they only ramp once the CPU runs near 110 C at high + * power, as on macOS. A lower control point holds the power + * below where the fans engage, and the CPU then settles lower. + * - sustainable-power is what macOS sustained on a J614c under an + * all-core FMA load: 48-51 W, TCMz 105-110 C. The P clusters + * share one rail meter (PHPC), which reads 25 W with either + * cluster loaded alone, and the E cluster adds about 2 W: 24 W + * per P cluster and 2 W for E. + * - Hot at 120 C only reports; critical is the sochot level, after + * three samples. + */ cpu-die-thermal { polling-delay-passive = <1000>; polling-delay = <1000>; - thermal-sensors = <&smc_hwmon 0>; + integral-time-constant-ms = <20000>; + critical-samples = <3>; + sustainable-power = <48000>; + thermal-sensors = <&smc_hwmon 0>; /* TCMz */ trips { + cpu_die_switch_on: cpu-die-switch-on { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_die_passive: cpu-die-passive { - temperature = <113000>; + temperature = <115000>; hysteresis = <5000>; type = "passive"; }; + cpu-die-hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + cpu-die-critical { - temperature = <118000>; + temperature = <125000>; hysteresis = <0>; type = "critical"; }; @@ -128,14 +171,772 @@ }; }; + cpu-e0-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + integral-time-constant-ms = <20000>; + critical-samples = <3>; + sustainable-power = <2000>; + thermal-sensors = <&smc_hwmon 14>; /* Tex0 */ + + trips { + cpu_e0_switch_on: trip-switch-on { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_e0_passive: trip-passive { + temperature = <110000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip-critical { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-e { + trip = <&cpu_e0_passive>; + cooling-device = + <&cpu_e0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu-e1-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + integral-time-constant-ms = <20000>; + critical-samples = <3>; + sustainable-power = <2000>; + thermal-sensors = <&smc_hwmon 15>; /* Tex1 */ + + trips { + cpu_e1_switch_on: trip-switch-on { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_e1_passive: trip-passive { + temperature = <110000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip-critical { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-e { + trip = <&cpu_e1_passive>; + cooling-device = + <&cpu_e0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu-e2-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + integral-time-constant-ms = <20000>; + critical-samples = <3>; + sustainable-power = <2000>; + thermal-sensors = <&smc_hwmon 16>; /* Tex2 */ + + trips { + cpu_e2_switch_on: trip-switch-on { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_e2_passive: trip-passive { + temperature = <110000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip-critical { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-e { + trip = <&cpu_e2_passive>; + cooling-device = + <&cpu_e0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu-e3-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + integral-time-constant-ms = <20000>; + critical-samples = <3>; + sustainable-power = <2000>; + thermal-sensors = <&smc_hwmon 17>; /* Tex3 */ + + trips { + cpu_e3_switch_on: trip-switch-on { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_e3_passive: trip-passive { + temperature = <110000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip-critical { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-e { + trip = <&cpu_e3_passive>; + cooling-device = + <&cpu_e0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_e3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu-p00-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + integral-time-constant-ms = <20000>; + critical-samples = <3>; + sustainable-power = <24000>; + thermal-sensors = <&smc_hwmon 2>; /* Tpx0 */ + + trips { + cpu_p00_switch_on: trip-switch-on { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_p00_passive: trip-passive { + temperature = <110000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip-critical { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-p0 { + trip = <&cpu_p00_passive>; + cooling-device = + <&cpu_p00 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p01 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p02 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p03 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p04 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p05 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu-p01-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + integral-time-constant-ms = <20000>; + critical-samples = <3>; + sustainable-power = <24000>; + thermal-sensors = <&smc_hwmon 3>; /* Tpx1 */ + + trips { + cpu_p01_switch_on: trip-switch-on { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_p01_passive: trip-passive { + temperature = <110000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip-critical { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-p0 { + trip = <&cpu_p01_passive>; + cooling-device = + <&cpu_p00 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p01 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p02 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p03 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p04 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p05 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu-p02-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + integral-time-constant-ms = <20000>; + critical-samples = <3>; + sustainable-power = <24000>; + thermal-sensors = <&smc_hwmon 4>; /* Tpx2 */ + + trips { + cpu_p02_switch_on: trip-switch-on { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_p02_passive: trip-passive { + temperature = <110000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip-critical { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-p0 { + trip = <&cpu_p02_passive>; + cooling-device = + <&cpu_p00 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p01 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p02 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p03 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p04 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p05 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu-p03-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + integral-time-constant-ms = <20000>; + critical-samples = <3>; + sustainable-power = <24000>; + thermal-sensors = <&smc_hwmon 5>; /* Tpx3 */ + + trips { + cpu_p03_switch_on: trip-switch-on { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_p03_passive: trip-passive { + temperature = <110000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip-critical { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-p0 { + trip = <&cpu_p03_passive>; + cooling-device = + <&cpu_p00 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p01 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p02 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p03 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p04 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p05 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu-p04-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + integral-time-constant-ms = <20000>; + critical-samples = <3>; + sustainable-power = <24000>; + thermal-sensors = <&smc_hwmon 6>; /* Tpx4 */ + + trips { + cpu_p04_switch_on: trip-switch-on { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_p04_passive: trip-passive { + temperature = <110000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip-critical { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-p0 { + trip = <&cpu_p04_passive>; + cooling-device = + <&cpu_p00 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p01 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p02 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p03 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p04 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p05 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu-p05-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + integral-time-constant-ms = <20000>; + critical-samples = <3>; + sustainable-power = <24000>; + thermal-sensors = <&smc_hwmon 7>; /* Tpx5 */ + + trips { + cpu_p05_switch_on: trip-switch-on { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_p05_passive: trip-passive { + temperature = <110000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip-critical { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-p0 { + trip = <&cpu_p05_passive>; + cooling-device = + <&cpu_p00 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p01 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p02 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p03 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p04 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p05 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu-p10-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + integral-time-constant-ms = <20000>; + critical-samples = <3>; + sustainable-power = <24000>; + thermal-sensors = <&smc_hwmon 8>; /* Tpx8 */ + + trips { + cpu_p10_switch_on: trip-switch-on { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_p10_passive: trip-passive { + temperature = <110000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip-critical { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-p1 { + trip = <&cpu_p10_passive>; + cooling-device = + <&cpu_p10 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p11 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p12 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p13 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p14 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p15 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu-p11-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + integral-time-constant-ms = <20000>; + critical-samples = <3>; + sustainable-power = <24000>; + thermal-sensors = <&smc_hwmon 9>; /* Tpx9 */ + + trips { + cpu_p11_switch_on: trip-switch-on { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_p11_passive: trip-passive { + temperature = <110000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip-critical { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-p1 { + trip = <&cpu_p11_passive>; + cooling-device = + <&cpu_p10 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p11 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p12 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p13 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p14 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p15 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu-p12-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + integral-time-constant-ms = <20000>; + critical-samples = <3>; + sustainable-power = <24000>; + thermal-sensors = <&smc_hwmon 10>; /* TpxA */ + + trips { + cpu_p12_switch_on: trip-switch-on { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_p12_passive: trip-passive { + temperature = <110000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip-critical { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-p1 { + trip = <&cpu_p12_passive>; + cooling-device = + <&cpu_p10 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p11 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p12 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p13 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p14 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p15 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu-p13-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + integral-time-constant-ms = <20000>; + critical-samples = <3>; + sustainable-power = <24000>; + thermal-sensors = <&smc_hwmon 11>; /* TpxB */ + + trips { + cpu_p13_switch_on: trip-switch-on { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_p13_passive: trip-passive { + temperature = <110000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip-critical { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-p1 { + trip = <&cpu_p13_passive>; + cooling-device = + <&cpu_p10 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p11 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p12 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p13 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p14 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p15 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu-p14-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + integral-time-constant-ms = <20000>; + critical-samples = <3>; + sustainable-power = <24000>; + thermal-sensors = <&smc_hwmon 12>; /* TpxC */ + + trips { + cpu_p14_switch_on: trip-switch-on { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_p14_passive: trip-passive { + temperature = <110000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip-critical { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-p1 { + trip = <&cpu_p14_passive>; + cooling-device = + <&cpu_p10 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p11 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p12 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p13 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p14 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p15 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu-p15-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + integral-time-constant-ms = <20000>; + critical-samples = <3>; + sustainable-power = <24000>; + thermal-sensors = <&smc_hwmon 13>; /* TpxD */ + + trips { + cpu_p15_switch_on: trip-switch-on { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_p15_passive: trip-passive { + temperature = <110000>; + hysteresis = <5000>; + type = "passive"; + }; + + trip-hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip-critical { + temperature = <125000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling-maps { + map-p1 { + trip = <&cpu_p15_passive>; + cooling-device = + <&cpu_p10 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p11 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p12 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p13 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p14 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu_p15 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + /* * GPU zones, with the M4 Pro's trips: the GPU firmware limits * itself from 101 C, where these shed CPU power (allocator on at - * 90 C), and they shut down at 118 C after three samples. The - * CPU OPPs have no opp-microwatt yet, so until they do the - * passive trips have no power actors and shed nothing. Each zone - * reads one of the GPU's hotter sensors; which cluster each sits - * on is not known, and under load they read within 1 C. + * 90 C), and they shut down at 118 C after three samples. Each + * zone reads one of the GPU's hotter sensors; which cluster each + * sits on is not known, and under load they read within 1 C. */ gpu0-thermal { polling-delay-passive = <1000>; diff --git a/arch/arm64/boot/dts/apple/t6041.dtsi b/arch/arm64/boot/dts/apple/t6041.dtsi index ff32dd4f4e2d3..22a215fe7126f 100644 --- a/arch/arm64/boot/dts/apple/t6041.dtsi +++ b/arch/arm64/boot/dts/apple/t6041.dtsi @@ -70,102 +70,122 @@ opp01 { opp-hz = /bits/ 64 <1260000000>; opp-level = <1>; + opp-microwatt = <513000>; clock-latency-ns = <7200>; }; opp02 { opp-hz = /bits/ 64 <1512000000>; opp-level = <2>; + opp-microwatt = <715000>; clock-latency-ns = <19000>; }; opp03 { opp-hz = /bits/ 64 <1800000000>; opp-level = <3>; + opp-microwatt = <907500>; clock-latency-ns = <20000>; }; opp04 { opp-hz = /bits/ 64 <2088000000>; opp-level = <4>; + opp-microwatt = <1158200>; clock-latency-ns = <22000>; }; opp05 { opp-hz = /bits/ 64 <2352000000>; opp-level = <5>; + opp-microwatt = <1494500>; clock-latency-ns = <30000>; }; opp06 { opp-hz = /bits/ 64 <2616000000>; opp-level = <6>; + opp-microwatt = <1782600>; clock-latency-ns = <34000>; }; opp07 { opp-hz = /bits/ 64 <2868000000>; opp-level = <7>; + opp-microwatt = <2209600>; clock-latency-ns = <37000>; }; opp08 { opp-hz = /bits/ 64 <3096000000>; opp-level = <8>; + opp-microwatt = <2636700>; clock-latency-ns = <38000>; }; opp09 { opp-hz = /bits/ 64 <3300000000>; opp-level = <9>; + opp-microwatt = <3247200>; clock-latency-ns = <40000>; }; opp10 { opp-hz = /bits/ 64 <3468000000>; opp-level = <10>; + opp-microwatt = <3668700>; clock-latency-ns = <41000>; }; opp11 { opp-hz = /bits/ 64 <3624000000>; opp-level = <11>; + opp-microwatt = <4128200>; clock-latency-ns = <43000>; }; opp12 { opp-hz = /bits/ 64 <3756000000>; opp-level = <12>; + opp-microwatt = <4819300>; clock-latency-ns = <44000>; }; opp13 { opp-hz = /bits/ 64 <3828000000>; opp-level = <13>; + opp-microwatt = <4938100>; clock-latency-ns = <45000>; }; opp14 { opp-hz = /bits/ 64 <3888000000>; opp-level = <14>; + opp-microwatt = <5146800>; clock-latency-ns = <46000>; }; opp15 { opp-hz = /bits/ 64 <3948000000>; opp-level = <15>; + opp-microwatt = <5402600>; clock-latency-ns = <47000>; }; opp16 { opp-hz = /bits/ 64 <3996000000>; opp-level = <16>; + opp-microwatt = <5575900>; clock-latency-ns = <48000>; }; opp17 { opp-hz = /bits/ 64 <4044000000>; opp-level = <17>; + opp-microwatt = <5773400>; clock-latency-ns = <49000>; }; opp18 { opp-hz = /bits/ 64 <4104000000>; opp-level = <18>; + opp-microwatt = <5969200>; clock-latency-ns = <50000>; }; opp19 { opp-hz = /bits/ 64 <4416000000>; opp-level = <19>; + opp-microwatt = <8274900>; clock-latency-ns = <55000>; turbo-mode; }; opp20 { opp-hz = /bits/ 64 <4512000000>; opp-level = <20>; + opp-microwatt = <9256900>; clock-latency-ns = <56000>; turbo-mode; }; @@ -178,102 +198,122 @@ opp01 { opp-hz = /bits/ 64 <1260000000>; opp-level = <1>; + opp-microwatt = <561800>; clock-latency-ns = <7200>; }; opp02 { opp-hz = /bits/ 64 <1512000000>; opp-level = <2>; + opp-microwatt = <772500>; clock-latency-ns = <19000>; }; opp03 { opp-hz = /bits/ 64 <1800000000>; opp-level = <3>; + opp-microwatt = <988900>; clock-latency-ns = <20000>; }; opp04 { opp-hz = /bits/ 64 <2088000000>; opp-level = <4>; + opp-microwatt = <1302300>; clock-latency-ns = <22000>; }; opp05 { opp-hz = /bits/ 64 <2352000000>; opp-level = <5>; + opp-microwatt = <1644100>; clock-latency-ns = <30000>; }; opp06 { opp-hz = /bits/ 64 <2616000000>; opp-level = <6>; + opp-microwatt = <2003700>; clock-latency-ns = <34000>; }; opp07 { opp-hz = /bits/ 64 <2868000000>; opp-level = <7>; + opp-microwatt = <2349000>; clock-latency-ns = <37000>; }; opp08 { opp-hz = /bits/ 64 <3096000000>; opp-level = <8>; + opp-microwatt = <2723000>; clock-latency-ns = <38000>; }; opp09 { opp-hz = /bits/ 64 <3300000000>; opp-level = <9>; + opp-microwatt = <3333200>; clock-latency-ns = <40000>; }; opp10 { opp-hz = /bits/ 64 <3468000000>; opp-level = <10>; + opp-microwatt = <3711900>; clock-latency-ns = <41000>; }; opp11 { opp-hz = /bits/ 64 <3624000000>; opp-level = <11>; + opp-microwatt = <4129900>; clock-latency-ns = <43000>; }; opp12 { opp-hz = /bits/ 64 <3756000000>; opp-level = <12>; + opp-microwatt = <4666300>; clock-latency-ns = <44000>; }; opp13 { opp-hz = /bits/ 64 <3828000000>; opp-level = <13>; + opp-microwatt = <4827300>; clock-latency-ns = <45000>; }; opp14 { opp-hz = /bits/ 64 <3888000000>; opp-level = <14>; + opp-microwatt = <5028800>; clock-latency-ns = <46000>; }; opp15 { opp-hz = /bits/ 64 <3948000000>; opp-level = <15>; + opp-microwatt = <5220000>; clock-latency-ns = <47000>; }; opp16 { opp-hz = /bits/ 64 <3996000000>; opp-level = <16>; + opp-microwatt = <5306500>; clock-latency-ns = <48000>; }; opp17 { opp-hz = /bits/ 64 <4044000000>; opp-level = <17>; + opp-microwatt = <5618900>; clock-latency-ns = <49000>; }; opp18 { opp-hz = /bits/ 64 <4104000000>; opp-level = <18>; + opp-microwatt = <5843100>; clock-latency-ns = <50000>; }; opp19 { opp-hz = /bits/ 64 <4416000000>; opp-level = <19>; + opp-microwatt = <8075300>; clock-latency-ns = <55000>; turbo-mode; }; opp20 { opp-hz = /bits/ 64 <4512000000>; opp-level = <20>; + opp-microwatt = <8949200>; clock-latency-ns = <56000>; turbo-mode; }; @@ -369,3 +409,39 @@ <0x2 0x2a080000 0x0 0x4000>, <0x2 0x2a0c0000 0x0 0x4000>; }; + +/* + * CPU energy model: the T6040 one (t6040.dtsi), measured on a J616s, which + * has the same E and P cores. Without opp-microwatt no energy model + * registers, power_allocator has no power actors and the CPU thermal zones + * never throttle. The P states T6040 lacks (3828, 3888, 3948 MHz) are + * interpolated in frequency between its neighbours. + */ + +&{/opp-table-e/opp01} { + opp-microwatt = <81900>; +}; + +&{/opp-table-e/opp02} { + opp-microwatt = <133100>; +}; + +&{/opp-table-e/opp03} { + opp-microwatt = <209400>; +}; + +&{/opp-table-e/opp04} { + opp-microwatt = <301400>; +}; + +&{/opp-table-e/opp05} { + opp-microwatt = <383900>; +}; + +&{/opp-table-e/opp06} { + opp-microwatt = <478500>; +}; + +&{/opp-table-e/opp07} { + opp-microwatt = <531000>; +};