From 4c7fdf1d3b57fca6389f2adf1a3da260c59bd5e6 Mon Sep 17 00:00:00 2001 From: Erik Bourget Date: Sun, 8 Nov 2026 21:01:26 -0500 Subject: [PATCH 1/3] dt-bindings: gpu: apple: Describe the J716c GPU and panel handoff Distinguish the coprocessor-driven T6050 GPU from its raw disabled inventory node with the G17 family fallback. Describe both mailboxes, the six reserved memory regions and loader-filled power data. Accept the existing mini-LED panel compatible and the named boot framebuffer reservation supplied to the display subsystem. Developed with Claude Code. Signed-off-by: Erik Bourget --- .../bindings/display/apple,dcp.yaml | 4 +- .../display/apple,display-subsystem.yaml | 5 ++ .../devicetree/bindings/gpu/apple,agx.yaml | 67 ++++++++++++++++++- 3 files changed, 73 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/display/apple,dcp.yaml b/Documentation/devicetree/bindings/display/apple,dcp.yaml index 13cf27fb69f44..e77a8c542b49a 100644 --- a/Documentation/devicetree/bindings/display/apple,dcp.yaml +++ b/Documentation/devicetree/bindings/display/apple,dcp.yaml @@ -366,7 +366,9 @@ properties: properties: compatible: oneOf: - - const: apple,panel + - enum: + - apple,panel + - apple,panel-mini-led - items: - pattern: '^apple,panel-j[0-9]+$' - const: apple,panel diff --git a/Documentation/devicetree/bindings/display/apple,display-subsystem.yaml b/Documentation/devicetree/bindings/display/apple,display-subsystem.yaml index 0d3e74d6a804c..fab8c397fe94a 100644 --- a/Documentation/devicetree/bindings/display/apple,display-subsystem.yaml +++ b/Documentation/devicetree/bindings/display/apple,display-subsystem.yaml @@ -39,6 +39,11 @@ properties: maxItems: 64 description: Reserved memory retaining the inherited display mappings. + memory-region-names: + items: + - const: framebuffer + description: Identifies the boot framebuffer reservation supplied by the loader. + apple,j713-inherited-mappings: type: boolean description: The loader validated the inherited J713 SID0 scanout mapping. diff --git a/Documentation/devicetree/bindings/gpu/apple,agx.yaml b/Documentation/devicetree/bindings/gpu/apple,agx.yaml index 202544c07b0bb..515d5700477a6 100644 --- a/Documentation/devicetree/bindings/gpu/apple,agx.yaml +++ b/Documentation/devicetree/bindings/gpu/apple,agx.yaml @@ -22,6 +22,9 @@ properties: - apple,agx-t6050 - apple,agx-t8132 - apple,agx-t8140 + - items: + - const: apple,agx-g17c + - const: apple,agx-g17s - items: - const: apple,agx-t8103 - const: apple,agx-g13g @@ -51,8 +54,8 @@ properties: interrupts: maxItems: 8 description: - The GPU block's interrupt outputs, as the ADT lists them. Only - described on T6050, whose GPU is not driven from Linux yet. + Interrupt outputs of the raw T6050 GPU block. The coprocessor-driven + GPU uses its mailbox interrupts instead. dma-noncoherent: true @@ -110,6 +113,21 @@ properties: operating-points-v2: true + apple,csafr-min-sram-microvolt: + maxItems: 1 + description: Loader-filled SRAM voltage floor for the CS and AFR domains. + + apple,aon-ptd: + $ref: /schemas/types.yaml#/definitions/uint32-array + oneOf: + - minItems: 9 + maxItems: 9 + - minItems: 18 + maxItems: 18 + description: + Loader-filled power telemetry records, three per die. Each record is + an identifier followed by two configuration words. + apple,firmware-version: $ref: /schemas/types.yaml#/definitions/uint32-array minItems: 3 @@ -218,6 +236,7 @@ allOf: compatible: contains: const: apple,agx-t6050 + maxItems: 1 then: description: The T6050 GPU block, described from the ADT /arm-io/sgx node. Its @@ -242,6 +261,48 @@ allOf: required: - mboxes - memory-region + - if: + properties: + compatible: + contains: + const: apple,agx-g17s + then: + properties: + reg: + items: + - description: GFX coprocessor control registers + - description: GPU block MMIO registers + reg-names: + items: + - const: asc + - const: sgx + mboxes: + items: + - description: GFX coprocessor mailbox + - description: GFX1 coprocessor mailbox + memory-region: + minItems: 6 + memory-region-names: + items: + - const: ttbs + - const: pagetables + - const: handoff + - const: fw-data + - const: l2-pagetables + - const: fw-text + required: + - reg-names + - power-domains + - memory-region-names + - operating-points-v2 + - apple,cs-opp + - apple,afr-opp + - apple,csafr-min-sram-microvolt + - apple,aon-ptd + else: + properties: + apple,csafr-min-sram-microvolt: false + apple,aon-ptd: false - if: properties: compatible: @@ -405,8 +466,10 @@ allOf: compatible: contains: enum: + - apple,agx-g17s - apple,agx-t6040 - apple,agx-t6041 + - apple,agx-t6050 - apple,agx-t8132 - apple,agx-t8140 then: From f2d6fd317ecdc80faa3bef8ce3df6c67cb182603 Mon Sep 17 00:00:00 2001 From: Erik Bourget Date: Sun, 8 Nov 2026 21:01:26 -0500 Subject: [PATCH 2/3] arm64: dts: apple: Describe J716c GPU and internal-panel handoff Supply the one-die GPU resource layout, GFX/GFX1 mailboxes, six memory reservations and fourteen operating points with four cluster voltage lanes. Put its existing PMGR resources under the GPU aperture and replace the raw disabled GPU inventory nodes. Keep the J716c inventory on its existing SoC bus so loader path lookups are unambiguous. Connect the internal DCP to its bandwidth scratch, clocks and mini-LED panel, with display scanout through disp0 SID 0. Reuse the existing DCP, DART, mailbox and PMC definitions. The GPU, its power states and mailboxes, memory reservations and internal display remain disabled until the loader validates and fills the handoff. Developed with Claude Code. Signed-off-by: Erik Bourget --- .../boot/dts/apple/t6050-j716c-gpu-panel.dtsi | 398 ++++++++++++++++++ arch/arm64/boot/dts/apple/t6050-j716c.dts | 12 + .../boot/dts/apple/t6050-peripherals.dtsi | 17 + 3 files changed, 427 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/t6050-j716c-gpu-panel.dtsi diff --git a/arch/arm64/boot/dts/apple/t6050-j716c-gpu-panel.dtsi b/arch/arm64/boot/dts/apple/t6050-j716c-gpu-panel.dtsi new file mode 100644 index 0000000000000..cbd846be9c30f --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6050-j716c-gpu-panel.dtsi @@ -0,0 +1,398 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * J716c GPU and internal panel. The loader validates the running hardware, + * fills the memory reservations and operating points, then enables the + * dependent devices. A source DT alone must not start either coprocessor. + */ + +/* Replace the disabled inventory with the GPU driver's resource layout. */ +/delete-node/ &sgx; +/delete-node/ &gfx_asc; +/delete-node/ &gfx1_asc; + +/ { + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + uat_ttbs: uat-ttbs { + reg = <0 0 0 0>; + no-map; + status = "disabled"; + }; + + uat_pagetables: uat-pagetables { + reg = <0 0 0 0>; + no-map; + status = "disabled"; + }; + + uat_handoff: uat-handoff { + reg = <0 0 0 0>; + no-map; + status = "disabled"; + }; + + uat_l2_pagetables: uat-l2-pagetables { + reg = <0 0 0 0>; + no-map; + status = "disabled"; + }; + + gpu_fw_text: gpu-fw-text { + reg = <0 0 0 0>; + no-map; + status = "disabled"; + }; + + gpu_fw_data: gpu-fw-data { + reg = <0 0 0 0>; + no-map; + status = "disabled"; + }; + }; + + /* Four clusters on one die: four main voltage lanes and one CS/AFR lane. */ + gpu_opp: opp-table-gpu { + compatible = "operating-points-v2"; + + opp00 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp01 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp02 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp03 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp04 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp05 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp06 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp07 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp08 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp09 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp10 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp11 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp12 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp13 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + }; + + gpu_afr_opp: opp-table-gpu-afr { + compatible = "operating-points-v2"; + + opp00 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp01 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp02 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp03 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp04 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp05 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp06 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp07 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp08 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp09 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp10 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp11 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp12 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp13 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + }; + + gpu_cs_opp: opp-table-gpu-cs { + compatible = "operating-points-v2"; + + opp00 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp01 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp02 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp03 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp04 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp05 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp06 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp07 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp08 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp09 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp10 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp11 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp12 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp13 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + }; + + soc@2300000000 { + + gpu: gpu@2302600000 { + compatible = "apple,agx-g17c", "apple,agx-g17s"; + reg = <0x23 0x02600000 0x0 0x88000>, + <0x23 0x00000000 0x0 0x4000000>; + reg-names = "asc", "sgx"; + mboxes = <&gfx_mbox>, <&gfx1_mbox>; + power-domains = <&ps_gfx>; + memory-region = <&uat_ttbs>, <&uat_pagetables>, <&uat_handoff>, + <&gpu_fw_data>, <&uat_l2_pagetables>, <&gpu_fw_text>; + memory-region-names = "ttbs", "pagetables", "handoff", "fw-data", + "l2-pagetables", "fw-text"; + operating-points-v2 = <&gpu_opp>; + apple,afr-opp = <&gpu_afr_opp>; + apple,cs-opp = <&gpu_cs_opp>; + apple,csafr-min-sram-microvolt = <0>; + /* Three power telemetry records, each an identifier and two words. */ + apple,aon-ptd = <0 0 0 0 0 0 0 0 0>; + status = "disabled"; + }; + + gfx_mbox: mailbox@2302600000 { + compatible = "apple,t6050-j775d-ascwrap-v6"; + reg = <0x23 0x02600000 0x0 0x88000>, + <0x23 0x02050000 0x0 0x8>; + reg-names = "wrapper", "iop-vbar"; + interrupts = , + ; + interrupt-names = "send-empty", "recv-not-empty"; + apple,firmware-role = "GFX"; + power-domains = <&ps_gfx>; + #mbox-cells = <0>; + status = "disabled"; + }; + + gfx1_mbox: mailbox@2302e00000 { + compatible = "apple,t6050-j775d-ascwrap-v6"; + reg = <0x23 0x02e00000 0x0 0x88000>, + <0x23 0x02850000 0x0 0x8>; + reg-names = "wrapper", "iop-vbar"; + interrupts = , + ; + interrupt-names = "send-empty", "recv-not-empty"; + apple,firmware-role = "GFX1"; + power-domains = <&ps_gfx>; + #mbox-cells = <0>; + status = "disabled"; + }; + }; + + /* The loader verifies these clock identifiers and fills their rates. */ + dcp_fw_clk361: clock-dcp-firmware-361 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <810000000>; + clock-output-names = "dcp_firmware_361"; + }; + + dcp_fw_clk458: clock-dcp-firmware-458 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <521064992>; + clock-output-names = "dcp_firmware_458"; + }; + + display: display-subsystem { + compatible = "apple,display-subsystem"; + iommus = <&disp0_dart 0>; + status = "disabled"; + }; +}; + +/* The power states stay disabled until the loader accepts the GPU handoff. */ +&pmgr_gpx { + status = "okay"; +}; + +&ps_gpx { + apple,always-on; +}; + +&ps_afr { + apple,always-on; +}; + +&dcp_dart { + apple,dma-range = <0x100 0x0 0x300 0x0>; +}; + +&disp0_dart { + reg = <0x4 0x8a300000 0x0 0xc000>; + apple,dma-range = <0x100 0x0 0x300 0x0>; +}; + +&dcp { + apple,bw-scratch = <&dcpext0_pmc 0 5 0x20000>; + apple,clock-ids = <361 458>; + clocks = <&dcp_fw_clk361>, <&dcp_fw_clk458>; + clock-names = "firmware-0", "firmware-1"; + + panel { + compatible = "apple,panel-mini-led"; + apple,max-brightness = <600>; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t6050-j716c.dts b/arch/arm64/boot/dts/apple/t6050-j716c.dts index 33fd4e1c9b03c..b7a92d4ad6c7a 100644 --- a/arch/arm64/boot/dts/apple/t6050-j716c.dts +++ b/arch/arm64/boot/dts/apple/t6050-j716c.dts @@ -27,6 +27,16 @@ bluetooth0 = &n1_beta; }; + /* GPU aperture; its PMGR and coprocessors are described below. */ + j716c_gpu_bus: soc@2300000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x23 0x0 0x23 0x0 0x0 0x4000000>; + interrupt-parent = <&aic>; + nonposted-mmio; + }; + chosen { #address-cells = <2>; #size-cells = <2>; @@ -222,3 +232,5 @@ #define T6050_J716C #include "t6050-peripherals.dtsi" + +#include "t6050-j716c-gpu-panel.dtsi" diff --git a/arch/arm64/boot/dts/apple/t6050-peripherals.dtsi b/arch/arm64/boot/dts/apple/t6050-peripherals.dtsi index eef667d647d3d..2d2ede30d0ead 100644 --- a/arch/arm64/boot/dts/apple/t6050-peripherals.dtsi +++ b/arch/arm64/boot/dts/apple/t6050-peripherals.dtsi @@ -54,6 +54,7 @@ }; }; #endif +#ifndef T6050_J716C / { soc { compatible = "simple-bus"; @@ -64,6 +65,8 @@ }; }; +#endif + &pmgr0 { ps_pms: power-controller@100 { compatible = "apple,t6050-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; @@ -883,7 +886,11 @@ }; }; +#ifdef T6050_J716C +&j716c_gpu_bus { +#else &{/soc} { +#endif pmgr_gpx: power-management@2300e80000 { compatible = "apple,t6050-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd"; reg = <0x23 0xe80000 0x0 0x4000>; @@ -1112,7 +1119,11 @@ }; }; +#ifdef T6050_J716C +&die0 { +#else &{/soc} { +#endif peripheral_clocks: clock-controller@280600000 { compatible = "apple,t6050-pmgr-clocks", "apple,pmgr-clocks"; reg = <0x2 0x80600000 0x0 0x1fc000>, @@ -1181,7 +1192,11 @@ }; }; +#ifdef T6050_J716C +&die0 { +#else &{/soc} { +#endif #if defined(T6050_J714C) || defined(T6050_J716C) || defined(T6050_J775C) || defined(T6050_J775D) || defined(T6050_K114C) || defined(T6050_K116C) nub_spmi1: spmi@28a054000 { compatible = "apple,t6050-spmi", "apple,t8142-spmi"; @@ -1320,6 +1335,7 @@ #endif #if defined(T6050_J714C) || defined(T6050_J714S) || defined(T6050_J716C) || defined(T6050_K114C) || defined(T6050_K114S) || defined(T6050_K116C) || defined(T6050_K116S) +#ifndef T6050_J716C nub_spmi_a1: spmi@28a1a8000 { compatible = "apple,t6050-spmi", "apple,t8142-spmi"; reg = <0x2 0x8a1a8000 0x0 0x4000>, @@ -1331,6 +1347,7 @@ status = "disabled"; }; #endif +#endif #if defined(T6050_J714C) || defined(T6050_J714S) || defined(T6050_J716C) || defined(T6050_J716S) || defined(T6050_K114C) || defined(T6050_K114S) || defined(T6050_K116C) || defined(T6050_K116S) isp0: isp@580000000 { From 49b0a5b7cd2d9dcddab6fc83141043fd77b8dda0 Mon Sep 17 00:00:00 2001 From: Erik Bourget Date: Mon, 9 Nov 2026 18:15:21 -0500 Subject: [PATCH 3/3] arm64: dts: apple: t6050-j716c: Link the GPU to the CLPC The J716c GPU node replaces the generic T6050 one, which gained apple,clpc after this node was written. Without it the GPU driver finds no CLPC and never raises the DRAM and fabric floors while GPU work is in flight. Link it here too. Developed with Claude Code. Signed-off-by: Erik Bourget --- arch/arm64/boot/dts/apple/t6050-j716c-gpu-panel.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6050-j716c-gpu-panel.dtsi b/arch/arm64/boot/dts/apple/t6050-j716c-gpu-panel.dtsi index cbd846be9c30f..2b908e34fdaab 100644 --- a/arch/arm64/boot/dts/apple/t6050-j716c-gpu-panel.dtsi +++ b/arch/arm64/boot/dts/apple/t6050-j716c-gpu-panel.dtsi @@ -299,6 +299,8 @@ reg-names = "asc", "sgx"; mboxes = <&gfx_mbox>, <&gfx1_mbox>; power-domains = <&ps_gfx>; + /* Raises the DRAM and fabric floors while GPU work is in flight */ + apple,clpc = <&clpc>; memory-region = <&uat_ttbs>, <&uat_pagetables>, <&uat_handoff>, <&gpu_fw_data>, <&uat_l2_pagetables>, <&gpu_fw_text>; memory-region-names = "ttbs", "pagetables", "handoff", "fw-data",