diff --git a/Documentation/devicetree/bindings/display/apple,dcp.yaml b/Documentation/devicetree/bindings/display/apple,dcp.yaml index 431e6ffdbf1c9..0a58ce76bd580 100644 --- a/Documentation/devicetree/bindings/display/apple,dcp.yaml +++ b/Documentation/devicetree/bindings/display/apple,dcp.yaml @@ -378,7 +378,9 @@ properties: properties: compatible: oneOf: - - const: apple,panel + - enum: + - apple,panel + - apple,panel-mini-led - items: - pattern: '^apple,panel-j[0-9]+$' - const: apple,panel diff --git a/Documentation/devicetree/bindings/display/apple,display-subsystem.yaml b/Documentation/devicetree/bindings/display/apple,display-subsystem.yaml index be4e56cb2a39f..ac106575a9672 100644 --- a/Documentation/devicetree/bindings/display/apple,display-subsystem.yaml +++ b/Documentation/devicetree/bindings/display/apple,display-subsystem.yaml @@ -41,6 +41,11 @@ properties: maxItems: 64 description: Reserved memory retaining the inherited display mappings. + memory-region-names: + items: + - const: framebuffer + description: Identifies the boot framebuffer reservation supplied by the loader. + apple,j713-inherited-mappings: type: boolean description: The loader validated the inherited J713 SID0 scanout mapping. diff --git a/Documentation/devicetree/bindings/gpu/apple,agx.yaml b/Documentation/devicetree/bindings/gpu/apple,agx.yaml index 992783b2dc68f..c97c58e35ebfb 100644 --- a/Documentation/devicetree/bindings/gpu/apple,agx.yaml +++ b/Documentation/devicetree/bindings/gpu/apple,agx.yaml @@ -23,6 +23,9 @@ properties: - apple,agx-t6050 - apple,agx-t8132 - apple,agx-t8140 + - items: + - const: apple,agx-g17c + - const: apple,agx-g17s - items: - const: apple,agx-t8103 - const: apple,agx-g13g @@ -54,8 +57,8 @@ properties: interrupts: maxItems: 8 description: - The GPU block's interrupt outputs, as the ADT lists them. Only - described on T6050, whose GPU is not driven from Linux yet. + Interrupt outputs of the raw T6050 GPU block. The coprocessor-driven + GPU uses its mailbox interrupts instead. dma-noncoherent: true @@ -113,6 +116,21 @@ properties: operating-points-v2: true + apple,csafr-min-sram-microvolt: + maxItems: 1 + description: Loader-filled SRAM voltage floor for the CS and AFR domains. + + apple,aon-ptd: + $ref: /schemas/types.yaml#/definitions/uint32-array + oneOf: + - minItems: 9 + maxItems: 9 + - minItems: 18 + maxItems: 18 + description: + Loader-filled power telemetry records, three per die. Each record is + an identifier followed by two configuration words. + apple,firmware-version: $ref: /schemas/types.yaml#/definitions/uint32-array minItems: 3 @@ -269,6 +287,7 @@ allOf: compatible: contains: const: apple,agx-t6050 + maxItems: 1 then: description: The T6050 GPU block, described from the ADT /arm-io/sgx node. Its @@ -293,6 +312,48 @@ allOf: required: - mboxes - memory-region + - if: + properties: + compatible: + contains: + const: apple,agx-g17s + then: + properties: + reg: + items: + - description: GFX coprocessor control registers + - description: GPU block MMIO registers + reg-names: + items: + - const: asc + - const: sgx + mboxes: + items: + - description: GFX coprocessor mailbox + - description: GFX1 coprocessor mailbox + memory-region: + minItems: 6 + memory-region-names: + items: + - const: ttbs + - const: pagetables + - const: handoff + - const: fw-data + - const: l2-pagetables + - const: fw-text + required: + - reg-names + - power-domains + - memory-region-names + - operating-points-v2 + - apple,cs-opp + - apple,afr-opp + - apple,csafr-min-sram-microvolt + - apple,aon-ptd + else: + properties: + apple,csafr-min-sram-microvolt: false + apple,aon-ptd: false - if: properties: compatible: @@ -456,8 +517,10 @@ allOf: compatible: contains: enum: + - apple,agx-g17s - apple,agx-t6040 - apple,agx-t6041 + - apple,agx-t6050 - apple,agx-t8132 - apple,agx-t8140 - apple,agx-g17s diff --git a/arch/arm64/boot/dts/apple/t6050-j716c-gpu-panel.dtsi b/arch/arm64/boot/dts/apple/t6050-j716c-gpu-panel.dtsi new file mode 100644 index 0000000000000..2b908e34fdaab --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6050-j716c-gpu-panel.dtsi @@ -0,0 +1,400 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * J716c GPU and internal panel. The loader validates the running hardware, + * fills the memory reservations and operating points, then enables the + * dependent devices. A source DT alone must not start either coprocessor. + */ + +/* Replace the disabled inventory with the GPU driver's resource layout. */ +/delete-node/ &sgx; +/delete-node/ &gfx_asc; +/delete-node/ &gfx1_asc; + +/ { + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + uat_ttbs: uat-ttbs { + reg = <0 0 0 0>; + no-map; + status = "disabled"; + }; + + uat_pagetables: uat-pagetables { + reg = <0 0 0 0>; + no-map; + status = "disabled"; + }; + + uat_handoff: uat-handoff { + reg = <0 0 0 0>; + no-map; + status = "disabled"; + }; + + uat_l2_pagetables: uat-l2-pagetables { + reg = <0 0 0 0>; + no-map; + status = "disabled"; + }; + + gpu_fw_text: gpu-fw-text { + reg = <0 0 0 0>; + no-map; + status = "disabled"; + }; + + gpu_fw_data: gpu-fw-data { + reg = <0 0 0 0>; + no-map; + status = "disabled"; + }; + }; + + /* Four clusters on one die: four main voltage lanes and one CS/AFR lane. */ + gpu_opp: opp-table-gpu { + compatible = "operating-points-v2"; + + opp00 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp01 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp02 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp03 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp04 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp05 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp06 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp07 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp08 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp09 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp10 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp11 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp12 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + + opp13 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0 0 0 0>; + opp-microvolt-sram = <0 0 0 0>; + }; + }; + + gpu_afr_opp: opp-table-gpu-afr { + compatible = "operating-points-v2"; + + opp00 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp01 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp02 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp03 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp04 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp05 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp06 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp07 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp08 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp09 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp10 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp11 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp12 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp13 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + }; + + gpu_cs_opp: opp-table-gpu-cs { + compatible = "operating-points-v2"; + + opp00 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp01 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp02 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp03 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp04 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp05 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp06 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp07 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp08 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp09 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp10 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp11 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp12 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + + opp13 { + opp-hz = /bits/ 64 <0>; + opp-microvolt = <0>; + }; + }; + + soc@2300000000 { + + gpu: gpu@2302600000 { + compatible = "apple,agx-g17c", "apple,agx-g17s"; + reg = <0x23 0x02600000 0x0 0x88000>, + <0x23 0x00000000 0x0 0x4000000>; + reg-names = "asc", "sgx"; + mboxes = <&gfx_mbox>, <&gfx1_mbox>; + power-domains = <&ps_gfx>; + /* Raises the DRAM and fabric floors while GPU work is in flight */ + apple,clpc = <&clpc>; + memory-region = <&uat_ttbs>, <&uat_pagetables>, <&uat_handoff>, + <&gpu_fw_data>, <&uat_l2_pagetables>, <&gpu_fw_text>; + memory-region-names = "ttbs", "pagetables", "handoff", "fw-data", + "l2-pagetables", "fw-text"; + operating-points-v2 = <&gpu_opp>; + apple,afr-opp = <&gpu_afr_opp>; + apple,cs-opp = <&gpu_cs_opp>; + apple,csafr-min-sram-microvolt = <0>; + /* Three power telemetry records, each an identifier and two words. */ + apple,aon-ptd = <0 0 0 0 0 0 0 0 0>; + status = "disabled"; + }; + + gfx_mbox: mailbox@2302600000 { + compatible = "apple,t6050-j775d-ascwrap-v6"; + reg = <0x23 0x02600000 0x0 0x88000>, + <0x23 0x02050000 0x0 0x8>; + reg-names = "wrapper", "iop-vbar"; + interrupts = , + ; + interrupt-names = "send-empty", "recv-not-empty"; + apple,firmware-role = "GFX"; + power-domains = <&ps_gfx>; + #mbox-cells = <0>; + status = "disabled"; + }; + + gfx1_mbox: mailbox@2302e00000 { + compatible = "apple,t6050-j775d-ascwrap-v6"; + reg = <0x23 0x02e00000 0x0 0x88000>, + <0x23 0x02850000 0x0 0x8>; + reg-names = "wrapper", "iop-vbar"; + interrupts = , + ; + interrupt-names = "send-empty", "recv-not-empty"; + apple,firmware-role = "GFX1"; + power-domains = <&ps_gfx>; + #mbox-cells = <0>; + status = "disabled"; + }; + }; + + /* The loader verifies these clock identifiers and fills their rates. */ + dcp_fw_clk361: clock-dcp-firmware-361 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <810000000>; + clock-output-names = "dcp_firmware_361"; + }; + + dcp_fw_clk458: clock-dcp-firmware-458 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <521064992>; + clock-output-names = "dcp_firmware_458"; + }; + + display: display-subsystem { + compatible = "apple,display-subsystem"; + iommus = <&disp0_dart 0>; + status = "disabled"; + }; +}; + +/* The power states stay disabled until the loader accepts the GPU handoff. */ +&pmgr_gpx { + status = "okay"; +}; + +&ps_gpx { + apple,always-on; +}; + +&ps_afr { + apple,always-on; +}; + +&dcp_dart { + apple,dma-range = <0x100 0x0 0x300 0x0>; +}; + +&disp0_dart { + reg = <0x4 0x8a300000 0x0 0xc000>; + apple,dma-range = <0x100 0x0 0x300 0x0>; +}; + +&dcp { + apple,bw-scratch = <&dcpext0_pmc 0 5 0x20000>; + apple,clock-ids = <361 458>; + clocks = <&dcp_fw_clk361>, <&dcp_fw_clk458>; + clock-names = "firmware-0", "firmware-1"; + + panel { + compatible = "apple,panel-mini-led"; + apple,max-brightness = <600>; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t6050-j716c.dts b/arch/arm64/boot/dts/apple/t6050-j716c.dts index 1ff75c278ce84..e6999d3a2af4d 100644 --- a/arch/arm64/boot/dts/apple/t6050-j716c.dts +++ b/arch/arm64/boot/dts/apple/t6050-j716c.dts @@ -28,6 +28,16 @@ bluetooth0 = &n1_beta; }; + /* GPU aperture; its PMGR and coprocessors are described below. */ + j716c_gpu_bus: soc@2300000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x23 0x0 0x23 0x0 0x0 0x4000000>; + interrupt-parent = <&aic>; + nonposted-mmio; + }; + chosen { #address-cells = <2>; #size-cells = <2>; @@ -237,3 +247,4 @@ }; #include "t6050-j716c-isp.dtsi" +#include "t6050-j716c-gpu-panel.dtsi" diff --git a/arch/arm64/boot/dts/apple/t6050-peripherals.dtsi b/arch/arm64/boot/dts/apple/t6050-peripherals.dtsi index cfdae30f9062e..c730675d7a924 100644 --- a/arch/arm64/boot/dts/apple/t6050-peripherals.dtsi +++ b/arch/arm64/boot/dts/apple/t6050-peripherals.dtsi @@ -54,6 +54,7 @@ }; }; #endif +#ifndef T6050_J716C / { soc { compatible = "simple-bus"; @@ -64,6 +65,8 @@ }; }; +#endif + &pmgr0 { ps_pms: power-controller@100 { compatible = "apple,t6050-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; @@ -885,7 +888,11 @@ }; }; +#ifdef T6050_J716C +&j716c_gpu_bus { +#else &{/soc} { +#endif pmgr_gpx: power-management@2300e80000 { compatible = "apple,t6050-pmgr", "apple,t8103-pmgr", "syscon", "simple-mfd"; reg = <0x23 0xe80000 0x0 0x4000>; @@ -1114,7 +1121,11 @@ }; }; +#ifdef T6050_J716C +&die0 { +#else &{/soc} { +#endif peripheral_clocks: clock-controller@280600000 { compatible = "apple,t6050-pmgr-clocks", "apple,pmgr-clocks"; reg = <0x2 0x80600000 0x0 0x1fc000>, @@ -1183,7 +1194,11 @@ }; }; +#ifdef T6050_J716C +&die0 { +#else &{/soc} { +#endif #if defined(T6050_J714C) || defined(T6050_J716C) || defined(T6050_J775C) || defined(T6050_J775D) || defined(T6050_K114C) || defined(T6050_K116C) nub_spmi1: spmi@28a054000 { compatible = "apple,t6050-spmi", "apple,t8142-spmi"; @@ -1322,6 +1337,7 @@ #endif #if defined(T6050_J714S) || defined(T6050_K114C) || defined(T6050_K114S) || defined(T6050_K116C) || defined(T6050_K116S) +#ifndef T6050_J716C nub_spmi_a1: spmi@28a1a8000 { compatible = "apple,t6050-spmi", "apple,t8142-spmi"; reg = <0x2 0x8a1a8000 0x0 0x4000>, @@ -1333,6 +1349,7 @@ status = "disabled"; }; #endif +#endif #if defined(T6050_J714C) || defined(T6050_J714S) || defined(T6050_J716C) || defined(T6050_J716S) || defined(T6050_K114C) || defined(T6050_K114S) || defined(T6050_K116C) || defined(T6050_K116S) isp0: isp@580000000 {