diff --git a/arch/arm64/boot/dts/apple/t6050-j716c-display.dtsi b/arch/arm64/boot/dts/apple/t6050-j716c-display.dtsi
new file mode 100644
index 0000000000000..3c8748edbe335
--- /dev/null
+++ b/arch/arm64/boot/dts/apple/t6050-j716c-display.dtsi
@@ -0,0 +1,242 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/* J716c external display processors and USB4 display routing. */
+
+&dcpext1_dart {
+	apple,dma-range = <0x100 0x0 0x300 0x0>;
+};
+
+&dispext1_dart {
+	/* Scanout and PIODMA share the first register window. */
+	reg = <0x3 0x92300000 0x0 0xc000>;
+	apple,dma-range = <0x100 0x0 0x300 0x0>;
+};
+
+&dcpext1 {
+	apple,bw-scratch = <&dcpext0_pmc 0 5 0x30000>;
+	apple,dcp-index = <2>;
+	apple,clock-ids;
+};
+
+&dcpext2_dart {
+	apple,dma-range = <0x100 0x0 0x300 0x0>;
+};
+
+&dispext2_dart {
+	/* Scanout and PIODMA share the first register window. */
+	reg = <0x3 0x02300000 0x0 0xc000>;
+	apple,dma-range = <0x100 0x0 0x300 0x0>;
+};
+
+&dcpext2 {
+	apple,bw-scratch = <&dcpext0_pmc 0 5 0x34000>;
+	apple,dcp-index = <3>;
+	apple,clock-ids;
+};
+
+&dcpext3_dart {
+	apple,dma-range = <0x100 0x0 0x300 0x0>;
+};
+
+&dispext3_dart {
+	/* Scanout and PIODMA share the first register window. */
+	reg = <0x3 0x06300000 0x0 0xc000>;
+	apple,dma-range = <0x100 0x0 0x300 0x0>;
+};
+
+&dcpext3 {
+	apple,bw-scratch = <&dcpext0_pmc 0 5 0x38000>;
+	apple,dcp-index = <4>;
+	apple,clock-ids;
+};
+
+&atc2_phy {
+		reg = <0x3 0x83000000 0x0 0x2c000>,
+		      <0x3 0x82a90000 0x0 0x4000>,
+		      <0x3 0x82800000 0x0 0x4000>,
+		      <0x3 0x83200000 0x0 0x4000>,
+		      <0x3 0x83244000 0x0 0x4000>,
+		      <0x3 0x80000000 0x0 0x8000>,
+		      <0x3 0x80020000 0x0 0x4000>,
+		      <0x3 0x83250000 0x0 0x4000>,
+		      <0x3 0x83140000 0x0 0x4000>,
+		      <0x3 0x830c0000 0x0 0x10000>,
+		      <0x3 0x82a84000 0x0 0x4000>,
+		      <0x2 0x80000068 0x0 0x10>;
+
+		reg-names = "core", "usb2phy", "usb2-digital", "reset", "fabric", "axi2af", "lioa",
+			    "common-cfg", "usb-control", "firmware-data", "pipehandler",
+			    "dp-clock-source";
+
+		power-domains = <&ps_atc2_usb_aon>, <&ps_atc2_common>, <&ps_atc2_phymxwrap>,
+				<&ps_atc2_usb>, <&ps_atc2_common_dp_0>, <&ps_atc2_common_dp_1>,
+				<&ps_atc2_common_dp_2>, <&ps_atc2_common_dp_3>;
+
+		power-domain-names = "usb-aon", "common", "wrapper", "usb", "dp0", "dp1", "dp2", "dp3";
+};
+
+&atc2_xbar {
+	status = "okay";
+};
+
+/* The shared PMC stays disabled until the internal DCP handoff enables it. */
+
+&dart_dcpext0 {
+	status = "okay";
+};
+
+&dart_dispext0 {
+	status = "okay";
+};
+
+&dcpext0_mbox {
+	status = "okay";
+};
+
+&dcpext1_dart {
+	status = "okay";
+};
+
+&dispext1_dart {
+	status = "okay";
+};
+
+&dcpext1_mbox {
+	status = "okay";
+};
+
+&dcpext2_dart {
+	status = "okay";
+};
+
+&dispext2_dart {
+	status = "okay";
+};
+
+&dcpext2_mbox {
+	status = "okay";
+};
+
+&dcpext3_dart {
+	status = "okay";
+};
+
+&dispext3_dart {
+	status = "okay";
+};
+
+&dcpext3_mbox {
+	status = "okay";
+};
+
+&dcpext0 {
+	apple,firmware-version = <27 0 0>;
+	apple,firmware-compat = <27 0 0>;
+	mux-controls = <&atc2_xbar 0>, <&atc2_xbar 1>, <&atc2_xbar 2>,
+		       <&atc2_xbar 3>, <&atc2_xbar 4>;
+	mux-control-names = "typec0", "typec0-dpin0", "typec0-dpin1",
+			    "typec0-dpin2", "typec0-dpin3";
+	status = "okay";
+
+	typec-routes {
+		route@0 {
+			port {
+				dcpext0_typec: endpoint {
+					remote-endpoint = <&hpm2_dp>;
+				};
+			};
+		};
+	};
+};
+
+&dcpext1 {
+	apple,firmware-version = <27 0 0>;
+	apple,firmware-compat = <27 0 0>;
+	apple,connector-type = "USB-C";
+	apple,dptx-die = <0>;
+	status = "okay";
+};
+
+&dcpext2 {
+	apple,firmware-version = <27 0 0>;
+	apple,firmware-compat = <27 0 0>;
+	apple,connector-type = "USB-C";
+	apple,dptx-die = <0>;
+	apple,typec-dptx-phys = <2>;
+	apple,typec-mux-indices = <4>;
+	phys = <&atc2_phy 6>;
+	phy-names = "typec0";
+	mux-controls = <&atc2_xbar 0>, <&atc2_xbar 1>, <&atc2_xbar 2>,
+		       <&atc2_xbar 3>, <&atc2_xbar 4>;
+	mux-control-names = "typec0", "typec0-dpin0", "typec0-dpin1",
+			    "typec0-dpin2", "typec0-dpin3";
+	status = "okay";
+
+	typec-routes {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		route@0 {
+			reg = <0>;
+			mode-switch;
+
+			port {
+				dcpext2_typec: endpoint {
+					remote-endpoint = <&hpm2_dp1>;
+				};
+			};
+		};
+	};
+};
+
+&dcpext3 {
+	apple,firmware-version = <27 0 0>;
+	apple,firmware-compat = <27 0 0>;
+	apple,connector-type = "USB-C";
+	apple,dptx-die = <0>;
+	status = "okay";
+};
+
+/* The PHY's USB4 DP tunnel pixel clock gates */
+&ps_atc2_common_dp_0 {
+	status = "okay";
+};
+
+&ps_atc2_common_dp_1 {
+	status = "okay";
+};
+
+&ps_atc2_common_dp_2 {
+	status = "okay";
+};
+
+&ps_atc2_common_dp_3 {
+	status = "okay";
+};
+
+
+&dcpext0 { typec-routes { route@0 { status = "okay"; }; }; };
+
+&hpm2 { connector { ports { port@2 {
+ #address-cells = <1>; #size-cells = <0>;
+ /delete-node/ endpoint;
+ hpm2_dp: endpoint@0 { reg = <0>; remote-endpoint = <&dcpext0_typec>; };
+ hpm2_dp1: endpoint@1 { reg = <1>; remote-endpoint = <&dcpext2_typec>; };
+}; }; }; };
+
+&acio2 {
+ interrupts = <AIC_IRQ 0 1667 IRQ_TYPE_LEVEL_HIGH>, <AIC_IRQ 0 1668 IRQ_TYPE_LEVEL_HIGH>, <AIC_IRQ 0 1673 IRQ_TYPE_LEVEL_HIGH>, <AIC_IRQ 0 1674 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dpin0", "dpin1", "dpin2", "dpin3";
+};
+
+/* Keep internal scanout first for the loader's panel handoff. */
+&display {
+	iommus = <&disp0_dart 0>, <&dart_dispext0 0>, <&dispext1_dart 0>,
+		 <&dispext2_dart 0>, <&dispext3_dart 0>;
+};
+
+/* Keep the right router's suppliers enabled after the inventory include. */
+&ps_atc2_cio { status = "okay"; };
+&ps_atc2_cio_pcie { status = "okay"; };
+&ps_atc2_cio_usb { status = "okay"; };
+&ps_atc2_cio_auss { status = "okay"; };
+&ps_atc2_pcie { status = "okay"; };
diff --git a/arch/arm64/boot/dts/apple/t6050-j716c-left-usb4.dtsi b/arch/arm64/boot/dts/apple/t6050-j716c-left-usb4.dtsi
new file mode 100644
index 0000000000000..196128d3add0c
--- /dev/null
+++ b/arch/arm64/boot/dts/apple/t6050-j716c-left-usb4.dtsi
@@ -0,0 +1,1280 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/* J716c left USB and USB4 ports (ATC0 and ATC1). */
+&nub_spmi_a0 {
+	status = "okay";
+
+	hpm0: usb-pd@c {
+		compatible = "apple,sn201202x";
+		reg = <0xc SPMI_USID>;
+	};
+
+	hpm1: usb-pd@a {
+		compatible = "apple,sn201202x";
+		reg = <0xa SPMI_USID>;
+	};
+};
+/ { aliases { atcphy0 = &atc0_phy; atcphy1 = &atc1_phy; }; };
+&{/soc@200000000} {
+	atc0_phy_mbox: mailbox@2a3148000 {
+		compatible = "apple,t6050-asc-mailbox", "apple,asc-mailbox-v4";
+		reg = <0x2 0xa3148000 0x0 0x4000>;
+		interrupts = <AIC_IRQ 0 841 IRQ_TYPE_LEVEL_HIGH>,
+		<AIC_IRQ 0 842 IRQ_TYPE_LEVEL_HIGH>,
+		<AIC_IRQ 0 843 IRQ_TYPE_LEVEL_HIGH>,
+		<AIC_IRQ 0 844 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "send-empty", "send-not-empty", "recv-empty", "recv-not-empty";
+		#mbox-cells = <0>;
+	};
+	atc0_phy: phy@2a3000000 {
+		compatible = "apple,t6050-combo-phy";
+		reg = <0x2 0xa3000000 0x0 0x2c000>,
+		<0x2 0xa2a90000 0x0 0x4000>,
+		<0x2 0xa2800000 0x0 0x4000>,
+		<0x2 0xa3200000 0x0 0x4000>,
+		<0x2 0xa3244000 0x0 0x4000>,
+		<0x2 0xa0000000 0x0 0x8000>,
+		<0x2 0xa0020000 0x0 0x4000>,
+		<0x2 0xa3250000 0x0 0x4000>,
+		<0x2 0xa3140000 0x0 0x4000>,
+		<0x2 0xa30c0000 0x0 0x10000>,
+		<0x2 0xa2a84000 0x0 0x4000>;
+		reg-names = "core", "usb2phy", "usb2-digital", "reset", "fabric", "axi2af", "lioa",
+		"common-cfg", "usb-control", "firmware-data", "pipehandler";
+		#phy-cells = <1>;
+		#reset-cells = <1>;
+		apple,port-index = <0>;
+		apple,guest-port-reserved;
+		mode-switch;
+		orientation-switch;
+		mboxes = <&atc0_phy_mbox>;
+		power-domains = <&ps_atc0_usb_aon>, <&ps_atc0_common>, <&ps_atc0_phymxwrap>,
+		<&ps_atc0_usb>;
+		power-domain-names = "usb-aon", "common", "wrapper", "usb";
+
+		port {
+			atc0_phy_ep: endpoint {
+				remote-endpoint = <&hpm0_ss>;
+			};
+		};
+	};
+
+	usb_drd0_dart_0: iommu@2a2f00000 {
+		compatible = "apple,t6050-dart", "apple,t8110-dart";
+		reg = <0x2 0xa2f00000 0x0 0xc000>;
+		interrupts = <AIC_IRQ 0 1423 IRQ_TYPE_LEVEL_HIGH>;
+		power-domains = <&ps_atc0_usb>;
+		#iommu-cells = <1>;
+		apple,dma-range = <0x100 0x4000 0x0 0xffff0000>;
+	};
+	usb_drd0_dart_1: iommu@2a2f80000 {
+		compatible = "apple,t6050-dart", "apple,t8110-dart";
+		reg = <0x2 0xa2f80000 0x0 0xc000>;
+		interrupts = <AIC_IRQ 0 1423 IRQ_TYPE_LEVEL_HIGH>;
+		power-domains = <&ps_atc0_usb>;
+		#iommu-cells = <1>;
+		apple,dma-range = <0x100 0x4000 0x0 0xffff0000>;
+	};
+};
+&ps_atc0_common {
+	status = "okay";
+};
+&ps_atc0_usb_aon {
+	status = "okay";
+};
+
+&ps_atc0_usb {
+	power-domains = <&ps_atc0_common>, <&ps_atc0_usb_aon>;
+	status = "okay";
+};
+
+&ps_atc0_phymxwrap {
+	power-domains = <&ps_atc0_common>, <&ps_atc0_usb_aon>;
+	status = "okay";
+};
+&atc1_phy_mbox { status = "okay"; };
+&atc1_phy { status = "okay"; };
+&usb_drd1 { status = "okay"; };
+&usb_drd1_dart_0 { status = "okay"; };
+&usb_drd1_dart_1 { status = "okay"; };
+&hpm0 {
+	status = "okay";
+	apple,reset-inherited-usb2-connection;
+	connector {
+		compatible = "usb-c-connector";
+		label = "USB-C Left Rear";
+		power-role = "dual";
+		data-role = "host";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				hpm0_hs: endpoint {
+					remote-endpoint = <&usb_drd0_hs>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				hpm0_ss: endpoint {
+					remote-endpoint = <&atc0_phy_ep>;
+				};
+			};
+		};
+	};
+
+};
+&hpm1 {
+	status = "okay";
+	connector {
+		compatible = "usb-c-connector";
+		label = "USB-C Left Front";
+		power-role = "dual";
+		data-role = "host";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				hpm1_hs: endpoint {
+					remote-endpoint = <&usb_drd1_hs>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				hpm1_ss: endpoint {
+					remote-endpoint = <&atc1_phy_ep>;
+				};
+			};
+		};
+	};
+
+};
+/* Only the three router LSTX pins are available to GPIO clients. */
+&pinctrl_aop { gpio-reserved-ranges = <0 77>, <78 1>, <80 1>, <82 3>; };
+
+/* ATC0 router and PCIe tunnel. */
+&ps_atc0_cio {
+	power-domains = <&ps_atc0_common>;
+	status = "okay";
+};
+
+&ps_atc0_cio_pcie {
+	power-domains = <&ps_atc0_cio>;
+	status = "okay";
+};
+
+&ps_atc0_cio_usb {
+	power-domains = <&ps_atc0_cio>;
+	status = "okay";
+};
+
+&ps_atc0_cio_auss {
+	power-domains = <&ps_atc0_cio>, <&ps_auss>;
+	status = "okay";
+};
+
+&ps_atc0_pcie {
+	power-domains = <&ps_atc0_common>, <&ps_atc0_usb_aon>;
+	status = "okay";
+};
+&pinctrl_aop {
+	acio0_lstx_pins: acio0-lstx-pins {
+		pinmux = <0x1004d>;
+	};
+};
+&{/soc@200000000} {
+	acio0_mbox: mailbox@2a1108000 {
+		compatible = "apple,t6050-asc-mailbox", "apple,asc-mailbox-v4";
+		reg = <0x2 0xa1108000 0x0 0x4000>;
+		interrupts = <AIC_IRQ 0 837 IRQ_TYPE_LEVEL_HIGH>,
+		<AIC_IRQ 0 838 IRQ_TYPE_LEVEL_HIGH>,
+		<AIC_IRQ 0 839 IRQ_TYPE_LEVEL_HIGH>,
+		<AIC_IRQ 0 840 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "send-empty", "send-not-empty",
+		"recv-empty", "recv-not-empty";
+		#mbox-cells = <0>;
+	};
+	acio0: acio@2a1ac0000 {
+		compatible = "apple,t6050-usb4-acio";
+		reg = <0x2 0xa1ac0000 0x0 0xc000>,
+		<0x2 0xa1080000 0x0 0x26000>,
+		<0x2 0xa1e44000 0x0 0x4000>,
+		<0x2 0xa1100000 0x0 0x4000>,
+		<0x2 0xa1c80000 0x0 0x4000>;
+		reg-names = "rc", "sram", "pcie-adapter", "cpu", "router-ap-fw";
+		mboxes = <&acio0_mbox>;
+		resets = <&cio_reconfig0 0>;
+
+		power-domains = <&ps_atc0_cio>, <&ps_atc0_cio_pcie>,
+		<&ps_atc0_cio_usb>, <&ps_atc0_cio_auss>, <&ps_atc0_pcie>;
+		thunderbolt-switch;
+		apple,pcie-tunnel = <&acio0_pcie_tunnel>;
+		pinctrl-0 = <&acio0_lstx_pins>;
+		pinctrl-names = "lstx";
+		lstx-gpios = <&pinctrl_aop 77 GPIO_ACTIVE_HIGH>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0 0x2 0xa1000000 0x1000000>;
+		nonposted-mmio;
+
+		acio0_dart: iommu@a80000 {
+			compatible = "apple,t6050-dart", "apple,t8110-dart";
+			reg = <0xa80000 0xc000>;
+			interrupts = <AIC_IRQ 0 1606 IRQ_TYPE_LEVEL_HIGH>;
+			power-domains = <&ps_atc0_cio>;
+			#iommu-cells = <1>;
+			apple,dma-range = <0x100 0x4000 0x0 0xffff0000>;
+			apple,bypass-sids = <15>;
+			apple,full-error-reporting;
+			apple,ctc-flush;
+		};
+
+		acio0_nhi: nhi@f00000 {
+			compatible = "apple,t6050-usb4-nhi";
+			reg = <0xf00000 0x100000>;
+			reg-names = "nhi";
+			interrupts = <AIC_IRQ 0 1579 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1580 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1581 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1582 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1583 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1584 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1585 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1586 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1587 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1588 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1589 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1590 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1591 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1592 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1593 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1594 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1595 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1596 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1597 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1598 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1599 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1600 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1601 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1602 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1608 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "txring0", "txring1", "txring2", "txring3", "txring4", "txring5",
+			"txring6", "txring7", "txring8", "txring9", "txring10", "txring11",
+			"rxring0", "rxring1", "rxring2", "rxring3", "rxring4", "rxring5",
+			"rxring6", "rxring7", "rxring8", "rxring9", "rxring10", "rxring11",
+			"parity";
+			iommus = <&acio0_dart 0>,
+			<&acio0_dart 1>,
+			<&acio0_dart 2>,
+			<&acio0_dart 3>,
+			<&acio0_dart 4>,
+			<&acio0_dart 5>,
+			<&acio0_dart 6>,
+			<&acio0_dart 7>,
+			<&acio0_dart 8>,
+			<&acio0_dart 9>,
+			<&acio0_dart 10>,
+			<&acio0_dart 11>,
+			<&acio0_dart 16>,
+			<&acio0_dart 17>,
+			<&acio0_dart 18>,
+			<&acio0_dart 19>,
+			<&acio0_dart 20>,
+			<&acio0_dart 21>,
+			<&acio0_dart 22>,
+			<&acio0_dart 23>,
+			<&acio0_dart 24>,
+			<&acio0_dart 25>,
+			<&acio0_dart 26>,
+			<&acio0_dart 27>;
+		};
+	};
+};
+/ {
+	acio0_pcie_tunnel: pcie-tunnel-0 {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		nonposted-mmio;
+
+		apciec0_dart: iommu@2a4000000 {
+			compatible = "apple,t6050-dart", "apple,t8110-dart";
+			reg = <0x2 0xa4000000 0x0 0x20000>;
+			interrupts = <AIC_IRQ 0 1406 IRQ_TYPE_LEVEL_HIGH>;
+			power-domains = <&ps_atc0_pcie>;
+			#iommu-cells = <1>;
+			apple,bypass-sids = <253 255>;
+			apple,full-error-reporting;
+			apple,ctc-flush;
+		};
+
+		apciec0: pcie@1c50000000 {
+			compatible = "apple,t6050-pciec";
+			device_type = "pci";
+			reg = <0x1c 0x50000000 0x0 0x10000000>,
+			<0x2 0xa4034000 0x0 0x4000>,
+			<0x2 0xa4020000 0x0 0x8000>,
+			<0x2 0xa4038000 0x0 0x4000>,
+			<0x2 0xa4060000 0x0 0x4000>,
+			<0x2 0xa402c000 0x0 0x4000>,
+			<0x2 0xa4028000 0x0 0x4000>;
+			reg-names = "config", "rc", "port0", "fabric", "debug", "ltssm", "intr2axi";
+
+			interrupts = <AIC_IRQ 0 1405 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "port0";
+			power-domains = <&ps_atc0_pcie>;
+
+			apple,pciec-kernel-init;
+
+			msi-controller;
+			msi-parent = <&apciec0>;
+			msi-ranges = <&aic AIC_IRQ 0 1952 IRQ_TYPE_EDGE_RISING 32>;
+			apple,msi-vector-base = <128>;
+
+			iommu-map = <0x0 &apciec0_dart 0x0 0x40>;
+			iommu-map-mask = <0x3f>;
+			linux,pci-domain = <1>;
+			bus-range = <0x0 0x7f>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			ranges = <0x43000000 0x8 0x0 0x8 0x0 0x2 0x0>,
+			<0x02000000 0x0 0x00100000 0xa 0x00100000 0x0 0x3ff00000>,
+			<0x42000000 0x0 0x40000000 0xa 0x40000000 0x0 0x40000000>;
+
+			apciec0_port: pci@0,0 {
+				device_type = "pci";
+				reg = <0x0 0x0 0x0 0x0 0x0>;
+				external-facing;
+
+				#address-cells = <3>;
+				#size-cells = <2>;
+				ranges;
+
+				interrupt-controller;
+				#interrupt-cells = <1>;
+				interrupt-map-mask = <0 0 0 7>;
+				interrupt-map = <0 0 0 1 &apciec0_port 0 0 0 0>,
+				<0 0 0 2 &apciec0_port 0 0 0 1>,
+				<0 0 0 3 &apciec0_port 0 0 0 2>,
+				<0 0 0 4 &apciec0_port 0 0 0 3>;
+			};
+		};
+	};
+};
+&atc0_phy {
+	apple,tunable-lane0-rx-top-cio = <0x35c 0xe00 0x0>;
+	apple,tunable-lane1-rx-top-cio = <0x35c 0xe00 0x0>;
+};
+&hpm0 {
+	connector {
+		ports {
+			port@3 {
+				reg = <3>;
+				hpm0_usb4: endpoint {
+					remote-endpoint = <&acio0_tbt>;
+				};
+			};
+		};
+	};
+};
+&acio0 {
+	apple,tunable-rc = <0x0 0xfff0 0x4020>,
+	<0x2c 0x4 0x0>,
+	<0x4004 0x1ff01ff 0x1000100>,
+	<0x4008 0x801f 0x4>,
+	<0x4010 0x7f 0x40>,
+	<0x4014 0x801f 0x4>,
+	<0x401c 0x7f 0x40>,
+	<0x4024 0x801f 0x4>,
+	<0x402c 0x7f 0x40>,
+	<0x4030 0x801f 0x4>,
+	<0x4038 0xffffffff 0x1010101>,
+	<0x403c 0xffff 0x101>,
+	<0x4040 0x1 0x1>,
+	<0x4044 0xffffffff 0x1010101>,
+	<0x4048 0x1 0x1>,
+	<0x404c 0x801f 0x4>,
+	<0x8004 0x70007 0x40004>,
+	<0x8008 0x801f 0x4>,
+	<0x8010 0x70007 0x40004>,
+	<0x8018 0x801f 0x4>,
+	<0x8020 0x70007 0x40004>,
+	<0x8028 0x801f 0x4>,
+	<0x8030 0x801f 0x4>,
+	<0x8038 0x801f 0x4>,
+	<0x8040 0x801f 0x4>,
+	<0x8048 0x801f 0x4>,
+	<0x8050 0x801f 0x4>,
+	<0x8058 0x801f 0x4>,
+	<0x8060 0x801f 0x4>;
+	apple,tunable-pcie-adapter = <0x1008 0x6 0x6>;
+	apple,tunable-router-ap-fw = <0x8 0xff2 0x482>;
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@1 {
+			reg = <1>;
+			acio0_tbt: endpoint {
+				remote-endpoint = <&hpm0_usb4>;
+			};
+		};
+	};
+};
+&acio0_dart {
+	apple,tunable = <0x20c 0x80000121 0x80000121>,
+	<0x220 0xf0f 0xf0f>,
+	<0x224 0xffff 0x909>,
+	<0x300 0x1f31 0x1>,
+	<0x308 0x3ffffffc 0x10000000>,
+	<0x310 0x3ffffffc 0x3ffffffc>,
+	<0x800 0xf003f 0x10000>,
+	<0x804 0xf003f 0x10002>,
+	<0x808 0xf003f 0x10004>,
+	<0x80c 0xf003f 0x20006>,
+	<0x810 0xf003f 0x2000a>,
+	<0x814 0xf003f 0x2000e>,
+	<0x818 0xf003f 0x20012>,
+	<0x81c 0xf003f 0x20016>,
+	<0x820 0xf003f 0x2001a>,
+	<0x824 0xf003f 0x2001e>,
+	<0x828 0xf003f 0x20022>,
+	<0x82c 0xf003f 0x20026>,
+	<0x830 0xf003f 0x2002a>,
+	<0x834 0xf003f 0x2002e>,
+	<0x838 0xf003f 0x20032>,
+	<0x83c 0xf003f 0x10036>;
+};
+&acio0_nhi {
+	apple,tunable-nhi = <0xf8004 0xff 0x80>,
+	<0xf8008 0x801f 0x4>,
+	<0xf8010 0x3f 0x20>,
+	<0xf8014 0x801f 0x4>,
+	<0xf801c 0x1f 0x10>,
+	<0xf8020 0x801f 0x4>,
+	<0xf8028 0xff 0x80>,
+	<0xf802c 0x801f 0x4>,
+	<0xf8034 0xff 0x80>,
+	<0xf8038 0x801f 0x4>,
+	<0xf8040 0x3f 0x20>,
+	<0xf8044 0x801f 0x4>,
+	<0xf804c 0x8007 0x1>,
+	<0xfc004 0x3 0x2>,
+	<0xfc008 0x801f 0x4>,
+	<0xfc010 0x7 0x4>,
+	<0xfc014 0x801f 0x4>,
+	<0xfc01c 0x7 0x4>,
+	<0xfc020 0x801f 0x4>,
+	<0xfc028 0x7 0x4>,
+	<0xfc02c 0x801f 0x4>,
+	<0xfc034 0x7 0x4>,
+	<0xfc038 0x801f 0x4>,
+	<0xfc040 0x3 0x2>,
+	<0xfc044 0x801f 0x4>,
+	<0xfc04c 0x8007 0x1>,
+	<0x4000 0x1000000f 0x10000002>,
+	<0x4004 0x1000000f 0x10000002>,
+	<0x4008 0x1000000f 0x10000002>,
+	<0x400c 0x1000000f 0x10000002>,
+	<0x4010 0x1000000f 0x10000002>,
+	<0x4014 0x1000000f 0x10000002>,
+	<0x4018 0x1000000f 0x10000002>,
+	<0x401c 0x1000000f 0x10000002>,
+	<0x4020 0x1000000f 0x10000002>,
+	<0x4024 0x1000000f 0x10000002>,
+	<0x4028 0x1000000f 0x10000002>,
+	<0x402c 0x1000000f 0x10000002>,
+	<0x4040 0x1000000f 0x10000002>,
+	<0x4044 0x1000000f 0x10000002>,
+	<0x4048 0x1000000f 0x10000002>,
+	<0x404c 0x1000000f 0x10000002>,
+	<0x4050 0x1000000f 0x10000002>,
+	<0x4054 0x1000000f 0x10000002>,
+	<0x4058 0x1000000f 0x10000002>,
+	<0x405c 0x1000000f 0x10000002>,
+	<0x4060 0x1000000f 0x10000002>,
+	<0x4064 0x1000000f 0x10000002>,
+	<0x4068 0x1000000f 0x10000002>,
+	<0x406c 0x1000000f 0x10000002>,
+	<0x4080 0x1000000f 0x10000002>,
+	<0x4084 0x1000000f 0x10000002>,
+	<0x4088 0x1000000f 0x10000002>,
+	<0x408c 0x1000000f 0x10000002>,
+	<0x4090 0x1000000f 0x10000002>,
+	<0x4094 0x1000000f 0x10000002>,
+	<0x4098 0x1000000f 0x10000002>,
+	<0x409c 0x1000000f 0x10000002>,
+	<0x40a0 0x1000000f 0x10000002>,
+	<0x40a4 0x1000000f 0x10000002>,
+	<0x40a8 0x1000000f 0x10000002>,
+	<0x40ac 0x1000000f 0x10000002>,
+	<0x40c0 0x1000000f 0x10000002>,
+	<0x40c4 0x1000000f 0x10000002>,
+	<0x40c8 0x1000000f 0x10000002>,
+	<0x40cc 0x1000000f 0x10000002>,
+	<0x40d0 0x1000000f 0x10000002>,
+	<0x40d4 0x1000000f 0x10000002>,
+	<0x40d8 0x1000000f 0x10000002>,
+	<0x40dc 0x1000000f 0x10000002>,
+	<0x40e0 0x1000000f 0x10000002>,
+	<0x40e4 0x1000000f 0x10000002>,
+	<0x40e8 0x1000000f 0x10000002>,
+	<0x40ec 0x1000000f 0x10000002>,
+	<0x4100 0x1000000f 0x10000002>,
+	<0x4104 0x1000000f 0x10000002>,
+	<0x4108 0x1000000f 0x10000002>,
+	<0x410c 0x1000000f 0x10000002>,
+	<0x4110 0x1000000f 0x10000002>,
+	<0x4114 0x1000000f 0x10000002>,
+	<0x4118 0x1000000f 0x10000002>,
+	<0x411c 0x1000000f 0x10000002>,
+	<0x4120 0x1000000f 0x10000002>,
+	<0x4124 0x1000000f 0x10000002>,
+	<0x4128 0x1000000f 0x10000002>,
+	<0x412c 0x1000000f 0x10000002>,
+	<0x4140 0x1000000f 0x10000002>,
+	<0x4144 0x1000000f 0x10000002>,
+	<0x4148 0x1000000f 0x10000002>,
+	<0x414c 0x1000000f 0x10000002>,
+	<0x4150 0x1000000f 0x10000002>,
+	<0x4154 0x1000000f 0x10000002>,
+	<0x4158 0x1000000f 0x10000002>,
+	<0x415c 0x1000000f 0x10000002>,
+	<0x4160 0x1000000f 0x10000002>,
+	<0x4164 0x1000000f 0x10000002>,
+	<0x4168 0x1000000f 0x10000002>,
+	<0x416c 0x1000000f 0x10000002>,
+	<0x43e4 0x7 0x7>;
+	apple,thunderbolt-drom = [d9 90 e6 6e ee 18 7c ac 05 c0 49 a7 a6 00 5c 00
+	00 00 00 00 00 00 08 81 80 02 80 00 00 00 08 82
+	90 01 80 00 00 00 03 83 20 08 84 00 00 00 00 00
+	00 08 85 00 00 00 00 00 00 05 86 09 01 00 08 87
+	00 00 00 00 00 00 05 88 09 01 00 05 89 09 01 00
+	05 8a 09 01 00 0e 01 41 70 70 6c 65 2c 20 49 6e
+	63 2e 00 06 02 69 4f 53 00 00 00 00];
+};
+&apciec0_dart {
+	apple,tunable = <0x20c 0x80000121 0x80000121>,
+	<0x220 0xf0f 0xf0f>,
+	<0x224 0xffff 0x909>,
+	<0x300 0x1f31 0x1>,
+	<0x308 0x3ffffffc 0x10000000>,
+	<0x310 0x3ffffffc 0x3ffffffc>;
+};
+&apciec0 {
+	apple,tunable-debug = <0x1000 0x1 0x0>;
+	apple,tunable-rc = <0x78 0x7000 0x0>,
+	<0x718 0x7c000 0x0>,
+	<0x814 0xffffffff 0x2020f060>,
+	<0x8bc 0x1 0x0>;
+	apple,tunable-fabric = <0x4 0x3f003f 0x240024>,
+	<0x8 0x1 0x1>,
+	<0xc 0x1 0x1>,
+	<0x10 0x801f 0x4>,
+	<0x18 0x1ff 0x1e0>,
+	<0x1c 0x1 0x1>,
+	<0x20 0x801f 0x4>,
+	<0x28 0x1f 0x10>,
+	<0x2c 0x801f 0x4>,
+	<0x34 0x3f 0x20>,
+	<0x38 0x801f 0x4>,
+	<0x40 0x3f 0x20>,
+	<0x44 0x801f 0x4>,
+	<0x4c 0x10001 0x10001>,
+	<0x50 0x1 0x1>,
+	<0x54 0x1 0x1>,
+	<0x58 0x801f 0x4>,
+	<0x60 0x7f007f 0x450045>,
+	<0x64 0x801f 0x4>,
+	<0x6c 0x1f001f 0x100010>,
+	<0x70 0xf1 0x1>,
+	<0x74 0x801f 0x4>,
+	<0x7c 0x801f 0x4>,
+	<0x84 0x1 0x1>,
+	<0x88 0x1 0x1>,
+	<0x8c 0x801f 0x4>,
+	<0x94 0x1 0x1>,
+	<0x98 0x801f 0x4>,
+	<0xa0 0x1 0x1>,
+	<0xa4 0x801f 0x4>,
+	<0xac 0x1 0x1>,
+	<0xb0 0x1 0x1>,
+	<0xb4 0x801f 0x4>,
+	<0xbc 0x801f 0x4>,
+	<0xc4 0x801f 0x4>;
+};
+&apciec0_port {
+	apple,tunable = <0x140 0x1 0x1>,
+	<0x2a0 0x7e 0xa>;
+};
+
+/* ATC1 router and PCIe tunnel. */
+&ps_atc1_cio {
+	power-domains = <&ps_atc1_common>;
+	status = "okay";
+};
+
+&ps_atc1_cio_pcie {
+	power-domains = <&ps_atc1_cio>;
+	status = "okay";
+};
+
+&ps_atc1_cio_usb {
+	power-domains = <&ps_atc1_cio>;
+	status = "okay";
+};
+
+&ps_atc1_cio_auss {
+	power-domains = <&ps_atc1_cio>, <&ps_auss>;
+	status = "okay";
+};
+
+&ps_atc1_pcie {
+	power-domains = <&ps_atc1_common>, <&ps_atc1_usb_aon>;
+	status = "okay";
+};
+&pinctrl_aop {
+	acio1_lstx_pins: acio1-lstx-pins {
+		pinmux = <0x1004f>;
+	};
+};
+&{/soc@200000000} {
+	acio1_mbox: mailbox@2a9108000 {
+		compatible = "apple,t6050-asc-mailbox", "apple,asc-mailbox-v4";
+		reg = <0x2 0xa9108000 0x0 0x4000>;
+		interrupts = <AIC_IRQ 0 847 IRQ_TYPE_LEVEL_HIGH>,
+		<AIC_IRQ 0 848 IRQ_TYPE_LEVEL_HIGH>,
+		<AIC_IRQ 0 849 IRQ_TYPE_LEVEL_HIGH>,
+		<AIC_IRQ 0 850 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "send-empty", "send-not-empty",
+		"recv-empty", "recv-not-empty";
+		#mbox-cells = <0>;
+	};
+	acio1: acio@2a9ac0000 {
+		compatible = "apple,t6050-usb4-acio";
+		reg = <0x2 0xa9ac0000 0x0 0xc000>,
+		<0x2 0xa9080000 0x0 0x26000>,
+		<0x2 0xa9e44000 0x0 0x4000>,
+		<0x2 0xa9100000 0x0 0x4000>,
+		<0x2 0xa9c80000 0x0 0x4000>;
+		reg-names = "rc", "sram", "pcie-adapter", "cpu", "router-ap-fw";
+		mboxes = <&acio1_mbox>;
+		resets = <&cio_reconfig0 1>;
+
+		power-domains = <&ps_atc1_cio>, <&ps_atc1_cio_pcie>,
+		<&ps_atc1_cio_usb>, <&ps_atc1_cio_auss>, <&ps_atc1_pcie>;
+		thunderbolt-switch;
+		apple,pcie-tunnel = <&acio1_pcie_tunnel>;
+		pinctrl-0 = <&acio1_lstx_pins>;
+		pinctrl-names = "lstx";
+		lstx-gpios = <&pinctrl_aop 79 GPIO_ACTIVE_HIGH>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0 0x2 0xa9000000 0x1000000>;
+		nonposted-mmio;
+
+		acio1_dart: iommu@a80000 {
+			compatible = "apple,t6050-dart", "apple,t8110-dart";
+			reg = <0xa80000 0xc000>;
+			interrupts = <AIC_IRQ 0 1638 IRQ_TYPE_LEVEL_HIGH>;
+			power-domains = <&ps_atc1_cio>;
+			#iommu-cells = <1>;
+			apple,dma-range = <0x100 0x4000 0x0 0xffff0000>;
+			apple,bypass-sids = <15>;
+			apple,full-error-reporting;
+			apple,ctc-flush;
+		};
+
+		acio1_nhi: nhi@f00000 {
+			compatible = "apple,t6050-usb4-nhi";
+			reg = <0xf00000 0x100000>;
+			reg-names = "nhi";
+			interrupts = <AIC_IRQ 0 1611 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1612 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1613 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1614 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1615 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1616 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1617 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1618 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1619 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1620 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1621 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1622 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1623 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1624 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1625 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1626 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1627 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1628 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1629 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1630 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1631 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1632 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1633 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1634 IRQ_TYPE_LEVEL_HIGH>,
+			<AIC_IRQ 0 1640 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "txring0", "txring1", "txring2", "txring3", "txring4", "txring5",
+			"txring6", "txring7", "txring8", "txring9", "txring10", "txring11",
+			"rxring0", "rxring1", "rxring2", "rxring3", "rxring4", "rxring5",
+			"rxring6", "rxring7", "rxring8", "rxring9", "rxring10", "rxring11",
+			"parity";
+			iommus = <&acio1_dart 0>,
+			<&acio1_dart 1>,
+			<&acio1_dart 2>,
+			<&acio1_dart 3>,
+			<&acio1_dart 4>,
+			<&acio1_dart 5>,
+			<&acio1_dart 6>,
+			<&acio1_dart 7>,
+			<&acio1_dart 8>,
+			<&acio1_dart 9>,
+			<&acio1_dart 10>,
+			<&acio1_dart 11>,
+			<&acio1_dart 16>,
+			<&acio1_dart 17>,
+			<&acio1_dart 18>,
+			<&acio1_dart 19>,
+			<&acio1_dart 20>,
+			<&acio1_dart 21>,
+			<&acio1_dart 22>,
+			<&acio1_dart 23>,
+			<&acio1_dart 24>,
+			<&acio1_dart 25>,
+			<&acio1_dart 26>,
+			<&acio1_dart 27>;
+		};
+	};
+};
+/ {
+	acio1_pcie_tunnel: pcie-tunnel-1 {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		nonposted-mmio;
+
+		apciec1_dart: iommu@2ac000000 {
+			compatible = "apple,t6050-dart", "apple,t8110-dart";
+			reg = <0x2 0xac000000 0x0 0x20000>;
+			interrupts = <AIC_IRQ 0 1438 IRQ_TYPE_LEVEL_HIGH>;
+			power-domains = <&ps_atc1_pcie>;
+			#iommu-cells = <1>;
+			apple,bypass-sids = <253 255>;
+			apple,full-error-reporting;
+			apple,ctc-flush;
+		};
+
+		apciec1: pcie@1c60000000 {
+			compatible = "apple,t6050-pciec";
+			device_type = "pci";
+			reg = <0x1c 0x60000000 0x0 0x10000000>,
+			<0x2 0xac034000 0x0 0x4000>,
+			<0x2 0xac020000 0x0 0x8000>,
+			<0x2 0xac038000 0x0 0x4000>,
+			<0x2 0xac060000 0x0 0x4000>,
+			<0x2 0xac02c000 0x0 0x4000>,
+			<0x2 0xac028000 0x0 0x4000>;
+			reg-names = "config", "rc", "port0", "fabric", "debug", "ltssm", "intr2axi";
+
+			interrupts = <AIC_IRQ 0 1437 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "port0";
+			power-domains = <&ps_atc1_pcie>;
+
+			apple,pciec-kernel-init;
+
+			msi-controller;
+			msi-parent = <&apciec1>;
+			msi-ranges = <&aic AIC_IRQ 0 1984 IRQ_TYPE_EDGE_RISING 32>;
+			apple,msi-vector-base = <160>;
+
+			iommu-map = <0x0 &apciec1_dart 0x0 0x40>;
+			iommu-map-mask = <0x3f>;
+			linux,pci-domain = <2>;
+			bus-range = <0x0 0x7f>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			ranges = <0x43000000 0xc 0x0 0xc 0x0 0x2 0x0>,
+			<0x02000000 0x0 0x00100000 0xe 0x00100000 0x0 0x3ff00000>,
+			<0x42000000 0x0 0x40000000 0xe 0x40000000 0x0 0x40000000>;
+
+			apciec1_port: pci@0,0 {
+				device_type = "pci";
+				reg = <0x0 0x0 0x0 0x0 0x0>;
+				external-facing;
+
+				#address-cells = <3>;
+				#size-cells = <2>;
+				ranges;
+
+				interrupt-controller;
+				#interrupt-cells = <1>;
+				interrupt-map-mask = <0 0 0 7>;
+				interrupt-map = <0 0 0 1 &apciec1_port 0 0 0 0>,
+				<0 0 0 2 &apciec1_port 0 0 0 1>,
+				<0 0 0 3 &apciec1_port 0 0 0 2>,
+				<0 0 0 4 &apciec1_port 0 0 0 3>;
+			};
+		};
+	};
+};
+&atc1_phy {
+	apple,tunable-lane0-rx-top-cio = <0x35c 0xe00 0x0>;
+	apple,tunable-lane1-rx-top-cio = <0x35c 0xe00 0x0>;
+};
+&hpm1 {
+	connector {
+		ports {
+			port@3 {
+				reg = <3>;
+				hpm1_usb4: endpoint {
+					remote-endpoint = <&acio1_tbt>;
+				};
+			};
+		};
+	};
+};
+&acio1 {
+	apple,tunable-rc = <0x0 0xfff0 0x4020>,
+	<0x2c 0x4 0x0>,
+	<0x4004 0x1ff01ff 0x1000100>,
+	<0x4008 0x801f 0x4>,
+	<0x4010 0x7f 0x40>,
+	<0x4014 0x801f 0x4>,
+	<0x401c 0x7f 0x40>,
+	<0x4024 0x801f 0x4>,
+	<0x402c 0x7f 0x40>,
+	<0x4030 0x801f 0x4>,
+	<0x4038 0xffffffff 0x1010101>,
+	<0x403c 0xffff 0x101>,
+	<0x4040 0x1 0x1>,
+	<0x4044 0xffffffff 0x1010101>,
+	<0x4048 0x1 0x1>,
+	<0x404c 0x801f 0x4>,
+	<0x8004 0x70007 0x40004>,
+	<0x8008 0x801f 0x4>,
+	<0x8010 0x70007 0x40004>,
+	<0x8018 0x801f 0x4>,
+	<0x8020 0x70007 0x40004>,
+	<0x8028 0x801f 0x4>,
+	<0x8030 0x801f 0x4>,
+	<0x8038 0x801f 0x4>,
+	<0x8040 0x801f 0x4>,
+	<0x8048 0x801f 0x4>,
+	<0x8050 0x801f 0x4>,
+	<0x8058 0x801f 0x4>,
+	<0x8060 0x801f 0x4>;
+	apple,tunable-pcie-adapter = <0x1008 0x6 0x6>;
+	apple,tunable-router-ap-fw = <0x8 0xff2 0x482>;
+
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@1 {
+			reg = <1>;
+			acio1_tbt: endpoint {
+				remote-endpoint = <&hpm1_usb4>;
+			};
+		};
+	};
+};
+&acio1_dart {
+	apple,tunable = <0x20c 0x80000121 0x80000121>,
+	<0x220 0xf0f 0xf0f>,
+	<0x224 0xffff 0x909>,
+	<0x300 0x1f31 0x1>,
+	<0x308 0x3ffffffc 0x10000000>,
+	<0x310 0x3ffffffc 0x3ffffffc>,
+	<0x800 0xf003f 0x10000>,
+	<0x804 0xf003f 0x10002>,
+	<0x808 0xf003f 0x10004>,
+	<0x80c 0xf003f 0x20006>,
+	<0x810 0xf003f 0x2000a>,
+	<0x814 0xf003f 0x2000e>,
+	<0x818 0xf003f 0x20012>,
+	<0x81c 0xf003f 0x20016>,
+	<0x820 0xf003f 0x2001a>,
+	<0x824 0xf003f 0x2001e>,
+	<0x828 0xf003f 0x20022>,
+	<0x82c 0xf003f 0x20026>,
+	<0x830 0xf003f 0x2002a>,
+	<0x834 0xf003f 0x2002e>,
+	<0x838 0xf003f 0x20032>,
+	<0x83c 0xf003f 0x10036>;
+};
+&acio1_nhi {
+	apple,tunable-nhi = <0xf8004 0xff 0x80>,
+	<0xf8008 0x801f 0x4>,
+	<0xf8010 0x3f 0x20>,
+	<0xf8014 0x801f 0x4>,
+	<0xf801c 0x1f 0x10>,
+	<0xf8020 0x801f 0x4>,
+	<0xf8028 0xff 0x80>,
+	<0xf802c 0x801f 0x4>,
+	<0xf8034 0xff 0x80>,
+	<0xf8038 0x801f 0x4>,
+	<0xf8040 0x3f 0x20>,
+	<0xf8044 0x801f 0x4>,
+	<0xf804c 0x8007 0x1>,
+	<0xfc004 0x3 0x2>,
+	<0xfc008 0x801f 0x4>,
+	<0xfc010 0x7 0x4>,
+	<0xfc014 0x801f 0x4>,
+	<0xfc01c 0x7 0x4>,
+	<0xfc020 0x801f 0x4>,
+	<0xfc028 0x7 0x4>,
+	<0xfc02c 0x801f 0x4>,
+	<0xfc034 0x7 0x4>,
+	<0xfc038 0x801f 0x4>,
+	<0xfc040 0x3 0x2>,
+	<0xfc044 0x801f 0x4>,
+	<0xfc04c 0x8007 0x1>,
+	<0x4000 0x1000000f 0x10000002>,
+	<0x4004 0x1000000f 0x10000002>,
+	<0x4008 0x1000000f 0x10000002>,
+	<0x400c 0x1000000f 0x10000002>,
+	<0x4010 0x1000000f 0x10000002>,
+	<0x4014 0x1000000f 0x10000002>,
+	<0x4018 0x1000000f 0x10000002>,
+	<0x401c 0x1000000f 0x10000002>,
+	<0x4020 0x1000000f 0x10000002>,
+	<0x4024 0x1000000f 0x10000002>,
+	<0x4028 0x1000000f 0x10000002>,
+	<0x402c 0x1000000f 0x10000002>,
+	<0x4040 0x1000000f 0x10000002>,
+	<0x4044 0x1000000f 0x10000002>,
+	<0x4048 0x1000000f 0x10000002>,
+	<0x404c 0x1000000f 0x10000002>,
+	<0x4050 0x1000000f 0x10000002>,
+	<0x4054 0x1000000f 0x10000002>,
+	<0x4058 0x1000000f 0x10000002>,
+	<0x405c 0x1000000f 0x10000002>,
+	<0x4060 0x1000000f 0x10000002>,
+	<0x4064 0x1000000f 0x10000002>,
+	<0x4068 0x1000000f 0x10000002>,
+	<0x406c 0x1000000f 0x10000002>,
+	<0x4080 0x1000000f 0x10000002>,
+	<0x4084 0x1000000f 0x10000002>,
+	<0x4088 0x1000000f 0x10000002>,
+	<0x408c 0x1000000f 0x10000002>,
+	<0x4090 0x1000000f 0x10000002>,
+	<0x4094 0x1000000f 0x10000002>,
+	<0x4098 0x1000000f 0x10000002>,
+	<0x409c 0x1000000f 0x10000002>,
+	<0x40a0 0x1000000f 0x10000002>,
+	<0x40a4 0x1000000f 0x10000002>,
+	<0x40a8 0x1000000f 0x10000002>,
+	<0x40ac 0x1000000f 0x10000002>,
+	<0x40c0 0x1000000f 0x10000002>,
+	<0x40c4 0x1000000f 0x10000002>,
+	<0x40c8 0x1000000f 0x10000002>,
+	<0x40cc 0x1000000f 0x10000002>,
+	<0x40d0 0x1000000f 0x10000002>,
+	<0x40d4 0x1000000f 0x10000002>,
+	<0x40d8 0x1000000f 0x10000002>,
+	<0x40dc 0x1000000f 0x10000002>,
+	<0x40e0 0x1000000f 0x10000002>,
+	<0x40e4 0x1000000f 0x10000002>,
+	<0x40e8 0x1000000f 0x10000002>,
+	<0x40ec 0x1000000f 0x10000002>,
+	<0x4100 0x1000000f 0x10000002>,
+	<0x4104 0x1000000f 0x10000002>,
+	<0x4108 0x1000000f 0x10000002>,
+	<0x410c 0x1000000f 0x10000002>,
+	<0x4110 0x1000000f 0x10000002>,
+	<0x4114 0x1000000f 0x10000002>,
+	<0x4118 0x1000000f 0x10000002>,
+	<0x411c 0x1000000f 0x10000002>,
+	<0x4120 0x1000000f 0x10000002>,
+	<0x4124 0x1000000f 0x10000002>,
+	<0x4128 0x1000000f 0x10000002>,
+	<0x412c 0x1000000f 0x10000002>,
+	<0x4140 0x1000000f 0x10000002>,
+	<0x4144 0x1000000f 0x10000002>,
+	<0x4148 0x1000000f 0x10000002>,
+	<0x414c 0x1000000f 0x10000002>,
+	<0x4150 0x1000000f 0x10000002>,
+	<0x4154 0x1000000f 0x10000002>,
+	<0x4158 0x1000000f 0x10000002>,
+	<0x415c 0x1000000f 0x10000002>,
+	<0x4160 0x1000000f 0x10000002>,
+	<0x4164 0x1000000f 0x10000002>,
+	<0x4168 0x1000000f 0x10000002>,
+	<0x416c 0x1000000f 0x10000002>,
+	<0x43e4 0x7 0x7>;
+	apple,thunderbolt-drom = [ca 91 e6 6e ee 18 7c ac 05 e8 61 95 b3 00 5c 00
+	00 00 00 00 00 00 08 81 81 02 81 00 00 00 08 82
+	91 01 81 00 00 00 03 83 20 08 84 00 00 00 00 00
+	00 08 85 00 00 00 00 00 00 05 86 09 01 00 08 87
+	00 00 00 00 00 00 05 88 09 01 00 05 89 09 01 00
+	05 8a 09 01 00 0e 01 41 70 70 6c 65 2c 20 49 6e
+	63 2e 00 06 02 69 4f 53 00 00 00 00];
+};
+&apciec1_dart {
+	apple,tunable = <0x20c 0x80000121 0x80000121>,
+	<0x220 0xf0f 0xf0f>,
+	<0x224 0xffff 0x909>,
+	<0x300 0x1f31 0x1>,
+	<0x308 0x3ffffffc 0x10000000>,
+	<0x310 0x3ffffffc 0x3ffffffc>;
+};
+&apciec1 {
+	apple,tunable-debug = <0x1000 0x1 0x0>;
+	apple,tunable-rc = <0x78 0x7000 0x0>,
+	<0x718 0x7c000 0x0>,
+	<0x814 0xffffffff 0x2020f060>,
+	<0x8bc 0x1 0x0>;
+	apple,tunable-fabric = <0x4 0x3f003f 0x240024>,
+	<0x8 0x1 0x1>,
+	<0xc 0x1 0x1>,
+	<0x10 0x801f 0x4>,
+	<0x18 0x1ff 0x1e0>,
+	<0x1c 0x1 0x1>,
+	<0x20 0x801f 0x4>,
+	<0x28 0x1f 0x10>,
+	<0x2c 0x801f 0x4>,
+	<0x34 0x3f 0x20>,
+	<0x38 0x801f 0x4>,
+	<0x40 0x3f 0x20>,
+	<0x44 0x801f 0x4>,
+	<0x4c 0x10001 0x10001>,
+	<0x50 0x1 0x1>,
+	<0x54 0x1 0x1>,
+	<0x58 0x801f 0x4>,
+	<0x60 0x7f007f 0x450045>,
+	<0x64 0x801f 0x4>,
+	<0x6c 0x1f001f 0x100010>,
+	<0x70 0xf1 0x1>,
+	<0x74 0x801f 0x4>,
+	<0x7c 0x801f 0x4>,
+	<0x84 0x1 0x1>,
+	<0x88 0x1 0x1>,
+	<0x8c 0x801f 0x4>,
+	<0x94 0x1 0x1>,
+	<0x98 0x801f 0x4>,
+	<0xa0 0x1 0x1>,
+	<0xa4 0x801f 0x4>,
+	<0xac 0x1 0x1>,
+	<0xb0 0x1 0x1>,
+	<0xb4 0x801f 0x4>,
+	<0xbc 0x801f 0x4>,
+	<0xc4 0x801f 0x4>;
+};
+&apciec1_port {
+	apple,tunable = <0x140 0x1 0x1>,
+	<0x2a0 0x7e 0xa>;
+};
+
+/* DisplayPort alt mode and USB4 DP tunnels on the left ports. */
+&atc0_dpxbar {
+	compatible = "apple,t6050-display-crossbar", "apple,t8142-display-crossbar";
+	reg = <0x2 0xa324c000 0x0 0x4000>;
+	#mux-control-cells = <1>;
+	power-domains = <&ps_atc0_usb_aon>, <&ps_atc0_common>;
+	power-domain-names = "usb-aon", "common";
+	status = "okay";
+};
+&ps_atc0_common_dp_0 {
+	status = "okay";
+};
+
+&ps_atc0_common_dp_1 {
+	status = "okay";
+};
+
+&ps_atc0_common_dp_2 {
+	status = "okay";
+};
+
+&ps_atc0_common_dp_3 {
+	status = "okay";
+};
+&atc0_phy {
+	reg = <0x2 0xa3000000 0x0 0x2c000>,
+	<0x2 0xa2a90000 0x0 0x4000>,
+	<0x2 0xa2800000 0x0 0x4000>,
+	<0x2 0xa3200000 0x0 0x4000>,
+	<0x2 0xa3244000 0x0 0x4000>,
+	<0x2 0xa0000000 0x0 0x8000>,
+	<0x2 0xa0020000 0x0 0x4000>,
+	<0x2 0xa3250000 0x0 0x4000>,
+	<0x2 0xa3140000 0x0 0x4000>,
+	<0x2 0xa30c0000 0x0 0x10000>,
+	<0x2 0xa2a84000 0x0 0x4000>,
+	<0x2 0x80000048 0x0 0x10>;
+
+	reg-names = "core", "usb2phy", "usb2-digital", "reset", "fabric", "axi2af", "lioa",
+	"common-cfg", "usb-control", "firmware-data", "pipehandler",
+	"dp-clock-source";
+
+	power-domains = <&ps_atc0_usb_aon>, <&ps_atc0_common>, <&ps_atc0_phymxwrap>,
+	<&ps_atc0_usb>, <&ps_atc0_common_dp_0>, <&ps_atc0_common_dp_1>,
+	<&ps_atc0_common_dp_2>, <&ps_atc0_common_dp_3>;
+
+	power-domain-names = "usb-aon", "common", "wrapper", "usb", "dp0", "dp1", "dp2", "dp3";
+};
+&acio0 {
+	interrupts = <AIC_IRQ 0 1603 IRQ_TYPE_LEVEL_HIGH>, <AIC_IRQ 0 1604 IRQ_TYPE_LEVEL_HIGH>, <AIC_IRQ 0 1609 IRQ_TYPE_LEVEL_HIGH>, <AIC_IRQ 0 1610 IRQ_TYPE_LEVEL_HIGH>;
+	interrupt-names = "dpin0", "dpin1", "dpin2", "dpin3";
+};
+&hpm0 { connector { ports { port@2 {
+				reg = <2>;
+				#address-cells = <1>; #size-cells = <0>;
+				hpm0_dp0: endpoint@0 { reg = <0>; remote-endpoint = <&dcpext0_left0>; };
+				hpm0_dp1: endpoint@1 { reg = <1>; remote-endpoint = <&dcpext2_left0>; };
+			}; }; }; };
+&atc1_dpxbar {
+	compatible = "apple,t6050-display-crossbar", "apple,t8142-display-crossbar";
+	reg = <0x2 0xab24c000 0x0 0x4000>;
+	#mux-control-cells = <1>;
+	power-domains = <&ps_atc1_usb_aon>, <&ps_atc1_common>;
+	power-domain-names = "usb-aon", "common";
+	status = "okay";
+};
+&ps_atc1_common_dp_0 {
+	status = "okay";
+};
+
+&ps_atc1_common_dp_1 {
+	status = "okay";
+};
+
+&ps_atc1_common_dp_2 {
+	status = "okay";
+};
+
+&ps_atc1_common_dp_3 {
+	status = "okay";
+};
+&atc1_phy {
+	reg = <0x2 0xab000000 0x0 0x2c000>,
+	<0x2 0xaaa90000 0x0 0x4000>,
+	<0x2 0xaa800000 0x0 0x4000>,
+	<0x2 0xab200000 0x0 0x4000>,
+	<0x2 0xab244000 0x0 0x4000>,
+	<0x2 0xa8000000 0x0 0x8000>,
+	<0x2 0xa8020000 0x0 0x4000>,
+	<0x2 0xab250000 0x0 0x4000>,
+	<0x2 0xab140000 0x0 0x4000>,
+	<0x2 0xab0c0000 0x0 0x10000>,
+	<0x2 0xaaa84000 0x0 0x4000>,
+	<0x2 0x80000058 0x0 0x10>;
+
+	reg-names = "core", "usb2phy", "usb2-digital", "reset", "fabric", "axi2af", "lioa",
+	"common-cfg", "usb-control", "firmware-data", "pipehandler",
+	"dp-clock-source";
+
+	power-domains = <&ps_atc1_usb_aon>, <&ps_atc1_common>, <&ps_atc1_phymxwrap>,
+	<&ps_atc1_usb>, <&ps_atc1_common_dp_0>, <&ps_atc1_common_dp_1>,
+	<&ps_atc1_common_dp_2>, <&ps_atc1_common_dp_3>;
+
+	power-domain-names = "usb-aon", "common", "wrapper", "usb", "dp0", "dp1", "dp2", "dp3";
+};
+&acio1 {
+	interrupts = <AIC_IRQ 0 1635 IRQ_TYPE_LEVEL_HIGH>, <AIC_IRQ 0 1636 IRQ_TYPE_LEVEL_HIGH>, <AIC_IRQ 0 1641 IRQ_TYPE_LEVEL_HIGH>, <AIC_IRQ 0 1642 IRQ_TYPE_LEVEL_HIGH>;
+	interrupt-names = "dpin0", "dpin1", "dpin2", "dpin3";
+};
+&hpm1 { connector { ports { port@2 {
+				reg = <2>;
+				#address-cells = <1>; #size-cells = <0>;
+				hpm1_dp0: endpoint@0 { reg = <0>; remote-endpoint = <&dcpext0_left1>; };
+				hpm1_dp1: endpoint@1 { reg = <1>; remote-endpoint = <&dcpext2_left1>; };
+			}; }; }; };
+&dcpext0 {
+	apple,typec-dptx-phys = <2 0 1>;
+	apple,typec-mux-indices = <0 0 0>;
+	phys = <&atc2_phy 6>, <&atc0_phy 6>, <&atc1_phy 6>;
+	phy-names = "typec0", "typec1", "typec2";
+	mux-controls = <&atc2_xbar 0>, <&atc2_xbar 1>, <&atc2_xbar 2>, <&atc2_xbar 3>, <&atc2_xbar 4>, <&atc0_dpxbar 0>, <&atc0_dpxbar 1>, <&atc0_dpxbar 2>, <&atc0_dpxbar 3>, <&atc0_dpxbar 4>, <&atc1_dpxbar 0>, <&atc1_dpxbar 1>, <&atc1_dpxbar 2>, <&atc1_dpxbar 3>, <&atc1_dpxbar 4>;
+	mux-control-names = "typec0", "typec0-dpin0", "typec0-dpin1", "typec0-dpin2", "typec0-dpin3", "typec1", "typec1-dpin0", "typec1-dpin1", "typec1-dpin2", "typec1-dpin3", "typec2", "typec2-dpin0", "typec2-dpin1", "typec2-dpin2", "typec2-dpin3";
+	typec-routes {
+		route@1 { reg = <1>; mode-switch;
+			port { dcpext0_left0: endpoint { remote-endpoint = <&hpm0_dp0>; }; };
+		};
+		route@2 { reg = <2>; mode-switch;
+			port { dcpext0_left1: endpoint { remote-endpoint = <&hpm1_dp0>; }; };
+		};
+	};
+};
+&dcpext2 {
+	apple,typec-dptx-phys = <2 0 1>;
+	apple,typec-mux-indices = <4 4 4>;
+	phys = <&atc2_phy 6>, <&atc0_phy 6>, <&atc1_phy 6>;
+	phy-names = "typec0", "typec1", "typec2";
+	mux-controls = <&atc2_xbar 0>, <&atc2_xbar 1>, <&atc2_xbar 2>, <&atc2_xbar 3>, <&atc2_xbar 4>, <&atc0_dpxbar 0>, <&atc0_dpxbar 1>, <&atc0_dpxbar 2>, <&atc0_dpxbar 3>, <&atc0_dpxbar 4>, <&atc1_dpxbar 0>, <&atc1_dpxbar 1>, <&atc1_dpxbar 2>, <&atc1_dpxbar 3>, <&atc1_dpxbar 4>;
+	mux-control-names = "typec0", "typec0-dpin0", "typec0-dpin1", "typec0-dpin2", "typec0-dpin3", "typec1", "typec1-dpin0", "typec1-dpin1", "typec1-dpin2", "typec1-dpin3", "typec2", "typec2-dpin0", "typec2-dpin1", "typec2-dpin2", "typec2-dpin3";
+	typec-routes {
+		route@1 { reg = <1>; mode-switch;
+			port { dcpext2_left0: endpoint { remote-endpoint = <&hpm0_dp1>; }; };
+		};
+		route@2 { reg = <2>; mode-switch;
+			port { dcpext2_left1: endpoint { remote-endpoint = <&hpm1_dp1>; }; };
+		};
+	};
+};
+
+&usb_drd0 {
+	status = "okay";
+	compatible = "apple,t6050-dwc3", "apple,t8103-dwc3";
+	reg = <0x2 0xa2280000 0x0 0xcd00>,
+	<0x2 0xa228cd00 0x0 0x4b00>,
+	<0x2 0xa2200000 0x0 0x4000>;
+	reg-names = "dwc3-core", "dwc3-apple", "drd-cfg";
+	interrupts = <AIC_IRQ 0 1419 IRQ_TYPE_LEVEL_HIGH>;
+	dr_mode = "otg";
+	usb-role-switch;
+	role-switch-default-mode = "host";
+	iommus = <&usb_drd0_dart_0 0>, <&usb_drd0_dart_1 1>;
+	power-domains = <&ps_atc0_usb>;
+	resets = <&atc0_phy 0>;
+	phys = <&atc0_phy PHY_TYPE_USB2>, <&atc0_phy PHY_TYPE_USB3>;
+	phy-names = "usb2-phy", "usb3-phy";
+	apple,tunable-gbl-default = <0x64 0x2 0x0>, <0x10 0xfff80000 0x00680000>;
+	apple,tunable-gbl-host = <0x4 0x0001ef00 0x00002f00>, <0x1c 0x00000100 0x0>,
+	<0x2c 0x000a07ff 0x000800c8>, <0x100 0x02000100 0x02000100>,
+	<0x504 0x00001000 0x0>, <0x528 0xff0000ff 0x06000006>,
+	<0x52c 0xff0000ff 0x08000008>, <0x580 0xffffffff 0x6f000006>,
+	<0x584 0xffffffff 0x00060000>;
+	apple,tunable-dbg = <0x0 0x8 0x8>;
+	apple,tunable-cfg-host = <0x20 0xff 0x1b>;
+	apple,tunable-link = <0x10 0xff000000 0xff000000>, <0x20 0x7ff00000 0x4e900000>,
+	<0x24 0x001f8000 0x000b8000>, <0x60 0x0003ffff 0x00000600>;
+	apple,tunable-cio = <0x20 0x00ff0000 0x001e0000>;
+
+	port {
+		usb_drd0_hs: endpoint {
+			remote-endpoint = <&hpm0_hs>;
+		};
+	};
+};
+
+&usb_drd1 {
+	port {
+		usb_drd1_hs: endpoint {
+			remote-endpoint = <&hpm1_hs>;
+		};
+	};
+};
+
+&atc1_phy {
+	port {
+		atc1_phy_ep: endpoint {
+			remote-endpoint = <&hpm1_ss>;
+		};
+	};
+};
+
+/* Supply domains and IOMMUs shared with the disabled SoC inventory. */
+&ps_fab0_piogw { status = "okay"; };
+&ps_fab3_soc { status = "okay"; };
+&usb_drd0_dart_0 { status = "okay"; };
+&usb_drd0_dart_1 { status = "okay"; };
diff --git a/arch/arm64/boot/dts/apple/t6050-j716c.dts b/arch/arm64/boot/dts/apple/t6050-j716c.dts
index b7a92d4ad6c7a..48a53d4a62e7a 100644
--- a/arch/arm64/boot/dts/apple/t6050-j716c.dts
+++ b/arch/arm64/boot/dts/apple/t6050-j716c.dts
@@ -234,3 +234,6 @@
 #include "t6050-peripherals.dtsi"
 
 #include "t6050-j716c-gpu-panel.dtsi"
+
+#include "t6050-j716c-display.dtsi"
+#include "t6050-j716c-left-usb4.dtsi"
diff --git a/arch/arm64/boot/dts/apple/t6050-peripherals.dtsi b/arch/arm64/boot/dts/apple/t6050-peripherals.dtsi
index 2d2ede30d0ead..6434bc7f789a4 100644
--- a/arch/arm64/boot/dts/apple/t6050-peripherals.dtsi
+++ b/arch/arm64/boot/dts/apple/t6050-peripherals.dtsi
@@ -1448,6 +1448,7 @@
 
 
 
+#ifndef T6050_J716C
 	apciec0_dart: iommu@2a4000000 {
 		compatible = "apple,t6050-dart", "apple,t8110-dart";
 		reg = <0x2 0xa4000000 0x0 0x20000>;
@@ -1455,6 +1456,7 @@
 		#iommu-cells = <1>;
 		status = "disabled";
 	};
+#endif
 
 	apciec0_piodma: dma-controller@2a4068000 {
 		compatible = "apple,t6050-pciec-piodma", "apple,pciec-piodma";
@@ -1467,6 +1469,7 @@
 		status = "disabled";
 	};
 
+#ifndef T6050_J716C
 	apciec1_dart: iommu@2ac000000 {
 		compatible = "apple,t6050-dart", "apple,t8110-dart";
 		reg = <0x2 0xac000000 0x0 0x20000>;
@@ -1474,6 +1477,7 @@
 		#iommu-cells = <1>;
 		status = "disabled";
 	};
+#endif
 
 	apciec1_piodma: dma-controller@2ac068000 {
 		compatible = "apple,t6050-pciec-piodma", "apple,pciec-piodma";