From cd36c9a92490627e57d886ba0b29d7ebb1f6b97f Mon Sep 17 00:00:00 2001 From: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Date: Sat, 7 Nov 2026 00:13:53 +1100 Subject: [PATCH 1/5] PCI: apple: draft T6040 USB4 tunnel resources Describe the disabled T6040 ACIO v2, Type 7 NHI and PCIe-C topology, and add the verified register and shared-MSI generation data. Assisted-by: LLM Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> --- .../devicetree/bindings/pci/apple,pcie.yaml | 52 +- .../thunderbolt/apple,t8103-usb4-acio.yaml | 37 +- .../thunderbolt/apple,t8103-usb4-nhi.yaml | 6 +- arch/arm64/boot/dts/apple/t6040-usb4.dtsi | 513 ++++++++++++++++++ arch/arm64/boot/dts/apple/t6040.dtsi | 9 + drivers/pci/controller/pcie-apple.c | 37 +- drivers/thunderbolt/apple.c | 42 +- 7 files changed, 673 insertions(+), 23 deletions(-) create mode 100644 arch/arm64/boot/dts/apple/t6040-usb4.dtsi diff --git a/Documentation/devicetree/bindings/pci/apple,pcie.yaml b/Documentation/devicetree/bindings/pci/apple,pcie.yaml index fcd5d9f7d08ae..6a1f35b618a57 100644 --- a/Documentation/devicetree/bindings/pci/apple,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/apple,pcie.yaml @@ -78,6 +78,7 @@ properties: - const: apple,t8132-pciec - const: apple,t8122-pciec - const: apple,t8103-pciec + - const: apple,t6040-pciec apple,managed-sids: $ref: /schemas/types.yaml#/definitions/uint32-array @@ -110,7 +111,11 @@ properties: description: Interrupt specifiers, one for each root port. minItems: 1 - maxItems: 4 + maxItems: 6 + + interrupt-names: + minItems: 1 + maxItems: 6 msi-parent: true @@ -211,7 +216,9 @@ allOf: properties: compatible: contains: - const: apple,t8132-pciec + enum: + - apple,t8132-pciec + - apple,t6040-pciec then: required: - apple,msi-vector-base @@ -255,6 +262,7 @@ allOf: enum: - apple,t8103-pciec - apple,t6000-pciec + - apple,t6040-pciec then: properties: reg: @@ -286,11 +294,49 @@ allOf: - const: ltssm - const: intr2axi - const: oe-fabric + - items: + - const: config + - const: rc + - const: port0 + - const: fabric + - const: debug + - const: ioa + - const: ltssm + - const: intr2axi interrupts: - maxItems: 1 + maxItems: 6 ranges: minItems: 3 maxItems: 3 + allOf: + - if: + properties: + compatible: + contains: + const: apple,t6040-pciec + then: + properties: + reg: + minItems: 8 + maxItems: 8 + interrupts: + minItems: 6 + maxItems: 6 + interrupt-names: + items: + - const: port + - const: intx-a + - const: intx-b + - const: intx-c + - const: intx-d + - const: parity + required: + - interrupt-names + else: + properties: + interrupts: + maxItems: 1 + interrupt-names: false else: properties: resets: false diff --git a/Documentation/devicetree/bindings/thunderbolt/apple,t8103-usb4-acio.yaml b/Documentation/devicetree/bindings/thunderbolt/apple,t8103-usb4-acio.yaml index 434a833cd31a2..b201200223bdb 100644 --- a/Documentation/devicetree/bindings/thunderbolt/apple,t8103-usb4-acio.yaml +++ b/Documentation/devicetree/bindings/thunderbolt/apple,t8103-usb4-acio.yaml @@ -17,8 +17,8 @@ description: | The co-processor exposes the Native Host Interface (NHI) and its DART IOMMU to the main SoC bus once it is running. They are therefore represented as - child nodes. All child registers are located in a single 16 MiB MMIO window - and use addresses relative to this window. + child nodes. All child registers use addresses relative to the router's MMIO + window. Type 7 expands that window and shifts its child offsets by 16 MiB. ACIO can only be powered on after the Type-C PHY has been switched to USB4/Thunderbolt mode. Before the connection to the remote device can be @@ -30,6 +30,7 @@ properties: oneOf: - const: apple,t8103-usb4-acio - const: apple,t8142-usb4-acio + - const: apple,t6040-usb4-acio - items: - enum: - apple,t6000-usb4-acio @@ -50,7 +51,7 @@ properties: PCIe adapter configuration space of the USB4 router. Present where the root complex exposes the adapter separately, so that the tunnel can be configured before a PCIe-C link is brought up. - - description: MxWrap co-processor control registers, on T8132 + - description: MxWrap co-processor control registers reg-names: minItems: 2 @@ -60,6 +61,14 @@ properties: - const: pcie-adapter - const: cpu + interrupts: + maxItems: 1 + description: Type 7 SRAM parity interrupt + + interrupt-names: + items: + - const: sram-parity + mboxes: maxItems: 1 description: Mailbox used for RTKit communication with the co-processor @@ -161,11 +170,12 @@ properties: required: - port@1 - iommu@a80000: +patternProperties: + "^iommu@(a80000|1a80000)$": $ref: /schemas/iommu/apple,dart.yaml# description: DART IOMMU exposed by ACIO and used for DMA from the NHI - nhi@f00000: + "^nhi@(f00000|1f00000)$": $ref: /schemas/thunderbolt/apple,t8103-usb4-nhi.yaml# description: Native Host Interface exposed by ACIO @@ -182,8 +192,6 @@ required: - ranges - nonposted-mmio - ports - - iommu@a80000 - - nhi@f00000 allOf: - $ref: /schemas/usb/usb-switch.yaml# @@ -204,6 +212,21 @@ allOf: else: properties: lstx-gpios: false + - if: + properties: + compatible: + contains: + const: apple,t6040-usb4-acio + then: + required: + - iommu@1a80000 + - nhi@1f00000 + - interrupts + - interrupt-names + else: + required: + - iommu@a80000 + - nhi@f00000 additionalProperties: false diff --git a/Documentation/devicetree/bindings/thunderbolt/apple,t8103-usb4-nhi.yaml b/Documentation/devicetree/bindings/thunderbolt/apple,t8103-usb4-nhi.yaml index d6dffe3ec8caf..ef291724b5a67 100644 --- a/Documentation/devicetree/bindings/thunderbolt/apple,t8103-usb4-nhi.yaml +++ b/Documentation/devicetree/bindings/thunderbolt/apple,t8103-usb4-nhi.yaml @@ -22,6 +22,7 @@ properties: oneOf: - const: apple,t8103-usb4-nhi - const: apple,t8142-usb4-nhi + - const: apple,t6040-usb4-nhi - items: - enum: - apple,t6000-usb4-nhi @@ -124,7 +125,9 @@ allOf: properties: compatible: contains: - const: apple,t8142-usb4-nhi + enum: + - apple,t8142-usb4-nhi + - apple,t6040-usb4-nhi then: properties: reg: @@ -147,6 +150,7 @@ allOf: - apple,t8122-usb4-nhi - apple,t8132-usb4-nhi - apple,t8142-usb4-nhi + - apple,t6040-usb4-nhi then: properties: iommus: diff --git a/arch/arm64/boot/dts/apple/t6040-usb4.dtsi b/arch/arm64/boot/dts/apple/t6040-usb4.dtsi new file mode 100644 index 0000000000000..ea3db2a3a0e3d --- /dev/null +++ b/arch/arm64/boot/dts/apple/t6040-usb4.dtsi @@ -0,0 +1,513 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * T6040 USB4/PCIe-C resource description. + * + * Every node remains disabled until the Type-C PHY transition, bootloader + * tuning handoff, and dynamic PCIe RID-to-SID policy are qualified. + */ + +/ { + aliases { + usb4_0_rc = &usb4_0_acio; + usb4_0_nhi = &usb4_0_nhi; + usb4_0_pcie = &usb4_0_pcie; + usb4_1_rc = &usb4_1_acio; + usb4_1_nhi = &usb4_1_nhi; + usb4_1_pcie = &usb4_1_pcie; + usb4_2_rc = &usb4_2_acio; + usb4_2_nhi = &usb4_2_nhi; + usb4_2_pcie = &usb4_2_pcie; + }; + + usb4_0_acio: cio@381ac0000 { + compatible = "apple,t6040-usb4-acio"; + reg = <0x3 0x81ac0000 0x0 0xc000>, + <0x3 0x81108000 0x0 0x20000>, + <0x3 0x81e44000 0x0 0x4000>, + <0x3 0x81100000 0x0 0x4000>; + reg-names = "rc", "sram", "pcie-adapter", "cpu"; + interrupt-parent = <&aic>; + interrupts = ; + interrupt-names = "sram-parity"; + mboxes = <&usb4_0_mbox>; + resets = <&ps_atc0_cio>; + power-domains = <&ps_atc0_cio>, <&ps_atc0_cio_pcie>, + <&ps_atc0_cio_usb>, <&ps_atc0_pcie>; + thunderbolt-switch; + apple,pcie-tunnel = <&usb4_0_pcie_tunnel>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x3 0x80000000 0x2000000>; + nonposted-mmio; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + endpoint { }; + }; + }; + + usb4_0_dart: iommu@1a80000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x1a80000 0xc000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + status = "disabled"; + }; + + usb4_0_nhi: nhi@1f00000 { + compatible = "apple,t6040-usb4-nhi"; + reg = <0x1f00000 0x100000>; + reg-names = "nhi"; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "txring0", "txring1", "txring2", "txring3", + "txring4", "txring5", "txring6", "txring7", + "txring8", "txring9", "txring10", "txring11", + "rxring0", "rxring1", "rxring2", "rxring3", + "rxring4", "rxring5", "rxring6", "rxring7", + "rxring8", "rxring9", "rxring10", "rxring11"; + iommus = <&usb4_0_dart 0>, <&usb4_0_dart 1>, + <&usb4_0_dart 2>, <&usb4_0_dart 3>, + <&usb4_0_dart 4>, <&usb4_0_dart 5>, + <&usb4_0_dart 6>, <&usb4_0_dart 7>, + <&usb4_0_dart 8>, <&usb4_0_dart 9>, + <&usb4_0_dart 10>, <&usb4_0_dart 11>, + <&usb4_0_dart 16>, <&usb4_0_dart 17>, + <&usb4_0_dart 18>, <&usb4_0_dart 19>, + <&usb4_0_dart 20>, <&usb4_0_dart 21>, + <&usb4_0_dart 22>, <&usb4_0_dart 23>, + <&usb4_0_dart 24>, <&usb4_0_dart 25>, + <&usb4_0_dart 26>, <&usb4_0_dart 27>; + /* To be filled by the loader. */ + apple,thunderbolt-drom = [00]; + status = "disabled"; + }; + }; + + usb4_1_acio: cio@389ac0000 { + compatible = "apple,t6040-usb4-acio"; + reg = <0x3 0x89ac0000 0x0 0xc000>, + <0x3 0x89108000 0x0 0x20000>, + <0x3 0x89e44000 0x0 0x4000>, + <0x3 0x89100000 0x0 0x4000>; + reg-names = "rc", "sram", "pcie-adapter", "cpu"; + interrupt-parent = <&aic>; + interrupts = ; + interrupt-names = "sram-parity"; + mboxes = <&usb4_1_mbox>; + resets = <&ps_atc1_cio>; + power-domains = <&ps_atc1_cio>, <&ps_atc1_cio_pcie>, + <&ps_atc1_cio_usb>, <&ps_atc1_pcie>; + thunderbolt-switch; + apple,pcie-tunnel = <&usb4_1_pcie_tunnel>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x3 0x88000000 0x2000000>; + nonposted-mmio; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + endpoint { }; + }; + }; + + usb4_1_dart: iommu@1a80000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x1a80000 0xc000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + status = "disabled"; + }; + + usb4_1_nhi: nhi@1f00000 { + compatible = "apple,t6040-usb4-nhi"; + reg = <0x1f00000 0x100000>; + reg-names = "nhi"; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "txring0", "txring1", "txring2", "txring3", + "txring4", "txring5", "txring6", "txring7", + "txring8", "txring9", "txring10", "txring11", + "rxring0", "rxring1", "rxring2", "rxring3", + "rxring4", "rxring5", "rxring6", "rxring7", + "rxring8", "rxring9", "rxring10", "rxring11"; + iommus = <&usb4_1_dart 0>, <&usb4_1_dart 1>, + <&usb4_1_dart 2>, <&usb4_1_dart 3>, + <&usb4_1_dart 4>, <&usb4_1_dart 5>, + <&usb4_1_dart 6>, <&usb4_1_dart 7>, + <&usb4_1_dart 8>, <&usb4_1_dart 9>, + <&usb4_1_dart 10>, <&usb4_1_dart 11>, + <&usb4_1_dart 16>, <&usb4_1_dart 17>, + <&usb4_1_dart 18>, <&usb4_1_dart 19>, + <&usb4_1_dart 20>, <&usb4_1_dart 21>, + <&usb4_1_dart 22>, <&usb4_1_dart 23>, + <&usb4_1_dart 24>, <&usb4_1_dart 25>, + <&usb4_1_dart 26>, <&usb4_1_dart 27>; + /* To be filled by the loader. */ + apple,thunderbolt-drom = [00]; + status = "disabled"; + }; + }; + + usb4_2_acio: cio@391ac0000 { + compatible = "apple,t6040-usb4-acio"; + reg = <0x3 0x91ac0000 0x0 0xc000>, + <0x3 0x91108000 0x0 0x20000>, + <0x3 0x91e44000 0x0 0x4000>, + <0x3 0x91100000 0x0 0x4000>; + reg-names = "rc", "sram", "pcie-adapter", "cpu"; + interrupt-parent = <&aic>; + interrupts = ; + interrupt-names = "sram-parity"; + mboxes = <&usb4_2_mbox>; + resets = <&ps_atc2_cio>; + power-domains = <&ps_atc2_cio>, <&ps_atc2_cio_pcie>, + <&ps_atc2_cio_usb>, <&ps_atc2_pcie>; + thunderbolt-switch; + apple,pcie-tunnel = <&usb4_2_pcie_tunnel>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x3 0x90000000 0x2000000>; + nonposted-mmio; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + endpoint { }; + }; + }; + + usb4_2_dart: iommu@1a80000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x1a80000 0xc000>; + #iommu-cells = <1>; + interrupt-parent = <&aic>; + interrupts = ; + status = "disabled"; + }; + + usb4_2_nhi: nhi@1f00000 { + compatible = "apple,t6040-usb4-nhi"; + reg = <0x1f00000 0x100000>; + reg-names = "nhi"; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "txring0", "txring1", "txring2", "txring3", + "txring4", "txring5", "txring6", "txring7", + "txring8", "txring9", "txring10", "txring11", + "rxring0", "rxring1", "rxring2", "rxring3", + "rxring4", "rxring5", "rxring6", "rxring7", + "rxring8", "rxring9", "rxring10", "rxring11"; + iommus = <&usb4_2_dart 0>, <&usb4_2_dart 1>, + <&usb4_2_dart 2>, <&usb4_2_dart 3>, + <&usb4_2_dart 4>, <&usb4_2_dart 5>, + <&usb4_2_dart 6>, <&usb4_2_dart 7>, + <&usb4_2_dart 8>, <&usb4_2_dart 9>, + <&usb4_2_dart 10>, <&usb4_2_dart 11>, + <&usb4_2_dart 16>, <&usb4_2_dart 17>, + <&usb4_2_dart 18>, <&usb4_2_dart 19>, + <&usb4_2_dart 20>, <&usb4_2_dart 21>, + <&usb4_2_dart 22>, <&usb4_2_dart 23>, + <&usb4_2_dart 24>, <&usb4_2_dart 25>, + <&usb4_2_dart 26>, <&usb4_2_dart 27>; + /* To be filled by the loader. */ + apple,thunderbolt-drom = [00]; + status = "disabled"; + }; + }; + + usb4_0_pcie_tunnel: usb4-pcie-tunnel-0 { + #address-cells = <2>; + #size-cells = <2>; + ranges; + nonposted-mmio; + + apciec0_dart: iommu@384000000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x3 0x84000000 0x0 0x20000>; + interrupt-parent = <&aic>; + interrupts = ; + #iommu-cells = <1>; + status = "disabled"; + }; + + usb4_0_pcie: pcie@1c50000000 { + compatible = "apple,t6040-pciec"; + device_type = "pci"; + reg = <0x1c 0x50000000 0x0 0x10000000>, + <0x3 0x84034000 0x0 0x4000>, + <0x3 0x84020000 0x0 0x8000>, + <0x3 0x84038000 0x0 0x4000>, + <0x3 0x84060000 0x0 0x4000>, + <0x3 0x80020000 0x0 0x4000>, + <0x3 0x8402c000 0x0 0x4000>, + <0x3 0x84028000 0x0 0x4000>; + reg-names = "config", "rc", "port0", "fabric", "debug", + "ioa", "ltssm", "intr2axi"; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + ; + interrupt-names = "port", "intx-a", "intx-b", "intx-c", + "intx-d", "parity"; + power-domains = <&ps_atc0_pcie>; + msi-controller; + msi-parent = <&usb4_0_pcie>; + msi-ranges = <&aic AIC_IRQ 2103 IRQ_TYPE_EDGE_RISING 32>; + apple,msi-vector-base = <0x20>; + iommu-map = <0x0 &apciec0_dart 0x0 0x100>; + iommu-map-mask = <0xff>; + bus-range = <0x0 0x80>; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x43000000 0x8 0x0 0x8 0x0 0x2 0x0>, + <0x02000000 0x0 0x100000 0xa 0x100000 0x0 0x3ff00000>, + <0x42000000 0x0 0x40000000 0xa 0x40000000 0x0 0x40000000>; + status = "disabled"; + + usb4_0_pcie_port: pci@0,0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + external-facing; + #address-cells = <3>; + #size-cells = <2>; + ranges; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &usb4_0_pcie_port 0 0 0 0>, + <0 0 0 2 &usb4_0_pcie_port 0 0 0 1>, + <0 0 0 3 &usb4_0_pcie_port 0 0 0 2>, + <0 0 0 4 &usb4_0_pcie_port 0 0 0 3>; + }; + }; + }; + + usb4_1_pcie_tunnel: usb4-pcie-tunnel-1 { + #address-cells = <2>; + #size-cells = <2>; + ranges; + nonposted-mmio; + + apciec1_dart: iommu@38c000000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x3 0x8c000000 0x0 0x20000>; + interrupt-parent = <&aic>; + interrupts = ; + #iommu-cells = <1>; + status = "disabled"; + }; + + usb4_1_pcie: pcie@1c60000000 { + compatible = "apple,t6040-pciec"; + device_type = "pci"; + reg = <0x1c 0x60000000 0x0 0x10000000>, + <0x3 0x8c034000 0x0 0x4000>, + <0x3 0x8c020000 0x0 0x8000>, + <0x3 0x8c038000 0x0 0x4000>, + <0x3 0x8c060000 0x0 0x4000>, + <0x3 0x88020000 0x0 0x4000>, + <0x3 0x8c02c000 0x0 0x4000>, + <0x3 0x8c028000 0x0 0x4000>; + reg-names = "config", "rc", "port0", "fabric", "debug", + "ioa", "ltssm", "intr2axi"; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + ; + interrupt-names = "port", "intx-a", "intx-b", "intx-c", + "intx-d", "parity"; + power-domains = <&ps_atc1_pcie>; + msi-controller; + msi-parent = <&usb4_1_pcie>; + msi-ranges = <&aic AIC_IRQ 2135 IRQ_TYPE_EDGE_RISING 32>; + apple,msi-vector-base = <0x40>; + iommu-map = <0x0 &apciec1_dart 0x0 0x100>; + iommu-map-mask = <0xff>; + bus-range = <0x0 0x80>; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x43000000 0xc 0x0 0xc 0x0 0x2 0x0>, + <0x02000000 0x0 0x100000 0xe 0x100000 0x0 0x3ff00000>, + <0x42000000 0x0 0x40000000 0xe 0x40000000 0x0 0x40000000>; + status = "disabled"; + + usb4_1_pcie_port: pci@0,0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + external-facing; + #address-cells = <3>; + #size-cells = <2>; + ranges; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &usb4_1_pcie_port 0 0 0 0>, + <0 0 0 2 &usb4_1_pcie_port 0 0 0 1>, + <0 0 0 3 &usb4_1_pcie_port 0 0 0 2>, + <0 0 0 4 &usb4_1_pcie_port 0 0 0 3>; + }; + }; + }; + + usb4_2_pcie_tunnel: usb4-pcie-tunnel-2 { + #address-cells = <2>; + #size-cells = <2>; + ranges; + nonposted-mmio; + + apciec2_dart: iommu@394000000 { + compatible = "apple,t6041-dart", "apple,t8110-dart"; + reg = <0x3 0x94000000 0x0 0x20000>; + interrupt-parent = <&aic>; + interrupts = ; + #iommu-cells = <1>; + status = "disabled"; + }; + + usb4_2_pcie: pcie@1c70000000 { + compatible = "apple,t6040-pciec"; + device_type = "pci"; + reg = <0x1c 0x70000000 0x0 0x10000000>, + <0x3 0x94034000 0x0 0x4000>, + <0x3 0x94020000 0x0 0x8000>, + <0x3 0x94038000 0x0 0x4000>, + <0x3 0x94060000 0x0 0x4000>, + <0x3 0x90020000 0x0 0x4000>, + <0x3 0x9402c000 0x0 0x4000>, + <0x3 0x94028000 0x0 0x4000>; + reg-names = "config", "rc", "port0", "fabric", "debug", + "ioa", "ltssm", "intr2axi"; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + ; + interrupt-names = "port", "intx-a", "intx-b", "intx-c", + "intx-d", "parity"; + power-domains = <&ps_atc2_pcie>; + msi-controller; + msi-parent = <&usb4_2_pcie>; + msi-ranges = <&aic AIC_IRQ 2167 IRQ_TYPE_EDGE_RISING 32>; + apple,msi-vector-base = <0x60>; + iommu-map = <0x0 &apciec2_dart 0x0 0x100>; + iommu-map-mask = <0xff>; + bus-range = <0x0 0x80>; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x43000000 0x10 0x0 0x10 0x0 0x2 0x0>, + <0x02000000 0x0 0x100000 0x12 0x100000 0x0 0x3ff00000>, + <0x42000000 0x0 0x40000000 0x12 0x40000000 0x0 0x40000000>; + status = "disabled"; + + usb4_2_pcie_port: pci@0,0 { + device_type = "pci"; + reg = <0x0 0x0 0x0 0x0 0x0>; + external-facing; + #address-cells = <3>; + #size-cells = <2>; + ranges; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &usb4_2_pcie_port 0 0 0 0>, + <0 0 0 2 &usb4_2_pcie_port 0 0 0 1>, + <0 0 0 3 &usb4_2_pcie_port 0 0 0 2>, + <0 0 0 4 &usb4_2_pcie_port 0 0 0 3>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t6040.dtsi b/arch/arm64/boot/dts/apple/t6040.dtsi index 38dc7888509fd..a7e0022886d6e 100644 --- a/arch/arm64/boot/dts/apple/t6040.dtsi +++ b/arch/arm64/boot/dts/apple/t6040.dtsi @@ -7,6 +7,13 @@ #include "t604x.dtsi" +/delete-node/ &usb4_0_dart; +/delete-node/ &apciec0_dart; +/delete-node/ &usb4_1_dart; +/delete-node/ &apciec1_dart; +/delete-node/ &usb4_2_dart; +/delete-node/ &apciec2_dart; + /* The M4 Pro has five cores in each P cluster. */ /delete-node/ &cpu_p05; /delete-node/ &cpu_p15; @@ -65,3 +72,5 @@ apple,peak-bandwidth-bytes-per-second = /bits/ 64 <273066666656>; apple,bandwidth-class-bytes-per-second = /bits/ 64 <273000000000>; }; + +#include "t6040-usb4.dtsi" diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/pcie-apple.c index 48453fd72e46b..49929f0e1d3cd 100644 --- a/drivers/pci/controller/pcie-apple.c +++ b/drivers/pci/controller/pcie-apple.c @@ -333,6 +333,21 @@ static const struct hw_info t8132_pciec_hw = { .s2idle_hold_domain = true, }; +static const struct hw_info t6040_pciec_hw = { + .port_msiaddr = PORT_MSIADDR, + .port_msiaddr_hi = PORT_MSIADDR + 4, + .port_perst = PORT_PERST, + .port_rid2sid = PORT_RID2SID, + .port_msimap = PORT_T602X_MSIMAP, + .port_tunctrl = 0x1088, + .max_rid2sid = 256, + .sid_indexed_rid2sid = true, + .tunneled = true, + .t8132_reset = true, + .msimap_by_vector = true, + .s2idle_hold_domain = true, +}; + static const struct of_device_id apple_pcie_of_match[]; /** @@ -2010,7 +2025,8 @@ static int apple_msi_init(struct apple_pcie *pcie) * 32-vector slice. Keep endpoint MSI data local, and route its table * entry to the corresponding shared-window vector. */ - if (pcie->hw == &t8122_pciec_hw || pcie->hw == &t8132_pciec_hw) { + if (pcie->hw == &t8122_pciec_hw || pcie->hw == &t8132_pciec_hw || + pcie->hw == &t6040_pciec_hw) { struct resource ecam; u32 expected_base, aic_base; @@ -2032,6 +2048,21 @@ static int apple_msi_init(struct apple_pcie *pcie) default: goto invalid_slice; } + } else if (of_machine_is_compatible("apple,t6040")) { + aic_base = 2071; + switch (ecam.start) { + case 0x1c50000000ULL: + expected_base = 0x20; + break; + case 0x1c60000000ULL: + expected_base = 0x40; + break; + case 0x1c70000000ULL: + expected_base = 0x60; + break; + default: + goto invalid_slice; + } } else if (of_machine_is_compatible("apple,t8132")) { aic_base = 1506; switch (ecam.start) { @@ -2077,7 +2108,8 @@ static int apple_msi_init(struct apple_pcie *pcie) } /* Keep map targets within the supported 8-bit range. */ - if ((pcie->hw == &t8122_pciec_hw || pcie->hw == &t8132_pciec_hw) && + if ((pcie->hw == &t8122_pciec_hw || pcie->hw == &t8132_pciec_hw || + pcie->hw == &t6040_pciec_hw) && (!pcie->nvecs || pcie->nvecs > 256 || pcie->msi_vector_base > FIELD_MAX(PORT_MSIMAP_TARGET) + 1 - pcie->nvecs)) { @@ -3976,6 +4008,7 @@ static const struct dev_pm_ops apple_pcie_pm_ops = { }; static const struct of_device_id apple_pcie_of_match[] = { + { .compatible = "apple,t6040-pciec", .data = &t6040_pciec_hw }, { .compatible = "apple,t8132-pciec", .data = &t8132_pciec_hw }, { .compatible = "apple,t8122-pciec", .data = &t8122_pciec_hw }, { .compatible = "apple,t8112-pciec", .data = &t8112_pciec_hw }, diff --git a/drivers/thunderbolt/apple.c b/drivers/thunderbolt/apple.c index 61325859752d4..ba7ec0bc0296c 100644 --- a/drivers/thunderbolt/apple.c +++ b/drivers/thunderbolt/apple.c @@ -181,6 +181,16 @@ static const struct apple_cio_hw apple_cio_t8142_hw = { .dp = &apple_dpin_disabled, }; +static const struct apple_cio_hw apple_cio_t6040_hw = { + .mxwrap = true, + .lstx_explicit = true, + .skip_run = true, + .lstx_after_boot = true, + .strict_fw_ready = true, + .no_host_clx = true, + .dp = &apple_dpin_disabled, +}; + #define APPLE_CIO_NHI_HOP_COUNT 0x0 #define APPLE_CIO_NHI_HOP_COUNT_MASK GENMASK(9, 0) @@ -883,14 +893,20 @@ static void apple_cio_of_node_put(void *data) of_node_put(data); } +static bool apple_cio_pciec_eligible(const struct device_node *np) +{ + return of_device_is_compatible(np, "apple,t6040-pciec") || + of_device_is_compatible(np, "apple,t8103-pciec") || + of_device_is_compatible(np, "apple,t6000-pciec"); +} + static bool apple_cio_pcie_tunnel_is_preinitialized(struct device_node *parent) { for_each_available_child_of_node_scoped(parent, child) { u32 status; - if (!of_device_is_compatible(child, "apple,t8103-pciec") && - !of_device_is_compatible(child, "apple,t6000-pciec")) + if (!apple_cio_pciec_eligible(child)) continue; if (!of_property_read_u32(child, "apple,pciec-preinit-status", @@ -919,8 +935,7 @@ static int apple_cio_get_pcie_reset(struct apple_cio *acio) struct reset_control *rst = NULL; for_each_available_child_of_node_scoped(acio->pcie_tunnel_np, child) { - if (!of_device_is_compatible(child, "apple,t8103-pciec") && - !of_device_is_compatible(child, "apple,t6000-pciec")) + if (!apple_cio_pciec_eligible(child)) continue; if (!of_property_read_bool(child, "apple,pciec-kernel-init")) break; @@ -952,8 +967,7 @@ static int apple_cio_map_pcie_intr2axi(struct apple_cio *acio) int index, ret; for_each_available_child_of_node_scoped(acio->pcie_tunnel_np, child) { - if (!of_device_is_compatible(child, "apple,t8103-pciec") && - !of_device_is_compatible(child, "apple,t6000-pciec")) + if (!apple_cio_pciec_eligible(child)) continue; index = of_property_match_string(child, "reg-names", "intr2axi"); @@ -2032,7 +2046,8 @@ static int apple_nhi_probe(struct platform_device *pdev) int ret = 0; if (acio->type7 != - of_device_is_compatible(pdev->dev.of_node, "apple,t8142-usb4-nhi")) { + (of_device_is_compatible(pdev->dev.of_node, "apple,t8142-usb4-nhi") || + of_device_is_compatible(pdev->dev.of_node, "apple,t6040-usb4-nhi"))) { ret = dev_err_probe(&pdev->dev, -EINVAL, "ACIO/NHI generation mismatch\n"); goto err; } @@ -2458,6 +2473,9 @@ static const struct dev_pm_ops apple_nhi_pm_ops = { }; static const struct of_device_id apple_nhi_match[] = { + { + .compatible = "apple,t6040-usb4-nhi", + }, { .compatible = "apple,t8142-usb4-nhi", }, @@ -2486,8 +2504,7 @@ static struct platform_device *apple_cio_find_pcie_tunnel(struct apple_cio *acio return NULL; for_each_available_child_of_node_scoped(acio->pcie_tunnel_np, child) { - if (!of_device_is_compatible(child, "apple,t8103-pciec") && - !of_device_is_compatible(child, "apple,t6000-pciec")) + if (!apple_cio_pciec_eligible(child)) continue; pdev = of_find_device_by_node(child); @@ -3279,7 +3296,8 @@ static int apple_cio_probe(struct platform_device *pdev) init_completion(&acio->nhi_boot_completion); acio->dev = &pdev->dev; acio->np = dev->of_node; - acio->type7 = of_device_is_compatible(acio->np, "apple,t8142-usb4-acio"); + acio->type7 = of_device_is_compatible(acio->np, "apple,t8142-usb4-acio") || + of_device_is_compatible(acio->np, "apple,t6040-usb4-acio"); if (acio->type7 && of_property_count_u32_elems(acio->np, "apple,tunable-rc") <= 0) return dev_err_probe(dev, -EINVAL, "Missing bootloader RC tuning\n"); @@ -3487,6 +3505,10 @@ static void apple_cio_remove(struct platform_device *pdev) static const struct of_device_id apple_acio_match[] = { + { + .compatible = "apple,t6040-usb4-acio", + .data = &apple_cio_t6040_hw, + }, { .compatible = "apple,t8142-usb4-acio", .data = &apple_cio_t8142_hw, From 0702069ee5669c8bbaeb3b78a63453e5aa573259 Mon Sep 17 00:00:00 2001 From: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Date: Sat, 7 Nov 2026 00:22:25 +1100 Subject: [PATCH 2/5] arm64: dts: apple: keep T6040 ACIO SRAM exact Use the captured 16 KiB wrapper window instead of extending the older ACIO SRAM span, and allow the six documented PCIe-C interrupts in the common schema limit. Assisted-by: LLM Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> --- arch/arm64/boot/dts/apple/t6040-usb4.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/apple/t6040-usb4.dtsi b/arch/arm64/boot/dts/apple/t6040-usb4.dtsi index ea3db2a3a0e3d..3649e9c866e44 100644 --- a/arch/arm64/boot/dts/apple/t6040-usb4.dtsi +++ b/arch/arm64/boot/dts/apple/t6040-usb4.dtsi @@ -22,7 +22,7 @@ usb4_0_acio: cio@381ac0000 { compatible = "apple,t6040-usb4-acio"; reg = <0x3 0x81ac0000 0x0 0xc000>, - <0x3 0x81108000 0x0 0x20000>, + <0x3 0x81108000 0x0 0x4000>, <0x3 0x81e44000 0x0 0x4000>, <0x3 0x81100000 0x0 0x4000>; reg-names = "rc", "sram", "pcie-adapter", "cpu"; @@ -116,7 +116,7 @@ usb4_1_acio: cio@389ac0000 { compatible = "apple,t6040-usb4-acio"; reg = <0x3 0x89ac0000 0x0 0xc000>, - <0x3 0x89108000 0x0 0x20000>, + <0x3 0x89108000 0x0 0x4000>, <0x3 0x89e44000 0x0 0x4000>, <0x3 0x89100000 0x0 0x4000>; reg-names = "rc", "sram", "pcie-adapter", "cpu"; @@ -210,7 +210,7 @@ usb4_2_acio: cio@391ac0000 { compatible = "apple,t6040-usb4-acio"; reg = <0x3 0x91ac0000 0x0 0xc000>, - <0x3 0x91108000 0x0 0x20000>, + <0x3 0x91108000 0x0 0x4000>, <0x3 0x91e44000 0x0 0x4000>, <0x3 0x91100000 0x0 0x4000>; reg-names = "rc", "sram", "pcie-adapter", "cpu"; From 8f5f25a8bb26bf191a8c9e79d8ec57611215c563 Mon Sep 17 00:00:00 2001 From: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Date: Sun, 8 Nov 2026 03:47:22 +1100 Subject: [PATCH 3/5] arm64: dts: apple: t6040: name the USB4 PCIe adapters for the boot loader The boot loader copies each router's PCIe adapter tuning to the node behind the usb4-N-pcie-adapter alias. T6040 had no such alias, so the adapter stayed untuned even with the router enabled. Point it at the router node, whose "pcie-adapter" register range the driver applies it to. The hyphenated spelling adds no dtc alias warnings. Checked: t6040-j616s.dts preprocesses and compiles, with the same 11 dtc warnings as before (all pre-existing underscore alias names). Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM --- arch/arm64/boot/dts/apple/t6040-usb4.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t6040-usb4.dtsi b/arch/arm64/boot/dts/apple/t6040-usb4.dtsi index 3649e9c866e44..c0980ba16e90c 100644 --- a/arch/arm64/boot/dts/apple/t6040-usb4.dtsi +++ b/arch/arm64/boot/dts/apple/t6040-usb4.dtsi @@ -11,12 +11,15 @@ usb4_0_rc = &usb4_0_acio; usb4_0_nhi = &usb4_0_nhi; usb4_0_pcie = &usb4_0_pcie; + usb4-0-pcie-adapter = &usb4_0_acio; usb4_1_rc = &usb4_1_acio; usb4_1_nhi = &usb4_1_nhi; usb4_1_pcie = &usb4_1_pcie; + usb4-1-pcie-adapter = &usb4_1_acio; usb4_2_rc = &usb4_2_acio; usb4_2_nhi = &usb4_2_nhi; usb4_2_pcie = &usb4_2_pcie; + usb4-2-pcie-adapter = &usb4_2_acio; }; usb4_0_acio: cio@381ac0000 { From e0dac7b93434af779776feeb3e2e25e3aa901615 Mon Sep 17 00:00:00 2001 From: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Date: Sun, 8 Nov 2026 03:58:15 +1100 Subject: [PATCH 4/5] arm64: dts: apple: t6040: point the ACIO SRAM at the router's data segment The "sram" window of each T6040 USB4 router was the 16 KiB at cpu+0x8000. That is the router's ASC mailbox, which the mailbox node already claims, so the router could not map it, and it is not where the firmware keeps its shared buffers. The ADT names the real region. The router's RTKit nub (acio-cpuN / iop-acioN-nub) lists its preloaded segments, and __DATA sits at cio+0x1080000, 0x26000 bytes, at IOVA 0x10000000. That IOVA is the driver's APPLE_CIO_SRAM_IOVA_BASE, and the shape matches T8103/T8132 (0x...1080000, 0x20000) and T6050 (0x26000). Use that window on all three routers. Checked: the J614s and J616s DTBs build with the same dtc warnings, and nothing else in them uses this range. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM --- arch/arm64/boot/dts/apple/t6040-usb4.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/apple/t6040-usb4.dtsi b/arch/arm64/boot/dts/apple/t6040-usb4.dtsi index c0980ba16e90c..644f9f8766eff 100644 --- a/arch/arm64/boot/dts/apple/t6040-usb4.dtsi +++ b/arch/arm64/boot/dts/apple/t6040-usb4.dtsi @@ -25,7 +25,7 @@ usb4_0_acio: cio@381ac0000 { compatible = "apple,t6040-usb4-acio"; reg = <0x3 0x81ac0000 0x0 0xc000>, - <0x3 0x81108000 0x0 0x4000>, + <0x3 0x81080000 0x0 0x26000>, <0x3 0x81e44000 0x0 0x4000>, <0x3 0x81100000 0x0 0x4000>; reg-names = "rc", "sram", "pcie-adapter", "cpu"; @@ -119,7 +119,7 @@ usb4_1_acio: cio@389ac0000 { compatible = "apple,t6040-usb4-acio"; reg = <0x3 0x89ac0000 0x0 0xc000>, - <0x3 0x89108000 0x0 0x4000>, + <0x3 0x89080000 0x0 0x26000>, <0x3 0x89e44000 0x0 0x4000>, <0x3 0x89100000 0x0 0x4000>; reg-names = "rc", "sram", "pcie-adapter", "cpu"; @@ -213,7 +213,7 @@ usb4_2_acio: cio@391ac0000 { compatible = "apple,t6040-usb4-acio"; reg = <0x3 0x91ac0000 0x0 0xc000>, - <0x3 0x91108000 0x0 0x4000>, + <0x3 0x91080000 0x0 0x26000>, <0x3 0x91e44000 0x0 0x4000>, <0x3 0x91100000 0x0 0x4000>; reg-names = "rc", "sram", "pcie-adapter", "cpu"; From 89a4f34da89631ebe6ce364ec289abf8739dc1b1 Mon Sep 17 00:00:00 2001 From: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Date: Sun, 8 Nov 2026 19:34:56 +1100 Subject: [PATCH 5/5] arm64: dts: apple: t6040: map the NHI ring interrupts the right way round The ADT lists each router's NHI interrupts as twelve higher numbers, twelve lower ones and the SRAM parity line (acio0: 1774-1785, 1762-1773, 1791). The lower twelve are the TX rings and the higher twelve the RX rings, as the T6050 router description that works on the J716c maps them. The T6040 nodes had the two halves the other way round, so the TX-done interrupt reached the RX handler, which acknowledged the wrong status bit; the level interrupt never dropped. Swap the halves for all three routers. Not yet run on hardware: the J616s link trial that should confirm it is pending. Signed-off-by: Ryan Murray <81541646+RyanTheTide@users.noreply.github.com> Assisted-by: LLM --- arch/arm64/boot/dts/apple/t6040-usb4.dtsi | 84 +++++++++++------------ 1 file changed, 42 insertions(+), 42 deletions(-) diff --git a/arch/arm64/boot/dts/apple/t6040-usb4.dtsi b/arch/arm64/boot/dts/apple/t6040-usb4.dtsi index 644f9f8766eff..6f4c28bbf64bd 100644 --- a/arch/arm64/boot/dts/apple/t6040-usb4.dtsi +++ b/arch/arm64/boot/dts/apple/t6040-usb4.dtsi @@ -68,19 +68,7 @@ reg = <0x1f00000 0x100000>; reg-names = "nhi"; interrupt-parent = <&aic>; - interrupts = , - , - , - , - , - , - , - , - , - , - , - , - , + interrupts = , , , , @@ -91,7 +79,19 @@ , , , - ; + , + , + , + , + , + , + , + , + , + , + , + , + ; interrupt-names = "txring0", "txring1", "txring2", "txring3", "txring4", "txring5", "txring6", "txring7", "txring8", "txring9", "txring10", "txring11", @@ -162,19 +162,7 @@ reg = <0x1f00000 0x100000>; reg-names = "nhi"; interrupt-parent = <&aic>; - interrupts = , - , - , - , - , - , - , - , - , - , - , - , - , + interrupts = , , , , @@ -185,7 +173,19 @@ , , , - ; + , + , + , + , + , + , + , + , + , + , + , + , + ; interrupt-names = "txring0", "txring1", "txring2", "txring3", "txring4", "txring5", "txring6", "txring7", "txring8", "txring9", "txring10", "txring11", @@ -256,19 +256,7 @@ reg = <0x1f00000 0x100000>; reg-names = "nhi"; interrupt-parent = <&aic>; - interrupts = , - , - , - , - , - , - , - , - , - , - , - , - , + interrupts = , , , , @@ -279,7 +267,19 @@ , , , - ; + , + , + , + , + , + , + , + , + , + , + , + , + ; interrupt-names = "txring0", "txring1", "txring2", "txring3", "txring4", "txring5", "txring6", "txring7", "txring8", "txring9", "txring10", "txring11",