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Added new hardware mode in emulator #70

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Merged
arghyabi merged 1 commit into from
Apr 8, 2026
Merged

Added new hardware mode in emulator #70

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1 change: 1 addition & 0 deletions .gitignore
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Original file line number Diff line number Diff line change
Expand Up @@ -4,3 +4,4 @@ Compiler/*.bin
Microcode/out/
Gen7segDriver/*.bin
__pycache__
.vscode
9 changes: 5 additions & 4 deletions Emulator/core/decoder.py
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Original file line number Diff line number Diff line change
Expand Up @@ -106,13 +106,14 @@ def _decodeSpecialOpcode(self, instruction, opcode, upperNibble):
def _decode4bitOpcode(self, instruction, opcode, upperNibble):
opcodeName = self.opcodes[opcode]

# These instructions have SSDD format (source, destination registers)
destReg = upperNibble & 0b11 # Bottom 2 bits
sourceReg = (upperNibble >> 2) & 0b11 # Top 2 bits
# These instructions use DDSS in upper nibble:
# destination in bits [7:6], source in bits [5:4]
destinationReg = (upperNibble >> 2) & 0b11 # Top 2 bits
sourceReg = upperNibble & 0b11 # Bottom 2 bits

return (opcodeName, {
'sourceRegister': sourceReg,
'destinationRegister': destReg
'destinationRegister': destinationReg
}, 1)


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