diff --git a/CHANGELOG.md b/CHANGELOG.md index 458fefd10bd..62a782f0c27 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -15,6 +15,14 @@ full changeset diff at the end of each section. Current Trunk ------------- + - Rename relaxed SIMD instructions to prepend the `relaxed_` prefix. + - Rename C and JS API operations to prepend the `Relaxed` prefix: + - `LaneselectI8x16` to `RelaxedLaneselectI8x16` + - `LaneselectI16x8` to `RelaxedLaneselectI16x8` + - `LaneselectI32x4` to `RelaxedLaneselectI32x4` + - `LaneselectI64x2` to `RelaxedLaneselectI64x2` + - `DotI8x16I7x16AddSToVecI32x4` to `RelaxedDotI8x16I7x16AddSToVecI32x4` + - `DotI8x16I7x16SToVecI16x8` to `RelaxedDotI8x16I7x16SToVecI16x8` - Rename `MemorySegment` functions to `DataSegment` in the c and js apis - Rename `BinaryenGetNumMemorySegments` to `BinaryenGetNumDataSegments` in c api. - Rename `BinaryenGetMemorySegmentByteOffset` to `BinaryenGetDataSegmentByteOffset` in c api. diff --git a/scripts/gen-s-parser.py b/scripts/gen-s-parser.py index d8ebce98e31..bc87aeba062 100755 --- a/scripts/gen-s-parser.py +++ b/scripts/gen-s-parser.py @@ -569,17 +569,17 @@ ("f32x4.relaxed_nmadd", "makeSIMDTernary(SIMDTernaryOp::RelaxedNmaddVecF32x4)"), ("f64x2.relaxed_madd", "makeSIMDTernary(SIMDTernaryOp::RelaxedMaddVecF64x2)"), ("f64x2.relaxed_nmadd", "makeSIMDTernary(SIMDTernaryOp::RelaxedNmaddVecF64x2)"), - ("i8x16.laneselect", "makeSIMDTernary(SIMDTernaryOp::LaneselectI8x16)"), - ("i16x8.laneselect", "makeSIMDTernary(SIMDTernaryOp::LaneselectI16x8)"), - ("i32x4.laneselect", "makeSIMDTernary(SIMDTernaryOp::LaneselectI32x4)"), - ("i64x2.laneselect", "makeSIMDTernary(SIMDTernaryOp::LaneselectI64x2)"), + ("i8x16.relaxed_laneselect", "makeSIMDTernary(SIMDTernaryOp::RelaxedLaneselectI8x16)"), + ("i16x8.relaxed_laneselect", "makeSIMDTernary(SIMDTernaryOp::RelaxedLaneselectI16x8)"), + ("i32x4.relaxed_laneselect", "makeSIMDTernary(SIMDTernaryOp::RelaxedLaneselectI32x4)"), + ("i64x2.relaxed_laneselect", "makeSIMDTernary(SIMDTernaryOp::RelaxedLaneselectI64x2)"), ("f32x4.relaxed_min", "makeBinary(BinaryOp::RelaxedMinVecF32x4)"), ("f32x4.relaxed_max", "makeBinary(BinaryOp::RelaxedMaxVecF32x4)"), ("f64x2.relaxed_min", "makeBinary(BinaryOp::RelaxedMinVecF64x2)"), ("f64x2.relaxed_max", "makeBinary(BinaryOp::RelaxedMaxVecF64x2)"), ("i16x8.relaxed_q15mulr_s", "makeBinary(BinaryOp::RelaxedQ15MulrSVecI16x8)"), - ("i16x8.dot_i8x16_i7x16_s", "makeBinary(BinaryOp::DotI8x16I7x16SToVecI16x8)"), - ("i32x4.dot_i8x16_i7x16_add_s", "makeSIMDTernary(SIMDTernaryOp::DotI8x16I7x16AddSToVecI32x4)"), + ("i16x8.relaxed_dot_i8x16_i7x16_s", "makeBinary(BinaryOp::RelaxedDotI8x16I7x16SToVecI16x8)"), + ("i32x4.relaxed_dot_i8x16_i7x16_add_s", "makeSIMDTernary(SIMDTernaryOp::RelaxedDotI8x16I7x16AddSToVecI32x4)"), # reference types instructions ("ref.null", "makeRefNull()"), diff --git a/src/binaryen-c.cpp b/src/binaryen-c.cpp index 53926af7680..e575af1653d 100644 --- a/src/binaryen-c.cpp +++ b/src/binaryen-c.cpp @@ -798,12 +798,20 @@ BinaryenOp BinaryenRelaxedMaddVecF32x4(void) { return RelaxedMaddVecF32x4; } BinaryenOp BinaryenRelaxedNmaddVecF32x4(void) { return RelaxedNmaddVecF32x4; } BinaryenOp BinaryenRelaxedMaddVecF64x2(void) { return RelaxedMaddVecF64x2; } BinaryenOp BinaryenRelaxedNmaddVecF64x2(void) { return RelaxedNmaddVecF64x2; } -BinaryenOp BinaryenLaneselectI8x16(void) { return LaneselectI8x16; } -BinaryenOp BinaryenLaneselectI16x8(void) { return LaneselectI16x8; } -BinaryenOp BinaryenLaneselectI32x4(void) { return LaneselectI32x4; } -BinaryenOp BinaryenLaneselectI64x2(void) { return LaneselectI64x2; } -BinaryenOp BinaryenDotI8x16I7x16AddSToVecI32x4(void) { - return DotI8x16I7x16AddSToVecI32x4; +BinaryenOp BinaryenRelaxedLaneselectI8x16(void) { + return RelaxedLaneselectI8x16; +} +BinaryenOp BinaryenRelaxedLaneselectI16x8(void) { + return RelaxedLaneselectI16x8; +} +BinaryenOp BinaryenRelaxedLaneselectI32x4(void) { + return RelaxedLaneselectI32x4; +} +BinaryenOp BinaryenRelaxedLaneselectI64x2(void) { + return RelaxedLaneselectI64x2; +} +BinaryenOp BinaryenRelaxedDotI8x16I7x16AddSToVecI32x4(void) { + return RelaxedDotI8x16I7x16AddSToVecI32x4; } BinaryenOp BinaryenAnyTrueVec128(void) { return AnyTrueVec128; } BinaryenOp BinaryenAbsVecI8x16(void) { return AbsVecI8x16; } @@ -1050,8 +1058,8 @@ BinaryenOp BinaryenRelaxedMaxVecF64x2(void) { return RelaxedMaxVecF64x2; } BinaryenOp BinaryenRelaxedQ15MulrSVecI16x8(void) { return RelaxedQ15MulrSVecI16x8; } -BinaryenOp BinaryenDotI8x16I7x16SToVecI16x8(void) { - return DotI8x16I7x16SToVecI16x8; +BinaryenOp BinaryenRelaxedDotI8x16I7x16SToVecI16x8(void) { + return RelaxedDotI8x16I7x16SToVecI16x8; } BinaryenOp BinaryenRefAsNonNull(void) { return RefAsNonNull; } BinaryenOp BinaryenRefAsExternInternalize(void) { return AnyConvertExtern; } diff --git a/src/binaryen-c.h b/src/binaryen-c.h index 10e01fef3aa..119f768246b 100644 --- a/src/binaryen-c.h +++ b/src/binaryen-c.h @@ -523,11 +523,11 @@ BINARYEN_API BinaryenOp BinaryenRelaxedMaddVecF32x4(void); BINARYEN_API BinaryenOp BinaryenRelaxedNmaddVecF32x4(void); BINARYEN_API BinaryenOp BinaryenRelaxedMaddVecF64x2(void); BINARYEN_API BinaryenOp BinaryenRelaxedNmaddVecF64x2(void); -BINARYEN_API BinaryenOp BinaryenLaneselectI8x16(void); -BINARYEN_API BinaryenOp BinaryenLaneselectI16x8(void); -BINARYEN_API BinaryenOp BinaryenLaneselectI32x4(void); -BINARYEN_API BinaryenOp BinaryenLaneselectI64x2(void); -BINARYEN_API BinaryenOp BinaryenDotI8x16I7x16AddSToVecI32x4(void); +BINARYEN_API BinaryenOp BinaryenRelaxedLaneselectI8x16(void); +BINARYEN_API BinaryenOp BinaryenRelaxedLaneselectI16x8(void); +BINARYEN_API BinaryenOp BinaryenRelaxedLaneselectI32x4(void); +BINARYEN_API BinaryenOp BinaryenRelaxedLaneselectI64x2(void); +BINARYEN_API BinaryenOp BinaryenRelaxedDotI8x16I7x16AddSToVecI32x4(void); BINARYEN_API BinaryenOp BinaryenAnyTrueVec128(void); BINARYEN_API BinaryenOp BinaryenPopcntVecI8x16(void); BINARYEN_API BinaryenOp BinaryenAbsVecI8x16(void); @@ -697,7 +697,7 @@ BINARYEN_API BinaryenOp BinaryenRelaxedMaxVecF32x4(void); BINARYEN_API BinaryenOp BinaryenRelaxedMinVecF64x2(void); BINARYEN_API BinaryenOp BinaryenRelaxedMaxVecF64x2(void); BINARYEN_API BinaryenOp BinaryenRelaxedQ15MulrSVecI16x8(void); -BINARYEN_API BinaryenOp BinaryenDotI8x16I7x16SToVecI16x8(void); +BINARYEN_API BinaryenOp BinaryenRelaxedDotI8x16I7x16SToVecI16x8(void); BINARYEN_API BinaryenOp BinaryenRefAsNonNull(void); BINARYEN_API BinaryenOp BinaryenRefAsExternInternalize(void); BINARYEN_API BinaryenOp BinaryenRefAsExternExternalize(void); diff --git a/src/gen-s-parser.inc b/src/gen-s-parser.inc index d3d3b99a702..566eff15ed5 100644 --- a/src/gen-s-parser.inc +++ b/src/gen-s-parser.inc @@ -5,7 +5,7 @@ // NOLINTBEGIN auto op = *keyword; -char buf[33] = {}; +char buf[36] = {}; // Ensure we do not copy more than the buffer can hold if (op.size() >= sizeof(buf)) { goto parse_error; @@ -1852,12 +1852,6 @@ switch (buf[0]) { return Ok{}; } goto parse_error; - case 'd': - if (op == "i16x8.dot_i8x16_i7x16_s"sv) { - CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::DotI8x16I7x16SToVecI16x8)); - return Ok{}; - } - goto parse_error; case 'e': { switch (buf[7]) { case 'q': @@ -2027,12 +2021,6 @@ switch (buf[0]) { } case 'l': { switch (buf[7]) { - case 'a': - if (op == "i16x8.laneselect"sv) { - CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::LaneselectI16x8)); - return Ok{}; - } - goto parse_error; case 'e': { switch (buf[9]) { case 's': @@ -2162,12 +2150,29 @@ switch (buf[0]) { goto parse_error; case 'r': { switch (buf[8]) { - case 'l': - if (op == "i16x8.relaxed_q15mulr_s"sv) { - CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::RelaxedQ15MulrSVecI16x8)); - return Ok{}; + case 'l': { + switch (buf[14]) { + case 'd': + if (op == "i16x8.relaxed_dot_i8x16_i7x16_s"sv) { + CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::RelaxedDotI8x16I7x16SToVecI16x8)); + return Ok{}; + } + goto parse_error; + case 'l': + if (op == "i16x8.relaxed_laneselect"sv) { + CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::RelaxedLaneselectI16x8)); + return Ok{}; + } + goto parse_error; + case 'q': + if (op == "i16x8.relaxed_q15mulr_s"sv) { + CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::RelaxedQ15MulrSVecI16x8)); + return Ok{}; + } + goto parse_error; + default: goto parse_error; } - goto parse_error; + } case 'p': if (op == "i16x8.replace_lane"sv) { CHECK_ERR(makeSIMDReplace(ctx, pos, annotations, SIMDReplaceOp::ReplaceLaneVecI16x8, 8)); @@ -2998,23 +3003,12 @@ switch (buf[0]) { return Ok{}; } goto parse_error; - case 'd': { - switch (buf[11]) { - case '1': - if (op == "i32x4.dot_i16x8_s"sv) { - CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::DotSVecI16x8ToVecI32x4)); - return Ok{}; - } - goto parse_error; - case '8': - if (op == "i32x4.dot_i8x16_i7x16_add_s"sv) { - CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::DotI8x16I7x16AddSToVecI32x4)); - return Ok{}; - } - goto parse_error; - default: goto parse_error; + case 'd': + if (op == "i32x4.dot_i16x8_s"sv) { + CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::DotSVecI16x8ToVecI32x4)); + return Ok{}; } - } + goto parse_error; case 'e': { switch (buf[7]) { case 'q': @@ -3173,12 +3167,6 @@ switch (buf[0]) { } case 'l': { switch (buf[7]) { - case 'a': - if (op == "i32x4.laneselect"sv) { - CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::LaneselectI32x4)); - return Ok{}; - } - goto parse_error; case 'e': { switch (buf[9]) { case 's': @@ -3281,38 +3269,55 @@ switch (buf[0]) { case 'r': { switch (buf[8]) { case 'l': { - switch (buf[21]) { - case '3': { - switch (buf[26]) { - case 's': - if (op == "i32x4.relaxed_trunc_f32x4_s"sv) { - CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::RelaxedTruncSVecF32x4ToVecI32x4)); - return Ok{}; - } - goto parse_error; - case 'u': - if (op == "i32x4.relaxed_trunc_f32x4_u"sv) { - CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::RelaxedTruncUVecF32x4ToVecI32x4)); - return Ok{}; - } - goto parse_error; - default: goto parse_error; + switch (buf[14]) { + case 'd': + if (op == "i32x4.relaxed_dot_i8x16_i7x16_add_s"sv) { + CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::RelaxedDotI8x16I7x16AddSToVecI32x4)); + return Ok{}; } - } - case '6': { - switch (buf[26]) { - case 's': - if (op == "i32x4.relaxed_trunc_f64x2_s_zero"sv) { - CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::RelaxedTruncZeroSVecF64x2ToVecI32x4)); - return Ok{}; + goto parse_error; + case 'l': + if (op == "i32x4.relaxed_laneselect"sv) { + CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::RelaxedLaneselectI32x4)); + return Ok{}; + } + goto parse_error; + case 't': { + switch (buf[21]) { + case '3': { + switch (buf[26]) { + case 's': + if (op == "i32x4.relaxed_trunc_f32x4_s"sv) { + CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::RelaxedTruncSVecF32x4ToVecI32x4)); + return Ok{}; + } + goto parse_error; + case 'u': + if (op == "i32x4.relaxed_trunc_f32x4_u"sv) { + CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::RelaxedTruncUVecF32x4ToVecI32x4)); + return Ok{}; + } + goto parse_error; + default: goto parse_error; } - goto parse_error; - case 'u': - if (op == "i32x4.relaxed_trunc_f64x2_u_zero"sv) { - CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::RelaxedTruncZeroUVecF64x2ToVecI32x4)); - return Ok{}; + } + case '6': { + switch (buf[26]) { + case 's': + if (op == "i32x4.relaxed_trunc_f64x2_s_zero"sv) { + CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::RelaxedTruncZeroSVecF64x2ToVecI32x4)); + return Ok{}; + } + goto parse_error; + case 'u': + if (op == "i32x4.relaxed_trunc_f64x2_u_zero"sv) { + CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::RelaxedTruncZeroUVecF64x2ToVecI32x4)); + return Ok{}; + } + goto parse_error; + default: goto parse_error; } - goto parse_error; + } default: goto parse_error; } } @@ -4386,12 +4391,6 @@ switch (buf[0]) { } case 'l': { switch (buf[7]) { - case 'a': - if (op == "i64x2.laneselect"sv) { - CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::LaneselectI64x2)); - return Ok{}; - } - goto parse_error; case 'e': if (op == "i64x2.le_s"sv) { CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::LeSVecI64x2)); @@ -4430,12 +4429,23 @@ switch (buf[0]) { default: goto parse_error; } } - case 'r': - if (op == "i64x2.replace_lane"sv) { - CHECK_ERR(makeSIMDReplace(ctx, pos, annotations, SIMDReplaceOp::ReplaceLaneVecI64x2, 2)); - return Ok{}; + case 'r': { + switch (buf[8]) { + case 'l': + if (op == "i64x2.relaxed_laneselect"sv) { + CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::RelaxedLaneselectI64x2)); + return Ok{}; + } + goto parse_error; + case 'p': + if (op == "i64x2.replace_lane"sv) { + CHECK_ERR(makeSIMDReplace(ctx, pos, annotations, SIMDReplaceOp::ReplaceLaneVecI64x2, 2)); + return Ok{}; + } + goto parse_error; + default: goto parse_error; } - goto parse_error; + } case 's': { switch (buf[7]) { case 'h': { @@ -4615,12 +4625,6 @@ switch (buf[0]) { } case 'l': { switch (buf[7]) { - case 'a': - if (op == "i8x16.laneselect"sv) { - CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::LaneselectI8x16)); - return Ok{}; - } - goto parse_error; case 'e': { switch (buf[9]) { case 's': @@ -4744,12 +4748,23 @@ switch (buf[0]) { goto parse_error; case 'r': { switch (buf[8]) { - case 'l': - if (op == "i8x16.relaxed_swizzle"sv) { - CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::RelaxedSwizzleVecI8x16)); - return Ok{}; + case 'l': { + switch (buf[14]) { + case 'l': + if (op == "i8x16.relaxed_laneselect"sv) { + CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::RelaxedLaneselectI8x16)); + return Ok{}; + } + goto parse_error; + case 's': + if (op == "i8x16.relaxed_swizzle"sv) { + CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::RelaxedSwizzleVecI8x16)); + return Ok{}; + } + goto parse_error; + default: goto parse_error; } - goto parse_error; + } case 'p': if (op == "i8x16.replace_lane"sv) { CHECK_ERR(makeSIMDReplace(ctx, pos, annotations, SIMDReplaceOp::ReplaceLaneVecI8x16, 16)); diff --git a/src/ir/child-typer.h b/src/ir/child-typer.h index 2aa1a06d549..e232dca7f63 100644 --- a/src/ir/child-typer.h +++ b/src/ir/child-typer.h @@ -696,7 +696,7 @@ template struct ChildTyper : OverriddenVisitor { case SwizzleVecI8x16: case RelaxedSwizzleVecI8x16: case RelaxedQ15MulrSVecI16x8: - case DotI8x16I7x16SToVecI16x8: + case RelaxedDotI8x16I7x16SToVecI16x8: note(&curr->left, Type::v128); note(&curr->right, Type::v128); break; diff --git a/src/ir/cost.h b/src/ir/cost.h index 7d044a49947..8e98ca04683 100644 --- a/src/ir/cost.h +++ b/src/ir/cost.h @@ -567,7 +567,7 @@ struct CostAnalyzer : public OverriddenVisitor { case SwizzleVecI8x16: case RelaxedSwizzleVecI8x16: case RelaxedQ15MulrSVecI16x8: - case DotI8x16I7x16SToVecI16x8: + case RelaxedDotI8x16I7x16SToVecI16x8: ret = 1; break; case InvalidBinary: @@ -612,17 +612,17 @@ struct CostAnalyzer : public OverriddenVisitor { CostType ret = 0; switch (curr->op) { case Bitselect: - case LaneselectI8x16: - case LaneselectI16x8: - case LaneselectI32x4: - case LaneselectI64x2: + case RelaxedLaneselectI8x16: + case RelaxedLaneselectI16x8: + case RelaxedLaneselectI32x4: + case RelaxedLaneselectI64x2: case MaddVecF16x8: case NmaddVecF16x8: case RelaxedMaddVecF32x4: case RelaxedNmaddVecF32x4: case RelaxedMaddVecF64x2: case RelaxedNmaddVecF64x2: - case DotI8x16I7x16AddSToVecI32x4: + case RelaxedDotI8x16I7x16AddSToVecI32x4: ret = 1; break; } diff --git a/src/js/binaryen.js-post.js b/src/js/binaryen.js-post.js index 8c965d70ee0..37b14e0381e 100644 --- a/src/js/binaryen.js-post.js +++ b/src/js/binaryen.js-post.js @@ -422,11 +422,11 @@ function initializeConstants() { 'RelaxedNmaddVecF32x4', 'RelaxedMaddVecF64x2', 'RelaxedNmaddVecF64x2', - 'LaneselectI8x16', - 'LaneselectI16x8', - 'LaneselectI32x4', - 'LaneselectI64x2', - 'DotI8x16I7x16AddSToVecI32x4', + 'RelaxedLaneselectI8x16', + 'RelaxedLaneselectI16x8', + 'RelaxedLaneselectI32x4', + 'RelaxedLaneselectI64x2', + 'RelaxedDotI8x16I7x16AddSToVecI32x4', 'AnyTrueVec128', 'PopcntVecI8x16', 'AbsVecI8x16', @@ -595,7 +595,7 @@ function initializeConstants() { 'RelaxedMinVecF64x2', 'RelaxedMaxVecF64x2', 'RelaxedQ15MulrSVecI16x8', - 'DotI8x16I7x16SToVecI16x8', + 'RelaxedDotI8x16I7x16SToVecI16x8', 'RefAsNonNull', 'RefAsExternInternalize', 'RefAsExternExternalize', diff --git a/src/passes/Print.cpp b/src/passes/Print.cpp index c926c914720..90273006b0a 100644 --- a/src/passes/Print.cpp +++ b/src/passes/Print.cpp @@ -722,17 +722,17 @@ struct PrintExpressionContents case Bitselect: o << "v128.bitselect"; break; - case LaneselectI8x16: - o << "i8x16.laneselect"; + case RelaxedLaneselectI8x16: + o << "i8x16.relaxed_laneselect"; break; - case LaneselectI16x8: - o << "i16x8.laneselect"; + case RelaxedLaneselectI16x8: + o << "i16x8.relaxed_laneselect"; break; - case LaneselectI32x4: - o << "i32x4.laneselect"; + case RelaxedLaneselectI32x4: + o << "i32x4.relaxed_laneselect"; break; - case LaneselectI64x2: - o << "i64x2.laneselect"; + case RelaxedLaneselectI64x2: + o << "i64x2.relaxed_laneselect"; break; case MaddVecF16x8: o << "f16x8.madd"; @@ -752,8 +752,8 @@ struct PrintExpressionContents case RelaxedNmaddVecF64x2: o << "f64x2.relaxed_nmadd"; break; - case DotI8x16I7x16AddSToVecI32x4: - o << "i32x4.dot_i8x16_i7x16_add_s"; + case RelaxedDotI8x16I7x16AddSToVecI32x4: + o << "i32x4.relaxed_dot_i8x16_i7x16_add_s"; break; } restoreNormalColor(o); @@ -2022,8 +2022,8 @@ struct PrintExpressionContents case RelaxedQ15MulrSVecI16x8: o << "i16x8.relaxed_q15mulr_s"; break; - case DotI8x16I7x16SToVecI16x8: - o << "i16x8.dot_i8x16_i7x16_s"; + case RelaxedDotI8x16I7x16SToVecI16x8: + o << "i16x8.relaxed_dot_i8x16_i7x16_s"; break; case InvalidBinary: diff --git a/src/passes/RemoveRelaxedSIMD.cpp b/src/passes/RemoveRelaxedSIMD.cpp index b09319d8fce..61f65830d12 100644 --- a/src/passes/RemoveRelaxedSIMD.cpp +++ b/src/passes/RemoveRelaxedSIMD.cpp @@ -64,7 +64,7 @@ struct RemoveRelaxedSIMD : WalkerPass> { case RelaxedMinVecF64x2: case RelaxedMaxVecF64x2: case RelaxedQ15MulrSVecI16x8: - case DotI8x16I7x16SToVecI16x8: + case RelaxedDotI8x16I7x16SToVecI16x8: replace(curr); return; default: @@ -78,11 +78,11 @@ struct RemoveRelaxedSIMD : WalkerPass> { case RelaxedNmaddVecF32x4: case RelaxedMaddVecF64x2: case RelaxedNmaddVecF64x2: - case LaneselectI8x16: - case LaneselectI16x8: - case LaneselectI32x4: - case LaneselectI64x2: - case DotI8x16I7x16AddSToVecI32x4: + case RelaxedLaneselectI8x16: + case RelaxedLaneselectI16x8: + case RelaxedLaneselectI32x4: + case RelaxedLaneselectI64x2: + case RelaxedDotI8x16I7x16AddSToVecI32x4: replace(curr); return; default: diff --git a/src/wasm-interpreter.h b/src/wasm-interpreter.h index 8dd1bb4f4c6..a2297abbbf1 100644 --- a/src/wasm-interpreter.h +++ b/src/wasm-interpreter.h @@ -1652,7 +1652,7 @@ class ExpressionRunner : public OverriddenVisitor { case SwizzleVecI8x16: return left.swizzleI8x16(right); - case DotI8x16I7x16SToVecI16x8: + case RelaxedDotI8x16I7x16SToVecI16x8: return left.dotSI8x16toI16x8(right); case InvalidBinary: @@ -1724,10 +1724,10 @@ class ExpressionRunner : public OverriddenVisitor { Literal c = flow.getSingleValue(); switch (curr->op) { case Bitselect: - case LaneselectI8x16: - case LaneselectI16x8: - case LaneselectI32x4: - case LaneselectI64x2: + case RelaxedLaneselectI8x16: + case RelaxedLaneselectI16x8: + case RelaxedLaneselectI32x4: + case RelaxedLaneselectI64x2: return c.bitselectV128(a, b); case MaddVecF16x8: @@ -1754,7 +1754,7 @@ class ExpressionRunner : public OverriddenVisitor { return NONCONSTANT_FLOW; } return a.relaxedNmaddF64x2(b, c); - case DotI8x16I7x16AddSToVecI32x4: + case RelaxedDotI8x16I7x16AddSToVecI32x4: if (relaxedBehavior == RelaxedBehavior::NonConstant) { return NONCONSTANT_FLOW; } diff --git a/src/wasm.h b/src/wasm.h index be7904bb674..d0068d1cbb4 100644 --- a/src/wasm.h +++ b/src/wasm.h @@ -516,7 +516,7 @@ enum BinaryOp { RelaxedMinVecF64x2, RelaxedMaxVecF64x2, RelaxedQ15MulrSVecI16x8, - DotI8x16I7x16SToVecI16x8, + RelaxedDotI8x16I7x16SToVecI16x8, InvalidBinary }; @@ -594,11 +594,11 @@ enum SIMDTernaryOp { RelaxedNmaddVecF32x4, RelaxedMaddVecF64x2, RelaxedNmaddVecF64x2, - LaneselectI8x16, - LaneselectI16x8, - LaneselectI32x4, - LaneselectI64x2, - DotI8x16I7x16AddSToVecI32x4, + RelaxedLaneselectI8x16, + RelaxedLaneselectI16x8, + RelaxedLaneselectI32x4, + RelaxedLaneselectI64x2, + RelaxedDotI8x16I7x16AddSToVecI32x4, // FP16 MaddVecF16x8, NmaddVecF16x8, diff --git a/src/wasm/wasm-binary.cpp b/src/wasm/wasm-binary.cpp index 368203ba5ff..0579a9bc3ff 100644 --- a/src/wasm/wasm-binary.cpp +++ b/src/wasm/wasm-binary.cpp @@ -4317,7 +4317,7 @@ Result<> WasmBinaryReader::readInst() { case BinaryConsts::I16x8RelaxedQ15MulrS: return builder.makeBinary(RelaxedQ15MulrSVecI16x8); case BinaryConsts::I16x8DotI8x16I7x16S: - return builder.makeBinary(DotI8x16I7x16SToVecI16x8); + return builder.makeBinary(RelaxedDotI8x16I7x16SToVecI16x8); case BinaryConsts::I8x16Splat: return builder.makeUnary(SplatVecI8x16); case BinaryConsts::I16x8Splat: @@ -4530,13 +4530,13 @@ Result<> WasmBinaryReader::readInst() { case BinaryConsts::V128Bitselect: return builder.makeSIMDTernary(Bitselect); case BinaryConsts::I8x16Laneselect: - return builder.makeSIMDTernary(LaneselectI8x16); + return builder.makeSIMDTernary(RelaxedLaneselectI8x16); case BinaryConsts::I16x8Laneselect: - return builder.makeSIMDTernary(LaneselectI16x8); + return builder.makeSIMDTernary(RelaxedLaneselectI16x8); case BinaryConsts::I32x4Laneselect: - return builder.makeSIMDTernary(LaneselectI32x4); + return builder.makeSIMDTernary(RelaxedLaneselectI32x4); case BinaryConsts::I64x2Laneselect: - return builder.makeSIMDTernary(LaneselectI64x2); + return builder.makeSIMDTernary(RelaxedLaneselectI64x2); case BinaryConsts::F16x8Madd: return builder.makeSIMDTernary(MaddVecF16x8); case BinaryConsts::F16x8Nmadd: @@ -4550,7 +4550,7 @@ Result<> WasmBinaryReader::readInst() { case BinaryConsts::F64x2RelaxedNmadd: return builder.makeSIMDTernary(RelaxedNmaddVecF64x2); case BinaryConsts::I32x4DotI8x16I7x16AddS: - return builder.makeSIMDTernary(DotI8x16I7x16AddSToVecI32x4); + return builder.makeSIMDTernary(RelaxedDotI8x16I7x16AddSToVecI32x4); case BinaryConsts::I8x16Shl: return builder.makeSIMDShift(ShlVecI8x16); case BinaryConsts::I8x16ShrS: diff --git a/src/wasm/wasm-stack.cpp b/src/wasm/wasm-stack.cpp index 93521cb1e26..e816205e292 100644 --- a/src/wasm/wasm-stack.cpp +++ b/src/wasm/wasm-stack.cpp @@ -715,16 +715,16 @@ void BinaryInstWriter::visitSIMDTernary(SIMDTernary* curr) { case Bitselect: o << U32LEB(BinaryConsts::V128Bitselect); break; - case LaneselectI8x16: + case RelaxedLaneselectI8x16: o << U32LEB(BinaryConsts::I8x16Laneselect); break; - case LaneselectI16x8: + case RelaxedLaneselectI16x8: o << U32LEB(BinaryConsts::I16x8Laneselect); break; - case LaneselectI32x4: + case RelaxedLaneselectI32x4: o << U32LEB(BinaryConsts::I32x4Laneselect); break; - case LaneselectI64x2: + case RelaxedLaneselectI64x2: o << U32LEB(BinaryConsts::I64x2Laneselect); break; case MaddVecF16x8: @@ -745,7 +745,7 @@ void BinaryInstWriter::visitSIMDTernary(SIMDTernary* curr) { case RelaxedNmaddVecF64x2: o << U32LEB(BinaryConsts::F64x2RelaxedNmadd); break; - case DotI8x16I7x16AddSToVecI32x4: + case RelaxedDotI8x16I7x16AddSToVecI32x4: o << U32LEB(BinaryConsts::I32x4DotI8x16I7x16AddS); break; } @@ -2272,7 +2272,7 @@ void BinaryInstWriter::visitBinary(Binary* curr) { o << static_cast(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::I16x8RelaxedQ15MulrS); break; - case DotI8x16I7x16SToVecI16x8: + case RelaxedDotI8x16I7x16SToVecI16x8: o << static_cast(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::I16x8DotI8x16I7x16S); break; diff --git a/src/wasm/wasm-validator.cpp b/src/wasm/wasm-validator.cpp index 9f9d6db8c2c..8b8d5c93b84 100644 --- a/src/wasm/wasm-validator.cpp +++ b/src/wasm/wasm-validator.cpp @@ -1578,15 +1578,15 @@ void FunctionValidator::visitSIMDShuffle(SIMDShuffle* curr) { void FunctionValidator::visitSIMDTernary(SIMDTernary* curr) { FeatureSet required = FeatureSet::None; switch (curr->op) { - case LaneselectI8x16: - case LaneselectI16x8: - case LaneselectI32x4: - case LaneselectI64x2: + case RelaxedLaneselectI8x16: + case RelaxedLaneselectI16x8: + case RelaxedLaneselectI32x4: + case RelaxedLaneselectI64x2: case RelaxedMaddVecF32x4: case RelaxedNmaddVecF32x4: case RelaxedMaddVecF64x2: case RelaxedNmaddVecF64x2: - case DotI8x16I7x16AddSToVecI32x4: + case RelaxedDotI8x16I7x16AddSToVecI32x4: required |= FeatureSet::RelaxedSIMD | FeatureSet::SIMD; break; case MaddVecF16x8: @@ -2094,7 +2094,7 @@ void FunctionValidator::visitBinary(Binary* curr) { case SwizzleVecI8x16: case RelaxedSwizzleVecI8x16: case RelaxedQ15MulrSVecI16x8: - case DotI8x16I7x16SToVecI16x8: { + case RelaxedDotI8x16I7x16SToVecI16x8: { shouldBeEqualOrFirstIsUnreachable( curr->left->type, Type(Type::v128), curr, "v128 op"); shouldBeEqualOrFirstIsUnreachable( diff --git a/test/example/c-api-kitchen-sink.c b/test/example/c-api-kitchen-sink.c index e046b942303..039fa1ee06d 100644 --- a/test/example/c-api-kitchen-sink.c +++ b/test/example/c-api-kitchen-sink.c @@ -856,7 +856,7 @@ void test_core() { makeBinary(module, BinaryenRelaxedMinVecF64x2(), v128), makeBinary(module, BinaryenRelaxedMaxVecF64x2(), v128), makeBinary(module, BinaryenRelaxedQ15MulrSVecI16x8(), v128), - makeBinary(module, BinaryenDotI8x16I7x16SToVecI16x8(), v128), + makeBinary(module, BinaryenRelaxedDotI8x16I7x16SToVecI16x8(), v128), // SIMD lane manipulation makeSIMDExtract(module, BinaryenExtractLaneSVecI8x16()), makeSIMDExtract(module, BinaryenExtractLaneUVecI8x16()), @@ -982,11 +982,11 @@ void test_core() { makeSIMDTernary(module, BinaryenRelaxedNmaddVecF32x4()), makeSIMDTernary(module, BinaryenRelaxedMaddVecF64x2()), makeSIMDTernary(module, BinaryenRelaxedNmaddVecF64x2()), - makeSIMDTernary(module, BinaryenLaneselectI8x16()), - makeSIMDTernary(module, BinaryenLaneselectI16x8()), - makeSIMDTernary(module, BinaryenLaneselectI32x4()), - makeSIMDTernary(module, BinaryenLaneselectI64x2()), - makeSIMDTernary(module, BinaryenDotI8x16I7x16AddSToVecI32x4()), + makeSIMDTernary(module, BinaryenRelaxedLaneselectI8x16()), + makeSIMDTernary(module, BinaryenRelaxedLaneselectI16x8()), + makeSIMDTernary(module, BinaryenRelaxedLaneselectI32x4()), + makeSIMDTernary(module, BinaryenRelaxedLaneselectI64x2()), + makeSIMDTernary(module, BinaryenRelaxedDotI8x16I7x16AddSToVecI32x4()), // Bulk memory makeMemoryInit(module), makeDataDrop(module), diff --git a/test/example/c-api-kitchen-sink.txt b/test/example/c-api-kitchen-sink.txt index cf66a4cba9b..7107935de14 100644 --- a/test/example/c-api-kitchen-sink.txt +++ b/test/example/c-api-kitchen-sink.txt @@ -1627,7 +1627,7 @@ BinaryenFeatureAll: 67108863 ) ) (drop - (i16x8.dot_i8x16_i7x16_s + (i16x8.relaxed_dot_i8x16_i7x16_s (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d) (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d) ) @@ -1922,35 +1922,35 @@ BinaryenFeatureAll: 67108863 ) ) (drop - (i8x16.laneselect + (i8x16.relaxed_laneselect (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d) (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d) (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d) ) ) (drop - (i16x8.laneselect + (i16x8.relaxed_laneselect (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d) (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d) (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d) ) ) (drop - (i32x4.laneselect + (i32x4.relaxed_laneselect (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d) (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d) (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d) ) ) (drop - (i64x2.laneselect + (i64x2.relaxed_laneselect (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d) (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d) (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d) ) ) (drop - (i32x4.dot_i8x16_i7x16_add_s + (i32x4.relaxed_dot_i8x16_i7x16_add_s (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d) (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d) (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d) diff --git a/test/lit/basic/relaxed-simd.wast b/test/lit/basic/relaxed-simd.wast index 1624d18b4d8..fcecba768c6 100644 --- a/test/lit/basic/relaxed-simd.wast +++ b/test/lit/basic/relaxed-simd.wast @@ -199,88 +199,88 @@ ) ) - ;; CHECK-TEXT: (func $i8x16.laneselect (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) - ;; CHECK-TEXT-NEXT: (i8x16.laneselect + ;; CHECK-TEXT: (func $i8x16.relaxed_laneselect (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) + ;; CHECK-TEXT-NEXT: (i8x16.relaxed_laneselect ;; CHECK-TEXT-NEXT: (local.get $0) ;; CHECK-TEXT-NEXT: (local.get $1) ;; CHECK-TEXT-NEXT: (local.get $2) ;; CHECK-TEXT-NEXT: ) ;; CHECK-TEXT-NEXT: ) - ;; CHECK-BIN: (func $i8x16.laneselect (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) - ;; CHECK-BIN-NEXT: (i8x16.laneselect + ;; CHECK-BIN: (func $i8x16.relaxed_laneselect (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) + ;; CHECK-BIN-NEXT: (i8x16.relaxed_laneselect ;; CHECK-BIN-NEXT: (local.get $0) ;; CHECK-BIN-NEXT: (local.get $1) ;; CHECK-BIN-NEXT: (local.get $2) ;; CHECK-BIN-NEXT: ) ;; CHECK-BIN-NEXT: ) - (func $i8x16.laneselect (param $0 v128) (param $1 v128) (param $2 v128) (result v128) - (i8x16.laneselect + (func $i8x16.relaxed_laneselect (param $0 v128) (param $1 v128) (param $2 v128) (result v128) + (i8x16.relaxed_laneselect (local.get $0) (local.get $1) (local.get $2) ) ) - ;; CHECK-TEXT: (func $i16x8.laneselect (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) - ;; CHECK-TEXT-NEXT: (i16x8.laneselect + ;; CHECK-TEXT: (func $i16x8.relaxed_laneselect (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) + ;; CHECK-TEXT-NEXT: (i16x8.relaxed_laneselect ;; CHECK-TEXT-NEXT: (local.get $0) ;; CHECK-TEXT-NEXT: (local.get $1) ;; CHECK-TEXT-NEXT: (local.get $2) ;; CHECK-TEXT-NEXT: ) ;; CHECK-TEXT-NEXT: ) - ;; CHECK-BIN: (func $i16x8.laneselect (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) - ;; CHECK-BIN-NEXT: (i16x8.laneselect + ;; CHECK-BIN: (func $i16x8.relaxed_laneselect (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) + ;; CHECK-BIN-NEXT: (i16x8.relaxed_laneselect ;; CHECK-BIN-NEXT: (local.get $0) ;; CHECK-BIN-NEXT: (local.get $1) ;; CHECK-BIN-NEXT: (local.get $2) ;; CHECK-BIN-NEXT: ) ;; CHECK-BIN-NEXT: ) - (func $i16x8.laneselect (param $0 v128) (param $1 v128) (param $2 v128) (result v128) - (i16x8.laneselect + (func $i16x8.relaxed_laneselect (param $0 v128) (param $1 v128) (param $2 v128) (result v128) + (i16x8.relaxed_laneselect (local.get $0) (local.get $1) (local.get $2) ) ) - ;; CHECK-TEXT: (func $i32x4.laneselect (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) - ;; CHECK-TEXT-NEXT: (i32x4.laneselect + ;; CHECK-TEXT: (func $i32x4.relaxed_laneselect (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) + ;; CHECK-TEXT-NEXT: (i32x4.relaxed_laneselect ;; CHECK-TEXT-NEXT: (local.get $0) ;; CHECK-TEXT-NEXT: (local.get $1) ;; CHECK-TEXT-NEXT: (local.get $2) ;; CHECK-TEXT-NEXT: ) ;; CHECK-TEXT-NEXT: ) - ;; CHECK-BIN: (func $i32x4.laneselect (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) - ;; CHECK-BIN-NEXT: (i32x4.laneselect + ;; CHECK-BIN: (func $i32x4.relaxed_laneselect (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) + ;; CHECK-BIN-NEXT: (i32x4.relaxed_laneselect ;; CHECK-BIN-NEXT: (local.get $0) ;; CHECK-BIN-NEXT: (local.get $1) ;; CHECK-BIN-NEXT: (local.get $2) ;; CHECK-BIN-NEXT: ) ;; CHECK-BIN-NEXT: ) - (func $i32x4.laneselect (param $0 v128) (param $1 v128) (param $2 v128) (result v128) - (i32x4.laneselect + (func $i32x4.relaxed_laneselect (param $0 v128) (param $1 v128) (param $2 v128) (result v128) + (i32x4.relaxed_laneselect (local.get $0) (local.get $1) (local.get $2) ) ) - ;; CHECK-TEXT: (func $i64x2.laneselect (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) - ;; CHECK-TEXT-NEXT: (i64x2.laneselect + ;; CHECK-TEXT: (func $i64x2.relaxed_laneselect (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) + ;; CHECK-TEXT-NEXT: (i64x2.relaxed_laneselect ;; CHECK-TEXT-NEXT: (local.get $0) ;; CHECK-TEXT-NEXT: (local.get $1) ;; CHECK-TEXT-NEXT: (local.get $2) ;; CHECK-TEXT-NEXT: ) ;; CHECK-TEXT-NEXT: ) - ;; CHECK-BIN: (func $i64x2.laneselect (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) - ;; CHECK-BIN-NEXT: (i64x2.laneselect + ;; CHECK-BIN: (func $i64x2.relaxed_laneselect (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) + ;; CHECK-BIN-NEXT: (i64x2.relaxed_laneselect ;; CHECK-BIN-NEXT: (local.get $0) ;; CHECK-BIN-NEXT: (local.get $1) ;; CHECK-BIN-NEXT: (local.get $2) ;; CHECK-BIN-NEXT: ) ;; CHECK-BIN-NEXT: ) - (func $i64x2.laneselect (param $0 v128) (param $1 v128) (param $2 v128) (result v128) - (i64x2.laneselect + (func $i64x2.relaxed_laneselect (param $0 v128) (param $1 v128) (param $2 v128) (result v128) + (i64x2.relaxed_laneselect (local.get $0) (local.get $1) (local.get $2) @@ -382,41 +382,41 @@ ) ) - ;; CHECK-TEXT: (func $i16x8.dot_i8x16_i7x16_s (type $1) (param $0 v128) (param $1 v128) (result v128) - ;; CHECK-TEXT-NEXT: (i16x8.dot_i8x16_i7x16_s + ;; CHECK-TEXT: (func $i16x8.relaxed_dot_i8x16_i7x16_s (type $1) (param $0 v128) (param $1 v128) (result v128) + ;; CHECK-TEXT-NEXT: (i16x8.relaxed_dot_i8x16_i7x16_s ;; CHECK-TEXT-NEXT: (local.get $0) ;; CHECK-TEXT-NEXT: (local.get $1) ;; CHECK-TEXT-NEXT: ) ;; CHECK-TEXT-NEXT: ) - ;; CHECK-BIN: (func $i16x8.dot_i8x16_i7x16_s (type $1) (param $0 v128) (param $1 v128) (result v128) - ;; CHECK-BIN-NEXT: (i16x8.dot_i8x16_i7x16_s + ;; CHECK-BIN: (func $i16x8.relaxed_dot_i8x16_i7x16_s (type $1) (param $0 v128) (param $1 v128) (result v128) + ;; CHECK-BIN-NEXT: (i16x8.relaxed_dot_i8x16_i7x16_s ;; CHECK-BIN-NEXT: (local.get $0) ;; CHECK-BIN-NEXT: (local.get $1) ;; CHECK-BIN-NEXT: ) ;; CHECK-BIN-NEXT: ) - (func $i16x8.dot_i8x16_i7x16_s (param $0 v128) (param $1 v128) (result v128) - (i16x8.dot_i8x16_i7x16_s + (func $i16x8.relaxed_dot_i8x16_i7x16_s (param $0 v128) (param $1 v128) (result v128) + (i16x8.relaxed_dot_i8x16_i7x16_s (local.get $0) (local.get $1) ) ) -;; CHECK-TEXT: (func $i32x4.dot_i8x16_i7x16_add_s (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) -;; CHECK-TEXT-NEXT: (i32x4.dot_i8x16_i7x16_add_s +;; CHECK-TEXT: (func $i32x4.relaxed_dot_i8x16_i7x16_add_s (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) +;; CHECK-TEXT-NEXT: (i32x4.relaxed_dot_i8x16_i7x16_add_s ;; CHECK-TEXT-NEXT: (local.get $0) ;; CHECK-TEXT-NEXT: (local.get $1) ;; CHECK-TEXT-NEXT: (local.get $2) ;; CHECK-TEXT-NEXT: ) ;; CHECK-TEXT-NEXT: ) -;; CHECK-BIN: (func $i32x4.dot_i8x16_i7x16_add_s (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) -;; CHECK-BIN-NEXT: (i32x4.dot_i8x16_i7x16_add_s +;; CHECK-BIN: (func $i32x4.relaxed_dot_i8x16_i7x16_add_s (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) +;; CHECK-BIN-NEXT: (i32x4.relaxed_dot_i8x16_i7x16_add_s ;; CHECK-BIN-NEXT: (local.get $0) ;; CHECK-BIN-NEXT: (local.get $1) ;; CHECK-BIN-NEXT: (local.get $2) ;; CHECK-BIN-NEXT: ) ;; CHECK-BIN-NEXT: ) -(func $i32x4.dot_i8x16_i7x16_add_s (param $0 v128) (param $1 v128) (param $2 v128) (result v128) - (i32x4.dot_i8x16_i7x16_add_s +(func $i32x4.relaxed_dot_i8x16_i7x16_add_s (param $0 v128) (param $1 v128) (param $2 v128) (result v128) + (i32x4.relaxed_dot_i8x16_i7x16_add_s (local.get $0) (local.get $1) (local.get $2) @@ -495,7 +495,7 @@ ;; CHECK-BIN-NODEBUG-NEXT: ) ;; CHECK-BIN-NODEBUG: (func $9 (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) -;; CHECK-BIN-NODEBUG-NEXT: (i8x16.laneselect +;; CHECK-BIN-NODEBUG-NEXT: (i8x16.relaxed_laneselect ;; CHECK-BIN-NODEBUG-NEXT: (local.get $0) ;; CHECK-BIN-NODEBUG-NEXT: (local.get $1) ;; CHECK-BIN-NODEBUG-NEXT: (local.get $2) @@ -503,7 +503,7 @@ ;; CHECK-BIN-NODEBUG-NEXT: ) ;; CHECK-BIN-NODEBUG: (func $10 (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) -;; CHECK-BIN-NODEBUG-NEXT: (i16x8.laneselect +;; CHECK-BIN-NODEBUG-NEXT: (i16x8.relaxed_laneselect ;; CHECK-BIN-NODEBUG-NEXT: (local.get $0) ;; CHECK-BIN-NODEBUG-NEXT: (local.get $1) ;; CHECK-BIN-NODEBUG-NEXT: (local.get $2) @@ -511,7 +511,7 @@ ;; CHECK-BIN-NODEBUG-NEXT: ) ;; CHECK-BIN-NODEBUG: (func $11 (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) -;; CHECK-BIN-NODEBUG-NEXT: (i32x4.laneselect +;; CHECK-BIN-NODEBUG-NEXT: (i32x4.relaxed_laneselect ;; CHECK-BIN-NODEBUG-NEXT: (local.get $0) ;; CHECK-BIN-NODEBUG-NEXT: (local.get $1) ;; CHECK-BIN-NODEBUG-NEXT: (local.get $2) @@ -519,7 +519,7 @@ ;; CHECK-BIN-NODEBUG-NEXT: ) ;; CHECK-BIN-NODEBUG: (func $12 (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) -;; CHECK-BIN-NODEBUG-NEXT: (i64x2.laneselect +;; CHECK-BIN-NODEBUG-NEXT: (i64x2.relaxed_laneselect ;; CHECK-BIN-NODEBUG-NEXT: (local.get $0) ;; CHECK-BIN-NODEBUG-NEXT: (local.get $1) ;; CHECK-BIN-NODEBUG-NEXT: (local.get $2) @@ -562,14 +562,14 @@ ;; CHECK-BIN-NODEBUG-NEXT: ) ;; CHECK-BIN-NODEBUG: (func $18 (type $1) (param $0 v128) (param $1 v128) (result v128) -;; CHECK-BIN-NODEBUG-NEXT: (i16x8.dot_i8x16_i7x16_s +;; CHECK-BIN-NODEBUG-NEXT: (i16x8.relaxed_dot_i8x16_i7x16_s ;; CHECK-BIN-NODEBUG-NEXT: (local.get $0) ;; CHECK-BIN-NODEBUG-NEXT: (local.get $1) ;; CHECK-BIN-NODEBUG-NEXT: ) ;; CHECK-BIN-NODEBUG-NEXT: ) ;; CHECK-BIN-NODEBUG: (func $19 (type $0) (param $0 v128) (param $1 v128) (param $2 v128) (result v128) -;; CHECK-BIN-NODEBUG-NEXT: (i32x4.dot_i8x16_i7x16_add_s +;; CHECK-BIN-NODEBUG-NEXT: (i32x4.relaxed_dot_i8x16_i7x16_add_s ;; CHECK-BIN-NODEBUG-NEXT: (local.get $0) ;; CHECK-BIN-NODEBUG-NEXT: (local.get $1) ;; CHECK-BIN-NODEBUG-NEXT: (local.get $2) diff --git a/test/lit/exec/relaxed.wast b/test/lit/exec/relaxed.wast index f78d11c125a..664a7141afc 100644 --- a/test/lit/exec/relaxed.wast +++ b/test/lit/exec/relaxed.wast @@ -5,15 +5,15 @@ (module (import "fuzzing-support" "log-i32" (func $log (param i32))) - ;; CHECK: [fuzz-exec] export i32x4.dot_i8x16_i7x16_add_s + ;; CHECK: [fuzz-exec] export i32x4.relaxed_dot_i8x16_i7x16_add_s ;; CHECK-NEXT: [LoggingExternalInterface logging 8] ;; CHECK-NEXT: [LoggingExternalInterface logging 14] ;; CHECK-NEXT: [LoggingExternalInterface logging 22] ;; CHECK-NEXT: [LoggingExternalInterface logging 32] - (func $i32x4.dot_i8x16_i7x16_add_s (export "i32x4.dot_i8x16_i7x16_add_s") + (func $i32x4.relaxed_dot_i8x16_i7x16_add_s (export "i32x4.relaxed_dot_i8x16_i7x16_add_s") (local $v v128) (local.set $v - (i32x4.dot_i8x16_i7x16_add_s + (i32x4.relaxed_dot_i8x16_i7x16_add_s (v128.const i32x4 0 1 2 3) (v128.const i32x4 4 5 6 7) (v128.const i32x4 8 9 10 11) diff --git a/test/lit/passes/remove-relaxed-simd.wast b/test/lit/passes/remove-relaxed-simd.wast index 045a4a190a9..93f68abcda4 100644 --- a/test/lit/passes/remove-relaxed-simd.wast +++ b/test/lit/passes/remove-relaxed-simd.wast @@ -91,7 +91,7 @@ (drop (f64x2.relaxed_min (local.get 0) (local.get 1))) (drop (f64x2.relaxed_max (local.get 0) (local.get 1))) (drop (i16x8.relaxed_q15mulr_s (local.get 0) (local.get 1))) - (drop (i16x8.dot_i8x16_i7x16_s (local.get 0) (local.get 1))) + (drop (i16x8.relaxed_dot_i8x16_i7x16_s (local.get 0) (local.get 1))) ;; Normal SIMD instruction (drop (v128.xor (local.get 0) (local.get 1))) ) @@ -131,7 +131,7 @@ ;; CHECK-NEXT: ) ;; CHECK-NEXT: ) (func $ternary (param v128 v128 v128) - (drop (i32x4.dot_i8x16_i7x16_add_s (local.get 0) (local.get 1) (local.get 2))) + (drop (i32x4.relaxed_dot_i8x16_i7x16_add_s (local.get 0) (local.get 1) (local.get 2))) (drop (f32x4.relaxed_madd (local.get 0) (local.get 1) (local.get 2))) (drop (f32x4.relaxed_nmadd (local.get 0) (local.get 1) (local.get 2))) (drop (f64x2.relaxed_madd (local.get 0) (local.get 1) (local.get 2))) diff --git a/test/spec/dot_product.wast b/test/spec/dot_product.wast index ff512bb855b..43330e9853a 100644 --- a/test/spec/dot_product.wast +++ b/test/spec/dot_product.wast @@ -6,27 +6,27 @@ ;; test). (module - (func (export "i16x8.dot_i8x16_i7x16_s") (param v128 v128) (result v128) (i16x8.dot_i8x16_i7x16_s (local.get 0) (local.get 1))) - (func (export "i32x4.dot_i8x16_i7x16_add_s") (param v128 v128 v128) (result v128) (i32x4.dot_i8x16_i7x16_add_s (local.get 0) (local.get 1) (local.get 2))) + (func (export "i16x8.relaxed_dot_i8x16_i7x16_s") (param v128 v128) (result v128) (i16x8.relaxed_dot_i8x16_i7x16_s (local.get 0) (local.get 1))) + (func (export "i32x4.relaxed_dot_i8x16_i7x16_add_s") (param v128 v128 v128) (result v128) (i32x4.relaxed_dot_i8x16_i7x16_add_s (local.get 0) (local.get 1) (local.get 2))) - (func (export "i16x8.dot_i8x16_i7x16_s_cmp") (param v128 v128) (result v128) + (func (export "i16x8.relaxed_dot_i8x16_i7x16_s_cmp") (param v128 v128) (result v128) (i16x8.eq - (i16x8.dot_i8x16_i7x16_s (local.get 0) (local.get 1)) - (i16x8.dot_i8x16_i7x16_s (local.get 0) (local.get 1)))) - (func (export "i32x4.dot_i8x16_i7x16_add_s_cmp") (param v128 v128 v128) (result v128) + (i16x8.relaxed_dot_i8x16_i7x16_s (local.get 0) (local.get 1)) + (i16x8.relaxed_dot_i8x16_i7x16_s (local.get 0) (local.get 1)))) + (func (export "i32x4.relaxed_dot_i8x16_i7x16_add_s_cmp") (param v128 v128 v128) (result v128) (i16x8.eq - (i32x4.dot_i8x16_i7x16_add_s (local.get 0) (local.get 1) (local.get 2)) - (i32x4.dot_i8x16_i7x16_add_s (local.get 0) (local.get 1) (local.get 2)))) + (i32x4.relaxed_dot_i8x16_i7x16_add_s (local.get 0) (local.get 1) (local.get 2)) + (i32x4.relaxed_dot_i8x16_i7x16_add_s (local.get 0) (local.get 1) (local.get 2)))) ) ;; Simple values to ensure things are functional. -(assert_return (invoke "i16x8.dot_i8x16_i7x16_s" +(assert_return (invoke "i16x8.relaxed_dot_i8x16_i7x16_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15)) (v128.const i16x8 1 13 41 85 145 221 313 421)) ;; Test max and min i8 values; -(assert_return (invoke "i16x8.dot_i8x16_i7x16_s" +(assert_return (invoke "i16x8.relaxed_dot_i8x16_i7x16_s" (v128.const i8x16 -128 -128 127 127 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 127 127 127 127 0 0 0 0 0 0 0 0 0 0 0 0)) (v128.const i16x8 -32512 32258 0 0 0 0 0 0)) @@ -34,13 +34,13 @@ ;; signed * unsigned : -128 * 129 * 2 = -33,024 saturated to -32,768 ;; signed * signed : -128 * -127 * 2 = 32,512 ;; unsigned * unsigned : 128 * 129 * 2 = 33,024 -(assert_return (invoke "i16x8.dot_i8x16_i7x16_s" +(assert_return (invoke "i16x8.relaxed_dot_i8x16_i7x16_s" (v128.const i8x16 -128 -128 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 -127 -127 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (v128.const i16x8 32512 0 0 0 0 0 0 0)) ;; Simple values to ensure things are functional. -(assert_return (invoke "i32x4.dot_i8x16_i7x16_add_s" +(assert_return (invoke "i32x4.relaxed_dot_i8x16_i7x16_add_s" (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) (v128.const i8x16 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15) (v128.const i32x4 0 1 2 3)) @@ -48,7 +48,7 @@ (v128.const i32x4 14 127 368 737)) ;; Test max and min i8 values; -(assert_return (invoke "i32x4.dot_i8x16_i7x16_add_s" +(assert_return (invoke "i32x4.relaxed_dot_i8x16_i7x16_add_s" (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 0 0 0 0 0 0 0 0) (v128.const i8x16 127 127 127 127 127 127 127 127 0 0 0 0 0 0 0 0) (v128.const i32x4 1 2 3 4)) @@ -61,7 +61,7 @@ ;; -32768 + -32768 = -65536 (+ 1) ;; signed * signed : -128 * -127 * 4 = 65,024 (+ 1) ;; unsigned * unsigned : 128 * 129 * 2 = 66,048 (+ 1) -(assert_return (invoke "i32x4.dot_i8x16_i7x16_add_s" +(assert_return (invoke "i32x4.relaxed_dot_i8x16_i7x16_add_s" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 -127 -127 -127 -127 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i32x4 1 2 3 4)) @@ -70,13 +70,13 @@ ;; Check that multiple calls to the relaxed instruction with same inputs returns same results. ;; Test max and min i8 values; -(assert_return (invoke "i16x8.dot_i8x16_i7x16_s_cmp" +(assert_return (invoke "i16x8.relaxed_dot_i8x16_i7x16_s_cmp" (v128.const i8x16 -128 -128 127 127 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 127 127 127 127 0 0 0 0 0 0 0 0 0 0 0 0)) (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) ;; Test max and min i8 values; -(assert_return (invoke "i32x4.dot_i8x16_i7x16_add_s_cmp" +(assert_return (invoke "i32x4.relaxed_dot_i8x16_i7x16_add_s_cmp" (v128.const i8x16 -128 -128 -128 -128 127 127 127 127 0 0 0 0 0 0 0 0) (v128.const i8x16 127 127 127 127 127 127 127 127 0 0 0 0 0 0 0 0) (v128.const i32x4 1 2 3 4)) @@ -86,7 +86,7 @@ ;; signed * unsigned : -128 * 129 * 2 = -33,024 saturated to -32,768 ;; signed * signed : -128 * -127 * 2 = 32,512 ;; unsigned * unsigned : 128 * 129 * 2 = 33,024 -(assert_return (invoke "i16x8.dot_i8x16_i7x16_s_cmp" +(assert_return (invoke "i16x8.relaxed_dot_i8x16_i7x16_s_cmp" (v128.const i8x16 -128 -128 0 0 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 -127 -127 0 0 0 0 0 0 0 0 0 0 0 0 0 0)) (v128.const i16x8 -1 -1 -1 -1 -1 -1 -1 -1)) @@ -97,7 +97,7 @@ ;; -32768 + -32768 = -65536 (+ 1) ;; signed * signed : -128 * -127 * 4 = 65,024 (+ 1) ;; unsigned * unsigned : 128 * 129 * 2 = 66,048 (+ 1) -(assert_return (invoke "i32x4.dot_i8x16_i7x16_add_s_cmp" +(assert_return (invoke "i32x4.relaxed_dot_i8x16_i7x16_add_s_cmp" (v128.const i8x16 -128 -128 -128 -128 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i8x16 -127 -127 -127 -127 0 0 0 0 0 0 0 0 0 0 0 0) (v128.const i32x4 1 2 3 4))