top_level.twr

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Release 14.7 Trace  (nt64)
Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.

C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64\unwrapped\trce.exe -intstyle ise -v 3 -s 3
-n 3 -fastpaths -xml top_level.twx top_level.ncd -o top_level.twr top_level.pcf
-ucf Nexys3_master.ucf

Design file:              top_level.ncd
Physical constraint file: top_level.pcf
Device,package,speed:     xc6slx16,csg324,C,-3 (PRODUCTION 1.23 2013-10-13)
Report level:             verbose report

Environment Variable      Effect 
--------------------      ------ 
NONE                      No environment variables were set
--------------------------------------------------------------------------------

INFO:Timing:2698 - No timing constraints found, doing default enumeration.
INFO:Timing:3412 - To improve timing, see the Timing Closure User Guide (UG612).
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths 
   option. All paths that are not constrained will be reported in the 
   unconstrained paths section(s) of the report.
INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on 
   a 50 Ohm transmission line loading model.  For the details of this model, 
   and for more information on accounting for different loading conditions, 
   please see the device datasheet.



Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)

Setup/Hold to clock Clk
------------+------------+------------+------------+------------+------------------+--------+
            |Max Setup to|  Process   |Max Hold to |  Process   |                  | Clock  |
Source      | clk (edge) |   Corner   | clk (edge) |   Corner   |Internal Clock(s) | Phase  |
------------+------------+------------+------------+------------+------------------+--------+
paused      |    8.837(R)|      SLOW  |   -2.384(R)|      FAST  |pixel_clk         |   0.000|
reset       |    7.333(R)|      SLOW  |   -1.385(R)|      FAST  |pixel_clk         |   0.000|
------------+------------+------------+------------+------------+------------------+--------+

Setup/Hold to clock PS2KeyboardClock
---------------+------------+------------+------------+------------+----------------------+--------+
               |Max Setup to|  Process   |Max Hold to |  Process   |                      | Clock  |
Source         | clk (edge) |   Corner   | clk (edge) |   Corner   |Internal Clock(s)     | Phase  |
---------------+------------+------------+------------+------------+----------------------+--------+
PS2KeyboardData|    2.174(F)|      SLOW  |   -0.423(F)|      SLOW  |PS2KeyboardClock_BUFGP|   0.000|
---------------+------------+------------+------------+------------+----------------------+--------+

Clock Clk to Pad
------------+-----------------+------------+-----------------+------------+------------------+--------+
            |Max (slowest) clk|  Process   |Min (fastest) clk|  Process   |                  | Clock  |
Destination |  (edge) to PAD  |   Corner   |  (edge) to PAD  |   Corner   |Internal Clock(s) | Phase  |
------------+-----------------+------------+-----------------+------------+------------------+--------+
HS          |         6.482(R)|      SLOW  |         3.973(R)|      FAST  |pixel_clk         |   0.000|
VS          |         6.413(R)|      SLOW  |         3.940(R)|      FAST  |pixel_clk         |   0.000|
rgb<0>      |        20.406(R)|      SLOW  |         6.029(R)|      FAST  |pixel_clk         |   0.000|
rgb<1>      |        20.703(R)|      SLOW  |         6.312(R)|      FAST  |pixel_clk         |   0.000|
rgb<2>      |        20.511(R)|      SLOW  |         6.126(R)|      FAST  |pixel_clk         |   0.000|
rgb<3>      |        20.400(R)|      SLOW  |         6.229(R)|      FAST  |pixel_clk         |   0.000|
rgb<4>      |        20.379(R)|      SLOW  |         6.205(R)|      FAST  |pixel_clk         |   0.000|
rgb<5>      |        20.143(R)|      SLOW  |         6.188(R)|      FAST  |pixel_clk         |   0.000|
rgb<6>      |        20.083(R)|      SLOW  |         6.161(R)|      FAST  |pixel_clk         |   0.000|
rgb<7>      |        20.220(R)|      SLOW  |         6.232(R)|      FAST  |pixel_clk         |   0.000|
------------+-----------------+------------+-----------------+------------+------------------+--------+

Clock to Setup on destination clock Clk
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
Clk            |   64.370|         |         |         |
---------------+---------+---------+---------+---------+

Clock to Setup on destination clock PS2KeyboardClock
----------------+---------+---------+---------+---------+
                | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock    |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
----------------+---------+---------+---------+---------+
PS2KeyboardClock|         |         |         |    3.369|
----------------+---------+---------+---------+---------+


Analysis completed Tue May 15 22:14:32 2018 
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Trace Settings:
-------------------------
Trace Settings 

Peak Memory Usage: 377 MB