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[RFC] Batch-Invariant RL Kernel Suite for Train-Inference Consistency #101
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component: kernelsTasks involving the development of CUDA and Triton underlying operatorsTasks involving the development of CUDA and Triton underlying operatorscomponent: testingAdd test cases and benchmark-related tasksAdd test cases and benchmark-related tasksfeatureplatform: cudaSpecific optimizations or bugs in NVIDIA graphics cards (such as FlashInfer, TMA optimizations)Specific optimizations or bugs in NVIDIA graphics cards (such as FlashInfer, TMA optimizations)platform: rocmSpecific tasks specific to AMD graphics cards (such as CK, bpreshuffle/FA)Specific tasks specific to AMD graphics cards (such as CK, bpreshuffle/FA)platform: tritonCross-platform Triton kernel related tasksCross-platform Triton kernel related taskspriority: highSevere congestion issues require the highest priority for resolution.Severe congestion issues require the highest priority for resolution.type: designIssues requiring in-depth discussion of architecture designIssues requiring in-depth discussion of architecture design
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component: kernelsTasks involving the development of CUDA and Triton underlying operatorsTasks involving the development of CUDA and Triton underlying operatorscomponent: testingAdd test cases and benchmark-related tasksAdd test cases and benchmark-related tasksfeatureplatform: cudaSpecific optimizations or bugs in NVIDIA graphics cards (such as FlashInfer, TMA optimizations)Specific optimizations or bugs in NVIDIA graphics cards (such as FlashInfer, TMA optimizations)platform: rocmSpecific tasks specific to AMD graphics cards (such as CK, bpreshuffle/FA)Specific tasks specific to AMD graphics cards (such as CK, bpreshuffle/FA)platform: tritonCross-platform Triton kernel related tasksCross-platform Triton kernel related taskspriority: highSevere congestion issues require the highest priority for resolution.Severe congestion issues require the highest priority for resolution.type: designIssues requiring in-depth discussion of architecture designIssues requiring in-depth discussion of architecture design
This RFC defines the batch-invariance contract for RL-Kernel's train-inference consistency suite.
The target identity is:
This is the P0.3 roadmap item from #83. It is broader than the CUDA deterministic logprob kernel in #96: #96 is one concrete operator path, while this RFC should define the cross-kernel and cross-engine contract that rollout and training backends must satisfy.
Problem
RL rollout and training rarely execute the same sequence in the same shape:
Small logprob drift can be amplified by GRPO/PPO ratio and KL terms. The suite should make drift visible and locate whether it comes from logprob reduction, attention/prefix reuse, packing layout, TP reduction, dtype rounding, or engine integration.
Scope
Define the expected invariance contract for the same logical sequence across:
Questions To Resolve
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