diff --git a/.github/workflows/build-artifacts.yml b/.github/workflows/build-artifacts.yml index 114e5c71..8ce02198 100644 --- a/.github/workflows/build-artifacts.yml +++ b/.github/workflows/build-artifacts.yml @@ -87,6 +87,60 @@ jobs: --clean --build-type Release + # Simulator smoke tests (Tools/tests/run_sim_smoke.sh). Linux leg only: + # the harness is bash+python3 and the ngspice backend dlopens + # libngspice.so, so the Windows/macOS legs cannot run these parts. + # Each part reuses the host tools built above (build/bin/RTECodeEmitter, + # build/bin/rte) — the script rebuilds them if missing. Locally the same + # script runs from any cwd with no args and covers all six parts, + # including ngspice against a locally installed libngspice. + - name: HostSim simulator smoke + if: runner.os == 'Linux' + shell: bash + run: Tools/tests/run_sim_smoke.sh --only hostsim + + # ngspice backend smoke: the dev package provides the libngspice.so + # linker name that host_sim dlopens first (plus the libngspice0 runtime + # as a dependency). The run also asserts a wall-time ceiling that guards + # against the old O(n^2) resume regression. + - name: Install ngspice + if: runner.os == 'Linux' + shell: bash + run: sudo apt-get update && sudo apt-get install -y libngspice0-dev + + - name: HostSim ngspice-backend smoke + if: runner.os == 'Linux' + shell: bash + run: Tools/tests/run_sim_smoke.sh --only ngspice + + # Machine/plant coverage: salient PMSM field-lock and the induction + # machine under V/Hz (slip bounds), plus DC/DC mode — three-leg sync + # buck to separate buses and the paralleled variant (bus voltage + # tracks duty x Vdc within 5%). + - name: HostSim machine-plant smoke + if: runner.os == 'Linux' + shell: bash + run: Tools/tests/run_sim_smoke.sh --only plants + + - name: HostSim dcdc-mode smoke + if: runner.os == 'Linux' + shell: bash + run: Tools/tests/run_sim_smoke.sh --only dcdc + + # HostSIL: builds Images/HostSIL (real Gen6FW app on the host shims) + # and validates the sil_foc_demo trace with scripts/validate_trace.py. + # The `rte sim` part reuses the emitted host_sim tree from the hostsim + # smoke step (rebuilt inside this job if it is absent). + - name: HostSIL firmware-in-the-loop smoke + if: runner.os == 'Linux' + shell: bash + run: Tools/tests/run_sim_smoke.sh --only hostsil + + - name: rte sim CLI smoke + if: runner.os == 'Linux' + shell: bash + run: Tools/tests/run_sim_smoke.sh --only rte + - name: Stage portable install shell: bash run: cmake --install build --prefix "${{ github.workspace }}/stage" diff --git a/Assets/Examples/can_bus_demo.json b/Assets/Examples/can_bus_demo.json new file mode 100644 index 00000000..7559a8a0 --- /dev/null +++ b/Assets/Examples/can_bus_demo.json @@ -0,0 +1,813 @@ +{ + "bridges": [], + "connections": [ + { + "id": "c_role_router", + "from": { + "nodeId": "Role", + "portName": "Value" + }, + "to": { + "nodeId": "RoleRouter", + "portName": "Role" + } + }, + { + "id": "c_period_wave", + "from": { + "nodeId": "TxPeriod", + "portName": "Value" + }, + "to": { + "nodeId": "TxWave", + "portName": "PeriodS" + } + }, + { + "id": "c_txid", + "from": { + "nodeId": "RoleRouter", + "portName": "TxId" + }, + "to": { + "nodeId": "CanTx", + "portName": "Id" + } + }, + { + "id": "c_rxid", + "from": { + "nodeId": "RoleRouter", + "portName": "RxId" + }, + "to": { + "nodeId": "CanRx", + "portName": "Id" + } + }, + { + "id": "c_wave_d0", + "from": { + "nodeId": "TxWave", + "portName": "Value" + }, + "to": { + "nodeId": "CanTx", + "portName": "D0" + } + }, + { + "id": "c_role_d1", + "from": { + "nodeId": "Role", + "portName": "Value" + }, + "to": { + "nodeId": "CanTx", + "portName": "D1" + } + }, + { + "id": "c_rx_d0_log", + "from": { + "nodeId": "CanRx", + "portName": "D0" + }, + "to": { + "nodeId": "LogRxByte0", + "portName": "Value" + } + }, + { + "id": "c_rx_d1_log", + "from": { + "nodeId": "CanRx", + "portName": "D1" + }, + "to": { + "nodeId": "LogRxTag", + "portName": "Value" + } + }, + { + "id": "c_rx_dlc_log", + "from": { + "nodeId": "CanRx", + "portName": "Dlc" + }, + "to": { + "nodeId": "LogRxDlc", + "portName": "Value" + } + }, + { + "id": "c_tx_wave_log", + "from": { + "nodeId": "TxWave", + "portName": "Value" + }, + "to": { + "nodeId": "LogTxByte0", + "portName": "Value" + } + } + ], + "name": "can_bus_demo", + "nodeTypes": [ + { + "id": "Values.Var", + "displayName": "Var", + "defaultName": "Var", + "description": "Stores a scalar value and updates it when the Set input is true.", + "maxInstances": 0, + "isEntryPoint": false, + "domain": "", + "inputPorts": [ + { + "name": "In", + "description": "New scalar value to store when Set is true.", + "direction": "input", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "optional": true + }, + { + "name": "Set", + "description": "Write enable. When true, copies In into the stored value.", + "direction": "input", + "type": { + "quantity": "boolean", + "frame": "scalar", + "dtype": "f32" + }, + "optional": true + } + ], + "outputPorts": [ + { + "name": "Value", + "description": "Current stored scalar value.", + "direction": "output", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "optional": false + } + ], + "parameterTypes": { + "Stored": { + "description": "Persistent scalar storage state.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "Set": { + "description": "Fallback write-enable value when the Set input is not wired.", + "quantity": "boolean", + "frame": "scalar", + "dtype": "f32" + }, + "In": { + "description": "Fallback new value when the In input is not wired.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + "inlineCode": "if (Set) Stored = In;\nValue = Stored;\n", + "constructorCode": "", + "classHeader": "", + "classDefinition": "" + }, + { + "id": "Actuators.CanTx", + "displayName": "CAN TX", + "defaultName": "CanTx", + "description": "Transmits up to eight data bytes on a selected CAN bus at a configurable maximum rate.", + "maxInstances": 0, + "isEntryPoint": false, + "domain": "", + "inputPorts": [ + { + "name": "D0", + "description": "Payload byte 0. Values are converted to an unsigned 8-bit integer.", + "direction": "input", + "optional": true, + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "D1", + "description": "Payload byte 1. Values are converted to an unsigned 8-bit integer.", + "direction": "input", + "optional": true, + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "D2", + "description": "Payload byte 2. Values are converted to an unsigned 8-bit integer.", + "direction": "input", + "optional": true, + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "D3", + "description": "Payload byte 3. Values are converted to an unsigned 8-bit integer.", + "direction": "input", + "optional": true, + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "D4", + "description": "Payload byte 4. Values are converted to an unsigned 8-bit integer.", + "direction": "input", + "optional": true, + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "D5", + "description": "Payload byte 5. Values are converted to an unsigned 8-bit integer.", + "direction": "input", + "optional": true, + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "D6", + "description": "Payload byte 6. Values are converted to an unsigned 8-bit integer.", + "direction": "input", + "optional": true, + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "D7", + "description": "Payload byte 7. Values are converted to an unsigned 8-bit integer.", + "direction": "input", + "optional": true, + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + } + ], + "outputPorts": [], + "parameterTypes": { + "Bus": { + "description": "CAN controller number: 1 selects bus A/FDCAN1 and 2 selects bus B/FDCAN2.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "Id": { + "description": "CAN arbitration identifier to transmit.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "Ext": { + "description": "Use an extended 29-bit identifier when greater than 0.5; otherwise use a standard identifier.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "Dlc": { + "description": "Number of payload bytes to transmit, clamped to the range 0 through 8.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "Rate": { + "description": "Maximum transmission rate in frames per second. Values at or below zero send every step.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "LastMs": { + "description": "Internal timestamp of the previous transmission in milliseconds.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "D0": { + "description": "Fallback value for payload byte 0 when its input port is not wired.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "D1": { + "description": "Fallback value for payload byte 1 when its input port is not wired.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "D2": { + "description": "Fallback value for payload byte 2 when its input port is not wired.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "D3": { + "description": "Fallback value for payload byte 3 when its input port is not wired.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "D4": { + "description": "Fallback value for payload byte 4 when its input port is not wired.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "D5": { + "description": "Fallback value for payload byte 5 when its input port is not wired.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "D6": { + "description": "Fallback value for payload byte 6 when its input port is not wired.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "D7": { + "description": "Fallback value for payload byte 7 when its input port is not wired.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + "inlineCode": "/* CAN transmit, rate-limited by wall clock: sends when 1000/Rate ms have\n * elapsed since the previous send (Rate <= 0 sends every step).\n * D0..D7 = payload bytes (unconnected = 0), Dlc = how many of the 8 to\n * send, Ext: 0 std / 1 ext. */\nconst uint32_t period_ms = (Rate > 0.0f) ? static_cast(1000.0f / Rate) : 0U;\nconst uint32_t now_ms = platform_millis();\nif (period_ms == 0U || (now_ms - static_cast(LastMs)) >= period_ms) {\n LastMs = static_cast(now_ms);\n const uint8_t b[8] = {\n static_cast(D0), static_cast(D1),\n static_cast(D2), static_cast(D3),\n static_cast(D4), static_cast(D5),\n static_cast(D6), static_cast(D7),\n };\n uint8_t n = static_cast(Dlc);\n if (n > 8) n = 8;\n platform_can_send(static_cast(Bus), static_cast(Id),\n Ext > 0.5f, b, n);\n}\n", + "constructorCode": "", + "classHeader": "", + "classDefinition": "" + }, + { + "id": "Sensors.CanRx", + "displayName": "CAN RX", + "defaultName": "CanRx", + "description": "Reads the latest frame from a configured CAN receive mailbox and exposes its payload. Not an entry point, so the Bus/Id parameters may be wired from other nodes (e.g. a role router); the mailbox read has no in-graph dependencies.", + "maxInstances": 0, + "isEntryPoint": false, + "domain": "", + "inputPorts": [], + "outputPorts": [ + { + "name": "D0", + "description": "Most recently received payload byte 0.", + "direction": "output", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "optional": false + }, + { + "name": "D1", + "description": "Most recently received payload byte 1.", + "direction": "output", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "optional": false + }, + { + "name": "D2", + "description": "Most recently received payload byte 2.", + "direction": "output", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "optional": false + }, + { + "name": "D3", + "description": "Most recently received payload byte 3.", + "direction": "output", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "optional": false + }, + { + "name": "D4", + "description": "Most recently received payload byte 4.", + "direction": "output", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "optional": false + }, + { + "name": "D5", + "description": "Most recently received payload byte 5.", + "direction": "output", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "optional": false + }, + { + "name": "D6", + "description": "Most recently received payload byte 6.", + "direction": "output", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "optional": false + }, + { + "name": "D7", + "description": "Most recently received payload byte 7.", + "direction": "output", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "optional": false + }, + { + "name": "Dlc", + "description": "Data length of the latest received frame.", + "direction": "output", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "optional": false + }, + { + "name": "Fresh", + "description": "True for one execution step when a new frame has arrived.", + "direction": "output", + "type": { + "quantity": "boolean", + "frame": "scalar", + "dtype": "f32" + }, + "optional": false + } + ], + "parameterTypes": { + "Bus": { + "description": "CAN controller number: 1 selects bus A/FDCAN1 and 2 selects bus B/FDCAN2.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "Id": { + "description": "CAN arbitration identifier accepted by the receive mailbox.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "LastSeq": { + "description": "Internal sequence counter used to detect newly received frames.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + "inlineCode": "/* CAN receive mailbox for Id on Bus (1=A/FDCAN1, 2=B/FDCAN2).\n * Fresh is true for one step when a new frame arrived; Dlc/bytes hold the\n * latest payload otherwise. */\nuint8_t buf[8] = {};\nuint32_t seq = 0;\nconst int dlc = platform_can_rx(static_cast(Bus),\n static_cast(Id), buf, &seq);\nFresh = (seq != LastSeq);\nLastSeq = static_cast(seq);\nif (dlc > 0) {\n Dlc = static_cast(dlc);\n D0 = buf[0]; D1 = buf[1]; D2 = buf[2]; D3 = buf[3];\n D4 = buf[4]; D5 = buf[5]; D6 = buf[6]; D7 = buf[7];\n} else {\n Dlc = 0.0f;\n}\n", + "constructorCode": "", + "classHeader": "", + "classDefinition": "" + }, + { + "id": "Debug.TelemetryLog", + "displayName": "Telemetry Log", + "defaultName": "Log", + "description": "Publishes a scalar value to runtime telemetry under a configurable key.", + "maxInstances": 0, + "isEntryPoint": false, + "domain": "", + "inputPorts": [ + { + "name": "Value", + "description": "Scalar value to publish.", + "direction": "input", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "optional": false + } + ], + "outputPorts": [], + "parameterTypes": { + "Key": { + "description": "Telemetry channel name used when publishing the value.", + "quantity": "string", + "frame": "scalar", + "dtype": "f32" + } + }, + "inlineCode": "platform_telemetry_log_f32(Key, Value);\n", + "constructorCode": "", + "classHeader": "", + "classDefinition": "" + }, + { + "id": "Demo.RoleRouter", + "displayName": "CAN Role Router", + "defaultName": "RoleRouter", + "description": "Maps the instance Role (1 or 2) onto CAN ids: role 1 transmits IdBase and receives IdBase+1; role 2 transmits IdBase+1 and receives IdBase. Role values outside 0.5..1.5 take the role-2 mapping.", + "maxInstances": 0, + "isEntryPoint": false, + "domain": "", + "inputPorts": [ + { + "name": "Role", + "description": "Instance role: 1 = bus node A (sends IdBase), 2 = node B (sends IdBase+1).", + "direction": "input", + "optional": false, + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + } + ], + "outputPorts": [ + { + "name": "TxId", + "description": "CAN arbitration id this role transmits.", + "direction": "output", + "optional": false, + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "RxId", + "description": "CAN arbitration id this role listens to.", + "direction": "output", + "optional": false, + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + } + ], + "parameterTypes": { + "IdBase": { + "description": "Arbitration id transmitted by role 1; role 2 transmits IdBase+1.", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + "inlineCode": "const bool role_one = (Role > 0.5f && Role < 1.5f);\nTxId = IdBase + (role_one ? 0.0f : 1.0f);\nRxId = IdBase + (role_one ? 1.0f : 0.0f);\n", + "constructorCode": "", + "classHeader": "", + "classDefinition": "" + }, + { + "id": "Demo.TxPattern", + "displayName": "Ramp Test Pattern", + "defaultName": "TxPattern", + "description": "Sawtooth test byte 0..255 driven by sim time (platform_millis) with period PeriodS seconds; wraps at 255 back to 0.", + "maxInstances": 0, + "isEntryPoint": false, + "domain": "", + "inputPorts": [], + "outputPorts": [ + { + "name": "Value", + "description": "Sawtooth test byte (0..255).", + "direction": "output", + "optional": false, + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + } + ], + "parameterTypes": { + "PeriodS": { + "description": "Sawtooth period in seconds (wire-fed from the TxPeriod Var in this graph).", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + "inlineCode": "const float t_s = static_cast(platform_millis()) * 0.001f;\nconst float p = (PeriodS > 0.0001f) ? PeriodS : 0.0001f;\nconst float phase = t_s / p - floorf(t_s / p);\nValue = floorf(phase * 256.0f);\nif (Value > 255.0f) Value = 255.0f;\n", + "constructorCode": "", + "classHeader": "", + "classDefinition": "" + } + ], + "nodes": [ + { + "id": "Role", + "type": "Values.Var", + "domain": "app_loop", + "parameters": { + "In": "0.0", + "Set": "0.0", + "Stored": "0.0" + }, + "position": { + "x": 60.0, + "y": 60.0 + }, + "displayName": "" + }, + { + "id": "TxPeriod", + "type": "Values.Var", + "domain": "app_loop", + "parameters": { + "In": "0.0", + "Set": "0.0", + "Stored": "0.5" + }, + "position": { + "x": 60.0, + "y": 220.0 + }, + "displayName": "" + }, + { + "id": "RoleRouter", + "type": "Demo.RoleRouter", + "domain": "app_loop", + "parameters": { + "IdBase": "673.0" + }, + "position": { + "x": 320.0, + "y": 60.0 + }, + "displayName": "" + }, + { + "id": "TxWave", + "type": "Demo.TxPattern", + "domain": "app_loop", + "parameterInputs": [ + "PeriodS" + ], + "parameters": { + "PeriodS": "0.5" + }, + "position": { + "x": 320.0, + "y": 220.0 + }, + "displayName": "" + }, + { + "id": "CanTx", + "type": "Actuators.CanTx", + "domain": "app_loop", + "parameterInputs": [ + "Id" + ], + "parameters": { + "Bus": "1.0", + "Id": "673.0", + "Ext": "0.0", + "Dlc": "2.0", + "Rate": "50.0", + "LastMs": "0.0", + "D0": "0.0", + "D1": "0.0", + "D2": "0.0", + "D3": "0.0", + "D4": "0.0", + "D5": "0.0", + "D6": "0.0", + "D7": "0.0" + }, + "position": { + "x": 600.0, + "y": 140.0 + }, + "displayName": "" + }, + { + "id": "CanRx", + "type": "Sensors.CanRx", + "domain": "app_loop", + "parameterInputs": [ + "Id" + ], + "parameters": { + "Bus": "1.0", + "Id": "674.0", + "LastSeq": "0.0" + }, + "position": { + "x": 600.0, + "y": 420.0 + }, + "displayName": "" + }, + { + "id": "LogRxByte0", + "type": "Debug.TelemetryLog", + "domain": "app_loop", + "parameters": { + "Key": "can_rx_d0" + }, + "position": { + "x": 860.0, + "y": 360.0 + }, + "displayName": "" + }, + { + "id": "LogRxTag", + "type": "Debug.TelemetryLog", + "domain": "app_loop", + "parameters": { + "Key": "can_rx_tag" + }, + "position": { + "x": 860.0, + "y": 450.0 + }, + "displayName": "" + }, + { + "id": "LogRxDlc", + "type": "Debug.TelemetryLog", + "domain": "app_loop", + "parameters": { + "Key": "can_rx_dlc" + }, + "position": { + "x": 860.0, + "y": 540.0 + }, + "displayName": "" + }, + { + "id": "LogTxByte0", + "type": "Debug.TelemetryLog", + "domain": "app_loop", + "parameters": { + "Key": "can_tx_d0" + }, + "position": { + "x": 600.0, + "y": 300.0 + }, + "displayName": "" + } + ], + "schemaVersion": 1 +} diff --git a/Assets/Examples/can_bus_demo_role_a.json b/Assets/Examples/can_bus_demo_role_a.json new file mode 100644 index 00000000..96643562 --- /dev/null +++ b/Assets/Examples/can_bus_demo_role_a.json @@ -0,0 +1,11 @@ +{ + "comment": "can_bus_demo role A (hub side of a two-instance CAN bridge run). vars seed the graph's Role and TxPeriod Var nodes: Role=1 transmits id 0x2A1 and listens for 0x2A2; D0 carries a 0.4 s sawtooth. Run against can_bus_demo_role_b.json — recipe in docs/simulation.md, 'Graph-level CAN / two-inverter pattern'.", + "simulation": { + "app_loop_hz": 1000, + "telem_hz": 500 + }, + "vars": { + "Role": 1.0, + "TxPeriod": 0.4 + } +} diff --git a/Assets/Examples/can_bus_demo_role_b.json b/Assets/Examples/can_bus_demo_role_b.json new file mode 100644 index 00000000..3eaff2e6 --- /dev/null +++ b/Assets/Examples/can_bus_demo_role_b.json @@ -0,0 +1,11 @@ +{ + "comment": "can_bus_demo role B (spoke side of a two-instance CAN bridge run). Role=2 transmits id 0x2A2 and listens for 0x2A1; D0 carries a 0.9 s sawtooth, deliberately slower than role A's 0.4 s so the two directions are easy to tell apart in telemetry. Run against can_bus_demo_role_a.json — recipe in docs/simulation.md, 'Graph-level CAN / two-inverter pattern'.", + "simulation": { + "app_loop_hz": 1000, + "telem_hz": 500 + }, + "vars": { + "Role": 2.0, + "TxPeriod": 0.9 + } +} diff --git a/Assets/Examples/current_telemetry.json b/Assets/Examples/current_telemetry.json index 4b4b5c54..f2e4a236 100644 --- a/Assets/Examples/current_telemetry.json +++ b/Assets/Examples/current_telemetry.json @@ -128,7 +128,10 @@ "parameters": { "InvertPolarity": "0.0", "OffsetU": "0.0", - "OffsetV": "0.0" + "OffsetV": "0.0", + "PrevBurstUs": "0.0", + "PrevIuA": "0.0", + "PrevIvA": "0.0" } }, { diff --git a/Assets/Examples/foc_chain.json b/Assets/Examples/foc_chain.json index 8ac5b84d..a178ced7 100644 --- a/Assets/Examples/foc_chain.json +++ b/Assets/Examples/foc_chain.json @@ -256,7 +256,10 @@ "OffsetU": "0.0", "OffsetV": "0.0", "offset_w_12bit": "0.0", - "scale_w_a_per_lsb": "0.001" + "scale_w_a_per_lsb": "0.001", + "PrevBurstUs": "0.0", + "PrevIuA": "0.0", + "PrevIvA": "0.0" } }, { @@ -302,7 +305,10 @@ "Ki": "0.01", "Integral": "0.0", "OutputMax": "24.0", - "OutputMin": "-24.0" + "OutputMin": "-24.0", + "Dt": "0.0002", + "AwGain": "1.0", + "Feedforward": "0.0" } }, { @@ -318,7 +324,10 @@ "Ki": "0.01", "Integral": "0.0", "OutputMax": "24.0", - "OutputMin": "-24.0" + "OutputMin": "-24.0", + "Dt": "0.0002", + "AwGain": "1.0", + "Feedforward": "0.0" } }, { @@ -636,4 +645,4 @@ } } ] -} +} \ No newline at end of file diff --git a/Assets/Examples/foc_demo_aidan.json b/Assets/Examples/foc_demo_aidan.json index 140d222a..d18ebbfa 100644 --- a/Assets/Examples/foc_demo_aidan.json +++ b/Assets/Examples/foc_demo_aidan.json @@ -145,7 +145,7 @@ { "from": { "nodeId": "IdRef", - "portName": "Value" + "portName": "Out" }, "id": "c6", "to": { @@ -166,7 +166,7 @@ }, { "from": { - "nodeId": "IqRef", + "nodeId": "IqVar", "portName": "Value" }, "id": "c8", @@ -512,15 +512,17 @@ "classDefinition": "", "classHeader": "", "constructorCode": "", - "displayName": "Set PWM Duty Cycles", + "defaultName": "PwmOut", + "description": "Applies three phase-duty commands to the platform PWM peripheral.", + "displayName": "PWM Out", "domain": "tim_isr", "id": "Actuators.PwmOut", "inlineCode": "platform_pwm_set(Duty_A, Duty_B, Duty_C);\n", "inputPorts": [ { + "description": "Phase A PWM duty command in percent.", "direction": "input", "name": "Duty_A", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -528,9 +530,9 @@ } }, { + "description": "Phase B PWM duty command in percent.", "direction": "input", "name": "Duty_B", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -538,9 +540,9 @@ } }, { + "description": "Phase C PWM duty command in percent.", "direction": "input", "name": "Duty_C", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -556,15 +558,17 @@ "classDefinition": "", "classHeader": "", "constructorCode": "", + "defaultName": "Clarke", + "description": "Transforms three-phase currents into stationary alpha-beta coordinates.", "displayName": "Clarke Transform", "domain": "", "id": "Transforms.Clarke", "inlineCode": "I_Alpha = I_A;\nI_Beta = (I_B - I_C) * 0.57735026919f;\n", "inputPorts": [ { + "description": "Phase A current.", "direction": "input", "name": "I_A", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -572,9 +576,9 @@ } }, { + "description": "Phase B current.", "direction": "input", "name": "I_B", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -582,9 +586,9 @@ } }, { + "description": "Phase C current.", "direction": "input", "name": "I_C", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -596,9 +600,9 @@ "maxInstances": 0, "outputPorts": [ { + "description": "Stationary-frame alpha-axis current.", "direction": "output", "name": "I_Alpha", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -606,9 +610,9 @@ } }, { + "description": "Stationary-frame beta-axis current.", "direction": "output", "name": "I_Beta", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -621,15 +625,17 @@ "classDefinition": "", "classHeader": "", "constructorCode": "", + "defaultName": "InvClarke", + "description": "Transforms stationary alpha-beta voltages into three-phase voltage commands.", "displayName": "Inverse Clarke Transform", "domain": "", "id": "Transforms.InverseClarke", "inlineCode": "V_A = V_Alpha;\nV_B = -0.5f * V_Alpha + 0.86602540378f * V_Beta;\nV_C = -0.5f * V_Alpha - 0.86602540378f * V_Beta;\n", "inputPorts": [ { + "description": "Stationary-frame alpha-axis voltage.", "direction": "input", "name": "V_Alpha", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -637,9 +643,9 @@ } }, { + "description": "Stationary-frame beta-axis voltage.", "direction": "input", "name": "V_Beta", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -651,9 +657,9 @@ "maxInstances": 0, "outputPorts": [ { + "description": "Reconstructed phase A voltage.", "direction": "output", "name": "V_A", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -661,9 +667,9 @@ } }, { + "description": "Reconstructed phase B voltage.", "direction": "output", "name": "V_B", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -671,9 +677,9 @@ } }, { + "description": "Reconstructed phase C voltage.", "direction": "output", "name": "V_C", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -686,15 +692,17 @@ "classDefinition": "", "classHeader": "", "constructorCode": "", + "defaultName": "InvPark", + "description": "Rotates d-q voltage commands into stationary alpha-beta coordinates.", "displayName": "Inverse Park Transform", "domain": "", "id": "Transforms.InversePark", "inlineCode": "const float cos_theta = cosf(Theta);\nconst float sin_theta = sinf(Theta);\nV_Alpha = V_D * cos_theta - V_Q * sin_theta;\nV_Beta = V_D * sin_theta + V_Q * cos_theta;\n", "inputPorts": [ { + "description": "Rotating-frame direct-axis voltage.", "direction": "input", "name": "V_D", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -702,9 +710,9 @@ } }, { + "description": "Rotating-frame quadrature-axis voltage.", "direction": "input", "name": "V_Q", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -712,9 +720,9 @@ } }, { + "description": "Electrical rotation angle in radians.", "direction": "input", "name": "Theta", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -726,9 +734,9 @@ "maxInstances": 0, "outputPorts": [ { + "description": "Stationary-frame alpha-axis voltage.", "direction": "output", "name": "V_Alpha", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -736,9 +744,9 @@ } }, { + "description": "Stationary-frame beta-axis voltage.", "direction": "output", "name": "V_Beta", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -751,15 +759,17 @@ "classDefinition": "", "classHeader": "", "constructorCode": "", + "defaultName": "Park", + "description": "Rotates stationary alpha-beta currents into rotor-aligned d-q coordinates.", "displayName": "Park Transform", "domain": "", "id": "Transforms.Park", "inlineCode": "const float cos_theta = cosf(Theta);\nconst float sin_theta = sinf(Theta);\nI_D = I_Alpha * cos_theta + I_Beta * sin_theta;\nI_Q = -I_Alpha * sin_theta + I_Beta * cos_theta;\n", "inputPorts": [ { + "description": "Stationary-frame alpha-axis current.", "direction": "input", "name": "I_Alpha", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -767,9 +777,9 @@ } }, { + "description": "Stationary-frame beta-axis current.", "direction": "input", "name": "I_Beta", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -777,9 +787,9 @@ } }, { + "description": "Electrical rotation angle in radians.", "direction": "input", "name": "Theta", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -791,9 +801,9 @@ "maxInstances": 0, "outputPorts": [ { + "description": "Rotating-frame direct-axis current.", "direction": "output", "name": "I_D", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -801,9 +811,9 @@ } }, { + "description": "Rotating-frame quadrature-axis current.", "direction": "output", "name": "I_Q", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -816,15 +826,17 @@ "classDefinition": "", "classHeader": "", "constructorCode": "", + "defaultName": "SinCos", + "description": "Computes the sine and cosine of an input angle.", "displayName": "Sin/Cos", "domain": "", "id": "Transforms.SinCos", "inlineCode": "SinTheta = sinf(Theta);\nCosTheta = cosf(Theta);\n", "inputPorts": [ { + "description": "Input angle in radians.", "direction": "input", "name": "Theta", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -836,9 +848,9 @@ "maxInstances": 0, "outputPorts": [ { + "description": "Sine of the input angle.", "direction": "output", "name": "SinTheta", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -846,9 +858,9 @@ } }, { + "description": "Cosine of the input angle.", "direction": "output", "name": "CosTheta", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -861,15 +873,17 @@ "classDefinition": "", "classHeader": "", "constructorCode": "", + "defaultName": "Svpwm", + "description": "Converts an alpha-beta voltage vector into centered three-phase PWM duty commands.", "displayName": "Space Vector PWM", "domain": "", "id": "Transforms.Svpwm", - "inlineCode": "/* Clamp the alpha/beta voltage vector to the linear SVM limit.\n * The maximum line-to-neutral voltage magnitude for linear modulation is\n * Vdc / sqrt(3). Use a small margin to stay away from the overmodulation\n * boundary. */\nconst float sqrt3 = 1.7320508075688772f;\nconst float v_max_linear = (V_Dc.in(au::volts) / sqrt3) * 0.95f;\nfloat valpha = V_Alpha.in(au::volts);\nfloat vbeta = V_Beta.in(au::volts);\nconst float v_albe_sq = valpha * valpha + vbeta * vbeta;\nif (v_albe_sq > v_max_linear * v_max_linear && v_albe_sq > 1e-12f) {\n const float scale = v_max_linear / sqrtf(v_albe_sq);\n valpha *= scale;\n vbeta *= scale;\n}\n\n/* Inverse Clarke: alpha/beta -> A/B/C. */\nconst float v_a = valpha / V_Dc.in(au::volts);\nconst float v_b = (-0.5f * valpha + 0.86602540378f * vbeta) / V_Dc.in(au::volts);\nconst float v_c = (-0.5f * valpha - 0.86602540378f * vbeta) / V_Dc.in(au::volts);\n\nfloat v_min = v_a;\nif (v_b < v_min) v_min = v_b;\nif (v_c < v_min) v_min = v_c;\n\nfloat v_max = v_a;\nif (v_b > v_max) v_max = v_b;\nif (v_c > v_max) v_max = v_c;\n\nconst float v_offset = 0.5f * (v_min + v_max);\n\n/* Convert to percent duty and clamp. Linear SVM stays roughly in\n * [21%, 79%]; clamping to [0,100] only catches numerical edge cases. */\nfloat duty_a_pct = 50.0f + 50.0f * (v_a - v_offset);\nfloat duty_b_pct = 50.0f + 50.0f * (v_b - v_offset);\nfloat duty_c_pct = 50.0f + 50.0f * (v_c - v_offset);\n\nif (duty_a_pct < 0.0f) duty_a_pct = 0.0f; else if (duty_a_pct > 100.0f) duty_a_pct = 100.0f;\nif (duty_b_pct < 0.0f) duty_b_pct = 0.0f; else if (duty_b_pct > 100.0f) duty_b_pct = 100.0f;\nif (duty_c_pct < 0.0f) duty_c_pct = 0.0f; else if (duty_c_pct > 100.0f) duty_c_pct = 100.0f;\n\nDuty_A = duty_a_pct;\nDuty_B = duty_b_pct;\nDuty_C = duty_c_pct;\n", + "inlineCode": "/* Clamp the alpha/beta voltage vector to the six-step boundary.\n * The maximum line-to-neutral voltage magnitude for linear modulation is\n * Vdc / sqrt(3); overmodulation is allowed up to 2*Vdc/3. */\nconst float sqrt3 = 1.7320508075688772f;\nconst float v_max_linear = V_Dc.in(au::volts) * 2.0f / 3.0f;\nfloat valpha = V_Alpha.in(au::volts);\nfloat vbeta = V_Beta.in(au::volts);\nconst float v_albe_sq = valpha * valpha + vbeta * vbeta;\nif (v_albe_sq > v_max_linear * v_max_linear && v_albe_sq > 1e-12f) {\n const float scale = v_max_linear / sqrtf(v_albe_sq);\n valpha *= scale;\n vbeta *= scale;\n}\n\n/* Inverse Clarke: alpha/beta -> A/B/C. */\nconst float v_a = valpha / V_Dc.in(au::volts);\nconst float v_b = (-0.5f * valpha + 0.86602540378f * vbeta) / V_Dc.in(au::volts);\nconst float v_c = (-0.5f * valpha - 0.86602540378f * vbeta) / V_Dc.in(au::volts);\n\nfloat v_min = v_a;\nif (v_b < v_min) v_min = v_b;\nif (v_c < v_min) v_min = v_c;\n\nfloat v_max = v_a;\nif (v_b > v_max) v_max = v_b;\nif (v_c > v_max) v_max = v_c;\n\nconst float v_offset = 0.5f * (v_min + v_max);\n\n/* Convert to percent duty and clamp. Linear SVM stays roughly in\n * [21%, 79%]; clamping to [0,100] only catches numerical edge cases. */\nfloat duty_a_pct = 50.0f + 50.0f * (v_a - v_offset);\nfloat duty_b_pct = 50.0f + 50.0f * (v_b - v_offset);\nfloat duty_c_pct = 50.0f + 50.0f * (v_c - v_offset);\n\nif (duty_a_pct < 0.0f) duty_a_pct = 0.0f; else if (duty_a_pct > 100.0f) duty_a_pct = 100.0f;\nif (duty_b_pct < 0.0f) duty_b_pct = 0.0f; else if (duty_b_pct > 100.0f) duty_b_pct = 100.0f;\nif (duty_c_pct < 0.0f) duty_c_pct = 0.0f; else if (duty_c_pct > 100.0f) duty_c_pct = 100.0f;\n\nDuty_A = duty_a_pct;\nDuty_B = duty_b_pct;\nDuty_C = duty_c_pct;\n", "inputPorts": [ { + "description": "Requested stationary-frame alpha-axis voltage.", "direction": "input", "name": "V_Alpha", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -877,9 +891,9 @@ } }, { + "description": "Requested stationary-frame beta-axis voltage.", "direction": "input", "name": "V_Beta", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -887,9 +901,9 @@ } }, { + "description": "Measured DC-link voltage used for normalization and modulation limiting.", "direction": "input", "name": "V_Dc", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -901,9 +915,9 @@ "maxInstances": 0, "outputPorts": [ { + "description": "Phase A PWM duty command in percent.", "direction": "output", "name": "Duty_A", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -911,9 +925,9 @@ } }, { + "description": "Phase B PWM duty command in percent.", "direction": "output", "name": "Duty_B", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -921,9 +935,9 @@ } }, { + "description": "Phase C PWM duty command in percent.", "direction": "output", "name": "Duty_C", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -936,15 +950,17 @@ "classDefinition": "", "classHeader": "", "constructorCode": "", + "defaultName": "LogI", + "description": "Publishes three phase-current signals to the standard current telemetry channels.", "displayName": "Telemetry Current Sink", "domain": "", "id": "Debug.TelemetryCurrentSink", "inlineCode": "platform_telemetry_log_f32(\"cg_iu_a\", I_A.in(au::amperes));\nplatform_telemetry_log_f32(\"cg_iv_a\", I_B.in(au::amperes));\nplatform_telemetry_log_f32(\"cg_iw_a\", I_C.in(au::amperes));\n", "inputPorts": [ { + "description": "Phase A current to publish in amperes.", "direction": "input", "name": "I_A", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -952,9 +968,9 @@ } }, { + "description": "Phase B current to publish in amperes.", "direction": "input", "name": "I_B", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -962,9 +978,9 @@ } }, { + "description": "Phase C current to publish in amperes.", "direction": "input", "name": "I_C", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -980,15 +996,17 @@ "classDefinition": "", "classHeader": "", "constructorCode": "", + "defaultName": "Log", + "description": "Publishes a scalar value to runtime telemetry under a configurable key.", "displayName": "Telemetry Log", "domain": "", "id": "Debug.TelemetryLog", "inlineCode": "platform_telemetry_log_f32(Key, Value);\n", "inputPorts": [ { + "description": "Scalar value to publish.", "direction": "input", "name": "Value", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -1001,6 +1019,7 @@ "outputPorts": [], "parameterTypes": { "Key": { + "description": "Telemetry channel name used when publishing the value.", "dtype": "f32", "frame": "scalar", "quantity": "string" @@ -1046,6 +1065,8 @@ "classDefinition": "", "classHeader": "", "constructorCode": "", + "defaultName": "VdcSense", + "description": "Reads the inverter DC-link voltage from the platform sensor interface.", "displayName": "DC Link Voltage", "domain": "", "id": "Sensors.DcLinkVoltage", @@ -1055,9 +1076,9 @@ "maxInstances": 0, "outputPorts": [ { + "description": "Measured DC-link voltage in volts.", "direction": "output", "name": "V_Dc", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -1105,15 +1126,17 @@ "classDefinition": "", "classHeader": "", "constructorCode": "", - "displayName": "Encoder Electrical Angle", + "defaultName": "ElecAngle", + "description": "Converts mechanical rotor angle to wrapped electrical angle using pole count, direction, and offset.", + "displayName": "Electrical Angle", "domain": "", "id": "Transforms.ElecAngle", "inlineCode": "/* Wrap the mechanical encoder angle to [0, 2*pi). */\nconst float two_pi = 6.28318530718f;\nfloat theta = fmodf(ThetaMech, two_pi);\nif (theta < 0.0f) theta += two_pi;\n\n/* Electrical angle = offset (elec deg) + sign * encoder_angle * (Poles / 2).\n * Matches the base-image FocController convention. */\nconstexpr float DEG_TO_RAD = 0.01745329251f;\nfloat elec = OffsetDeg * DEG_TO_RAD + EncoderSign * theta * Poles * 0.5f;\n\n/* Wrap the electrical angle to [0, 2*pi). */\nelec = fmodf(elec, two_pi);\nif (elec < 0.0f) elec += two_pi;\n\nThetaElec = elec;\n", "inputPorts": [ { + "description": "Mechanical rotor angle in radians.", "direction": "input", "name": "ThetaMech", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -1121,6 +1144,7 @@ } }, { + "description": "Electrical-angle calibration offset in degrees.", "direction": "input", "name": "OffsetDeg", "optional": true, @@ -1131,6 +1155,7 @@ } }, { + "description": "Encoder direction multiplier, normally 1 or -1.", "direction": "input", "name": "EncoderSign", "optional": true, @@ -1141,6 +1166,7 @@ } }, { + "description": "Motor pole count used to convert mechanical to electrical angle.", "direction": "input", "name": "Poles", "optional": true, @@ -1155,9 +1181,9 @@ "maxInstances": 1, "outputPorts": [ { + "description": "Electrical rotor angle wrapped to the range 0 through 2\u03c0 radians.", "direction": "output", "name": "ThetaElec", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -1167,16 +1193,19 @@ ], "parameterTypes": { "EncoderSign": { + "description": "Fallback encoder direction multiplier when the input is not wired.", "dtype": "f32", "frame": "scalar", "quantity": "dimensionless" }, "OffsetDeg": { + "description": "Fallback electrical-angle calibration offset in degrees when the input is not wired.", "dtype": "f32", "frame": "scalar", "quantity": "dimensionless" }, "Poles": { + "description": "Fallback motor pole count when the input is not wired.", "dtype": "f32", "frame": "scalar", "quantity": "dimensionless" @@ -1187,7 +1216,9 @@ "classDefinition": "", "classHeader": "", "constructorCode": "", - "displayName": "Forced Electrical Angle", + "defaultName": "ForcedAngle", + "description": "Generates a continuously advancing electrical angle for open-loop control.", + "displayName": "Forced Angle", "domain": "", "id": "Transforms.ForcedAngle", "inlineCode": "Angle += RateRadPerS * Dt;\nif (Angle >= 6.28318530718f) Angle -= 6.28318530718f;\nThetaElec = Angle;\n", @@ -1196,9 +1227,9 @@ "maxInstances": 1, "outputPorts": [ { + "description": "Generated electrical angle wrapped to one revolution.", "direction": "output", "name": "ThetaElec", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -1208,16 +1239,19 @@ ], "parameterTypes": { "Angle": { + "description": "Persistent generated angle state in radians.", "dtype": "f32", "frame": "scalar", "quantity": "dimensionless" }, "Dt": { + "description": "Update period in seconds.", "dtype": "f32", "frame": "scalar", "quantity": "dimensionless" }, "RateRadPerS": { + "description": "Electrical angular velocity in radians per second.", "dtype": "f32", "frame": "scalar", "quantity": "dimensionless" @@ -1228,6 +1262,8 @@ "classDefinition": "", "classHeader": "", "constructorCode": "Cached = platform_config_load(Key, DefaultValue);\n", + "defaultName": "Cfg", + "description": "Exposes a named configuration value, using a default when no stored value is available.", "displayName": "Config Value", "domain": "", "id": "Values.Config", @@ -1237,9 +1273,9 @@ "maxInstances": 0, "outputPorts": [ { + "description": "Cached configuration value supplied to the graph.", "direction": "output", "name": "Value", - "optional": false, "type": { "dtype": "f32", "frame": "scalar", @@ -1249,16 +1285,19 @@ ], "parameterTypes": { "Cached": { + "description": "Persistent cached configuration value exposed by the output.", "dtype": "f32", "frame": "scalar", "quantity": "dimensionless" }, "DefaultValue": { + "description": "Value used when the configuration key has not been stored.", "dtype": "f32", "frame": "scalar", "quantity": "dimensionless" }, "Key": { + "description": "Name used to look up the value in platform configuration storage.", "dtype": "f32", "frame": "scalar", "quantity": "string" @@ -1269,29 +1308,42 @@ "classDefinition": "", "classHeader": "", "constructorCode": "", + "defaultName": "Pi", + "description": "Proportional-integral controller with output clamping, back-calculation anti-windup, and an optional feed-forward term.", "displayName": "PI Controller", "domain": "", "id": "Control.Pi", - "inlineCode": "/* PI with clamping + back-calculation anti-windup.\n * Dimensionless throughout: implicit unit extraction/injection handles any\n * physical-quantity wiring at the binding sites. */\nconst float error = Setpoint - Measurement;\nIntegral += error * Dt;\n\nfloat raw_output = Kp * error + Ki * Integral;\n\n/* Dynamic limit derived from DC-link voltage, matching the base image's\n * VectorPIController convention: max = Vdc/sqrt(3) * 0.95. */\nconst float vdc = platform_get_dc_link_voltage();\nconst float dynamic_max = (vdc / 1.7320508075688772f) * 0.95f;\nconst float max_limit = (dynamic_max < OutputMax) ? dynamic_max : OutputMax;\nconst float min_limit = (-dynamic_max > OutputMin) ? -dynamic_max : OutputMin;\n\nfloat limited_output = raw_output;\nif (limited_output > max_limit) limited_output = max_limit;\nif (limited_output < min_limit) limited_output = min_limit;\n\n/* Back-calculation anti-windup, scaled by AwGain (0 disables; 1.0 matches\n * the base-image VectorPIController). */\nif (Ki > 0.0001f && Kp > 0.0001f && AwGain > 0.0f) {\n const float excess = raw_output - limited_output;\n Integral -= excess * Dt * AwGain / (Kp * Ki);\n}\n\nOutput = limited_output;\n", + "inlineCode": "/* PI with clamping + back-calculation anti-windup.\n * Dimensionless throughout: implicit unit extraction/injection handles any\n * physical-quantity wiring at the binding sites. */\nconst float error = Setpoint - Measurement;\nIntegral += error * Dt;\n\nfloat raw_output = Kp * error + Ki * Integral + Feedforward;\n\n/* Dynamic limit derived from DC-link voltage. Allow overmodulation up to\n * the six-step boundary (2*Vdc/3) so the SVPWM stage can use the full\n * hexagon when commanded. Linear SVPWM limit is Vdc/sqrt(3). */\nconst float vdc = platform_get_dc_link_voltage();\nconst float dynamic_max = vdc * 2.0f / 3.0f;\nconst float max_limit = (dynamic_max < OutputMax) ? dynamic_max : OutputMax;\nconst float min_limit = (-dynamic_max > OutputMin) ? -dynamic_max : OutputMin;\n\nfloat limited_output = raw_output;\nif (limited_output > max_limit) limited_output = max_limit;\nif (limited_output < min_limit) limited_output = min_limit;\n\n/* Back-calculation anti-windup, scaled by AwGain (0 disables; 1.0 matches\n * the base-image VectorPIController). */\nif (Ki > 0.0001f && Kp > 0.0001f && AwGain > 0.0f) {\n const float excess = raw_output - limited_output;\n Integral -= excess * Dt * AwGain / (Kp * Ki);\n}\n\nOutput = limited_output;\n", "inputPorts": [ { - "name": "Setpoint", "description": "Desired target value.", "direction": "input", + "name": "Setpoint", "type": { - "quantity": "dimensionless", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "dimensionless" } }, { - "name": "Measurement", "description": "Measured process value subtracted from the setpoint.", "direction": "input", + "name": "Measurement", + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Optional additive feed-forward value. Wired voltage sources are extracted automatically; unconnected ports default to zero.", + "direction": "input", + "name": "Feedforward", + "optional": true, "type": { - "quantity": "dimensionless", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "dimensionless" } } ], @@ -1299,58 +1351,64 @@ "maxInstances": 0, "outputPorts": [ { - "name": "Output", "description": "Clamped PI control effort.", "direction": "output", + "name": "Output", "type": { - "quantity": "dimensionless", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "dimensionless" } } ], "parameterTypes": { - "Kp": { - "description": "Proportional gain applied to the current error.", - "quantity": "dimensionless", - "frame": "scalar", - "dtype": "f32" - }, - "Ki": { - "description": "Integral gain applied to the accumulated error.", - "quantity": "dimensionless", + "AwGain": { + "description": "Back-calculation anti-windup gain. Zero disables anti-windup.", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "dimensionless" }, "Dt": { "description": "Controller step period in seconds.", - "quantity": "dimensionless", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Feedforward": { + "description": "Default value used when the Feedforward input port is not connected.", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "dimensionless" }, "Integral": { "description": "Persistent accumulated-error state.", - "quantity": "dimensionless", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Ki": { + "description": "Integral gain applied to the accumulated error.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Kp": { + "description": "Proportional gain applied to the current error.", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "dimensionless" }, "OutputMax": { "description": "Upper output clamp, additionally limited by the measured DC-link voltage.", - "quantity": "dimensionless", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "dimensionless" }, "OutputMin": { "description": "Lower output clamp, additionally limited by the measured DC-link voltage.", - "quantity": "dimensionless", - "frame": "scalar", - "dtype": "f32" - }, - "AwGain": { - "description": "Back-calculation anti-windup gain. Zero disables anti-windup.", - "quantity": "dimensionless", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "dimensionless" } } }, @@ -1358,6 +1416,8 @@ "classDefinition": "", "classHeader": "", "constructorCode": "", + "defaultName": "Encoder", + "description": "Reads the latest mechanical rotor angle and motor speed from the encoder driver.", "displayName": "Encoder", "domain": "", "id": "Sensors.Encoder", @@ -1367,32 +1427,33 @@ "maxInstances": 0, "outputPorts": [ { - "name": "Theta", "description": "Mechanical rotor angle in radians.", "direction": "output", + "name": "Theta", "type": { - "quantity": "dimensionless", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "dimensionless" } }, { - "name": "Omega", "description": "Mechanical motor speed in revolutions per minute.", "direction": "output", + "name": "Omega", "type": { - "quantity": "dimensionless", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "dimensionless" } } - ], - "parameterTypes": {} + ] }, { "classDefinition": "", "classHeader": "", "constructorCode": "", + "defaultName": "PhaseCurrents", + "description": "Samples the three inverter phase-current channels from the platform current sensors.", "displayName": "Phase Currents", "domain": "", "id": "Sensors.PhaseCurrents", @@ -1402,69 +1463,72 @@ "maxInstances": 1, "outputPorts": [ { - "name": "I_A", "description": "Measured phase A current in amperes.", "direction": "output", + "name": "I_A", "type": { - "quantity": "current", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "current" } }, { - "name": "I_B", "description": "Measured phase B current in amperes.", "direction": "output", + "name": "I_B", "type": { - "quantity": "current", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "current" } }, { - "name": "I_C", "description": "Measured phase C current in amperes.", "direction": "output", + "name": "I_C", "type": { - "quantity": "current", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "current" } }, { - "name": "Diudt", + "description": "Estimated phase-U current slope from the ADC sample burst.", "direction": "output", + "name": "Diudt", "type": { - "quantity": "dimensionless", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "dimensionless" } }, { - "name": "Divdt", + "description": "Estimated phase-V current slope from the ADC sample burst.", "direction": "output", + "name": "Divdt", "type": { - "quantity": "dimensionless", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "dimensionless" } }, { - "name": "BurstTimeUs", + "description": "Elapsed time in microseconds across the ADC sample burst.", "direction": "output", + "name": "BurstTimeUs", "type": { - "quantity": "dimensionless", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "dimensionless" } } ], "parameterTypes": { "InvertPolarity": { "description": "Negate all three phase currents to match the FOC sign convention on hardware with inverted current sensors.", - "quantity": "boolean", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "boolean" } } }, @@ -1472,49 +1536,120 @@ "classDefinition": "", "classHeader": "", "constructorCode": "", + "defaultName": "Const", + "description": "Provides a constant scalar value, optionally replaced by a wired input.", "displayName": "Constant", "domain": "", "id": "Values.Constant", "inlineCode": "/* Compile-time constant (or wired value via optional In). */\nOut = Value;\n", "inputPorts": [ { - "name": "In", "description": "Optional value that replaces the configured constant when wired.", "direction": "input", + "name": "In", + "optional": true, "type": { - "quantity": "dimensionless", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" - }, - "optional": true + "quantity": "dimensionless" + } } ], "isEntryPoint": false, "maxInstances": 0, "outputPorts": [ { - "name": "Out", "description": "Configured constant or the value supplied through In.", "direction": "output", + "name": "Out", "type": { - "quantity": "dimensionless", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "dimensionless" } } ], "parameterTypes": { + "In": { + "description": "Fallback storage for the optional In port.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, "Value": { "description": "Constant value emitted when no input overrides it.", - "quantity": "dimensionless", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Var", + "description": "Stores a scalar value and updates it when the Set input is true.", + "displayName": "Var", + "domain": "", + "id": "Values.Var", + "inlineCode": "if (Set) Stored = In;\nValue = Stored;\n", + "inputPorts": [ + { + "description": "New scalar value to store when Set is true.", + "direction": "input", + "name": "In", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } }, + { + "description": "Write enable. When true, copies In into the stored value.", + "direction": "input", + "name": "Set", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Current stored scalar value.", + "direction": "output", + "name": "Value", + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "parameterTypes": { "In": { - "description": "Fallback storage for the optional In port.", - "quantity": "dimensionless", + "description": "Fallback new value when the In input is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Set": { + "description": "Fallback write-enable value when the Set input is not wired.", + "dtype": "f32", "frame": "scalar", - "dtype": "f32" + "quantity": "boolean" + }, + "Stored": { + "description": "Persistent scalar storage state.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" } } } @@ -1537,8 +1672,9 @@ "id": "Currents", "parameters": { "InvertPolarity": "1.0", - "OffsetU": "0.0", - "OffsetV": "0.0" + "PrevBurstUs": "0.0", + "PrevIuA": "0.0", + "PrevIvA": "0.0" }, "position": { "x": 150.0, @@ -1599,7 +1735,7 @@ "domain": "tim_isr", "id": "IdRef", "parameters": { - "Amps": "0.0" + "Value": "0.0" }, "position": { "x": 150.0, @@ -1632,15 +1768,17 @@ { "displayName": "", "domain": "tim_isr", - "id": "IqRef", + "id": "IqVar", "parameters": { - "Amps": "20.0" + "In": "0.0", + "Set": "0.0", + "Stored": "0.0" }, "position": { "x": 150.0, "y": 1638.0 }, - "type": "Values.Constant" + "type": "Values.Var" }, { "displayName": "", @@ -1814,7 +1952,9 @@ "domain": "tim_isr", "id": "PiD", "parameters": { + "AwGain": "1.0", "Dt": "0.0002", + "Feedforward": "0.0", "Integral": "0.0", "Ki": "10.0", "Kp": "0.03", @@ -1832,7 +1972,9 @@ "domain": "tim_isr", "id": "PiQ", "parameters": { + "AwGain": "1.0", "Dt": "0.0002", + "Feedforward": "0.0", "Integral": "0.0", "Ki": "10.0", "Kp": "0.03", @@ -2000,5 +2142,6 @@ }, "type": "Values.Config" } - ] + ], + "schemaVersion": 1 } diff --git a/Assets/Examples/foc_sensorless_demo.json b/Assets/Examples/foc_sensorless_demo.json new file mode 100644 index 00000000..88a8c65e --- /dev/null +++ b/Assets/Examples/foc_sensorless_demo.json @@ -0,0 +1,6072 @@ +{ + "bridges": [ + { + "consumer": { + "nodeId": "LogU", + "portName": "Value" + }, + "id": "i_a_app_bridge", + "producer": { + "nodeId": "Currents", + "portName": "I_A" + }, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "consumer": { + "nodeId": "LogV", + "portName": "Value" + }, + "id": "i_b_app_bridge", + "producer": { + "nodeId": "Currents", + "portName": "I_B" + }, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "consumer": { + "nodeId": "LogW", + "portName": "Value" + }, + "id": "i_c_app_bridge", + "producer": { + "nodeId": "Currents", + "portName": "I_C" + }, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "consumer": { + "nodeId": "ObserverObs", + "portName": "I_A_Meas" + }, + "id": "vrf_b_obs_iu", + "producer": { + "nodeId": "Currents", + "portName": "I_A" + }, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "consumer": { + "nodeId": "ObserverObs", + "portName": "I_B_Meas" + }, + "id": "vrf_b_obs_iv", + "producer": { + "nodeId": "Currents", + "portName": "I_B" + }, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "consumer": { + "nodeId": "ObserverObs", + "portName": "I_C_Meas" + }, + "id": "vrf_b_obs_iw", + "producer": { + "nodeId": "Currents", + "portName": "I_C" + }, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "consumer": { + "nodeId": "ObserverObs", + "portName": "Diudt" + }, + "id": "vrf_b_obs_diudt", + "producer": { + "nodeId": "Currents", + "portName": "Diudt" + }, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "consumer": { + "nodeId": "ObserverObs", + "portName": "Divdt" + }, + "id": "vrf_b_obs_divdt", + "producer": { + "nodeId": "Currents", + "portName": "Divdt" + }, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "consumer": { + "nodeId": "ObserverObs", + "portName": "BurstTimeUs" + }, + "id": "vrf_b_obs_t", + "producer": { + "nodeId": "Currents", + "portName": "BurstTimeUs" + }, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "consumer": { + "nodeId": "FeedbackGate", + "portName": "Meas_A" + }, + "id": "vrf_b_gate_mu", + "producer": { + "nodeId": "Currents", + "portName": "I_A" + }, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "consumer": { + "nodeId": "FeedbackGate", + "portName": "Meas_B" + }, + "id": "vrf_b_gate_mv", + "producer": { + "nodeId": "Currents", + "portName": "I_B" + }, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "consumer": { + "nodeId": "FeedbackGate", + "portName": "Meas_C" + }, + "id": "vrf_b_gate_mw", + "producer": { + "nodeId": "Currents", + "portName": "I_C" + }, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "consumer": { + "nodeId": "LogMeasU", + "portName": "Value" + }, + "id": "vrf_b_meas_u", + "producer": { + "nodeId": "Currents", + "portName": "I_A" + }, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "consumer": { + "nodeId": "LogMeasV", + "portName": "Value" + }, + "id": "vrf_b_meas_v", + "producer": { + "nodeId": "Currents", + "portName": "I_B" + }, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "consumer": { + "nodeId": "LogMeasW", + "portName": "Value" + }, + "id": "vrf_b_meas_w", + "producer": { + "nodeId": "Currents", + "portName": "I_C" + }, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "consumer": { + "nodeId": "LogProbeU", + "portName": "Value" + }, + "id": "vrf_b_pc_u", + "producer": { + "nodeId": "PhaseCurrentsObs", + "portName": "I_A" + }, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "connections": [ + { + "from": { + "nodeId": "Encoder", + "portName": "Theta" + }, + "id": "c1", + "to": { + "nodeId": "EncoderLeadComp", + "portName": "Theta" + } + }, + { + "from": { + "nodeId": "EncoderLeadComp", + "portName": "ThetaOut" + }, + "id": "c1b", + "to": { + "nodeId": "ElecAngle", + "portName": "ThetaMech" + } + }, + { + "from": { + "nodeId": "ElecAngle", + "portName": "ThetaElec" + }, + "id": "c2", + "to": { + "nodeId": "Park", + "portName": "Theta" + } + }, + { + "from": { + "nodeId": "ElecAngle", + "portName": "ThetaElec" + }, + "id": "c3", + "to": { + "nodeId": "InvPark", + "portName": "Theta" + } + }, + { + "from": { + "nodeId": "Clarke", + "portName": "I_Alpha" + }, + "id": "c4", + "to": { + "nodeId": "Park", + "portName": "I_Alpha" + } + }, + { + "from": { + "nodeId": "IdVar", + "portName": "Value" + }, + "id": "c6", + "to": { + "nodeId": "PiD", + "portName": "Setpoint" + } + }, + { + "from": { + "nodeId": "Park", + "portName": "I_D" + }, + "id": "c7", + "to": { + "nodeId": "PiD", + "portName": "Measurement" + } + }, + { + "from": { + "nodeId": "Park", + "portName": "I_Q" + }, + "id": "c9", + "to": { + "nodeId": "PiQ", + "portName": "Measurement" + } + }, + { + "from": { + "nodeId": "PiD", + "portName": "Output" + }, + "id": "c10", + "to": { + "nodeId": "InvPark", + "portName": "V_D" + } + }, + { + "from": { + "nodeId": "PiQ", + "portName": "Output" + }, + "id": "c11", + "to": { + "nodeId": "InvPark", + "portName": "V_Q" + } + }, + { + "from": { + "nodeId": "InvPark", + "portName": "V_Alpha" + }, + "id": "c13", + "to": { + "nodeId": "Svpwm", + "portName": "V_Alpha" + } + }, + { + "from": { + "nodeId": "VdcSense", + "portName": "V_Dc" + }, + "id": "c14", + "to": { + "nodeId": "Svpwm", + "portName": "V_Dc" + } + }, + { + "from": { + "nodeId": "Svpwm", + "portName": "Duty_A" + }, + "id": "c15", + "to": { + "nodeId": "PwmOut", + "portName": "Duty_A" + } + }, + { + "from": { + "nodeId": "Svpwm", + "portName": "Duty_B" + }, + "id": "c16", + "to": { + "nodeId": "PwmOut", + "portName": "Duty_B" + } + }, + { + "from": { + "nodeId": "Svpwm", + "portName": "Duty_C" + }, + "id": "c17", + "to": { + "nodeId": "PwmOut", + "portName": "Duty_C" + } + }, + { + "from": { + "nodeId": "EncoderApp", + "portName": "Theta" + }, + "id": "c24", + "to": { + "nodeId": "LogTheta", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "Svpwm", + "portName": "Duty_A" + }, + "id": "c35", + "to": { + "nodeId": "LogDu", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "Svpwm", + "portName": "Duty_B" + }, + "id": "c36", + "to": { + "nodeId": "LogDv", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "Svpwm", + "portName": "Duty_C" + }, + "id": "c37", + "to": { + "nodeId": "LogDw", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "Clarke", + "portName": "I_Beta" + }, + "id": "c38", + "to": { + "nodeId": "Park", + "portName": "I_Beta" + } + }, + { + "from": { + "nodeId": "InvPark", + "portName": "V_Beta" + }, + "id": "c39", + "to": { + "nodeId": "Svpwm", + "portName": "V_Beta" + } + }, + { + "from": { + "nodeId": "CfgEncSign", + "portName": "Value" + }, + "id": "c40", + "to": { + "nodeId": "ElecAngle", + "portName": "EncoderSign" + } + }, + { + "from": { + "nodeId": "CfgEncOffset", + "portName": "Value" + }, + "id": "c41", + "to": { + "nodeId": "ElecAngle", + "portName": "OffsetDeg" + } + }, + { + "from": { + "nodeId": "CfgPoles", + "portName": "Value" + }, + "id": "c42", + "to": { + "nodeId": "ElecAngle", + "portName": "Poles" + } + }, + { + "from": { + "nodeId": "Park", + "portName": "I_D" + }, + "id": "c43", + "to": { + "nodeId": "LogId", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "Park", + "portName": "I_Q" + }, + "id": "c44", + "to": { + "nodeId": "LogIq", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "PiD", + "portName": "Output" + }, + "id": "c45", + "to": { + "nodeId": "LogVd", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "PiQ", + "portName": "Output" + }, + "id": "c46", + "to": { + "nodeId": "LogVq", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "VdcApp", + "portName": "V_Dc" + }, + "id": "c47", + "to": { + "nodeId": "LogVdc", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "VoltSense", + "portName": "V_U" + }, + "id": "c48", + "to": { + "nodeId": "LogVu", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "VoltSense", + "portName": "V_V" + }, + "id": "c49", + "to": { + "nodeId": "LogVv", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "VoltSense", + "portName": "V_W" + }, + "id": "c50", + "to": { + "nodeId": "LogVw", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "CfgKpQ", + "portName": "Value" + }, + "id": "c51", + "to": { + "nodeId": "PiQ", + "portName": "Kp" + } + }, + { + "from": { + "nodeId": "CfgEnable", + "portName": "Value" + }, + "id": "c52", + "to": { + "nodeId": "EnableCmp", + "portName": "A" + } + }, + { + "from": { + "nodeId": "EnableCmp", + "portName": "Out" + }, + "id": "c53", + "to": { + "nodeId": "ThrottleEnable", + "portName": "In" + } + }, + { + "from": { + "nodeId": "ThrottleEnable", + "portName": "Value" + }, + "id": "c54", + "to": { + "nodeId": "IqGate", + "portName": "Sel" + } + }, + { + "from": { + "nodeId": "IqGate", + "portName": "Out" + }, + "id": "c55", + "to": { + "nodeId": "PiQ", + "portName": "Setpoint" + } + }, + { + "from": { + "nodeId": "IqVar", + "portName": "Value" + }, + "id": "c56", + "to": { + "nodeId": "SlewIq", + "portName": "In" + } + }, + { + "from": { + "nodeId": "Din1", + "portName": "Out" + }, + "id": "c_din1_led", + "to": { + "nodeId": "LedGreen", + "portName": "In" + } + }, + { + "from": { + "nodeId": "Temps", + "portName": "T_Motor" + }, + "id": "c_t_motor", + "to": { + "nodeId": "LogT_Motor", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "Temps", + "portName": "T_Inv1" + }, + "id": "c_t_inv1", + "to": { + "nodeId": "LogT_Inv1", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "Temps", + "portName": "T_Inv2" + }, + "id": "c_t_inv2", + "to": { + "nodeId": "LogT_Inv2", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "Temps", + "portName": "T_Inv3" + }, + "id": "c_t_inv3", + "to": { + "nodeId": "LogT_Inv3", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "Throttle", + "portName": "A" + }, + "id": "c_thrA", + "to": { + "nodeId": "LogThrA", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "Throttle", + "portName": "B" + }, + "id": "c_thrB", + "to": { + "nodeId": "LogThrB", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "SlewIq", + "portName": "Out" + }, + "id": "c_slew_iq_out", + "to": { + "nodeId": "IqGate", + "portName": "Val" + } + }, + { + "from": { + "nodeId": "CfgIqSlew", + "portName": "Value" + }, + "id": "c_slew_rate", + "to": { + "nodeId": "SlewIq", + "portName": "Rate" + } + }, + { + "from": { + "nodeId": "CfgKpD", + "portName": "Value" + }, + "id": "c_kp_d", + "to": { + "nodeId": "PiD", + "portName": "Kp" + } + }, + { + "from": { + "nodeId": "CfgKiD", + "portName": "Value" + }, + "id": "c_ki_d", + "to": { + "nodeId": "PiD", + "portName": "Ki" + } + }, + { + "from": { + "nodeId": "CfgKiQ", + "portName": "Value" + }, + "id": "c_ki_q", + "to": { + "nodeId": "PiQ", + "portName": "Ki" + } + }, + { + "from": { + "nodeId": "Svpwm", + "portName": "Duty_A" + }, + "id": "gui_conn_74", + "to": { + "nodeId": "AdaptiveSampleTrigger1", + "portName": "Duty_A" + } + }, + { + "from": { + "nodeId": "Svpwm", + "portName": "Duty_B" + }, + "id": "gui_conn_103", + "to": { + "nodeId": "AdaptiveSampleTrigger1", + "portName": "Duty_B" + } + }, + { + "from": { + "nodeId": "Svpwm", + "portName": "Duty_C" + }, + "id": "gui_conn_135", + "to": { + "nodeId": "AdaptiveSampleTrigger1", + "portName": "Duty_C" + } + }, + { + "from": { + "nodeId": "AdaptiveSampleTrigger1", + "portName": "GapTicks" + }, + "id": "gui_conn_148", + "to": { + "nodeId": "GapTicks", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "RPMMechElec1", + "portName": "RpmMech" + }, + "id": "gui_conn_11", + "to": { + "nodeId": "Mech_RPM", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "RPMMechElec1", + "portName": "RpmMech" + }, + "id": "c1c", + "to": { + "nodeId": "EncoderLeadComp", + "portName": "RpmMech" + } + }, + { + "from": { + "nodeId": "RPMMechElec1", + "portName": "RpmElec" + }, + "id": "gui_conn_24", + "to": { + "nodeId": "Elec_RPM", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "EncoderRawSinCos1", + "portName": "SinRaw" + }, + "id": "gui_conn_26", + "to": { + "nodeId": "EncoderSin", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "EncoderRawSinCos1", + "portName": "CosRaw" + }, + "id": "gui_conn_48", + "to": { + "nodeId": "EncoderCos", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "CfgLd", + "portName": "Value" + }, + "id": "c_cfg_ld", + "to": { + "nodeId": "FocFeedforward", + "portName": "Ld" + } + }, + { + "from": { + "nodeId": "CfgLq", + "portName": "Value" + }, + "id": "c_cfg_lq", + "to": { + "nodeId": "FocFeedforward", + "portName": "Lq" + } + }, + { + "from": { + "nodeId": "CfgLambda", + "portName": "Value" + }, + "id": "c_cfg_lambda", + "to": { + "nodeId": "FocFeedforward", + "portName": "Lambda" + } + }, + { + "from": { + "nodeId": "Park", + "portName": "I_D" + }, + "id": "c_ff_id", + "to": { + "nodeId": "FocFeedforward", + "portName": "I_D" + } + }, + { + "from": { + "nodeId": "Park", + "portName": "I_Q" + }, + "id": "c_ff_iq", + "to": { + "nodeId": "FocFeedforward", + "portName": "I_Q" + } + }, + { + "from": { + "nodeId": "RPMMechElec1", + "portName": "RpmElec" + }, + "id": "c_ff_rpm", + "to": { + "nodeId": "FocFeedforward", + "portName": "RpmElec" + } + }, + { + "from": { + "nodeId": "FocFeedforward", + "portName": "V_D" + }, + "id": "c_ff_vd", + "to": { + "nodeId": "PiD", + "portName": "Feedforward" + } + }, + { + "from": { + "nodeId": "FocFeedforward", + "portName": "V_Q" + }, + "id": "c_ff_vq", + "to": { + "nodeId": "PiQ", + "portName": "Feedforward" + } + }, + { + "from": { + "nodeId": "FeedbackGate", + "portName": "I_A" + }, + "id": "c_FeedbackGate_I_A_Clarke_I_A", + "to": { + "nodeId": "Clarke", + "portName": "I_A" + } + }, + { + "from": { + "nodeId": "FeedbackGate", + "portName": "I_B" + }, + "id": "c_FeedbackGate_I_B_Clarke_I_B", + "to": { + "nodeId": "Clarke", + "portName": "I_B" + } + }, + { + "from": { + "nodeId": "FeedbackGate", + "portName": "I_C" + }, + "id": "c_FeedbackGate_I_C_Clarke_I_C", + "to": { + "nodeId": "Clarke", + "portName": "I_C" + } + }, + { + "from": { + "nodeId": "AppliedVab", + "portName": "V_Alpha" + }, + "id": "c_AppliedVab_V_Alpha_ObserverObs_V_Alpha", + "to": { + "nodeId": "ObserverObs", + "portName": "V_Alpha" + } + }, + { + "from": { + "nodeId": "AppliedVab", + "portName": "V_Beta" + }, + "id": "c_AppliedVab_V_Beta_ObserverObs_V_Beta", + "to": { + "nodeId": "ObserverObs", + "portName": "V_Beta" + } + }, + { + "from": { + "nodeId": "ElecAngle", + "portName": "ThetaElec" + }, + "id": "c_ElecAngle_ThetaElec_ObserverObs_ThetaElec", + "to": { + "nodeId": "ObserverObs", + "portName": "ThetaElec" + } + }, + { + "from": { + "nodeId": "ObserverObs", + "portName": "I_A" + }, + "id": "c_ObserverObs_I_A_FeedbackGate_Obs_A", + "to": { + "nodeId": "FeedbackGate", + "portName": "Obs_A" + } + }, + { + "from": { + "nodeId": "ObserverObs", + "portName": "I_B" + }, + "id": "c_ObserverObs_I_B_FeedbackGate_Obs_B", + "to": { + "nodeId": "FeedbackGate", + "portName": "Obs_B" + } + }, + { + "from": { + "nodeId": "ObserverObs", + "portName": "I_C" + }, + "id": "c_ObserverObs_I_C_FeedbackGate_Obs_C", + "to": { + "nodeId": "FeedbackGate", + "portName": "Obs_C" + } + }, + { + "from": { + "nodeId": "ObserverObs", + "portName": "I_A" + }, + "id": "c_ObserverObs_I_A_LogObsU_Value", + "to": { + "nodeId": "LogObsU", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "ObserverObs", + "portName": "I_B" + }, + "id": "c_ObserverObs_I_B_LogObsV_Value", + "to": { + "nodeId": "LogObsV", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "ObserverObs", + "portName": "I_C" + }, + "id": "c_ObserverObs_I_C_LogObsW_Value", + "to": { + "nodeId": "LogObsW", + "portName": "Value" + } + }, + { + "from": { + "nodeId": "UseObserver", + "portName": "Value" + }, + "id": "c_UseObserver_Value_ObserverCtrl_Sel", + "to": { + "nodeId": "ObserverCtrl", + "portName": "Sel" + } + } + ], + "name": "foc_sensorless_demo", + "nodeTypes": [ + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Const", + "description": "Provides a constant scalar value, optionally replaced by a wired input.", + "displayName": "Constant", + "domain": "", + "id": "Values.Constant", + "inlineCode": "/* Compile-time constant (or wired value via optional In). */\nOut = Value;\n", + "inputPorts": [ + { + "description": "Optional value that replaces the configured constant when wired.", + "direction": "input", + "name": "In", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Configured constant or the value supplied through In.", + "direction": "output", + "name": "Out", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "parameterTypes": { + "In": { + "description": "Fallback storage for the optional In port.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Value": { + "description": "Constant value emitted when no input overrides it.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Log", + "description": "Publishes a scalar value to runtime telemetry under a configurable key.", + "displayName": "Telemetry Log", + "domain": "", + "id": "Debug.TelemetryLog", + "inlineCode": "platform_telemetry_log_f32(Key, Value);\n", + "inputPorts": [ + { + "description": "Scalar value to publish.", + "direction": "input", + "name": "Value", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [], + "parameterTypes": { + "Key": { + "description": "Telemetry channel name used when publishing the value.", + "dtype": "f32", + "frame": "scalar", + "quantity": "string" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "PwmOut", + "description": "Applies three phase-duty commands to the platform PWM peripheral.", + "displayName": "PWM Out", + "domain": "tim_isr", + "id": "Actuators.PwmOut", + "inlineCode": "platform_pwm_set(Duty_A, Duty_B, Duty_C);\n", + "inputPorts": [ + { + "description": "Phase A PWM duty command in percent.", + "direction": "input", + "name": "Duty_A", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Phase B PWM duty command in percent.", + "direction": "input", + "name": "Duty_B", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Phase C PWM duty command in percent.", + "direction": "input", + "name": "Duty_C", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 1, + "outputPorts": [] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "CanRx", + "description": "Reads the latest frame from a configured CAN receive mailbox and exposes its payload.", + "displayName": "CAN RX", + "domain": "", + "id": "Sensors.CanRx", + "inlineCode": "/* CAN receive mailbox for Id on Bus (1=A/FDCAN1, 2=B/FDCAN2).\n * Fresh is true for one step when a new frame arrived; Dlc/bytes hold the\n * latest payload otherwise. */\nuint8_t buf[8] = {};\nuint32_t seq = 0;\nconst int dlc = platform_can_rx(static_cast(Bus),\n static_cast(Id), buf, &seq);\nFresh = (seq != LastSeq);\nLastSeq = static_cast(seq);\nif (dlc > 0) {\n Dlc = static_cast(dlc);\n D0 = buf[0]; D1 = buf[1]; D2 = buf[2]; D3 = buf[3];\n D4 = buf[4]; D5 = buf[5]; D6 = buf[6]; D7 = buf[7];\n} else {\n Dlc = 0.0f;\n}\n", + "inputPorts": [], + "isEntryPoint": true, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Most recently received payload byte 0.", + "direction": "output", + "name": "D0", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Most recently received payload byte 1.", + "direction": "output", + "name": "D1", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Most recently received payload byte 2.", + "direction": "output", + "name": "D2", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Most recently received payload byte 3.", + "direction": "output", + "name": "D3", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Most recently received payload byte 4.", + "direction": "output", + "name": "D4", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Most recently received payload byte 5.", + "direction": "output", + "name": "D5", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Most recently received payload byte 6.", + "direction": "output", + "name": "D6", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Most recently received payload byte 7.", + "direction": "output", + "name": "D7", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Data length of the latest received frame.", + "direction": "output", + "name": "Dlc", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "True for one execution step when a new frame has arrived.", + "direction": "output", + "name": "Fresh", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + } + } + ], + "parameterTypes": { + "Bus": { + "description": "CAN controller number: 1 selects bus A/FDCAN1 and 2 selects bus B/FDCAN2.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Id": { + "description": "CAN arbitration identifier accepted by the receive mailbox.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "LastSeq": { + "description": "Internal sequence counter used to detect newly received frames.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "PhaseVoltages", + "description": "Reads the filtered three-phase and DC-link voltage sensor channels.", + "displayName": "Phase Voltages", + "domain": "", + "id": "Sensors.PhaseVoltages", + "inlineCode": "/* All voltage sense channels from the MAX22530 isolated ADC, filtered. */\nV_U = rte::Volts(platform_phase_voltage_u());\nV_V = rte::Volts(platform_phase_voltage_v());\nV_W = rte::Volts(platform_phase_voltage_w());\nV_Dc = rte::Volts(platform_get_dc_link_voltage());\n", + "inputPorts": [], + "isEntryPoint": false, + "maxInstances": 1, + "outputPorts": [ + { + "description": "Measured phase U voltage in volts.", + "direction": "output", + "name": "V_U", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + }, + { + "description": "Measured phase V voltage in volts.", + "direction": "output", + "name": "V_V", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + }, + { + "description": "Measured phase W voltage in volts.", + "direction": "output", + "name": "V_W", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + }, + { + "description": "Measured DC-link voltage in volts.", + "direction": "output", + "name": "V_Dc", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + } + ] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "InvPark", + "description": "Rotates d-q voltage commands into stationary alpha-beta coordinates.", + "displayName": "Inverse Park Transform", + "domain": "", + "id": "Transforms.InversePark", + "inlineCode": "const float cos_theta = cosf(Theta);\nconst float sin_theta = sinf(Theta);\nV_Alpha = V_D * cos_theta - V_Q * sin_theta;\nV_Beta = V_D * sin_theta + V_Q * cos_theta;\n", + "inputPorts": [ + { + "description": "Rotating-frame direct-axis voltage.", + "direction": "input", + "name": "V_D", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + }, + { + "description": "Rotating-frame quadrature-axis voltage.", + "direction": "input", + "name": "V_Q", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + }, + { + "description": "Electrical rotation angle in radians.", + "direction": "input", + "name": "Theta", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Stationary-frame alpha-axis voltage.", + "direction": "output", + "name": "V_Alpha", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + }, + { + "description": "Stationary-frame beta-axis voltage.", + "direction": "output", + "name": "V_Beta", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + } + ] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Din", + "description": "Reads a boolean level from one of the platform user digital inputs.", + "displayName": "Digital In", + "domain": "", + "id": "Sensors.DigitalIn", + "inlineCode": "/* User digital input. Pin 1..8 -> USER_DIN_1..8 (see platform_api.h). */\nOut = platform_digital_read(static_cast(Pin));\n", + "inputPorts": [], + "isEntryPoint": true, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Current logic level of the selected digital input.", + "direction": "output", + "name": "Out", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + } + } + ], + "parameterTypes": { + "Pin": { + "description": "User digital input selector in the range 1 through 8.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "FocFeedforward", + "description": "Computes PMSM d/q voltage feed-forward terms from electrical speed, measured currents, and motor parameters. Outputs cross-coupling and back-EMF voltages for the current-loop PI controllers.", + "displayName": "FOC Feed-Forward", + "domain": "", + "id": "Control.FocFeedforward", + "inlineCode": "/* PMSM voltage feed-forward: cross-coupling and back-EMF terms.\n * Electrical speed is supplied in RPM and converted to rad/s internally.\n *\n * Vd_ff = -\u03c9e * Lq * Iq\n * Vq_ff = \u03c9e * Ld * Id + \u03c9e * Lambda\n */\nconstexpr float RPM_TO_RAD_S = 2.0f * 3.14159265358979323846f / 60.0f;\nconst float omega_e = RpmElec * RPM_TO_RAD_S;\n\nconst float id_a = I_D.in(au::amperes);\nconst float iq_a = I_Q.in(au::amperes);\n\nconst float vd_ff = -(omega_e * Lq * iq_a);\nconst float vq_ff = (omega_e * Ld * id_a) + (omega_e * Lambda);\n\nV_D = rte::Volts(vd_ff);\nV_Q = rte::Volts(vq_ff);\n", + "inputPorts": [ + { + "description": "Measured d-axis current.", + "direction": "input", + "name": "I_D", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Measured q-axis current.", + "direction": "input", + "name": "I_Q", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Electrical rotor speed in revolutions per minute. Converted internally to rad/s.", + "direction": "input", + "name": "RpmElec", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "D-axis feed-forward voltage (cross-coupling term).", + "direction": "output", + "name": "V_D", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + }, + { + "description": "Q-axis feed-forward voltage (cross-coupling + back-EMF terms).", + "direction": "output", + "name": "V_Q", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + } + ], + "parameterTypes": { + "Lambda": { + "description": "Permanent-magnet flux linkage in webers.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Ld": { + "description": "D-axis inductance in henries.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Lq": { + "description": "Q-axis inductance in henries.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Dout", + "description": "Writes a boolean signal to a user digital output or onboard status LED.", + "displayName": "Digital Out", + "domain": "", + "id": "Actuators.DigitalOut", + "inlineCode": "/* User digital output. Pin 1..4 -> USER_DOUT_1..4, 5 -> green LED,\n * 6 -> orange LED (see platform_api.h). */\nplatform_digital_write(static_cast(Pin), In);\n", + "inputPorts": [ + { + "description": "Logic level to write to the selected output.", + "direction": "input", + "name": "In", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [], + "parameterTypes": { + "Pin": { + "description": "Output selector: 1-4 are user digital outputs, 5 is the green LED, and 6 is the orange LED.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "SampleTrigger", + "description": "Schedules the next phase-current ADC burst in the quietest available PWM window.", + "displayName": "Adaptive Sample Trigger", + "domain": "tim_isr", + "id": "hw.adaptive_sample_trigger", + "inlineCode": "/* Adaptive current-sample trigger:\n * Place the ADC micro-burst trigger at the quietest point in the upcoming\n * PWM period, computed from the three phase duties. Falls back to the\n * legacy bottom trigger when no clean window exists.\n *\n * Connect after the SVPWM node so the duties reflect the upcoming period.\n */\nconst uint32_t arr = platform_pwm_get_arr();\nconst uint32_t gap = platform_schedule_adaptive_sample(\n Duty_A, Duty_B, Duty_C, arr);\n\nGapTicks = rte::Dimensionless(static_cast(gap));\n", + "inputPorts": [ + { + "description": "Normalized phase-A PWM duty command for the upcoming period.", + "direction": "input", + "name": "Duty_A", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Normalized phase-B PWM duty command for the upcoming period.", + "direction": "input", + "name": "Duty_B", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Normalized phase-C PWM duty command for the upcoming period.", + "direction": "input", + "name": "Duty_C", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 1, + "outputPorts": [ + { + "description": "Available quiet-window width in PWM timer ticks.", + "direction": "output", + "name": "GapTicks", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "ForcedAngle", + "description": "Generates a continuously advancing electrical angle for open-loop control.", + "displayName": "Forced Angle", + "domain": "", + "id": "Transforms.ForcedAngle", + "inlineCode": "Angle += RateRadPerS * Dt;\nif (Angle >= 6.28318530718f) Angle -= 6.28318530718f;\nThetaElec = Angle;\n", + "inputPorts": [], + "isEntryPoint": false, + "maxInstances": 1, + "outputPorts": [ + { + "description": "Generated electrical angle wrapped to one revolution.", + "direction": "output", + "name": "ThetaElec", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "parameterTypes": { + "Angle": { + "description": "Persistent generated angle state in radians.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Dt": { + "description": "Update period in seconds.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "RateRadPerS": { + "description": "Electrical angular velocity in radians per second.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "platform_trace_configure8(Key0, Scale0, Key1, Scale1, Key2, Scale2, Key3, Scale3,\n Key4, Scale4, Key5, Scale5, Key6, Scale6, Key7, Scale7);\n", + "defaultName": "Trace8", + "description": "Captures eight values in the control ISR for the independent CAN-FD trace plane. Trace remains disabled unless Can.Trace.En is enabled.", + "displayName": "High-rate Trace (8)", + "domain": "tim_isr", + "id": "Debug.Trace8", + "inlineCode": "platform_trace_capture8(Value0, Value1, Value2, Value3, Value4, Value5, Value6, Value7);\n", + "inputPorts": [ + { + "description": "Fast channel 0.", + "direction": "input", + "name": "Value0", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Fast channel 1.", + "direction": "input", + "name": "Value1", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Fast channel 2.", + "direction": "input", + "name": "Value2", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Fast channel 3.", + "direction": "input", + "name": "Value3", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Fast channel 4.", + "direction": "input", + "name": "Value4", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Fast channel 5.", + "direction": "input", + "name": "Value5", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Fast channel 6.", + "direction": "input", + "name": "Value6", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Fast channel 7.", + "direction": "input", + "name": "Value7", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 1, + "outputPorts": [], + "parameterTypes": { + "Key0": { + "description": "Channel 0 name.", + "dtype": "f32", + "frame": "scalar", + "quantity": "string" + }, + "Key1": { + "description": "Channel 1 name.", + "dtype": "f32", + "frame": "scalar", + "quantity": "string" + }, + "Key2": { + "description": "Channel 2 name.", + "dtype": "f32", + "frame": "scalar", + "quantity": "string" + }, + "Key3": { + "description": "Channel 3 name.", + "dtype": "f32", + "frame": "scalar", + "quantity": "string" + }, + "Key4": { + "description": "Channel 4 name.", + "dtype": "f32", + "frame": "scalar", + "quantity": "string" + }, + "Key5": { + "description": "Channel 5 name.", + "dtype": "f32", + "frame": "scalar", + "quantity": "string" + }, + "Key6": { + "description": "Channel 6 name.", + "dtype": "f32", + "frame": "scalar", + "quantity": "string" + }, + "Key7": { + "description": "Channel 7 name.", + "dtype": "f32", + "frame": "scalar", + "quantity": "string" + }, + "Scale0": { + "description": "Channel 0 units per signed 16-bit count.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Scale1": { + "description": "Channel 1 units per signed 16-bit count.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Scale2": { + "description": "Channel 2 units per signed 16-bit count.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Scale3": { + "description": "Channel 3 units per signed 16-bit count.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Scale4": { + "description": "Channel 4 units per signed 16-bit count.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Scale5": { + "description": "Channel 5 units per signed 16-bit count.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Scale6": { + "description": "Channel 6 units per signed 16-bit count.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Scale7": { + "description": "Channel 7 units per signed 16-bit count.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Pi", + "description": "Proportional-integral controller with output clamping, back-calculation anti-windup, and an optional feed-forward term.", + "displayName": "PI Controller", + "domain": "", + "id": "Control.Pi", + "inlineCode": "/* PI with clamping + back-calculation anti-windup.\n * Dimensionless throughout: implicit unit extraction/injection handles any\n * physical-quantity wiring at the binding sites. */\nconst float error = Setpoint - Measurement;\nIntegral += error * Dt;\n\nfloat raw_output = Kp * error + Ki * Integral + Feedforward;\n\n/* Dynamic limit derived from DC-link voltage. Allow overmodulation up to\n * the six-step boundary (2*Vdc/3) so the SVPWM stage can use the full\n * hexagon when commanded. Linear SVPWM limit is Vdc/sqrt(3). */\nconst float vdc = platform_get_dc_link_voltage();\nconst float dynamic_max = vdc * 2.0f / 3.0f;\nconst float max_limit = (dynamic_max < OutputMax) ? dynamic_max : OutputMax;\nconst float min_limit = (-dynamic_max > OutputMin) ? -dynamic_max : OutputMin;\n\nfloat limited_output = raw_output;\nif (limited_output > max_limit) limited_output = max_limit;\nif (limited_output < min_limit) limited_output = min_limit;\n\n/* Back-calculation anti-windup, scaled by AwGain (0 disables; 1.0 matches\n * the base-image VectorPIController). */\nif (Ki > 0.0001f && Kp > 0.0001f && AwGain > 0.0f) {\n const float excess = raw_output - limited_output;\n Integral -= excess * Dt * AwGain / (Kp * Ki);\n}\n\nOutput = limited_output;\n", + "inputPorts": [ + { + "description": "Desired target value.", + "direction": "input", + "name": "Setpoint", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Measured process value subtracted from the setpoint.", + "direction": "input", + "name": "Measurement", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Optional additive feed-forward value. Wired voltage sources are extracted automatically; unconnected ports default to zero.", + "direction": "input", + "name": "Feedforward", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Clamped PI control effort.", + "direction": "output", + "name": "Output", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "parameterTypes": { + "AwGain": { + "description": "Back-calculation anti-windup gain. Zero disables anti-windup.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Dt": { + "description": "Controller step period in seconds.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Feedforward": { + "description": "Default value used when the Feedforward input port is not connected.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Integral": { + "description": "Persistent accumulated-error state.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Ki": { + "description": "Integral gain applied to the accumulated error.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Kp": { + "description": "Proportional gain applied to the current error.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "OutputMax": { + "description": "Upper output clamp, additionally limited by the measured DC-link voltage.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "OutputMin": { + "description": "Lower output clamp, additionally limited by the measured DC-link voltage.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Throttle", + "description": "Reads the redundant throttle channels and their plausibility status.", + "displayName": "Throttle", + "domain": "", + "id": "Sensors.Throttle", + "inlineCode": "/* Dual throttle channels, normalized [0..1] by the base-image driver\n * (KV calibration Hw.ThrA/B.MinV/MaxV). Both read 0 and Valid is false\n * while the channels disagree beyond the plausibility tolerance. */\nA = platform_get_throttle_a();\nB = platform_get_throttle_b();\nValid = platform_get_throttle_valid();\n", + "inputPorts": [], + "isEntryPoint": true, + "maxInstances": 1, + "outputPorts": [ + { + "description": "Normalized throttle channel A in the range 0 to 1.", + "direction": "output", + "name": "A", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Normalized throttle channel B in the range 0 to 1.", + "direction": "output", + "name": "B", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "True when both throttle channels pass the plausibility check.", + "direction": "output", + "name": "Valid", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + } + } + ] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Mtpa", + "description": "Maximum Torque Per Ampere current-reference generator for PMSM. Converts a per-unit current command into optimal d-q current references using motor inductances and flux linkage.", + "displayName": "MTPA Reference", + "domain": "", + "id": "Control.Mtpa", + "inlineCode": "/* Maximum Torque Per Ampere (MTPA) current-reference generator.\n * CurrentRef is per-unit [-1..1] and scaled by CurrentMax to obtain the\n * actual current magnitude. For SPM motors (Ld == Lq) the result is\n * Id=0, Iq=CurrentRef*CurrentMax. For IPMSM (Lq > Ld) the current angle\n * is computed from the analytical MTPA condition.\n *\n * Torque equation: T = (3/2)*pp*(Lambda*Iq + (Ld-Lq)*Id*Iq)\n * MTPA condition: Lambda*cos(beta) + (Ld-Lq)*Is*cos(2*beta) = 0\n * Solving for cos(beta) with delta = Lq - Ld:\n * cos(beta) = (sqrt(Lambda^2 + 8*delta^2*Is^2) - Lambda) / (4*delta*Is)\n */\nconst float i_cmd = CurrentRef * CurrentMax.in(au::amperes);\nconst float i_abs = fabsf(i_cmd);\nfloat id_ref = 0.0f;\n\nif (i_abs > 1e-6f) {\n const float delta = Lq - Ld;\n if (fabsf(delta) > 1e-9f) {\n const float radical = sqrtf(Lambda * Lambda + 8.0f * delta * delta * i_abs * i_abs);\n float cos_beta = (radical - Lambda) / (4.0f * delta * i_abs);\n if (cos_beta > 1.0f) cos_beta = 1.0f;\n if (cos_beta < -1.0f) cos_beta = -1.0f;\n id_ref = i_abs * cos_beta;\n }\n}\n\nconst float ratio = (i_abs > 1e-6f) ? (id_ref / i_abs) : 0.0f;\nconst float sin_beta = sqrtf(1.0f - ratio * ratio);\nconst float iq_ref = i_cmd * sin_beta;\n\nI_D = rte::Amperes(id_ref);\nI_Q = rte::Amperes(iq_ref);\n", + "inputPorts": [ + { + "description": "Per-unit current command [-1..1]. Scaled by CurrentMax to obtain the current magnitude used for MTPA.", + "direction": "input", + "name": "CurrentRef", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "D-axis current reference that realizes MTPA for the requested current magnitude.", + "direction": "output", + "name": "I_D", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Q-axis current reference that realizes MTPA for the requested current magnitude.", + "direction": "output", + "name": "I_Q", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + } + ], + "parameterTypes": { + "CurrentMax": { + "description": "Maximum current magnitude in amperes. CurrentRef is multiplied by this value to obtain the actual current command.", + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + }, + "Lambda": { + "description": "Permanent-magnet flux linkage in webers.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Ld": { + "description": "D-axis inductance in henries.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Lq": { + "description": "Q-axis inductance in henries.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Temps", + "description": "Reads the motor and three inverter temperature channels from the application sensors.", + "displayName": "Temperatures", + "domain": "", + "id": "Sensors.Temperatures", + "inlineCode": "/* Motor + board temperatures from the base-image ApplicationSensors driver.\n * NAN while a channel is disabled or out of range (open/short). */\nT_Motor = rte::Celsius(platform_get_motor_temperature());\nT_Inv1 = rte::Celsius(platform_get_inverter_temperature(0));\nT_Inv2 = rte::Celsius(platform_get_inverter_temperature(1));\nT_Inv3 = rte::Celsius(platform_get_inverter_temperature(2));\n", + "inputPorts": [], + "isEntryPoint": false, + "maxInstances": 1, + "outputPorts": [ + { + "description": "Motor temperature in degrees Celsius; NaN indicates a disabled or invalid sensor.", + "direction": "output", + "name": "T_Motor", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "temperature" + } + }, + { + "description": "Inverter temperature channel 1 in degrees Celsius; NaN indicates an invalid sensor.", + "direction": "output", + "name": "T_Inv1", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "temperature" + } + }, + { + "description": "Inverter temperature channel 2 in degrees Celsius; NaN indicates an invalid sensor.", + "direction": "output", + "name": "T_Inv2", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "temperature" + } + }, + { + "description": "Inverter temperature channel 3 in degrees Celsius; NaN indicates an invalid sensor.", + "direction": "output", + "name": "T_Inv3", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "temperature" + } + } + ] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Greater", + "description": "Compares two scalar values and reports whether A is greater than B.", + "displayName": "Greater Than", + "domain": "", + "id": "Logic.Greater", + "inlineCode": "Out = (A > B);\n", + "inputPorts": [ + { + "description": "Left-hand value in the comparison.", + "direction": "input", + "name": "A", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Right-hand value in the comparison.", + "direction": "input", + "name": "B", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "True when A is greater than B.", + "direction": "output", + "name": "Out", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + } + } + ], + "parameterTypes": { + "B": { + "description": "Fallback comparison threshold used when the B input is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "VdcSense", + "description": "Reads the inverter DC-link voltage from the platform sensor interface.", + "displayName": "DC Link Voltage", + "domain": "", + "id": "Sensors.DcLinkVoltage", + "inlineCode": "V_Dc = rte::Volts(platform_get_dc_link_voltage());\n", + "inputPorts": [], + "isEntryPoint": true, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Measured DC-link voltage in volts.", + "direction": "output", + "name": "V_Dc", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + } + ] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Deriv", + "description": "Estimates a signal derivative with an optional first-order low-pass filter.", + "displayName": "Derivative", + "domain": "", + "id": "Transforms.Derivative", + "inlineCode": "/* Filtered derivative: Out ~= d(In)/dt, low-passed at Fc [Hz] to keep\n * sampling noise out of the estimate (Fc <= 0 disables filtering).\n * Prev/OutState are persistent state (leave at graph defaults). */\nconst float raw = (In - Prev) / Dt;\nPrev = In;\nif (Fc > 0.0f) {\n const float alpha = 1.0f / (1.0f + 1.0f / (6.28318530718f * Fc * Dt));\n OutState += alpha * (raw - OutState);\n} else {\n OutState = raw;\n}\nOut = OutState;\n", + "inputPorts": [ + { + "description": "Signal whose time derivative is estimated.", + "direction": "input", + "name": "In", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Filtered derivative estimate.", + "direction": "output", + "name": "Out", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "parameterTypes": { + "Dt": { + "description": "Sample period in seconds.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Fc": { + "description": "Low-pass cutoff frequency in hertz. Values at or below zero disable filtering.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "OutState": { + "description": "Persistent filtered derivative state.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Prev": { + "description": "Persistent previous input sample used by the finite difference.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Rpm", + "description": "Reads the platform's mechanical and electrical motor-speed estimates.", + "displayName": "RPM (Mech/Elec)", + "domain": "", + "id": "hw.rpm", + "inlineCode": "RpmMech = rte::Dimensionless(platform_get_rpm_mech());\nRpmElec = rte::Dimensionless(platform_get_rpm_elec());\n", + "inputPorts": [], + "isEntryPoint": false, + "maxInstances": 1, + "outputPorts": [ + { + "description": "Estimated mechanical speed in revolutions per minute.", + "direction": "output", + "name": "RpmMech", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Estimated electrical speed in revolutions per minute.", + "direction": "output", + "name": "RpmElec", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Encoder", + "description": "Reads the latest mechanical rotor angle and motor speed from the encoder driver.", + "displayName": "Encoder", + "domain": "", + "id": "Sensors.Encoder", + "inlineCode": "/* Mechanical angle [rad] and speed [rpm] from the base-image encoder driver. */\nTheta = platform_get_encoder_angle_latest() * 0.01745329251f; // deg -> rad\nOmega = platform_get_motor_rpm();\n", + "inputPorts": [], + "isEntryPoint": true, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Mechanical rotor angle in radians.", + "direction": "output", + "name": "Theta", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Mechanical motor speed in revolutions per minute.", + "direction": "output", + "name": "Omega", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Svpwm", + "description": "Converts an alpha-beta voltage vector into centered three-phase PWM duty commands.", + "displayName": "Space Vector PWM", + "domain": "", + "id": "Transforms.Svpwm", + "inlineCode": "/* Clamp the alpha/beta voltage vector to the six-step boundary.\n * The maximum line-to-neutral voltage magnitude for linear modulation is\n * Vdc / sqrt(3); overmodulation is allowed up to 2*Vdc/3. */\nconst float sqrt3 = 1.7320508075688772f;\nconst float v_max_linear = V_Dc.in(au::volts) * 2.0f / 3.0f;\nfloat valpha = V_Alpha.in(au::volts);\nfloat vbeta = V_Beta.in(au::volts);\nconst float v_albe_sq = valpha * valpha + vbeta * vbeta;\nif (v_albe_sq > v_max_linear * v_max_linear && v_albe_sq > 1e-12f) {\n const float scale = v_max_linear / sqrtf(v_albe_sq);\n valpha *= scale;\n vbeta *= scale;\n}\n\n/* Inverse Clarke: alpha/beta -> A/B/C. */\nconst float v_a = valpha / V_Dc.in(au::volts);\nconst float v_b = (-0.5f * valpha + 0.86602540378f * vbeta) / V_Dc.in(au::volts);\nconst float v_c = (-0.5f * valpha - 0.86602540378f * vbeta) / V_Dc.in(au::volts);\n\nfloat v_min = v_a;\nif (v_b < v_min) v_min = v_b;\nif (v_c < v_min) v_min = v_c;\n\nfloat v_max = v_a;\nif (v_b > v_max) v_max = v_b;\nif (v_c > v_max) v_max = v_c;\n\nconst float v_offset = 0.5f * (v_min + v_max);\n\n/* Convert to percent duty and clamp. Linear SVM stays roughly in\n * [21%, 79%]; clamping to [0,100] only catches numerical edge cases. */\nfloat duty_a_pct = 50.0f + 50.0f * (v_a - v_offset);\nfloat duty_b_pct = 50.0f + 50.0f * (v_b - v_offset);\nfloat duty_c_pct = 50.0f + 50.0f * (v_c - v_offset);\n\nif (duty_a_pct < 0.0f) duty_a_pct = 0.0f; else if (duty_a_pct > 100.0f) duty_a_pct = 100.0f;\nif (duty_b_pct < 0.0f) duty_b_pct = 0.0f; else if (duty_b_pct > 100.0f) duty_b_pct = 100.0f;\nif (duty_c_pct < 0.0f) duty_c_pct = 0.0f; else if (duty_c_pct > 100.0f) duty_c_pct = 100.0f;\n\nDuty_A = duty_a_pct;\nDuty_B = duty_b_pct;\nDuty_C = duty_c_pct;\n", + "inputPorts": [ + { + "description": "Requested stationary-frame alpha-axis voltage.", + "direction": "input", + "name": "V_Alpha", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + }, + { + "description": "Requested stationary-frame beta-axis voltage.", + "direction": "input", + "name": "V_Beta", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + }, + { + "description": "Measured DC-link voltage used for normalization and modulation limiting.", + "direction": "input", + "name": "V_Dc", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Phase A PWM duty command in percent.", + "direction": "output", + "name": "Duty_A", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Phase B PWM duty command in percent.", + "direction": "output", + "name": "Duty_B", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Phase C PWM duty command in percent.", + "direction": "output", + "name": "Duty_C", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Var", + "description": "Stores a scalar value and updates it when the Set input is true.", + "displayName": "Var", + "domain": "", + "id": "Values.Var", + "inlineCode": "if (Set) Stored = In;\nValue = Stored;\n", + "inputPorts": [ + { + "description": "New scalar value to store when Set is true.", + "direction": "input", + "name": "In", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Write enable. When true, copies In into the stored value.", + "direction": "input", + "name": "Set", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Current stored scalar value.", + "direction": "output", + "name": "Value", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "parameterTypes": { + "In": { + "description": "Fallback new value when the In input is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Set": { + "description": "Fallback write-enable value when the Set input is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + }, + "Stored": { + "description": "Persistent scalar storage state.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Gate", + "description": "Passes a value when enabled and outputs zero when disabled.", + "displayName": "Gate", + "domain": "", + "id": "Logic.Gate", + "inlineCode": "/* Pass Val when Sel is true, else 0. */\nOut = Sel ? Val : 0.0f;\n", + "inputPorts": [ + { + "description": "Enable signal. True passes Val; false selects zero.", + "direction": "input", + "name": "Sel", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + } + }, + { + "description": "Value passed through while Sel is true.", + "direction": "input", + "name": "Val", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Val when selected, otherwise zero.", + "direction": "output", + "name": "Out", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Var", + "description": "Stores a boolean value and updates it when the Set input is true.", + "displayName": "Var (Bool)", + "domain": "", + "id": "Values.VarBool", + "inlineCode": "if (Set) Stored = In;\nValue = Stored;\n", + "inputPorts": [ + { + "description": "New boolean value to store when Set is true.", + "direction": "input", + "name": "In", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + } + }, + { + "description": "Write enable. When true, copies In into the stored value.", + "direction": "input", + "name": "Set", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Current stored boolean value.", + "direction": "output", + "name": "Value", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + } + } + ], + "parameterTypes": { + "In": { + "description": "Fallback new boolean value when the In input is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + }, + "Set": { + "description": "Fallback write-enable value when the Set input is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + }, + "Stored": { + "description": "Persistent boolean storage state.", + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Ladrc", + "description": "Linear Active Disturbance Rejection Controller for a first-order plant (PMSM dq current). Drop-in alternative to Control.Pi: Setpoint/Measurement \u2192 voltage Output. Uses a 2-state linear ESO + PD-like feedback. Does not modify FOC/MPCC nodes.", + "displayName": "LADRC (1st-order)", + "domain": "", + "id": "Control.Ladrc", + "inlineCode": "/* Linear ADRC (LADRC) for a first-order plant:\n * dy/dt = f_total + b0 * u\n * Used here as a PMSM dq-current regulator (drop-in for Control.Pi).\n *\n * ESO (Gao bandwidth parameterization):\n * e = z1 - y\n * z1 += dt * (z2 + b0*u - 2*\u03c9o*e)\n * z2 += dt * (-\u03c9o^2 * e)\n * Control:\n * u0 = \u03c9c * (r - z1)\n * u = (u0 - z2) / b0\n *\n * Independent of FOC PI and FCS-MPCC implementations.\n */\nfloat dt = Dt;\nfloat b0 = B0;\nfloat wc = OmegaC;\nfloat wo = OmegaO;\nif (!(dt > 0.0f)) dt = 0.0002f;\nif (!(b0 > 1.0e-6f) && !(b0 < -1.0e-6f)) b0 = 10000.0f; /* ~1/100\u00b5H */\nif (!(wc > 0.0f)) wc = 800.0f;\nif (!(wo > 0.0f)) wo = 2400.0f;\n\nconst float y = Measurement;\nconst float r = Setpoint;\n\nconst float beta1 = 2.0f * wo;\nconst float beta2 = wo * wo;\n\nfloat z1 = Z1;\nfloat z2 = Z2;\n/* Cold-start: align observer to measurement once. */\nif (z1 == 0.0f && z2 == 0.0f && UPrev == 0.0f) {\n z1 = y;\n}\n\nconst float u_prev = UPrev;\nconst float e_obs = z1 - y;\nz1 += dt * (z2 + b0 * u_prev - beta1 * e_obs);\nz2 += dt * (-beta2 * e_obs);\nZ1 = z1;\nZ2 = z2;\n\nconst float u0 = wc * (r - z1);\nfloat u = (u0 - z2) / b0;\n\n/* Same Vdc-aware clamp convention as Control.Pi: allow overmodulation up\n * to the six-step boundary (2*Vdc/3). */\nconst float vdc = platform_get_dc_link_voltage();\nconst float dynamic_max = vdc * 2.0f / 3.0f;\nfloat max_limit = (dynamic_max < OutputMax) ? dynamic_max : OutputMax;\nfloat min_limit = (-dynamic_max > OutputMin) ? -dynamic_max : OutputMin;\nif (u > max_limit) u = max_limit;\nif (u < min_limit) u = min_limit;\n\nUPrev = u;\nOutput = u;\n", + "inputPorts": [ + { + "description": "Desired current (A) or process setpoint.", + "direction": "input", + "name": "Setpoint", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Measured current (A) or process value.", + "direction": "input", + "name": "Measurement", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Control effort (volts for current-loop use).", + "direction": "output", + "name": "Output", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "parameterTypes": { + "B0": { + "description": "Plant gain estimate b0. For dq current use \u2248 1/L (e.g. Ld or Lq).", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Dt": { + "description": "Controller step period in seconds.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "OmegaC": { + "description": "Controller bandwidth \u03c9c [rad/s]. kp = \u03c9c.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "OmegaO": { + "description": "Observer bandwidth \u03c9o [rad/s]. Typically 3\u201310\u00d7 \u03c9c.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "OutputMax": { + "description": "Upper output clamp (also limited by Vdc/\u221a3\u00b70.95).", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "OutputMin": { + "description": "Lower output clamp (also limited by \u2212Vdc/\u221a3\u00b70.95).", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "UPrev": { + "description": "Persistent previous control effort for the ESO input.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Z1": { + "description": "Persistent ESO state: estimated output.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Z2": { + "description": "Persistent ESO state: estimated total disturbance.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Slew", + "description": "Limits how quickly a signal can rise or fall over time.", + "displayName": "Slew Rate Limiter", + "domain": "", + "id": "Control.Slew", + "inlineCode": "/* Rate-limited reference follower: Out tracks In at max Rate units/sec.\n * On control start Value resets to the graph default, so references ramp\n * smoothly from zero instead of stepping. */\nconst float target = In;\nconst float step = Rate * Dt;\nfloat v = Value;\nif (target > v + step) {\n v += step;\n} else if (target < v - step) {\n v -= step;\n} else {\n v = target;\n}\nValue = v;\nOut = Value;\n", + "inputPorts": [ + { + "description": "Target value for the limiter to follow.", + "direction": "input", + "name": "In", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Rate-limited output value.", + "direction": "output", + "name": "Out", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "parameterTypes": { + "Dt": { + "description": "Update period in seconds.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Rate": { + "description": "Maximum absolute rate of change in units per second.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Value": { + "description": "Persistent current output state.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "ElecAngle", + "description": "Converts mechanical rotor angle to wrapped electrical angle using pole count, direction, and offset.", + "displayName": "Electrical Angle", + "domain": "", + "id": "Transforms.ElecAngle", + "inlineCode": "/* Wrap the mechanical encoder angle to [0, 2*pi). */\nconst float two_pi = 6.28318530718f;\nfloat theta = fmodf(ThetaMech, two_pi);\nif (theta < 0.0f) theta += two_pi;\n\n/* Electrical angle = offset (elec deg) + sign * encoder_angle * (Poles / 2).\n * Matches the base-image FocController convention. */\nconstexpr float DEG_TO_RAD = 0.01745329251f;\nfloat elec = OffsetDeg * DEG_TO_RAD + EncoderSign * theta * Poles * 0.5f;\n\n/* Wrap the electrical angle to [0, 2*pi). */\nelec = fmodf(elec, two_pi);\nif (elec < 0.0f) elec += two_pi;\n\nThetaElec = elec;\n", + "inputPorts": [ + { + "description": "Mechanical rotor angle in radians.", + "direction": "input", + "name": "ThetaMech", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Electrical-angle calibration offset in degrees.", + "direction": "input", + "name": "OffsetDeg", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Encoder direction multiplier, normally 1 or -1.", + "direction": "input", + "name": "EncoderSign", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Motor pole count used to convert mechanical to electrical angle.", + "direction": "input", + "name": "Poles", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 1, + "outputPorts": [ + { + "description": "Electrical rotor angle wrapped to the range 0 through 2\u03c0 radians.", + "direction": "output", + "name": "ThetaElec", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "parameterTypes": { + "EncoderSign": { + "description": "Fallback encoder direction multiplier when the input is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "OffsetDeg": { + "description": "Fallback electrical-angle calibration offset in degrees when the input is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Poles": { + "description": "Fallback motor pole count when the input is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "/* Seed the current observer with motor parameters from calibration.\n * The codegen FOC does not call FocControlManager::start(), so the observer\n * must be initialized here. */\nplatform_observer_init_from_calibration();\n", + "defaultName": "Observer", + "description": "Corrects and predicts phase currents using burst measurements and the applied voltage vector.", + "displayName": "Current Observer", + "domain": "tim_isr", + "id": "hw.current_observer", + "inlineCode": "/* Current observer node:\n * 1. Correct the observer with the measured phase currents from the\n * hw.phase_currents node (ADC ISR domain).\n * 2. Run the Luenberger prediction step using the applied voltage vector.\n * 3. Output the observer-estimated phase currents.\n *\n * The correction uses the latest micro-burst measurement. The prediction\n * uses the voltage vector applied for the next control period.\n */\nconst float iu_meas = I_A_Meas.in(au::amperes);\nconst float iv_meas = I_B_Meas.in(au::amperes);\nconst float diudt = Diudt;\nconst float divdt = Divdt;\nconst uint32_t burst_time_us = static_cast(BurstTimeUs);\n\nplatform_observer_correct(iu_meas, iv_meas, diudt, divdt, burst_time_us);\n\n/* The input voltage is already delayed by one control step via the\n * math.delay node, breaking the algebraic loop. */\nplatform_observer_predict(V_Alpha.in(au::volts), V_Beta.in(au::volts),\n ThetaElec, platform_get_current_domain_dt());\n\nfloat iu_obs = 0.0f, iv_obs = 0.0f, iw_obs = 0.0f;\nplatform_get_observer_currents(&iu_obs, &iv_obs, &iw_obs);\n\nI_A = rte::Amperes(iu_obs);\nI_B = rte::Amperes(iv_obs);\nI_C = rte::Amperes(iw_obs);\n", + "inputPorts": [ + { + "name": "I_A_Meas", + "description": "Measured phase-A current used to correct the observer.", + "direction": "input", + "type": { + "quantity": "current", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "I_B_Meas", + "description": "Measured phase-B current used to correct the observer.", + "direction": "input", + "type": { + "quantity": "current", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "I_C_Meas", + "description": "Measured phase-C current used to correct the observer.", + "direction": "input", + "type": { + "quantity": "current", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "Diudt", + "description": "Estimated phase-U current slope from the ADC sample burst.", + "direction": "input", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "Divdt", + "description": "Estimated phase-V current slope from the ADC sample burst.", + "direction": "input", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "BurstTimeUs", + "description": "Elapsed time in microseconds across the ADC sample burst.", + "direction": "input", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "V_Alpha", + "description": "Previously applied alpha-axis voltage used for prediction.", + "direction": "input", + "type": { + "quantity": "voltage", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "V_Beta", + "description": "Previously applied beta-axis voltage used for prediction.", + "direction": "input", + "type": { + "quantity": "voltage", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "ThetaElec", + "description": "Electrical rotor angle used by the observer prediction.", + "direction": "input", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + } + ], + "isEntryPoint": false, + "maxInstances": 1, + "outputPorts": [ + { + "name": "I_A", + "description": "Observer-estimated phase-A current.", + "direction": "output", + "type": { + "quantity": "current", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "I_B", + "description": "Observer-estimated phase-B current.", + "direction": "output", + "type": { + "quantity": "current", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "I_C", + "description": "Observer-estimated phase-C current.", + "direction": "output", + "type": { + "quantity": "current", + "frame": "scalar", + "dtype": "f32" + } + } + ], + "parameterTypes": {} + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "PhaseCurrents", + "description": "Samples the three inverter phase-current channels from the platform current sensors.", + "displayName": "Phase Currents", + "domain": "", + "id": "Sensors.PhaseCurrents", + "inlineCode": "/* use_observer (Gen6 platform_api.h): when set, this node outputs the\n * CurrentObserver's predicted/corrected currents instead of the raw ADC\n * samples, exactly like Gen6 FocControlManager::onPwmPeriod() switching its\n * feedback source. The platform API has no observer-valid accessor\n * (platform_get_observer_currents is void), so the flag alone selects the\n * source \u2014 before the first observer correction the observer reports zeros,\n * same as Gen6.\n *\n * Polarity: the inversion trim applies to the raw ADC path only. The\n * currents that correct the observer are polarity-corrected before they\n * reach it, so observer output already follows the FOC convention (matches\n * the Gen6 control path, which consumes getPhaseCurrents() unsigned). */\nif (platform_get_use_observer()) {\n float iu_o = 0.0f;\n float iv_o = 0.0f;\n float iw_o = 0.0f;\n platform_get_observer_currents(&iu_o, &iv_o, &iw_o);\n I_A = rte::Amperes(iu_o);\n I_B = rte::Amperes(iv_o);\n I_C = rte::Amperes(iw_o);\n} else {\n float iu_f = 0.0f;\n float iv_f = 0.0f;\n float iw_f = 0.0f;\n if (platform_get_phase_currents(&iu_f, &iv_f, &iw_f)) {\n /* Keep raw sensor polarity available for general telemetry, while FOC\n * graphs enable inversion for this hardware's current-sensor wiring. */\n const float polarity = InvertPolarity ? -1.0f : 1.0f;\n I_A = rte::Amperes(polarity * iu_f);\n I_B = rte::Amperes(polarity * iv_f);\n I_C = rte::Amperes(polarity * iw_f);\n }\n}\n", + "inputPorts": [], + "isEntryPoint": true, + "maxInstances": 1, + "outputPorts": [ + { + "name": "I_A", + "description": "Measured phase A current in amperes.", + "direction": "output", + "type": { + "quantity": "current", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "I_B", + "description": "Measured phase B current in amperes.", + "direction": "output", + "type": { + "quantity": "current", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "I_C", + "description": "Measured phase C current in amperes.", + "direction": "output", + "type": { + "quantity": "current", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "Diudt", + "description": "Estimated phase-U current slope from the ADC sample burst.", + "direction": "output", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "Divdt", + "description": "Estimated phase-V current slope from the ADC sample burst.", + "direction": "output", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + }, + { + "name": "BurstTimeUs", + "description": "Elapsed time in microseconds across the ADC sample burst.", + "direction": "output", + "type": { + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + } + } + ], + "parameterTypes": { + "InvertPolarity": { + "description": "Negate all three phase currents to match the FOC sign convention on hardware with inverted current sensors.", + "quantity": "boolean", + "frame": "scalar", + "dtype": "f32" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Delay", + "description": "Outputs the previous input sample and stores the current sample for the next step.", + "displayName": "Unit Delay", + "domain": "", + "id": "math.delay", + "inlineCode": "/* Unit delay: output the previous input, then store the current input. */\nOut = Prev;\nPrev = In;\n", + "inputPorts": [ + { + "description": "Current value to store for the next execution step.", + "direction": "input", + "name": "In", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Value captured during the previous execution step.", + "direction": "output", + "name": "Out", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "parameterTypes": { + "Prev": { + "description": "Internal state holding the previous input value.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "SinCos", + "description": "Computes the sine and cosine of an input angle.", + "displayName": "Sin/Cos", + "domain": "", + "id": "Transforms.SinCos", + "inlineCode": "SinTheta = sinf(Theta);\nCosTheta = cosf(Theta);\n", + "inputPorts": [ + { + "description": "Input angle in radians.", + "direction": "input", + "name": "Theta", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Sine of the input angle.", + "direction": "output", + "name": "SinTheta", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Cosine of the input angle.", + "direction": "output", + "name": "CosTheta", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Park", + "description": "Rotates stationary alpha-beta currents into rotor-aligned d-q coordinates.", + "displayName": "Park Transform", + "domain": "", + "id": "Transforms.Park", + "inlineCode": "const float cos_theta = cosf(Theta);\nconst float sin_theta = sinf(Theta);\nI_D = I_Alpha * cos_theta + I_Beta * sin_theta;\nI_Q = -I_Alpha * sin_theta + I_Beta * cos_theta;\n", + "inputPorts": [ + { + "description": "Stationary-frame alpha-axis current.", + "direction": "input", + "name": "I_Alpha", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Stationary-frame beta-axis current.", + "direction": "input", + "name": "I_Beta", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Electrical rotation angle in radians.", + "direction": "input", + "name": "Theta", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Rotating-frame direct-axis current.", + "direction": "output", + "name": "I_D", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Rotating-frame quadrature-axis current.", + "direction": "output", + "name": "I_Q", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + } + ] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "platform_trace_register_event(static_cast(Channel), Key);\n", + "defaultName": "TraceEvent", + "description": "Sends a snapshot once, then sends this value only when it changes. Use sparse channel IDs 8 through 31.", + "displayName": "Trace on Change", + "domain": "app_loop", + "id": "Debug.TraceEvent", + "inlineCode": "if (Initialized < 0.5f) {\n if (platform_trace_event(static_cast(Channel), Value, true)) {\n LastValue = Value;\n Initialized = 1.0f;\n }\n} else if (Value != LastValue) {\n if (platform_trace_event(static_cast(Channel), Value, false)) {\n LastValue = Value;\n }\n}\n", + "inputPorts": [ + { + "description": "Setpoint, constant, or other user-applied value.", + "direction": "input", + "name": "Value", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 24, + "outputPorts": [], + "parameterTypes": { + "Channel": { + "description": "Unique sparse channel ID from 8 through 31.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Initialized": { + "description": "Internal initial-snapshot state.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Key": { + "description": "Sparse channel name.", + "dtype": "f32", + "frame": "scalar", + "quantity": "string" + }, + "LastValue": { + "description": "Internal last successfully transmitted value.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "LogI", + "description": "Publishes three phase-current signals to the standard current telemetry channels.", + "displayName": "Telemetry Current Sink", + "domain": "", + "id": "Debug.TelemetryCurrentSink", + "inlineCode": "platform_telemetry_log_f32(\"cg_iu_a\", I_A.in(au::amperes));\nplatform_telemetry_log_f32(\"cg_iv_a\", I_B.in(au::amperes));\nplatform_telemetry_log_f32(\"cg_iw_a\", I_C.in(au::amperes));\n", + "inputPorts": [ + { + "description": "Phase A current to publish in amperes.", + "direction": "input", + "name": "I_A", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Phase B current to publish in amperes.", + "direction": "input", + "name": "I_B", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Phase C current to publish in amperes.", + "direction": "input", + "name": "I_C", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Clarke", + "description": "Transforms three-phase currents into stationary alpha-beta coordinates.", + "displayName": "Clarke Transform", + "domain": "", + "id": "Transforms.Clarke", + "inlineCode": "I_Alpha = I_A;\nI_Beta = (I_B - I_C) * 0.57735026919f;\n", + "inputPorts": [ + { + "description": "Phase A current.", + "direction": "input", + "name": "I_A", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Phase B current.", + "direction": "input", + "name": "I_B", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Phase C current.", + "direction": "input", + "name": "I_C", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Stationary-frame alpha-axis current.", + "direction": "output", + "name": "I_Alpha", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Stationary-frame beta-axis current.", + "direction": "output", + "name": "I_Beta", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + } + ] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Less", + "description": "Compares two scalar values and reports whether A is less than B.", + "displayName": "Less Than", + "domain": "", + "id": "Logic.Less", + "inlineCode": "Out = (A < B);\n", + "inputPorts": [ + { + "description": "Left-hand value in the comparison.", + "direction": "input", + "name": "A", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Right-hand value in the comparison.", + "direction": "input", + "name": "B", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "True when A is less than B.", + "direction": "output", + "name": "Out", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + } + } + ], + "parameterTypes": { + "B": { + "description": "Fallback comparison threshold used when the B input is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "InvClarke", + "description": "Transforms stationary alpha-beta voltages into three-phase voltage commands.", + "displayName": "Inverse Clarke Transform", + "domain": "", + "id": "Transforms.InverseClarke", + "inlineCode": "V_A = V_Alpha;\nV_B = -0.5f * V_Alpha + 0.86602540378f * V_Beta;\nV_C = -0.5f * V_Alpha - 0.86602540378f * V_Beta;\n", + "inputPorts": [ + { + "description": "Stationary-frame alpha-axis voltage.", + "direction": "input", + "name": "V_Alpha", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + }, + { + "description": "Stationary-frame beta-axis voltage.", + "direction": "input", + "name": "V_Beta", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Reconstructed phase A voltage.", + "direction": "output", + "name": "V_A", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + }, + { + "description": "Reconstructed phase B voltage.", + "direction": "output", + "name": "V_B", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + }, + { + "description": "Reconstructed phase C voltage.", + "direction": "output", + "name": "V_C", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + } + ] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "Cached = platform_config_load(Key, DefaultValue);\n", + "defaultName": "Cfg", + "description": "Exposes a named configuration value, using a default when no stored value is available.", + "displayName": "Config Value", + "domain": "", + "id": "Values.Config", + "inlineCode": "Value = Cached;\n", + "inputPorts": [], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Cached configuration value supplied to the graph.", + "direction": "output", + "name": "Value", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "parameterTypes": { + "Cached": { + "description": "Persistent cached configuration value exposed by the output.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "DefaultValue": { + "description": "Value used when the configuration key has not been stored.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Key": { + "description": "Name used to look up the value in platform configuration storage.", + "dtype": "f32", + "frame": "scalar", + "quantity": "string" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "CanTx", + "description": "Transmits up to eight data bytes on a selected CAN bus at a configurable maximum rate.", + "displayName": "CAN TX", + "domain": "", + "id": "Actuators.CanTx", + "inlineCode": "/* CAN transmit, rate-limited by wall clock: sends when 1000/Rate ms have\n * elapsed since the previous send (Rate <= 0 sends every step).\n * D0..D7 = payload bytes (unconnected = 0), Dlc = how many of the 8 to\n * send, Ext: 0 std / 1 ext. */\nconst uint32_t period_ms = (Rate > 0.0f) ? static_cast(1000.0f / Rate) : 0U;\nconst uint32_t now_ms = platform_millis();\nif (period_ms == 0U || (now_ms - static_cast(LastMs)) >= period_ms) {\n LastMs = static_cast(now_ms);\n const uint8_t b[8] = {\n static_cast(D0), static_cast(D1),\n static_cast(D2), static_cast(D3),\n static_cast(D4), static_cast(D5),\n static_cast(D6), static_cast(D7),\n };\n uint8_t n = static_cast(Dlc);\n if (n > 8) n = 8;\n platform_can_send(static_cast(Bus), static_cast(Id),\n Ext > 0.5f, b, n);\n}\n", + "inputPorts": [ + { + "description": "Payload byte 0. Values are converted to an unsigned 8-bit integer.", + "direction": "input", + "name": "D0", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Payload byte 1. Values are converted to an unsigned 8-bit integer.", + "direction": "input", + "name": "D1", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Payload byte 2. Values are converted to an unsigned 8-bit integer.", + "direction": "input", + "name": "D2", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Payload byte 3. Values are converted to an unsigned 8-bit integer.", + "direction": "input", + "name": "D3", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Payload byte 4. Values are converted to an unsigned 8-bit integer.", + "direction": "input", + "name": "D4", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Payload byte 5. Values are converted to an unsigned 8-bit integer.", + "direction": "input", + "name": "D5", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Payload byte 6. Values are converted to an unsigned 8-bit integer.", + "direction": "input", + "name": "D6", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Payload byte 7. Values are converted to an unsigned 8-bit integer.", + "direction": "input", + "name": "D7", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [], + "parameterTypes": { + "Bus": { + "description": "CAN controller number: 1 selects bus A/FDCAN1 and 2 selects bus B/FDCAN2.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "D0": { + "description": "Fallback value for payload byte 0 when its input port is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "D1": { + "description": "Fallback value for payload byte 1 when its input port is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "D2": { + "description": "Fallback value for payload byte 2 when its input port is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "D3": { + "description": "Fallback value for payload byte 3 when its input port is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "D4": { + "description": "Fallback value for payload byte 4 when its input port is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "D5": { + "description": "Fallback value for payload byte 5 when its input port is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "D6": { + "description": "Fallback value for payload byte 6 when its input port is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "D7": { + "description": "Fallback value for payload byte 7 when its input port is not wired.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Dlc": { + "description": "Number of payload bytes to transmit, clamped to the range 0 through 8.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Ext": { + "description": "Use an extended 29-bit identifier when greater than 0.5; otherwise use a standard identifier.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Id": { + "description": "CAN arbitration identifier to transmit.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "LastMs": { + "description": "Internal timestamp of the previous transmission in milliseconds.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Rate": { + "description": "Maximum transmission rate in frames per second. Values at or below zero send every step.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "EncRaw", + "description": "Reads the raw sine and cosine channels from the position encoder.", + "displayName": "Encoder Raw Sin/Cos", + "domain": "", + "id": "hw.encoder_raw", + "inlineCode": "SinRaw = rte::Dimensionless(static_cast(platform_get_encoder_raw_sin()));\nCosRaw = rte::Dimensionless(static_cast(platform_get_encoder_raw_cos()));\n", + "inputPorts": [], + "isEntryPoint": false, + "maxInstances": 1, + "outputPorts": [ + { + "description": "Raw encoder sine-channel sample.", + "direction": "output", + "name": "SinRaw", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Raw encoder cosine-channel sample.", + "direction": "output", + "name": "CosRaw", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Mux", + "description": "Selects one of two scalar inputs using a boolean control signal.", + "displayName": "Mux", + "domain": "", + "id": "Logic.Mux", + "inlineCode": "Out = Sel ? A : B;\n", + "inputPorts": [ + { + "description": "Selection signal. True selects A; false selects B.", + "direction": "input", + "name": "Sel", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + } + }, + { + "description": "Value selected when Sel is true.", + "direction": "input", + "name": "A", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Value selected when Sel is false.", + "direction": "input", + "name": "B", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Currently selected input value.", + "direction": "output", + "name": "Out", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Pi", + "description": "", + "displayName": "PI Controller (Current)", + "domain": "", + "id": "Custom.PiCurrent", + "inlineCode": "float dt = platform_get_current_domain_dt();\nif (dt <= 0.0f) dt = 0.0002f;\nconst float error = (Setpoint - Measurement).in(au::amperes);\nIntegral += error * dt;\n\nfloat raw_output = Kp * error + Ki * Integral + Feedforward.in(au::volts);\n\n/* Dynamic voltage limit derived from DC-link voltage. Allow overmodulation\n * up to the six-step boundary (2*Vdc/3). Linear SVPWM limit is Vdc/sqrt(3). */\nconst float vdc = platform_get_dc_link_voltage();\nconst float dynamic_max = vdc * 2.0f / 3.0f;\nconst float max_limit = (dynamic_max < OutputMax) ? dynamic_max : OutputMax;\nconst float min_limit = (-dynamic_max > OutputMin) ? -dynamic_max : OutputMin;\n\nfloat limited_output = raw_output;\nif (limited_output > max_limit) limited_output = max_limit;\nif (limited_output < min_limit) limited_output = min_limit;\n\n/* Back-calculation anti-windup, scaled by AwGain (0 disables; 1.0 matches\n * the base-image VectorPIController). */\nif (Ki > 0.0001f && Kp > 0.0001f && AwGain > 0.0f) {\n const float excess = raw_output - limited_output;\n Integral -= excess * dt * AwGain / (Kp * Ki);\n}\n\nOutput = rte::Volts(limited_output);\n", + "inputPorts": [ + { + "description": "", + "direction": "input", + "name": "Setpoint", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "", + "direction": "input", + "name": "Measurement", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Optional additive feed-forward voltage (e.g. decoupling or back-EMF).", + "direction": "input", + "name": "Feedforward", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "", + "direction": "output", + "name": "Output", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + } + } + ], + "parameterTypes": { + "AwGain": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Dt": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Feedforward": { + "description": "Default feed-forward voltage when the port is not connected.", + "dtype": "f32", + "frame": "scalar", + "quantity": "voltage" + }, + "Integral": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Ki": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Kp": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "OutputMax": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "OutputMin": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Var", + "description": "", + "displayName": "Var (Float)", + "domain": "", + "id": "Custom.VarFloat", + "inlineCode": "if (Set) Stored = In;\nValue = Stored;\n", + "inputPorts": [ + { + "description": "", + "direction": "input", + "name": "In", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "", + "direction": "input", + "name": "Set", + "optional": true, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "", + "direction": "output", + "name": "Value", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "parameterTypes": { + "In": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Set": { + "dtype": "f32", + "frame": "scalar", + "quantity": "boolean" + }, + "Stored": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "EncoderDecode", + "description": "", + "displayName": "Encoder Decoder", + "domain": "", + "id": "Custom.EncoderDecode", + "inlineCode": "const float counts_per_rad = CountsPerRev / 6.28318530718f;\nconst float dt_s = SampleTime;\n\nTheta = static_cast(RawCounts) / counts_per_rad;\n\nconst float delta = static_cast(RawCounts) - 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Slopes read 0 until two bursts have\n * been seen. The observer's correction math uses only the current levels\n * — the slopes are stored for the RLS estimator. */\nfloat iu0 = 0.0f, iv0 = 0.0f, iu1 = 0.0f, iv1 = 0.0f;\nuint32_t burst_time_us = 0;\nif (platform_adc_get_burst_sample(&iu0, &iv0, &iu1, &iv1, &burst_time_us)) {\n const float iu_avg = 0.5f * (iu0 + iu1);\n const float iv_avg = 0.5f * (iv0 + iv1);\n\n /* W is computed from the two measured phases (three-wire balanced load). */\n const float iw_avg = -(iu_avg + iv_avg);\n\n /* The phase-current sensors on this hardware are wired with inverted\n * polarity relative to the FOC convention. Negate all three so\n * downstream transforms see the correct sign. */\n I_A = rte::Amperes(-iu_avg);\n I_B = rte::Amperes(-iv_avg);\n I_C = rte::Amperes(-iw_avg);\n\n const float prev_us = PrevBurstUs;\n const uint32_t dt_us = burst_time_us - static_cast(prev_us); /* wraps correctly */\n if (prev_us > 0.0f && dt_us > 0u) {\n const float dt_rcp = 1.0e6f / static_cast(dt_us);\n Diudt = (-iu_avg - PrevIuA) * dt_rcp;\n Divdt = (-iv_avg - PrevIvA) * dt_rcp;\n } else {\n Diudt = 0.0f;\n Divdt = 0.0f;\n }\n PrevIuA = -iu_avg;\n PrevIvA = -iv_avg;\n PrevBurstUs = static_cast(burst_time_us);\n BurstTimeUs = static_cast(burst_time_us);\n}\n", + "inputPorts": [], + "isEntryPoint": true, + "maxInstances": 1, + "outputPorts": [ + { + "description": "", + "direction": "output", + "name": "I_A", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "", + "direction": "output", + "name": "I_B", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "", + "direction": "output", + "name": "I_C", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "", + "direction": "output", + "name": "Diudt", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "", + "direction": "output", + "name": "Divdt", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "", + "direction": "output", + "name": "BurstTimeUs", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "parameterTypes": { + "OffsetU": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + }, + "OffsetV": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + }, + "PrevBurstUs": { + "description": "Persistent slope-estimator state: timestamp in microseconds of the previous burst. Leave at 0.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "PrevIuA": { + "description": "Persistent slope-estimator state: previous burst-averaged phase-U current in amperes (FOC sign). Leave at 0.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "PrevIvA": { + "description": "Persistent slope-estimator state: previous burst-averaged phase-V current in amperes (FOC sign). Leave at 0.", + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Encoder", + "description": "", + "displayName": "Encoder Angle", + "domain": "", + "id": "Custom.EncoderAngle", + "inlineCode": "Theta = platform_get_encoder_angle_latest() * 0.01745329251f; // deg -> rad\n", + "inputPorts": [], + "isEntryPoint": true, + "maxInstances": 0, + "outputPorts": [ + { + "description": "", + "direction": "output", + "name": "Theta", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ] + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "EncoderLeadComp", + "description": "Lead-compensate encoder angle for measurement/processing latency using real domain dt.", + "displayName": "Encoder Lead Compensator", + "domain": "", + "id": "Custom.EncoderLeadComp", + "inlineCode": "const float dt = platform_get_current_domain_dt();\nconst float delay_s = (dt > 0.0f && DelayScale > 0.0f) ? (dt * DelayScale) : 0.0f;\nconst float omega_mech = RpmMech * 0.104719755f; /* rpm -> rad/s */\nfloat lead = omega_mech * delay_s;\nif (lead > MaxLeadRad) lead = MaxLeadRad;\nif (lead < -MaxLeadRad) lead = -MaxLeadRad;\nfloat theta = Theta + lead;\nconst float two_pi = 6.28318530718f;\ntheta = fmodf(theta, two_pi);\nif (theta < 0.0f) theta += two_pi;\nThetaOut = theta;\n", + "inputPorts": [ + { + "description": "Measured mechanical angle (rad).", + "direction": "input", + "name": "Theta", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "Mechanical speed (rpm).", + "direction": "input", + "name": "RpmMech", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Lead-compensated mechanical angle (rad).", + "direction": "output", + "name": "ThetaOut", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "parameterTypes": { + "DelayScale": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "MaxLeadRad": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "Pi", + "description": "", + "displayName": "PI Controller", + "domain": "", + "id": "Custom.Pi", + "inlineCode": "const float error = Setpoint - Measurement;\nintegral += error;\nfloat raw_output = Kp * error + Ki * integral;\nif (raw_output > OutputMax) raw_output = OutputMax;\nif (raw_output < OutputMin) raw_output = OutputMin;\nOutput = raw_output;\n", + "inputPorts": [ + { + "description": "", + "direction": "input", + "name": "Setpoint", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + }, + { + "description": "", + "direction": "input", + "name": "Measurement", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "", + "direction": "output", + "name": "Output", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + ], + "parameterTypes": { + "Ki": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "Kp": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "OutputMax": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + }, + "OutputMin": { + "dtype": "f32", + "frame": "scalar", + "quantity": "dimensionless" + } + } + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "", + "defaultName": "AppliedVab", + "description": "Stationary alpha/beta voltage the inverter leg drivers actually applied during the previous control period, recovered from the platform terminal-voltage readback.", + "displayName": "Applied Voltage (alpha/beta)", + "domain": "", + "id": "Custom.AppliedVoltageAlphaBeta", + "inlineCode": "/* Plant readback: leg-average volts vs DC- applied last step.\n * Amplitude-preserving Clarke recovers the dq-plant alpha/beta;\n * x2 restores the graph's leg-referenced voltage-vector\n * convention (phase-neutral fundamental = |valbe| / 2, as on\n * Gen6 hardware where duty*vdc is the leg average). */\nconst float va = platform_phase_voltage_u();\nconst float vb = platform_phase_voltage_v();\nconst float vc = platform_phase_voltage_w();\nconst float v_alpha = (2.0f / 3.0f) * (va - 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Obs_C : Meas_C).in(au::amperes));\n", + "inputPorts": [ + { + "description": "Observer-estimated phase-A current.", + "direction": "input", + "name": "Obs_A", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Observer-estimated phase-B current.", + "direction": "input", + "name": "Obs_B", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Observer-estimated phase-C current.", + "direction": "input", + "name": "Obs_C", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Raw measured phase-A current (fallback/pass-through).", + "direction": "input", + "name": "Meas_A", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Raw measured phase-B current (fallback/pass-through).", + "direction": "input", + "name": "Meas_B", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Raw measured phase-C current (fallback/pass-through).", + "direction": "input", + "name": "Meas_C", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + } + ], + "isEntryPoint": false, + "maxInstances": 0, + "outputPorts": [ + { + "description": "Phase-A current routed to the FOC feedback path.", + "direction": "output", + "name": "I_A", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Phase-B current routed to the FOC feedback path.", + "direction": "output", + "name": "I_B", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + }, + { + "description": "Phase-C current routed to the FOC feedback path.", + "direction": "output", + "name": "I_C", + "optional": false, + "type": { + "dtype": "f32", + "frame": "scalar", + "quantity": "current" + } + } + ], + "parameterTypes": {} + }, + { + "classDefinition": "", + "classHeader": "", + "constructorCode": "/* Seed the current observer with motor parameters from calibration\n * (HostSim: the scenario \"motor\" block). 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"parameters": { + "Key": "cg_meas_iw" + }, + "position": { + "x": 1470.0, + "y": 2140.0 + }, + "type": "Debug.TelemetryLog" + }, + { + "displayName": "", + "domain": "tim_isr", + "id": "LogObsU", + "parameters": { + "Key": "cg_obs_iu" + }, + "position": { + "x": 1470.0, + "y": 1110.0 + }, + "type": "Debug.TelemetryLog" + }, + { + "displayName": "", + "domain": "tim_isr", + "id": "LogObsV", + "parameters": { + "Key": "cg_obs_iv" + }, + "position": { + "x": 1470.0, + "y": 1260.0 + }, + "type": "Debug.TelemetryLog" + }, + { + "displayName": "", + "domain": "tim_isr", + "id": "LogObsW", + "parameters": { + "Key": "cg_obs_iw" + }, + "position": { + "x": 1470.0, + "y": 1410.0 + }, + "type": "Debug.TelemetryLog" + }, + { + "displayName": "Probe", + "domain": "tim_isr", + "id": "PhaseCurrentsObs", + "parameters": { + "InvertPolarity": "0.0", + "PrevBurstUs": "0.0", + "PrevIuA": "0.0", + "PrevIvA": "0.0" + }, + "position": { + "x": 560.0, + "y": 2320.0 + }, + "type": "Sensors.PhaseCurrents" + }, + { + "displayName": "", + "domain": "app_loop", + "id": "LogProbeU", + "parameters": { + "Key": "cg_pc_iu" + }, + "position": { + "x": 1470.0, + "y": 1630.0 + }, + "type": "Debug.TelemetryLog" + } + ], + "schemaVersion": 1 +} diff --git a/Assets/Examples/induction_vhz.json b/Assets/Examples/induction_vhz.json index 5604c58c..89e7291b 100644 --- a/Assets/Examples/induction_vhz.json +++ b/Assets/Examples/induction_vhz.json @@ -3413,7 +3413,10 @@ "domain": "adc_isr", "id": "PhaseCurrents1", "parameters": { - "InvertPolarity": "0.0" + "InvertPolarity": "0.0", + "PrevBurstUs": "0.0", + "PrevIuA": "0.0", + "PrevIvA": "0.0" }, "position": { "x": 205.4000000000001, diff --git a/Assets/Examples/ladrc_demo.json b/Assets/Examples/ladrc_demo.json index 5b8b5394..24fe5e36 100644 --- a/Assets/Examples/ladrc_demo.json +++ b/Assets/Examples/ladrc_demo.json @@ -3239,7 +3239,10 @@ "parameters": { "InvertPolarity": "1.0", "OffsetU": "0.0", - "OffsetV": "0.0" + "OffsetV": "0.0", + "PrevBurstUs": "0.0", + "PrevIuA": "0.0", + "PrevIvA": "0.0" }, "position": { "x": 150.0, diff --git a/Assets/NodeTemplates/Control.Mtpa/inline.cpp b/Assets/NodeTemplates/Control.Mtpa/inline.cpp index d6eb80bb..3d8400a5 100644 --- a/Assets/NodeTemplates/Control.Mtpa/inline.cpp +++ b/Assets/NodeTemplates/Control.Mtpa/inline.cpp @@ -5,9 +5,13 @@ * is computed from the analytical MTPA condition. * * Torque equation: T = (3/2)*pp*(Lambda*Iq + (Ld-Lq)*Id*Iq) - * MTPA condition: Lambda*cos(beta) + (Ld-Lq)*Is*cos(2*beta) = 0 - * Solving for cos(beta) with delta = Lq - Ld: - * cos(beta) = (sqrt(Lambda^2 + 8*delta^2*Is^2) - Lambda) / (4*delta*Is) + * The current angle beta is measured from the NEGATIVE d axis, so + * Id = -Is*cos(beta), Iq = Is*sin(beta). + * MTPA condition: Lambda*cos(beta) - (Ld-Lq)*Is*cos(2*beta) = 0 + * Solving the resulting quadratic in Is (delta = Lq - Ld) gives the + * closed-form d-axis reference: + * id = (Lambda - sqrt(Lambda^2 + 8*delta^2*Is^2)) / (4*delta) + * which is negative for IPMSM (delta > 0) and collapses to 0 for SPM. */ const float i_cmd = CurrentRef * CurrentMax.in(au::amperes); const float i_abs = fabsf(i_cmd); @@ -17,10 +21,11 @@ if (i_abs > 1e-6f) { const float delta = Lq - Ld; if (fabsf(delta) > 1e-9f) { const float radical = sqrtf(Lambda * Lambda + 8.0f * delta * delta * i_abs * i_abs); - float cos_beta = (radical - Lambda) / (4.0f * delta * i_abs); - if (cos_beta > 1.0f) cos_beta = 1.0f; - if (cos_beta < -1.0f) cos_beta = -1.0f; - id_ref = i_abs * cos_beta; + id_ref = (Lambda - radical) / (4.0f * delta); + /* Keep the reference inside the current circle for degenerate + * parameter sets (e.g. Ld > Lq at very high current). */ + if (id_ref > i_abs) id_ref = i_abs; + if (id_ref < -i_abs) id_ref = -i_abs; } } diff --git a/Assets/NodeTemplates/Sensors.CanRx/node.json b/Assets/NodeTemplates/Sensors.CanRx/node.json index b76a8ecd..d32a0d40 100644 --- a/Assets/NodeTemplates/Sensors.CanRx/node.json +++ b/Assets/NodeTemplates/Sensors.CanRx/node.json @@ -2,9 +2,9 @@ "id": "Sensors.CanRx", "displayName": "CAN RX", "defaultName": "CanRx", - "description": "Reads the latest frame from a configured CAN receive mailbox and exposes its payload.", + "description": "Reads the latest frame from a configured CAN receive mailbox and exposes its payload. Not an entry point, so the Bus/Id parameters may be wired from other nodes (e.g. a role router); the mailbox read has no in-graph dependencies.", "maxInstances": 0, - "isEntryPoint": true, + "isEntryPoint": false, "domain": "", "inputPorts": [], "outputPorts": [ diff --git a/Assets/NodeTemplates/Sensors.PhaseCurrents/inline.cpp b/Assets/NodeTemplates/Sensors.PhaseCurrents/inline.cpp index 3fc31665..52d95c6f 100644 --- a/Assets/NodeTemplates/Sensors.PhaseCurrents/inline.cpp +++ b/Assets/NodeTemplates/Sensors.PhaseCurrents/inline.cpp @@ -1,11 +1,69 @@ -float iu_f = 0.0f; -float iv_f = 0.0f; -float iw_f = 0.0f; -if (platform_get_phase_currents(&iu_f, &iv_f, &iw_f)) { - /* Keep raw sensor polarity available for general telemetry, while FOC - * graphs enable inversion for this hardware's current-sensor wiring. */ +/* use_observer (Gen6 platform_api.h): when set, this node outputs the + * CurrentObserver's predicted/corrected currents instead of the raw ADC + * samples, exactly like Gen6 FocControlManager::onPwmPeriod() switching its + * feedback source. The platform API has no observer-valid accessor + * (platform_get_observer_currents is void), so the flag alone selects the + * source — before the first observer correction the observer reports zeros, + * same as Gen6. + * + * Polarity: the inversion trim applies to the raw ADC path only. The + * currents that correct the observer are polarity-corrected before they + * reach it, so observer output already follows the FOC convention (matches + * the Gen6 control path, which consumes getPhaseCurrents() unsigned). + * + * Burst slope/timestamp: the latest micro-burst (the same latched + * conversion the single-point read reports) also yields measured-current + * slopes, estimated as the finite difference between successive bursts: + * Diudt = (iu_burst - PrevIuA) / (burst_us - PrevBurstUs) + * The slopes describe the measured currents, so the InvertPolarity trim is + * applied to them exactly like the raw-path currents. BurstTimeUs carries + * the burst's own timestamp from platform_adc_get_burst_sample; until two + * bursts have been seen the slopes read 0. The observer's correct() + * consumes but does not require these values — its correction math uses + * only the current levels; it stores the slopes for the RLS estimator. */ +float iu0 = 0.0f; +float iv0 = 0.0f; +float iu1 = 0.0f; +float iv1 = 0.0f; +uint32_t burst_time_us = 0; +if (platform_adc_get_burst_sample(&iu0, &iv0, &iu1, &iv1, &burst_time_us)) { const float polarity = InvertPolarity ? -1.0f : 1.0f; - I_A = rte::Amperes(polarity * iu_f); - I_B = rte::Amperes(polarity * iv_f); - I_C = rte::Amperes(polarity * iw_f); + const float iu_burst = polarity * 0.5f * (iu0 + iu1); + const float iv_burst = polarity * 0.5f * (iv0 + iv1); + const float prev_us = PrevBurstUs; + const uint32_t dt_us = burst_time_us - static_cast(prev_us); /* wraps correctly */ + if (prev_us > 0.0f && dt_us > 0u) { + const float dt_rcp = 1.0e6f / static_cast(dt_us); + Diudt = (iu_burst - PrevIuA) * dt_rcp; + Divdt = (iv_burst - PrevIvA) * dt_rcp; + } else { + Diudt = 0.0f; + Divdt = 0.0f; + } + PrevIuA = iu_burst; + PrevIvA = iv_burst; + PrevBurstUs = static_cast(burst_time_us); + BurstTimeUs = static_cast(burst_time_us); +} + +if (platform_get_use_observer()) { + float iu_o = 0.0f; + float iv_o = 0.0f; + float iw_o = 0.0f; + platform_get_observer_currents(&iu_o, &iv_o, &iw_o); + I_A = rte::Amperes(iu_o); + I_B = rte::Amperes(iv_o); + I_C = rte::Amperes(iw_o); +} else { + float iu_f = 0.0f; + float iv_f = 0.0f; + float iw_f = 0.0f; + if (platform_get_phase_currents(&iu_f, &iv_f, &iw_f)) { + /* Keep raw sensor polarity available for general telemetry, while FOC + * graphs enable inversion for this hardware's current-sensor wiring. */ + const float polarity = InvertPolarity ? -1.0f : 1.0f; + I_A = rte::Amperes(polarity * iu_f); + I_B = rte::Amperes(polarity * iv_f); + I_C = rte::Amperes(polarity * iw_f); + } } diff --git a/Assets/NodeTemplates/Sensors.PhaseCurrents/node.json b/Assets/NodeTemplates/Sensors.PhaseCurrents/node.json index a345c2ea..37d6a1b5 100644 --- a/Assets/NodeTemplates/Sensors.PhaseCurrents/node.json +++ b/Assets/NodeTemplates/Sensors.PhaseCurrents/node.json @@ -2,7 +2,7 @@ "id": "Sensors.PhaseCurrents", "displayName": "Phase Currents", "defaultName": "PhaseCurrents", - "description": "Samples the three inverter phase-current channels from the platform current sensors.", + "description": "Samples the three inverter phase-current channels from the platform current sensors. Also exposes the latest ADC micro-burst metadata: per-phase measured-current slopes (cross-burst finite difference) and the burst timestamp consumed by the current observer's correct().", "maxInstances": 1, "isEntryPoint": true, "domain": "", @@ -40,7 +40,7 @@ }, { "name": "Diudt", - "description": "Estimated phase-U current slope from the ADC sample burst.", + "description": "Estimated measured phase-U current slope in A/s: finite difference between successive ADC micro-bursts (InvertPolarity applied, raw-path sign convention). Zero until two bursts have been sampled.", "direction": "output", "type": { "quantity": "dimensionless", @@ -50,7 +50,7 @@ }, { "name": "Divdt", - "description": "Estimated phase-V current slope from the ADC sample burst.", + "description": "Estimated measured phase-V current slope in A/s: finite difference between successive ADC micro-bursts (InvertPolarity applied, raw-path sign convention). Zero until two bursts have been sampled.", "direction": "output", "type": { "quantity": "dimensionless", @@ -60,7 +60,7 @@ }, { "name": "BurstTimeUs", - "description": "Elapsed time in microseconds across the ADC sample burst.", + "description": "Timestamp of the latest latched ADC micro-burst in microseconds, as reported by platform_adc_get_burst_sample. Suitable as the t_us argument of platform_observer_correct.", "direction": "output", "type": { "quantity": "dimensionless", @@ -71,10 +71,28 @@ ], "parameterTypes": { "InvertPolarity": { - "description": "Negate all three phase currents to match the FOC sign convention on hardware with inverted current sensors.", + "description": "Negate all three phase currents (and the burst slope estimates) to match the FOC sign convention on hardware with inverted current sensors.", "quantity": "boolean", "frame": "scalar", "dtype": "f32" + }, + "PrevIuA": { + "description": "Persistent slope-estimator state: previous burst-averaged phase-U current in amperes. Leave at the graph default (0).", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "PrevIvA": { + "description": "Persistent slope-estimator state: previous burst-averaged phase-V current in amperes. Leave at the graph default (0).", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" + }, + "PrevBurstUs": { + "description": "Persistent slope-estimator state: timestamp in microseconds of the previous burst. Leave at the graph default (0).", + "quantity": "dimensionless", + "frame": "scalar", + "dtype": "f32" } } } diff --git a/Assets/NodeTemplates/Transforms.ForcedAngle/inline.cpp b/Assets/NodeTemplates/Transforms.ForcedAngle/inline.cpp index b69e8785..cede0e3b 100644 --- a/Assets/NodeTemplates/Transforms.ForcedAngle/inline.cpp +++ b/Assets/NodeTemplates/Transforms.ForcedAngle/inline.cpp @@ -1,3 +1,4 @@ Angle += RateRadPerS * Dt; if (Angle >= 6.28318530718f) Angle -= 6.28318530718f; +else if (Angle < 0.0f) Angle += 6.28318530718f; /* negative rates wrap back in */ ThetaElec = Angle; diff --git a/Assets/NodeTemplates/Transforms.Svpwm/inline.cpp b/Assets/NodeTemplates/Transforms.Svpwm/inline.cpp index 7d0d89c7..ceef7b8d 100644 --- a/Assets/NodeTemplates/Transforms.Svpwm/inline.cpp +++ b/Assets/NodeTemplates/Transforms.Svpwm/inline.cpp @@ -1,42 +1,56 @@ -/* Clamp the alpha/beta voltage vector to the six-step boundary. - * The maximum line-to-neutral voltage magnitude for linear modulation is - * Vdc / sqrt(3); overmodulation is allowed up to 2*Vdc/3. */ -const float sqrt3 = 1.7320508075688772f; -const float v_max_linear = V_Dc.in(au::volts) * 2.0f / 3.0f; -float valpha = V_Alpha.in(au::volts); -float vbeta = V_Beta.in(au::volts); -const float v_albe_sq = valpha * valpha + vbeta * vbeta; -if (v_albe_sq > v_max_linear * v_max_linear && v_albe_sq > 1e-12f) { - const float scale = v_max_linear / sqrtf(v_albe_sq); - valpha *= scale; - vbeta *= scale; -} +/* Guard against a missing/invalid DC-link measurement (precharge, sensor + * glitch): mirror Gen6 pwm.cpp PWM_SetVoltageVector and drive the midpoint + * duty. The !(x > 1) form also rejects NaN/Inf — dividing by a ~0 V link + * would otherwise emit inf/NaN duties that slip past the percent clamps + * below (NaN fails x<0/x>100 tests) and permanently poison the downstream + * PWM/plant state. Structured as if/else (not an early return) so the + * rest of the domain step still runs: PwmOut must see the 50% duties. */ +const float vdc = V_Dc.in(au::volts); +if (!(vdc > 1.0f)) { + Duty_A = 50.0f; + Duty_B = 50.0f; + Duty_C = 50.0f; +} else { + /* Clamp the alpha/beta voltage vector to the six-step boundary. + * The maximum line-to-neutral voltage magnitude for linear modulation is + * Vdc / sqrt(3); overmodulation is allowed up to 2*Vdc/3. */ + const float sqrt3 = 1.7320508075688772f; + const float v_max_linear = vdc * 2.0f / 3.0f; + float valpha = V_Alpha.in(au::volts); + float vbeta = V_Beta.in(au::volts); + const float v_albe_sq = valpha * valpha + vbeta * vbeta; + if (v_albe_sq > v_max_linear * v_max_linear && v_albe_sq > 1e-12f) { + const float scale = v_max_linear / sqrtf(v_albe_sq); + valpha *= scale; + vbeta *= scale; + } -/* Inverse Clarke: alpha/beta -> A/B/C. */ -const float v_a = valpha / V_Dc.in(au::volts); -const float v_b = (-0.5f * valpha + 0.86602540378f * vbeta) / V_Dc.in(au::volts); -const float v_c = (-0.5f * valpha - 0.86602540378f * vbeta) / V_Dc.in(au::volts); + /* Inverse Clarke: alpha/beta -> A/B/C. */ + const float v_a = valpha / vdc; + const float v_b = (-0.5f * valpha + 0.86602540378f * vbeta) / vdc; + const float v_c = (-0.5f * valpha - 0.86602540378f * vbeta) / vdc; -float v_min = v_a; -if (v_b < v_min) v_min = v_b; -if (v_c < v_min) v_min = v_c; + float v_min = v_a; + if (v_b < v_min) v_min = v_b; + if (v_c < v_min) v_min = v_c; -float v_max = v_a; -if (v_b > v_max) v_max = v_b; -if (v_c > v_max) v_max = v_c; + float v_max = v_a; + if (v_b > v_max) v_max = v_b; + if (v_c > v_max) v_max = v_c; -const float v_offset = 0.5f * (v_min + v_max); + const float v_offset = 0.5f * (v_min + v_max); -/* Convert to percent duty and clamp. Linear SVM stays roughly in - * [21%, 79%]; clamping to [0,100] only catches numerical edge cases. */ -float duty_a_pct = 50.0f + 50.0f * (v_a - v_offset); -float duty_b_pct = 50.0f + 50.0f * (v_b - v_offset); -float duty_c_pct = 50.0f + 50.0f * (v_c - v_offset); + /* Convert to percent duty and clamp. Linear SVM stays roughly in + * [21%, 79%]; clamping to [0,100] only catches numerical edge cases. */ + float duty_a_pct = 50.0f + 50.0f * (v_a - v_offset); + float duty_b_pct = 50.0f + 50.0f * (v_b - v_offset); + float duty_c_pct = 50.0f + 50.0f * (v_c - v_offset); -if (duty_a_pct < 0.0f) duty_a_pct = 0.0f; else if (duty_a_pct > 100.0f) duty_a_pct = 100.0f; -if (duty_b_pct < 0.0f) duty_b_pct = 0.0f; else if (duty_b_pct > 100.0f) duty_b_pct = 100.0f; -if (duty_c_pct < 0.0f) duty_c_pct = 0.0f; else if (duty_c_pct > 100.0f) duty_c_pct = 100.0f; + if (duty_a_pct < 0.0f) duty_a_pct = 0.0f; else if (duty_a_pct > 100.0f) duty_a_pct = 100.0f; + if (duty_b_pct < 0.0f) duty_b_pct = 0.0f; else if (duty_b_pct > 100.0f) duty_b_pct = 100.0f; + if (duty_c_pct < 0.0f) duty_c_pct = 0.0f; else if (duty_c_pct > 100.0f) duty_c_pct = 100.0f; -Duty_A = duty_a_pct; -Duty_B = duty_b_pct; -Duty_C = duty_c_pct; + Duty_A = duty_a_pct; + Duty_B = duty_b_pct; + Duty_C = duty_c_pct; +} diff --git a/Images/HostSIL/.gitignore b/Images/HostSIL/.gitignore new file mode 100644 index 00000000..99af5f48 --- /dev/null +++ b/Images/HostSIL/.gitignore @@ -0,0 +1 @@ +sil_*_trace.csv diff --git a/Images/HostSIL/CMakeLists.txt b/Images/HostSIL/CMakeLists.txt new file mode 100644 index 00000000..a42c7721 --- /dev/null +++ b/Images/HostSIL/CMakeLists.txt @@ -0,0 +1,215 @@ +cmake_minimum_required(VERSION 3.24) +project(HostSIL LANGUAGES CXX C) + +set(CMAKE_CXX_STANDARD 17) +set(CMAKE_CXX_STANDARD_REQUIRED ON) +set(CMAKE_CXX_EXTENSIONS OFF) +set(CMAKE_C_STANDARD 11) +set(CMAKE_C_STANDARD_REQUIRED ON) + +if(NOT CMAKE_BUILD_TYPE) + set(CMAKE_BUILD_TYPE "RelWithDebInfo") +endif() + +# --------------------------------------------------------------------------- +# Layout +# +# HostSIL/ this tree (SIL runtime, shims, scenario) +# ../Gen6FW/ firmware base image (read-only, compiled verbatim) +# ../HostSim/src ODE PMSM plant (compiled from its original location) +# /hostsil_fw_src firmware copy patched+emitted by RTECodeEmitter +# +# Nothing under Images/Gen6FW or Images/HostSim is ever written. +# --------------------------------------------------------------------------- +get_filename_component(REPO_ROOT "${CMAKE_CURRENT_SOURCE_DIR}/../.." ABSOLUTE) +set(GEN6FW_ROOT "${REPO_ROOT}/Images/Gen6FW" CACHE PATH "Firmware base image root") +set(HOSTSIM_ROOT "${REPO_ROOT}/Images/HostSim" CACHE PATH "HostSim root") +set(IVP_CORE_DIR "${REPO_ROOT}/Lib/InverterProtocol" CACHE PATH "InverterProtocol core root") +set(SIL_GRAPH "${REPO_ROOT}/Assets/Examples/foc_demo.json" CACHE FILEPATH + "Node graph used to emit the firmware control code") + +set(SIL_FW_SRC "${REPO_ROOT}/build/hostsil_fw_src" CACHE PATH + "Emitted firmware tree (Gen6FW copy with generated/ domain code)") + +if(NOT IS_DIRECTORY "${GEN6FW_ROOT}/Src/Inverter") + message(FATAL_ERROR "Gen6FW not found at ${GEN6FW_ROOT}") +endif() +if(NOT IS_DIRECTORY "${IVP_CORE_DIR}/include") + message(FATAL_ERROR "InverterProtocol not found at ${IVP_CORE_DIR}") +endif() + +# --------------------------------------------------------------------------- +# Emit the firmware tree (copy of Gen6FW + generated domain code). +# Same emitter invocation as Images/HostSim/scripts/emit_and_run.sh uses, +# with Gen6FW as the base image. +# --------------------------------------------------------------------------- +if(NOT EXISTS "${SIL_FW_SRC}/Src/Inverter/InverterMain.cpp") + find_program(RTE_EMITTER + NAMES RTECodeEmitter rte + PATHS "${REPO_ROOT}/build/bin" + NO_DEFAULT_PATH) + if(NOT RTE_EMITTER) + message(FATAL_ERROR + "RTECodeEmitter not found. Build host tools first:\n" + " cmake -S ${REPO_ROOT} -B ${REPO_ROOT}/build && " + "cmake --build ${REPO_ROOT}/build --target RTECodeEmitter\n" + "or emit manually: Images/HostSIL/scripts/emit_firmware.sh") + endif() + get_filename_component(_emit_name "${RTE_EMITTER}" NAME) + if(_emit_name STREQUAL "rte") + set(_emit_args generate --graph "${SIL_GRAPH}" + --base-source "${GEN6FW_ROOT}" --output "${SIL_FW_SRC}") + else() + set(_emit_args --base-src "${GEN6FW_ROOT}" --graph "${SIL_GRAPH}" + --output "${SIL_FW_SRC}") + endif() + message(STATUS "Emitting firmware: ${RTE_EMITTER} ${_emit_args}") + execute_process( + COMMAND "${RTE_EMITTER}" ${_emit_args} + RESULT_VARIABLE _emit_rc) + if(NOT _emit_rc EQUAL 0) + message(FATAL_ERROR "RTECodeEmitter failed (${_emit_rc})") + endif() +endif() + +file(GLOB GENERATED_SOURCES CONFIGURE_DEPENDS + "${SIL_FW_SRC}/generated/*_generated.cpp" +) +if(NOT GENERATED_SOURCES) + message(FATAL_ERROR "no generated domain sources under ${SIL_FW_SRC}/generated") +endif() + +set(SIL_DIR "${CMAKE_CURRENT_SOURCE_DIR}/sil") + +add_executable(host_sil + # --- SIL runtime (host side) --- + src/main.cpp + src/scenario.cpp + sil/sil_rt.cpp + sil/sil_world.cpp + sil/sil_hal.cpp + # --- SIL driver shims (same headers/classes as the hardware drivers) --- + sil/sil_pwm.cpp + sil/sil_phase_current_adc.cpp + sil/sil_encoder_adc.cpp + sil/sil_max22530.cpp + sil/sil_app_sensors.cpp + sil/sil_can.cpp + sil/sil_misc.cpp + sil/sil_fram.c + sil/sil_uart_c.c + sil/sil_uart_cpp.cpp + sil/sil_fw_console.cpp + sil/sil_live_server.cpp + # --- HostSim plant --- + "${HOSTSIM_ROOT}/src/motor_model.cpp" + # --- Gen6FW application code, verbatim --- + "${SIL_FW_SRC}/Src/Inverter/InverterMain.cpp" + "${SIL_FW_SRC}/Src/Inverter/LoopStats.cpp" + "${SIL_FW_SRC}/Src/Inverter/Telemetry.cpp" + "${SIL_FW_SRC}/Src/Inverter/platform_api.cpp" + "${SIL_FW_SRC}/Src/Inverter/Control/CommandShell.cpp" + "${SIL_FW_SRC}/Src/Inverter/Control/ControlSupervisor.cpp" + "${SIL_FW_SRC}/Src/Inverter/Control/CurrentObserver.cpp" + "${SIL_FW_SRC}/Src/Inverter/Control/FaultCallbacks.cpp" + "${SIL_FW_SRC}/Src/Inverter/Control/FaultManager.cpp" + "${SIL_FW_SRC}/Src/Inverter/Control/FocController.cpp" + "${SIL_FW_SRC}/Src/Inverter/Control/FocControlManager.cpp" + "${SIL_FW_SRC}/Src/Inverter/Control/MotorParameterEstimator.cpp" + "${SIL_FW_SRC}/Src/Inverter/Control/OpenLoopController.cpp" + "${SIL_FW_SRC}/Src/Inverter/Control/VectorPIController.cpp" + "${SIL_FW_SRC}/Src/Inverter/Control/VoltageVectorSchedule.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/AutoCalibrationCoordinator.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/BreakawayCalibrator.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/CalKvStore.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/EncoderCycleCalibrator.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/EncoderLinearityCalibrator.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/EncoderOffsetCalibrator.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/FluxLinkageCalibrator.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/InductanceCalibrator.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/InductionMotorCalibrator.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/InductionVHzCalibrator.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/MotorCalibration.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/PoleCalibrator.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/ResistanceCalibrator.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/Common/BreakawayFinder.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/Common/CalibrationHardware.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/Common/CalScratchBuffer.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/Common/CurrentLimitedRamp.cpp" + "${SIL_FW_SRC}/Src/Inverter/Calibration/Common/EncoderTracker.cpp" + "${SIL_FW_SRC}/Src/Inverter/Command/CommandInitializer.cpp" + "${SIL_FW_SRC}/Src/Inverter/Command/CommandManager.cpp" + "${SIL_FW_SRC}/Src/Inverter/Command/Commands/CalibrationCommands.cpp" + "${SIL_FW_SRC}/Src/Inverter/Command/Commands/CanCommands.cpp" + "${SIL_FW_SRC}/Src/Inverter/Command/Commands/ControlCommands.cpp" + "${SIL_FW_SRC}/Src/Inverter/Command/Commands/FaultCommands.cpp" + "${SIL_FW_SRC}/Src/Inverter/Command/Commands/FocCommands.cpp" + "${SIL_FW_SRC}/Src/Inverter/Command/Commands/HelpCommand.cpp" + "${SIL_FW_SRC}/Src/Inverter/Command/Commands/MotorConfigCommands.cpp" + "${SIL_FW_SRC}/Src/Inverter/Command/Commands/OpenLoopCommands.cpp" + "${SIL_FW_SRC}/Src/Inverter/Command/Commands/SensorCommands.cpp" + "${SIL_FW_SRC}/Src/Inverter/Command/Commands/SystemCommands.cpp" + "${SIL_FW_SRC}/Src/Inverter/Command/Commands/TraceCommands.cpp" + "${SIL_FW_SRC}/Src/Inverter/Drivers/Sensors/CurrentSensor.cpp" + "${SIL_FW_SRC}/Src/Inverter/Drivers/Sensors/CurrentSensorTest.cpp" + "${SIL_FW_SRC}/Src/Inverter/Drivers/Sensors/DcLinkCurrentSensor.cpp" + "${SIL_FW_SRC}/Src/Inverter/Drivers/Sensors/DcLinkVoltageSensor.cpp" + "${SIL_FW_SRC}/Src/Inverter/Drivers/Sensors/PoleEstimator.cpp" + "${SIL_FW_SRC}/Src/Inverter/Drivers/Sensors/SpikeRecorder.cpp" + "${SIL_FW_SRC}/Src/Inverter/Drivers/CAN/CanProtocolTransport.cpp" + "${SIL_FW_SRC}/Src/Inverter/Drivers/CAN/CanSession.cpp" + "${SIL_FW_SRC}/Src/Inverter/Drivers/Logging/TraceRecorder.cpp" + "${SIL_FW_SRC}/Src/Inverter/Drivers/Logging/ontime_logger.c" + "${SIL_FW_SRC}/Src/Inverter/Drivers/Storage/FramStore.cpp" + "${SIL_FW_SRC}/Src/Inverter/Drivers/Storage/MotorConfigStore.cpp" + "${SIL_FW_SRC}/Src/Inverter/Drivers/Storage/RteParamStore.cpp" + "${SIL_FW_SRC}/Src/Inverter/Drivers/GateDriver/gate_driver.c" + # --- RTE-generated control domains --- + ${GENERATED_SOURCES} + # --- Shared InverterProtocol C core (telemetry/session wire format) --- + "${IVP_CORE_DIR}/src/protocol.c" + "${IVP_CORE_DIR}/src/packet_builder.c" + "${IVP_CORE_DIR}/src/packet_parser.c" + "${IVP_CORE_DIR}/src/trace_protocol.c" +) + +# Include-path ORDER MATTERS: sil/stm32shim shadows the CubeMX/HAL headers +# (main.h, adc.h, tim.h, ...) before the firmware's own Inc tree. +target_include_directories(host_sil PRIVATE + ${SIL_DIR}/stm32shim + ${SIL_DIR} + ${CMAKE_CURRENT_SOURCE_DIR}/src + ${SIL_FW_SRC}/generated + ${SIL_FW_SRC}/Inc + ${SIL_FW_SRC}/Inc/Inverter + ${SIL_FW_SRC}/Inc/Inverter/Control + ${SIL_FW_SRC}/Inc/Inverter/Control/Math + ${SIL_FW_SRC}/Inc/Inverter/Calibration + ${SIL_FW_SRC}/Inc/Inverter/Calibration/Common + ${SIL_FW_SRC}/Inc/Inverter/Command + ${SIL_FW_SRC}/Inc/Inverter/Drivers/GateDriver + ${SIL_FW_SRC}/Inc/Inverter/Drivers/CAN + ${SIL_FW_SRC}/Inc/Inverter/Drivers/UART + ${SIL_FW_SRC}/Inc/Inverter/Drivers/Storage + ${SIL_FW_SRC}/Inc/Inverter/Drivers/Logging + ${SIL_FW_SRC}/Inc/Inverter/Drivers/PWM + ${SIL_FW_SRC}/Inc/Inverter/Drivers/Sensors + ${HOSTSIM_ROOT}/src + "${IVP_CORE_DIR}/include" +) + +if(UNIX) + target_link_libraries(host_sil PRIVATE m pthread) +endif() + +if(MSVC) + target_compile_options(host_sil PRIVATE /W4 /wd4200) +else() + target_compile_options(host_sil PRIVATE -Wall -Wextra + # Volatile-bitfield aliasing and missing-field initializers fire + # inside the untouched firmware TUs; keep the signal for HostSIL files. + -Wno-unused-parameter + # A few upstream firmware TUs use std:: math/cstring without the + # includes (their ARM toolchain pulls them in transitively). + $<$:SHELL:-include cmath -include cstring>) +endif() diff --git a/Images/HostSIL/README.md b/Images/HostSIL/README.md new file mode 100644 index 00000000..417ee10c --- /dev/null +++ b/Images/HostSIL/README.md @@ -0,0 +1,232 @@ +# HostSIL — firmware-in-the-loop SIL simulator + +> Overview of both simulators and when to use which: +> [docs/simulation.md](../../docs/simulation.md). + +`host_sil` compiles the **real Gen6FW application code, unmodified**, for the +host (Linux) and runs it against the HostSim ODE PMSM plant on a simulated +clock: software-in-the-loop with the firmware's own init sequence, TIM1 ISR +control path, and app loop. + +``` +cmake -S Images/HostSIL -B build/hostsil_build +cmake --build build/hostsil_build -j +cd Images/HostSIL && ../../build/hostsil_build/host_sil scenarios/sil_foc_demo.json --realtime 0 +python3 scripts/validate_trace.py sil_foc_trace.csv --control-start-s 1.6 --iq-a 8 +``` + +### Live telemetry link (`--live`) + +``` +cd Images/HostSIL && ../../build/hostsil_build/host_sil scenarios/sil_foc_demo.json --live +build/bin/RTEStudio --tcp 127.0.0.1:14608 --protocol ivp # from repo root +``` + +With `--live`, `host_sil` proxies the firmware's **own** USART3 TX byte stream +(the COBS-framed InverterProtocol packets produced by `Telemetry.cpp`, +tapped in `HAL_UART_Transmit_DMA`) verbatim onto a TCP socket — the same +stream RTEStudio decodes from real hardware, produced here by the real +firmware at its own rates (100 Hz DATA; DEFINEs re-announced at 10 Hz, so a +client joining mid-run has the full key table within ~100 ms). +`--live` implies `--realtime 1.0` unless `--realtime` is given explicitly; +`--port P` selects the listen port (default **14608**, same as HostSim). +Without `--live` no socket is opened and batch behavior is unchanged. + +Client→server bytes — the RTEStudio text console (`IvpTcpClient::SendLine` +appends `'\n'`) or any raw TCP client — are forwarded **verbatim** into the +firmware's USART3 IT-RX path: the SIL HAL models the single-byte +`HAL_UART_Receive_IT` arm / `HAL_UART_RxCpltCallback` interrupt pairing the +Gen6FW `CommandShell` expects, delivering queued client bytes on the +scheduler context while the firmware is blocked (one byte per callback, the +cooperative stand-in for the hardware RXNE IRQ). Shell commands typed over +the link therefore take the real firmware code path, exactly as minicom on +hardware. Both `'\n'` and `'\r\n'` line endings work (the shell treats +either as a terminator; empty lines are ignored). Without `--live` no +socket is opened, no RX bytes ever arrive, and batch behavior is unchanged. +`scripts/ivp_probe.py` is a stdlib-only command-line probe that decodes the +stream and prints the firmware keys (handy without a GUI); +`scripts/shell_client.py` sends command lines and prints the shell's +`print`-key responses. + +Note the live link ends when the scenario `simulation.duration_s` elapses; +use a longer-duration scenario for interactive sessions. + +The configure step auto-emits the firmware tree +(`build/hostsil_fw_src` = copy of `Images/Gen6FW/` + graph-generated +`generated/` domain code) via `RTECodeEmitter`. Re-emit after a graph change +with `scripts/emit_firmware.sh [graph.json] [output-dir]`; select a different +graph at configure time with `-DSIL_GRAPH=` and a fresh `-DSIL_FW_SRC`. + +## Architecture + +* `sil/stm32shim/` — minimal STM32H7 HAL + CubeMX headers (`stm32h7xx_hal.h`, + `main.h`, `adc.h`, `tim.h`, `spi.h`, `usart.h`, `fdcan.h`, `gpio.h`, + `dma.h`) shadowing the real ones via include-path order. HAL_GetTick / + HAL_Delay are backed by the simulated clock. +* `sil/sil_rt.*` — cooperative two-context runtime. The firmware runs on its + own thread and blocks only in `HAL_Delay` (time-wait) and in + `EncoderADC::diagnose()` (app-loop rendezvous, once per `loop()` pass). + The scheduler advances time, steps the plant, and fires the sensor/ISR + hooks only while the firmware is blocked — contexts never run + concurrently. +* `sil/sil_world.*` — the shared physical world: `hostsim::OdePlant`, DC-link + voltage, pole voltages, throttle pins. +* `sil/sil_*.cpp` — driver shims implementing the firmware's own driver + classes (`PWM`, `PhaseCurrentADC`, `EncoderADC`, `MAX22530`, + `ApplicationSensors`, `CanBus`, F-RAM, UART, …) against `silWorld()`. +* `sil/sil_live_server.*` — the optional `--live` TCP server proxying the + firmware's COBS-framed UART telemetry stream to RTEStudio (TX) and + forwarding client-sent command bytes into the modeled huart3 IT-RX path + (`silUartRxEnqueue`, drained by `silUartRxPoll` in `sil_hal.cpp`). +* `src/main.cpp` — scenario parsing, scheduler, trace CSV. + +### Per-TIM1-update-event order (hardware order) + +1. plant step with the latched duties (averaged-duty ODE model), +2. injected phase-current conversion-complete (the ADC ISR; the generated + `adc_isr` step reads the *previous* sample, exactly like the real ISR), +3. encoder sample (TIM2 10 kHz free-run, or TIM1-synced while control runs), +4. `HAL_TIM_PeriodElapsedCallback` → `LoopStats::tim_isr++`, graph + `app::TimIsrStep` (gated on `ControlSupervisor::isRunning()`), legacy + `FocControlManager_OnPwmPeriod`, open-loop SPWM ramp. + +App-loop (`InverterMain::loop()`) iterations run at `simulation.app_loop_hz` +(default 1000 Hz): supervisor service, calibrators, shell, telemetry. + +### Fault-injection scenarios + +The scenario JSON accepts a top-level `faults` block that drives the modeled +*sensor/actuator surface* the firmware reads — the firmware itself is never +touched, so every trip is raised by real firmware code paths (with the +hardware driver's verbatim logic where a SIL shim replaces the driver file). +Each fault is a window `[time_s, time_s + duration_s)`; `duration_s <= 0` +latches to end of run; `time_s < 0` (the default) disables it. A companion +top-level `commands` block (`{"": ""}`) feeds any +firmware shell command through `CommandManager::processLine` at the given sim +time — e.g. arming a protection threshold before injecting its trip, or +starting legacy FOC control. + +| faults key | what it models | firmware trip path | +|---|---|---| +| `vdc_glitch_time_s` / `vdc_glitch_v` / `vdc_glitch_duration_s` | DC-link sag seen by the MAX22530 channel 0 sense divider (also collapses plant drive voltage) | with the UV comparator armed (`maxcfg_uv ` shell command): `MAX22530::update` (shim, register-level port) latches `INT_CO_NEG_1` → `FaultManager.raise(Max22530Uv, Max22530Undervoltage)` [Critical] | +| `oc_inject_time_s` / `oc_inject_a` / `oc_inject_duration_s` / `oc_inject_phase` (0=U,1=V,2=W) | current spike added at the ADC *counts* level (saturated/glitched channel; plant stays physical) | `PhaseCurrentADC::onInjectedConversionComplete` software-OC check (verbatim port; 3 consecutive samples > `m_oc_threshold_a`, 500 A default, `ocset` to change) → `PhaseOvercurrent / PhaseOvercurrentSoftware` [Critical]. The ADC analog-watchdog AWD path is not modeled in SIL. | +| `encoder_freeze_time_s` / `encoder_freeze_duration_s` | encoder sample stream stalls (no DMA completions at all) | legacy FOC path (`foc start`): `FocControlManager::onPwmPeriod` sample-age check (`HAL_GetTick() - lastSampleMs() > ENCODER_STALE_MS=5`) → `EncoderTimeout / EncoderSampleTimeout` [High] + safe stop. (The graph-control path has no firmware staleness check — see caveats below.) | +| `encoder_loss_time_s` / `encoder_loss_duration_s` | sin/cos outputs collapse to the 32768 bias mid (excitation loss) | `EncoderADC::diagnose` amplitude-collapse check (verbatim port, 25 consecutive < 500 counts EMA) → `EncoderAmplitude / EncoderAmplitudeLow` [Warning: latched, does not stop the drive] | +| `temp_spike_time_s` / `temp_spike_c` / `temp_spike_channel` (0..2 board, 3 motor) / `temp_spike_duration_s` | temperature channel driven to a value, round-tripped through the modeled sensor curve + divider (KV-configurable `Hw.Temp.Bx.*` / `Motor.Temp.*`, same keys/defaults as hardware) | ported `ApplicationSensors` evaluation: rail → `TempSensor` (Warning); over `CritC` sustained 500 ms with 5°C hysteresis → `OvertemperatureMotor` / `OvertemperatureInverter` (Critical). Board channels are disabled by KV default (enable via `firmware_config` `Hw.Temp.Bx.En: 1`). | + +Run the shipped demonstrations: + +``` +host_sil scenarios/sil_fault_injection.json # encoder-loss Warning + overcurrent Critical (graph FOC, demo baseline) +host_sil scenarios/sil_fault_encoder_stall.json # encoder stream stall -> EncoderTimeout (legacy `foc start`) +host_sil scenarios/sil_fault_undervoltage.json # Vbus sag -> Max22530Uv (arms UV via shell first) +host_sil scenarios/sil_fault_overtemp.json # motor 200 C -> OvertemperatureMotor +host_sil scenarios/sil_fault_none.json # faults present but disabled: trace matches sil_foc_demo byte-for-byte +``` + +Batch runs log every fault edge twice: host-side `[SIL] t=… fault +raised: source=… severity=…` at the sim µs tick and the firmware's own +`[FW t=…] [FAULT][sev][category] Name triggered: reason` line (console +mirror, below); the end-of-run summary lists the full trip history. + +### Firmware console mirror in batch mode + +`sil/sil_fw_console.*` taps the firmware's USART3 TX byte stream (the same +COBS-framed InverterProtocol packets that `--live` proxies to TCP) and walks +it with the shared Lib/InverterProtocol decoder; complete `print`-keyed +strings land on stdout as `[FW t=…]` lines. Boot chatter, shell responses +and — most importantly — the firmware's own +`[FAULT][C][category] Name triggered: reason` / `[SUP]` / `[SAFETY]` messages +are therefore visible in batch runs, which previously only showed `[SIL]` +host-side lines. + +### Control start + +After boot (~1.3 s of sim time — the hardware `HAL_Delay` boot sequence runs +in simulated time), the harness posts the equivalent of the shell commands +`config set/save ` (scenario `firmware_config` seeds), +`control start`, and `var set IqVar/IdVar ` (scenario `control`) +through the firmware's own `CommandManager::processLine`. All of it executes +on the firmware thread. + +### Induction machine under open-loop V/Hz + +`scenarios/sil_induction_vhz.json` runs the **squirrel-cage induction plant** +(HostSim's `induction_model.h`, `motor.machine = "induction"`) under the real +firmware's own V/Hz path — no graph control code. The scenario leaves +`control.start` false (the supervisor/graph FOC, with its PM-flux assumption, +never engages) and instead schedules the firmware shell command +`induction start 40 0.98` (`OpenLoopCommands.cpp` → +`OpenLoopController::start`) at 1.6 s through the `commands` block. The +firmware's non-blocking startup (gate-driver reset assert/release → +`/RDY` wait → `PWM_StartSPWM`, 1 s current-limited modulation ramp 0→0.98 in +`openLoopController().update()`) runs verbatim; the SPWM angle ramp itself +runs in the shimmed `HAL_TIM_PeriodElapsedCallback` exactly as on hardware. +m = 0.98 gives a ~23.5 V phase peak at 40 Hz (≈0.59 V/Hz incl. boost margin — +the same endpoint the HostSim `induction_vhz` scenario was tuned to). + +``` +cd Images/HostSIL && ../../build/hostsil_build/host_sil scenarios/sil_induction_vhz.json --realtime 0 +python3 scripts/validate_trace.py sil_induction_vhz_trace.csv \ + --mode vhz --freq-hz 40 --pole-pairs 2 --control-start-s 1.6 +``` + +Measured on the 4-pole-scale machine (rs 0.4 Ω, rr 0.3 Ω, Lm 25 mH, Lls = +Llr 2 mH, pp = 2, vdc 48 V): ramp done at 2.63 s (`[OL] START f=40.00 +m=0.980`), monotonic speed ramp, settled 247.9 rad/s electrical = +**1183.7 mech rpm vs 1200 sync** (slip 3.42 rad/s, 1.36 %), peak phase +current 9.41 A, zero NaN, no firmware fault trips, final supervisor state +IDLE with `status` reporting the open-loop controller `run=Y` — the OL +healthy state (no critical faults, gate driver ready). The vhz validator +mode asserts exactly this: directional monotonic ramp, current bounds, and an +end-of-trace speed band of sync ± slip (default 0.3–30 % of sync). + +One SIL model refinement was needed to get there: the GPIO shim modeled +`/RDY` as `power && reset-released`, which made `OpenLoopController::start()` +deadlock (it polls `/RDY` while the reset its own startup sequence is about +to release is still asserted) and trip a spurious `GateDriverUvlo`. The +NCD57100's `/RDY` reports driver-supply/UVLO state and is not gated by the +RESET pin — reset gates the gate *outputs*, which the SIL models separately +in `silGateOutputsEnabled()` — so the shim now reports `/RDY` from the power +rail alone. + +## Fidelity notes / deliberate simplifications + +* **Cooperative scheduling**: ISRs run at tick boundaries; they never preempt + mid-instruction. Firmware `__disable_irq()` regions are therefore + trivially safe in SIL (they model a stronger guarantee than hardware). +* **TIM1 event rates follow the firmware's own bookkeeping** + (`pwm_switching_freq_hz` / `pwm_update_freq_hz`), i.e. the same values that + drive the control `dt` — the register-derived rates (`ARR/PSC/RCR`) are + modeled for register-level fidelity only. Boot defaults: 2.5 kHz + switching / 5 kHz update in FOC mode (RCR=0 dual update). +* **One injected ADC burst per switching period**, sampled perfectly clean + (averaged duty, no switching ripple, no dead-time effects). TIM1-OC4 + adaptive trigger placement is bookkeeping-only. +* **Sensors are ideal** apart from quantization and the documented LA37S600 + polarity inversion; encoder sin/cos is centered at 32768/30000 counts with + one cycle per mechanical revolution. +* **CAN/UART**: CAN frames are accepted and dropped; telemetry TX DMA + completes at the next app tick. The telemetry bytes themselves (COBS + InverterProtocol) are forwarded verbatim to TCP clients in `--live` mode + and discarded otherwise. In `--live` mode client-sent bytes enter the + modeled huart3 IT-RX path: bytes queue in a host-side FIFO and are + delivered one per `HAL_UART_RxCpltCallback` at app-tick boundaries — the + same bytes and callback pairing the shell sees on hardware, coalesced to + tick cadence instead of per-byte preempt timing. FRAM is a 256 KiB + in-memory image (optional file backing via scenario `fram_image`). +* The firmware's `platform_micros()`/DWT paths see cycles = sim_us * + 550 MHz. +* **Fault-injection boundaries**: the modeled fault surface is the sensor + world (phase-current ADC counts, MAX22530 channel voltages + comparator + windows, encoder sin/cos stream, temperature channels) plus DC-link level. + Fault classes rooted in effects the shims don't model stay untrippable in + HostSIL: the ADC *hardware* analog watchdog (`AdcWatchdog` — SIL documents + `configureAnalogWatchdog()` as a no-op), MAX22530 SPI CRC/framing/DMA and + field-side loss (`Max22530Comm/Adc/Field`), gate-driver DESAT break + (`PwmBreak`), UVLO (`GateDriverUvlo` is modeled by the GPIO shim and always + healthy), supply-rail PVD/AVD/VOSRDY, CAN bus-off/error-passive, FRAM + errors. On the graph-control path the firmware currently has **no** + encoder-staleness or Vdc sanity check — those live in the legacy + `FocControlManager` (used by `foc start`), which is why + `sil_fault_encoder_stall.json` runs that path. diff --git a/Images/HostSIL/scenarios/sil_fault_encoder_stall.json b/Images/HostSIL/scenarios/sil_fault_encoder_stall.json new file mode 100644 index 00000000..9b0b8cd2 --- /dev/null +++ b/Images/HostSIL/scenarios/sil_fault_encoder_stall.json @@ -0,0 +1,44 @@ +{ + "comment": "HostSIL fault injection: encoder stream stall under the legacy FOC control path (foc start). The encoder_freeze stops all encoder DMA samples at 2.2 s; the firmware's sample-age watchdog (ENCODER_STALE_MS = 5 ms in FocControlManager::onPwmPeriod) trips EncoderTimeout/EncoderSampleTimeout and requests a safe stop. Same motor and config seeds as sil_foc_demo; graph control is not auto-started (control.start=false) because the ENCODER_STALE_MS check lives in the legacy FOC manager. The run gates: foc start at 1.6 s via the commands block, stall at 2.2 s, fault latched, control does not resume by itself.", + "motor": { + "name": "sil_small_bldc", + "rs_ohm": 0.05, + "ld_h": 0.0001, + "lq_h": 0.0001, + "flux_wb": 0.008, + "pole_pairs": 7, + "inertia_kg_m2": 0.001, + "friction_nm_per_rad_s": 0.001, + "vdc_v": 48.0 + }, + "simulation": { + "duration_s": 3.0, + "app_loop_hz": 1000, + "trace_csv": "sil_fault_encoder_stall_trace.csv", + "trace_decim_us": 500 + }, + "throttle_a": { "type": "constant", "value": 0.0 }, + "control": { "start": false }, + "commands": { + "1.6": "foc start 8 0" + }, + "faults": { + "encoder_freeze_time_s": 2.2, + "encoder_freeze_duration_s": 0.0 + }, + "firmware_config": { + "Motor.Poles": 14.0, + "Motor.Encoder.SinCos.Sign": 1.0, + "Motor.Encoder.SinCos.OffsetDeg": 0.0, + "Motor.Encoder.SinCos.CyclesRev": 1.0, + "Motor.Encoder.Type": 1.0, + "Motor.Type": 2.0, + "Motor.Resistance.Avg": 0.05, + "Motor.Ld": 0.0001, + "Motor.Lq": 0.0001, + "Motor.Lambda": 0.008, + "Motor.PMSM.Inductance.Ld": 0.0001, + "Motor.PMSM.Inductance.Lq": 0.0001, + "Motor.PMSM.FluxLinkage.Wb": 0.008 + } +} diff --git a/Images/HostSIL/scenarios/sil_fault_injection.json b/Images/HostSIL/scenarios/sil_fault_injection.json new file mode 100644 index 00000000..b6d7d915 --- /dev/null +++ b/Images/HostSIL/scenarios/sil_fault_injection.json @@ -0,0 +1,50 @@ +{ + "comment": "HostSIL fault-injection flagship: baseline sil_foc_demo run (same motor/config/FOC graph control) with two injected faults. (1) encoder_loss 1.42-1.57 s: sin/cos outputs pinned at the bias mid (sensor excitation loss) BEFORE control start; the firmware's EncoderADC::diagnose amplitude-collapse check trips EncoderAmplitude/EncoderAmplitudeLow (Warning: latched, control start still allowed, drive keeps running). (2) oc_inject 1.8-1.81 s: +600 A on the U-phase ADC counts while spinning; the software overcurrent check (3 consecutive injected samples > 500 A default) trips PhaseOvercurrent/PhaseOvercurrentSoftware (Critical: supervisor -> FAULT, PWM break + gate driver off, no auto-resume). Watch for the [SIL] fault raised lines and the firmware's own [FAULT] prints on the console mirror.", + "motor": { + "name": "sil_small_bldc", + "rs_ohm": 0.05, + "ld_h": 0.0001, + "lq_h": 0.0001, + "flux_wb": 0.008, + "pole_pairs": 7, + "inertia_kg_m2": 0.001, + "friction_nm_per_rad_s": 0.001, + "vdc_v": 48.0 + }, + "simulation": { + "duration_s": 2.6, + "app_loop_hz": 1000, + "trace_csv": "sil_fault_injection_trace.csv", + "trace_decim_us": 500 + }, + "throttle_a": { "type": "constant", "value": 0.0 }, + "control": { + "start": true, + "start_time_s": 1.6, + "iq_a": 8.0, + "id_a": 0.0 + }, + "faults": { + "encoder_loss_time_s": 1.42, + "encoder_loss_duration_s": 0.15, + "oc_inject_time_s": 1.8, + "oc_inject_duration_s": 0.01, + "oc_inject_phase": 0, + "oc_inject_a": 600.0 + }, + "firmware_config": { + "Motor.Poles": 14.0, + "Motor.Encoder.SinCos.Sign": 1.0, + "Motor.Encoder.SinCos.OffsetDeg": 0.0, + "Motor.Encoder.SinCos.CyclesRev": 1.0, + "Motor.Encoder.Type": 1.0, + "Motor.Type": 2.0, + "Motor.Resistance.Avg": 0.05, + "Motor.Ld": 0.0001, + "Motor.Lq": 0.0001, + "Motor.Lambda": 0.008, + "Motor.PMSM.Inductance.Ld": 0.0001, + "Motor.PMSM.Inductance.Lq": 0.0001, + "Motor.PMSM.FluxLinkage.Wb": 0.008 + } +} diff --git a/Images/HostSIL/scenarios/sil_fault_none.json b/Images/HostSIL/scenarios/sil_fault_none.json new file mode 100644 index 00000000..eb1bca5f --- /dev/null +++ b/Images/HostSIL/scenarios/sil_fault_none.json @@ -0,0 +1,53 @@ +{ + "comment": "HostSIL no-fault negative regression: byte-for-byte the sil_foc_demo run with a faults block present but every injection disabled (time_s all negative). host_sil sil_fault_none.json must produce a trace identical to sil_foc_demo.json's (diff sil_foc_trace.csv sil_fault_none_trace.csv), proving the fault machinery is inert when not configured.", + "motor": { + "name": "sil_small_bldc", + "rs_ohm": 0.05, + "ld_h": 0.0001, + "lq_h": 0.0001, + "flux_wb": 0.008, + "pole_pairs": 7, + "inertia_kg_m2": 0.001, + "friction_nm_per_rad_s": 0.001, + "vdc_v": 48.0 + }, + "simulation": { + "duration_s": 2.0, + "app_loop_hz": 1000, + "trace_csv": "sil_fault_none_trace.csv", + "trace_decim_us": 500 + }, + "throttle_a": { "type": "constant", "value": 0.0 }, + "control": { + "start": true, + "start_time_s": 1.6, + "iq_a": 8.0, + "id_a": 0.0 + }, + "faults": { + "vdc_glitch_time_s": -1.0, + "vdc_glitch_v": 12.0, + "oc_inject_time_s": -1.0, + "oc_inject_a": 600.0, + "encoder_freeze_time_s": -1.0, + "encoder_loss_time_s": -1.0, + "temp_spike_time_s": -1.0, + "temp_spike_channel": 3, + "temp_spike_c": 200.0 + }, + "firmware_config": { + "Motor.Poles": 14.0, + "Motor.Encoder.SinCos.Sign": 1.0, + "Motor.Encoder.SinCos.OffsetDeg": 0.0, + "Motor.Encoder.SinCos.CyclesRev": 1.0, + "Motor.Encoder.Type": 1.0, + "Motor.Type": 2.0, + "Motor.Resistance.Avg": 0.05, + "Motor.Ld": 0.0001, + "Motor.Lq": 0.0001, + "Motor.Lambda": 0.008, + "Motor.PMSM.Inductance.Ld": 0.0001, + "Motor.PMSM.Inductance.Lq": 0.0001, + "Motor.PMSM.FluxLinkage.Wb": 0.008 + } +} diff --git a/Images/HostSIL/scenarios/sil_fault_overtemp.json b/Images/HostSIL/scenarios/sil_fault_overtemp.json new file mode 100644 index 00000000..d3b07706 --- /dev/null +++ b/Images/HostSIL/scenarios/sil_fault_overtemp.json @@ -0,0 +1,48 @@ +{ + "comment": "HostSIL fault injection: motor over-temperature under graph FOC control. The motor temperature channel (Motor.Temp.*, KTY84 over a 10k divider by default) is driven to 200 degC from 1.9 s (latching) through the sensor-chain model (temperature -> KTY84 resistance -> divider voltage). The firmware evaluation needs the condition sustained for 500 ms, so OvertemperatureMotor/OvertemperatureMotor (Critical) trips at ~2.4 s: supervisor -> FAULT, PWM break + gate driver off, no auto-resume. Same motor/config as sil_foc_demo.", + "motor": { + "name": "sil_small_bldc", + "rs_ohm": 0.05, + "ld_h": 0.0001, + "lq_h": 0.0001, + "flux_wb": 0.008, + "pole_pairs": 7, + "inertia_kg_m2": 0.001, + "friction_nm_per_rad_s": 0.001, + "vdc_v": 48.0 + }, + "simulation": { + "duration_s": 3.2, + "app_loop_hz": 1000, + "trace_csv": "sil_fault_overtemp_trace.csv", + "trace_decim_us": 500 + }, + "throttle_a": { "type": "constant", "value": 0.0 }, + "control": { + "start": true, + "start_time_s": 1.6, + "iq_a": 8.0, + "id_a": 0.0 + }, + "faults": { + "temp_spike_time_s": 1.9, + "temp_spike_duration_s": 0.0, + "temp_spike_channel": 3, + "temp_spike_c": 200.0 + }, + "firmware_config": { + "Motor.Poles": 14.0, + "Motor.Encoder.SinCos.Sign": 1.0, + "Motor.Encoder.SinCos.OffsetDeg": 0.0, + "Motor.Encoder.SinCos.CyclesRev": 1.0, + "Motor.Encoder.Type": 1.0, + "Motor.Type": 2.0, + "Motor.Resistance.Avg": 0.05, + "Motor.Ld": 0.0001, + "Motor.Lq": 0.0001, + "Motor.Lambda": 0.008, + "Motor.PMSM.Inductance.Ld": 0.0001, + "Motor.PMSM.Inductance.Lq": 0.0001, + "Motor.PMSM.FluxLinkage.Wb": 0.008 + } +} diff --git a/Images/HostSIL/scenarios/sil_fault_undervoltage.json b/Images/HostSIL/scenarios/sil_fault_undervoltage.json new file mode 100644 index 00000000..c6575c18 --- /dev/null +++ b/Images/HostSIL/scenarios/sil_fault_undervoltage.json @@ -0,0 +1,50 @@ +{ + "comment": "HostSIL fault injection: DC-link undervoltage under graph FOC control. The firmware's MAX22530 comparator mask defaults keep UV disarmed, so the commands block arms it via the firmware shell at 1.5 s ('maxcfg_uv 20.0' — executed through CommandManager exactly like a typed command). Control starts at 1.6 s on a healthy 48 V bus; at 2.0 s the bus sags to 12 V (vdc_glitch, latching), the modeled COUTLO comparator of the MAX22530 shim latches CO_NEG_1 and the firmware raises Max22530Uv/Max22530Undervoltage (Critical: supervisor -> FAULT, PWM break + gate driver off, no auto-resume). Same motor/config as sil_foc_demo.", + "motor": { + "name": "sil_small_bldc", + "rs_ohm": 0.05, + "ld_h": 0.0001, + "lq_h": 0.0001, + "flux_wb": 0.008, + "pole_pairs": 7, + "inertia_kg_m2": 0.001, + "friction_nm_per_rad_s": 0.001, + "vdc_v": 48.0 + }, + "simulation": { + "duration_s": 2.6, + "app_loop_hz": 1000, + "trace_csv": "sil_fault_undervoltage_trace.csv", + "trace_decim_us": 500 + }, + "throttle_a": { "type": "constant", "value": 0.0 }, + "control": { + "start": true, + "start_time_s": 1.6, + "iq_a": 8.0, + "id_a": 0.0 + }, + "commands": { + "1.5": "maxcfg_uv 20.0" + }, + "faults": { + "vdc_glitch_time_s": 2.0, + "vdc_glitch_v": 12.0, + "vdc_glitch_duration_s": 0.0 + }, + "firmware_config": { + "Motor.Poles": 14.0, + "Motor.Encoder.SinCos.Sign": 1.0, + "Motor.Encoder.SinCos.OffsetDeg": 0.0, + "Motor.Encoder.SinCos.CyclesRev": 1.0, + "Motor.Encoder.Type": 1.0, + "Motor.Type": 2.0, + "Motor.Resistance.Avg": 0.05, + "Motor.Ld": 0.0001, + "Motor.Lq": 0.0001, + "Motor.Lambda": 0.008, + "Motor.PMSM.Inductance.Ld": 0.0001, + "Motor.PMSM.Inductance.Lq": 0.0001, + "Motor.PMSM.FluxLinkage.Wb": 0.008 + } +} diff --git a/Images/HostSIL/scenarios/sil_foc_demo.json b/Images/HostSIL/scenarios/sil_foc_demo.json new file mode 100644 index 00000000..9439a224 --- /dev/null +++ b/Images/HostSIL/scenarios/sil_foc_demo.json @@ -0,0 +1,42 @@ +{ + "comment": "HostSIL FOC demo: real Gen6FW + foc_demo graph against the ODE PMSM plant. Boot takes ~1.3 s of sim time (hardware HAL_Delay boot sequence); control start is engaged at 1.6 s and the run covers 0.4 s of closed-loop operation.", + "motor": { + "name": "sil_small_bldc", + "rs_ohm": 0.05, + "ld_h": 0.0001, + "lq_h": 0.0001, + "flux_wb": 0.008, + "pole_pairs": 7, + "inertia_kg_m2": 0.001, + "friction_nm_per_rad_s": 0.001, + "vdc_v": 48.0 + }, + "simulation": { + "duration_s": 2.0, + "app_loop_hz": 1000, + "trace_csv": "sil_foc_trace.csv", + "trace_decim_us": 500 + }, + "throttle_a": { "type": "constant", "value": 0.0 }, + "control": { + "start": true, + "start_time_s": 1.6, + "iq_a": 8.0, + "id_a": 0.0 + }, + "firmware_config": { + "Motor.Poles": 14.0, + "Motor.Encoder.SinCos.Sign": 1.0, + "Motor.Encoder.SinCos.OffsetDeg": 0.0, + "Motor.Encoder.SinCos.CyclesRev": 1.0, + "Motor.Encoder.Type": 1.0, + "Motor.Type": 2.0, + "Motor.Resistance.Avg": 0.05, + "Motor.Ld": 0.0001, + "Motor.Lq": 0.0001, + "Motor.Lambda": 0.008, + "Motor.PMSM.Inductance.Ld": 0.0001, + "Motor.PMSM.Inductance.Lq": 0.0001, + "Motor.PMSM.FluxLinkage.Wb": 0.008 + } +} diff --git a/Images/HostSIL/scenarios/sil_foc_live.json b/Images/HostSIL/scenarios/sil_foc_live.json new file mode 100644 index 00000000..d47a528b --- /dev/null +++ b/Images/HostSIL/scenarios/sil_foc_live.json @@ -0,0 +1,42 @@ +{ + "comment": "HostSIL FOC live-telemetry demo: same setup as sil_foc_demo but with a 30 s duration so there is time to attach RTEStudio (--tcp 127.0.0.1:14608 --protocol ivp) or scripts/ivp_probe.py while the firmware streams. Run: host_sil scenarios/sil_foc_live.json --live", + "motor": { + "name": "sil_small_bldc", + "rs_ohm": 0.05, + "ld_h": 0.0001, + "lq_h": 0.0001, + "flux_wb": 0.008, + "pole_pairs": 7, + "inertia_kg_m2": 0.001, + "friction_nm_per_rad_s": 0.001, + "vdc_v": 48.0 + }, + "simulation": { + "duration_s": 30.0, + "app_loop_hz": 1000, + "trace_csv": "sil_foc_live_trace.csv", + "trace_decim_us": 5000 + }, + "throttle_a": { "type": "constant", "value": 0.0 }, + "control": { + "start": true, + "start_time_s": 1.6, + "iq_a": 8.0, + "id_a": 0.0 + }, + "firmware_config": { + "Motor.Poles": 14.0, + "Motor.Encoder.SinCos.Sign": 1.0, + "Motor.Encoder.SinCos.OffsetDeg": 0.0, + "Motor.Encoder.SinCos.CyclesRev": 1.0, + "Motor.Encoder.Type": 1.0, + "Motor.Type": 2.0, + "Motor.Resistance.Avg": 0.05, + "Motor.Ld": 0.0001, + "Motor.Lq": 0.0001, + "Motor.Lambda": 0.008, + "Motor.PMSM.Inductance.Ld": 0.0001, + "Motor.PMSM.Inductance.Lq": 0.0001, + "Motor.PMSM.FluxLinkage.Wb": 0.008 + } +} diff --git a/Images/HostSIL/scenarios/sil_foc_salient.json b/Images/HostSIL/scenarios/sil_foc_salient.json new file mode 100644 index 00000000..7cfe6f5f --- /dev/null +++ b/Images/HostSIL/scenarios/sil_foc_salient.json @@ -0,0 +1,43 @@ +{ + "comment": "HostSIL salient-PMSM FOC demo: real Gen6FW against the ODE plant with a salient IPMSM (Lq = 3x Ld) and a forced negative d-axis command, so the reluctance torque term (Ld-Lq)*id*iq assists the PM torque. Compare with sil_foc_demo.json (id_a = 0, non-salient): the same iq yields a noticeably higher top speed here.", + "motor": { + "name": "salient_ipmsm", + "machine": "pmsm", + "rs_ohm": 0.08, + "ld_h": 0.0005, + "lq_h": 0.0015, + "flux_wb": 0.008, + "pole_pairs": 7, + "inertia_kg_m2": 0.001, + "friction_nm_per_rad_s": 0.001, + "vdc_v": 48.0 + }, + "simulation": { + "duration_s": 3.0, + "app_loop_hz": 1000, + "trace_csv": "sil_foc_salient_trace.csv", + "trace_decim_us": 500 + }, + "throttle_a": { "type": "constant", "value": 0.0 }, + "control": { + "start": true, + "start_time_s": 1.6, + "iq_a": 8.0, + "id_a": -2.0 + }, + "firmware_config": { + "Motor.Poles": 14.0, + "Motor.Encoder.SinCos.Sign": 1.0, + "Motor.Encoder.SinCos.OffsetDeg": 0.0, + "Motor.Encoder.SinCos.CyclesRev": 1.0, + "Motor.Encoder.Type": 1.0, + "Motor.Type": 2.0, + "Motor.Resistance.Avg": 0.08, + "Motor.Ld": 0.0005, + "Motor.Lq": 0.0015, + "Motor.Lambda": 0.008, + "Motor.PMSM.Inductance.Ld": 0.0005, + "Motor.PMSM.Inductance.Lq": 0.0015, + "Motor.PMSM.FluxLinkage.Wb": 0.008 + } +} diff --git a/Images/HostSIL/scenarios/sil_induction_vhz.json b/Images/HostSIL/scenarios/sil_induction_vhz.json new file mode 100644 index 00000000..f312c5a0 --- /dev/null +++ b/Images/HostSIL/scenarios/sil_induction_vhz.json @@ -0,0 +1,39 @@ +{ + "comment": "HostSIL induction-machine V/Hz demo: real Gen6FW against the ODE induction plant. Same 4-pole-scale squirrel-cage machine as Images/HostSim/scenarios/induction_vhz.json, but driven by the firmware's own OpenLoopController instead of a graph V/Hz: at 1.6 s the scheduled shell command 'induction start 40 0.98' (Src/Inverter/Command/Commands/OpenLoopCommands.cpp) starts SPWM at 40 Hz and ramps the modulation index 0 -> 0.98 over the firmware's 1 s current-limited ramp. m=0.98 gives a ~23.5 V phase peak at 40 Hz (0.59 V/Hz, matching the HostSim cfg's VoltsPerHz=0.55 + 1.5 V boost endpoint at the same 48 V link). Sync speed is 1200 mech rpm (60*40/2); the induction plant must settle measurably below it (slip). control.start stays false so the supervisor/graph FOC never engages; the healthy end state is '[SIL] final control state: IDLE (faults: no)' plus the OL status reply run=Y.", + "motor": { + "name": "sil_small_squirrel_cage_48v", + "machine": "induction", + "rs_ohm": 0.4, + "rr_ohm": 0.3, + "lm_h": 0.025, + "lls_h": 0.002, + "llr_h": 0.002, + "pole_pairs": 2, + "inertia_kg_m2": 5e-4, + "friction_nm_per_rad_s": 1e-3, + "vdc_v": 48.0 + }, + "simulation": { + "duration_s": 4.0, + "app_loop_hz": 1000, + "trace_csv": "sil_induction_vhz_trace.csv", + "trace_decim_us": 500 + }, + "throttle_a": { "type": "constant", "value": 0.0 }, + "control": { "start": false }, + "commands": { + "1.6": "induction start 40 0.98", + "3.9": "status" + }, + "firmware_config": { + "Motor.Poles": 4.0, + "Motor.Type": 3.0, + "Motor.Resistance.Avg": 0.4, + "Motor.Induction.Lm": 0.025, + "Motor.Induction.Rr": 0.3, + "Motor.Induction.Lr": 0.027, + "Motor.Induction.TauR": 90.0, + "Motor.Induction.SigmaLs": 0.003852, + "Motor.Induction.LLeak": 0.004 + } +} diff --git a/Images/HostSIL/scripts/emit_firmware.sh b/Images/HostSIL/scripts/emit_firmware.sh new file mode 100755 index 00000000..c4fc69c8 --- /dev/null +++ b/Images/HostSIL/scripts/emit_firmware.sh @@ -0,0 +1,31 @@ +#!/usr/bin/env bash +set -euo pipefail + +# Emit the SIL firmware tree: a copy of Images/Gen6FW with the node graph's +# generated domain code in generated/ (identical mechanism to the ARM build; +# only the compile step differs). Run this to regenerate after changing the +# graph, or before the first HostSIL CMake configure (it also auto-emits +# when missing). + +SCRIPT_DIR="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)" +HOSTSIL_ROOT="$(cd "${SCRIPT_DIR}/.." && pwd)" +REPO_ROOT="$(cd "${HOSTSIL_ROOT}/../.." && pwd)" + +GRAPH="${1:-${REPO_ROOT}/Assets/Examples/foc_demo.json}" +OUTPUT="${2:-${REPO_ROOT}/build/hostsil_fw_src}" + +EMITTER="${RTE_EMITTER:-${REPO_ROOT}/build/bin/RTECodeEmitter}" +if [[ ! -x "${EMITTER}" ]]; then + echo "RTECodeEmitter not found at ${EMITTER}" >&2 + echo "Build host tools: cmake -B build && cmake --build build --target RTECodeEmitter" >&2 + exit 1 +fi + +rm -rf "${OUTPUT}" +"${EMITTER}" \ + --base-src "${REPO_ROOT}/Images/Gen6FW" \ + --graph "${GRAPH}" \ + --output "${OUTPUT}" \ + --verbosity warning + +echo "SIL firmware tree emitted: ${OUTPUT} (graph: ${GRAPH})" diff --git a/Images/HostSIL/scripts/ivp_probe.py b/Images/HostSIL/scripts/ivp_probe.py new file mode 100644 index 00000000..fafa45aa --- /dev/null +++ b/Images/HostSIL/scripts/ivp_probe.py @@ -0,0 +1,163 @@ +#!/usr/bin/env python3 +"""ivp_probe.py — decode the COBS-framed InverterProtocol stream host_sil +serves in --live mode (or any TCP endpoint carrying the firmware's UART +telemetry stream) and print the firmware-emitted keys with live values. + +Usage: + python3 scripts/ivp_probe.py [host:port] [--seconds N] [--quiet-data] + +This is a debug/verification tool: RTEStudio (--tcp H:P --protocol ivp) is +the real consumer. Stdlib only. +""" +import argparse +import socket +import struct +import sys +import time + +IVP_MAGIC = 0x544C4D31 # "TLM1" +IVP_VERSION = 1 +MSG_DATA = 1 +MSG_DEFINE = 2 +VT_F32 = 1 +VT_STR = 2 +VT_STR_FRAG = 3 + + +def crc16_ccitt(data: bytes) -> int: + crc = 0xFFFF + for b in data: + crc ^= b << 8 + for _ in range(8): + crc = ((crc << 1) ^ 0x1021) & 0xFFFF if crc & 0x8000 else (crc << 1) & 0xFFFF + return crc + + +def cobs_decode(frame: bytes): + """Decode one COBS frame (without the trailing 0x00). None on error.""" + if not frame: + return None + out = bytearray() + i = 0 + while i < len(frame): + code = frame[i] + if code == 0 or i + code > len(frame) + 1: + return None + i += 1 + out += frame[i:i + code - 1] + i += code - 1 + if code < 0xFF and i < len(frame): + out.append(0) + return bytes(out) + + +def parse_frame(raw: bytes): + """Return (msg_type, seq, time_us, payload) or None if invalid.""" + if len(raw) < 16 + 2: + return None + magic, version, msg_type, payload_len, seq, time_us = struct.unpack_from(" int: + ap = argparse.ArgumentParser() + ap.add_argument("endpoint", nargs="?", default="127.0.0.1:14608") + ap.add_argument("--seconds", type=float, default=5.0) + ap.add_argument("--quiet-data", action="store_true", + help="print defines and a final summary only") + args = ap.parse_args() + host, _, port = args.endpoint.partition(":") + port = int(port or 14608) + + sock = socket.create_connection((host, port), timeout=3.0) + sock.settimeout(0.2) + print(f"[probe] connected to {host}:{port}") + + keys = {} # id -> key + last_vals = {} # key -> (value, time_us) + good = bad = 0 + rx = bytearray() + t_deadline = time.monotonic() + args.seconds + + while time.monotonic() < t_deadline: + try: + chunk = sock.recv(4096) + except socket.timeout: + continue + if not chunk: + print("[probe] server closed connection") + break + rx += chunk + while True: + try: + delim = rx.index(0) + except ValueError: + break + frame, _, rest = bytes(rx[:delim]), None, rx[delim + 1:] + rx = bytearray(rest) + decoded = cobs_decode(frame) + parsed = parse_frame(decoded) if decoded else None + if parsed is None: + bad += 1 if len(frame) > 4 else 0 # tolerate partial first frame + continue + msg_type, seq, time_us, payload = parsed + good += 1 + if msg_type == MSG_DEFINE: + n = payload[0] + p = 1 + for _ in range(n): + sid, vtype, klen = struct.unpack_from(" 0 and f32_seen >= 1 else 1 + + +if __name__ == "__main__": + sys.exit(main()) diff --git a/Images/HostSIL/scripts/shell_client.py b/Images/HostSIL/scripts/shell_client.py new file mode 100644 index 00000000..8e9cb12c --- /dev/null +++ b/Images/HostSIL/scripts/shell_client.py @@ -0,0 +1,178 @@ +#!/usr/bin/env python3 +"""shell_client.py — send Gen6FW CommandShell text commands over the host_sil +--live TCP link (or hardware) and print the shell's responses, which arrive +as 'print' string values inside the COBS-framed InverterProtocol telemetry +stream (same decoder core as ivp_probe.py). + +Usage: + python3 scripts/shell_client.py [host:port] [options] COMMAND [COMMAND ...] + +Each COMMAND is sent verbatim with a trailing '\\n' appended. Options: + --lead-in-s N seconds to listen before sending the first command + (default 0.5 — lets DEFINE frames map the 'print' key) + --settle-s N seconds to listen after the last command (default 2.0) + +Stdlib only. Example: + python3 scripts/shell_client.py 127.0.0.1:14608 \ + "help" "var get IqVar" "var set IqVar 5.0" "var get IqVar" +""" +import argparse +import socket +import struct +import sys +import time + +IVP_MAGIC = 0x544C4D31 # "TLM1" +IVP_VERSION = 1 +MSG_DATA = 1 +MSG_DEFINE = 2 +VT_STR = 2 +VT_STR_FRAG = 3 + + +def crc16_ccitt(data: bytes) -> int: + crc = 0xFFFF + for b in data: + crc ^= b << 8 + for _ in range(8): + crc = ((crc << 1) ^ 0x1021) & 0xFFFF if crc & 0x8000 else (crc << 1) & 0xFFFF + return crc + + +def cobs_decode(frame: bytes): + if not frame: + return None + out = bytearray() + i = 0 + while i < len(frame): + code = frame[i] + if code == 0 or i + code > len(frame) + 1: + return None + i += 1 + out += frame[i:i + code - 1] + i += code - 1 + if code < 0xFF and i < len(frame): + out.append(0) + return bytes(out) + + +def parse_frame(raw: bytes): + if len(raw) < 16 + 2: + return None + magic, version, msg_type, payload_len, seq, time_us = struct.unpack_from(" key + self.prints = [] # [str] shell print strings, in arrival order + self.good = 0 + + def feed(self, chunk: bytes): + self.rx += chunk + while True: + try: + delim = self.rx.index(0) + except ValueError: + break + frame, rest = bytes(self.rx[:delim]), self.rx[delim + 1:] + self.rx = bytearray(rest) + decoded = cobs_decode(frame) + parsed = parse_frame(decoded) if decoded else None + if parsed is None: + continue + self.good += 1 + msg_type, _seq, time_us, payload = parsed + if msg_type == MSG_DEFINE: + n = payload[0] + p = 1 + for _ in range(n): + sid, vtype, klen = struct.unpack_from(" int: + ap = argparse.ArgumentParser() + ap.add_argument("endpoint", nargs="?", default="127.0.0.1:14608") + ap.add_argument("--lead-in-s", type=float, default=0.5) + ap.add_argument("--settle-s", type=float, default=2.0) + ap.add_argument("commands", nargs=argparse.REMAINDER, + help="shell command lines; options must come before them") + args = ap.parse_args() + if not args.commands: + ap.error("at least one COMMAND is required") + + host, _, port = args.endpoint.partition(":") + port = int(port or 14608) + + sock = socket.create_connection((host, port), timeout=3.0) + sock.settimeout(0.1) + print(f"[client] connected to {host}:{port}") + + dec = StreamDecoder() + + def listen_for(seconds: float): + deadline = time.monotonic() + seconds + while time.monotonic() < deadline: + try: + chunk = sock.recv(4096) + except socket.timeout: + continue + if not chunk: + print("[client] server closed connection") + return False + dec.feed(chunk) + return True + + if not listen_for(args.lead_in_s): + return 1 + + for cmd in args.commands: + print(f"[client] sending: {cmd!r}") + sock.sendall(cmd.encode("utf-8") + b"\n") + if not listen_for(args.settle_s): + return 1 + + print(f"[client] frames decoded: {dec.good}; print strings: {len(dec.prints)}") + return 0 if dec.good > 0 else 1 + + +if __name__ == "__main__": + sys.exit(main()) diff --git a/Images/HostSIL/scripts/validate_trace.py b/Images/HostSIL/scripts/validate_trace.py new file mode 100755 index 00000000..cecad930 --- /dev/null +++ b/Images/HostSIL/scripts/validate_trace.py @@ -0,0 +1,201 @@ +#!/usr/bin/env python3 +"""Validate a HostSIL trace CSV. + +Hard checks (all modes): + - no NaN/inf in any numeric column + - i_a + i_b + i_c ~= 0 at every row (zero-sum constraint of the model) + - |i_x| stays below the software OC limit after the startup transient + +Mode "foc" (default) — closed-loop FOC scenarios (sil_foc_demo, ...): + - omega ramps in the commanded direction and reaches a nontrivial speed + - duty columns respond to control (not constant, not uniform noise) + - measured Iq settles near the commanded iq_a + +Mode "vhz" — open-loop V/Hz scenarios (sil_induction_vhz, driven through the +firmware's OpenLoopController "induction start " shell command): + - omega_e ramps monotonically in the commanded direction (sign of --freq-hz) + - duty columns respond (SPWM active) + - end-of-trace speed sits in a plausible slip band around the synchronous + speed computed from --freq-hz and --pole-pairs: an induction machine in + V/Hz must run *below* sync by a measurable-but-small slip + (--slip-min-frac / --slip-max-frac of sync). + +usage: validate_trace.py [--control-start-s T] [--iq-a A] + validate_trace.py --mode vhz --freq-hz 40 --pole-pairs 2 +""" +import argparse +import csv +import math +import sys + + +def main() -> int: + ap = argparse.ArgumentParser() + ap.add_argument("trace") + ap.add_argument("--mode", choices=("foc", "vhz"), default="foc", + help="foc: closed-loop Iq tracking (default); " + "vhz: open-loop V/Hz induction (needs --freq-hz)") + ap.add_argument("--control-start-s", type=float, default=1.6) + ap.add_argument("--iq-a", type=float, default=8.0) + ap.add_argument("--oc-a", type=float, default=200.0, + help="software overcurrent bound to check") + ap.add_argument("--freq-hz", type=float, default=None, + help="vhz mode: commanded electrical frequency (sign = " + "commanded direction)") + ap.add_argument("--pole-pairs", type=int, default=2, + help="vhz mode: machine pole pairs") + ap.add_argument("--slip-min-frac", type=float, default=0.003, + help="vhz mode: minimum slip as fraction of sync " + "(induction must run measurably below sync)") + ap.add_argument("--slip-max-frac", type=float, default=0.30, + help="vhz mode: maximum slip as fraction of sync " + "(machine must be near sync, not stalled)") + args = ap.parse_args() + + cols = {} + with open(args.trace) as f: + r = csv.reader(f) + header = next(r) + names = [h.strip() for h in header] + for h in names: + cols[h] = [] + for row in r: + if len(row) != len(names): + print(f"FAIL: ragged row {row}") + return 1 + for h, cell in zip(names, row): + v = float(cell) + if math.isnan(v) or math.isinf(v): + print(f"FAIL: {h} has NaN/inf") + return 1 + cols[h].append(v) + + n = len(cols["time_us"]) + if n < 100: + print(f"FAIL: only {n} rows") + return 1 + + failures = [] + + t = [x * 1e-6 for x in cols["time_us"]] + + # Zero-sum currents + worst_isum = 0.0 + for i in range(n): + s = cols["i_a"][i] + cols["i_b"][i] + cols["i_c"][i] + worst_isum = max(worst_isum, abs(s)) + if worst_isum > 1e-3: + failures.append(f"i_a+i_b+i_c max |sum| {worst_isum:.6g} (want ~0)") + + # Current bounds after startup transient (oc limit, generous) + imax = 0.0 + for i in range(n): + if t[i] < args.control_start_s + 0.05: + continue + for ph in ("i_a", "i_b", "i_c"): + imax = max(imax, abs(cols[ph][i])) + if imax > args.oc_a: + failures.append(f"|i| max {imax:.3g} A exceeds OC bound {args.oc_a} A") + + # Control region + ctl = [i for i in range(n) if t[i] >= args.control_start_s + 0.10] + if not ctl: + failures.append("no samples after control start") + else: + om = cols["omega_e_rad_s"] + om_end = om[ctl[-1]] + + if args.mode == "vhz": + if args.freq_hz is None: + failures.append("--mode vhz requires --freq-hz") + elif args.freq_hz != 0.0: + direction = 1.0 if args.freq_hz > 0.0 else -1.0 + sync_e = abs(2.0 * math.pi * args.freq_hz) + # Ramp: nontrivial speed in the commanded direction, with a + # monotonic profile (tolerate ripple-scale backward steps). + d_om = [direction * om[i] for i in ctl] + if d_om[-1] < 0.5 * sync_e or min(d_om) - d_om[0] < -1.0: + failures.append( + f"omega did not ramp in the commanded direction: " + f"start={om[ctl[0]]:.4g} end={om_end:.4g}") + drops = sum(1 for a, b in zip(d_om, d_om[1:]) + if b < a - 0.5) + if drops > len(ctl) // 10: + failures.append(f"omega not monotonic-ish: {drops} drops") + # Plausibility band around sync: an induction machine under + # V/Hz settles strictly below synchronous speed (slip must be + # measurable) but well above a stall. + om_end_dir = direction * om_end + slip = sync_e - om_end_dir + slip_frac = slip / sync_e + if not (args.slip_min_frac <= slip_frac + <= args.slip_max_frac): + failures.append( + f"end speed outside slip band: omega_e={om_end:.4g} " + f"rad/s vs sync={sync_e:.4g} (slip {slip:.4g} rad/s, " + f"{100 * slip_frac:.2f} %; want " + f"{100 * args.slip_min_frac:g}.." + f"{100 * args.slip_max_frac:g} %)") + sync_rpm = 60.0 * abs(args.freq_hz) / args.pole_pairs + print(f"vhz: sync {abs(args.freq_hz):.3g} Hz = {sync_e:.4g} rad/s " + f"elec = {sync_rpm:.1f} mech rpm; end {om_end:.3f} rad/s " + f"(slip {slip:.3f} rad/s, {100 * slip_frac:.2f} %)") + else: + om_min = min(om[i] for i in ctl) + if args.iq_a > 0 and (om_end < 10.0 or om_min < -1.0): + failures.append( + f"omega did not ramp forward: end={om_end:.4g} min={om_min:.4g}") + # monotonic-ish: count backward steps beyond ripple + drops = sum(1 for a, b in zip(ctl, ctl[1:]) if om[b] < om[a] - 0.5) + if drops > len(ctl) // 10: + failures.append(f"omega not monotonic-ish: {drops} drops") + + # Duties respond to control: spread well beyond noise. + for ph in ("duty_u", "duty_v", "duty_w"): + d = [cols[ph][i] for i in ctl] + if max(d) - min(d) < 1.0: + failures.append(f"{ph} static under control " + f"(span {max(d) - min(d):.3g} %)") + + if args.mode == "foc": + # Iq tracking: measured q current should reach a good fraction of + # ref. Settled window = last 20% of the trace (with sane scenarios + # that is deep inside the control region). Compare signed: a loop + # locked onto -Iq for a positive ref must fail, not pass through + # abs(). + iqm = cols["iq_meas_a"] + tail0 = int(0.8 * n) + iq_tail = sum(iqm[tail0:]) / max(1, n - tail0) + if args.iq_a > 0 and iq_tail < 0.5 * args.iq_a: + failures.append( + f"iq_meas mean {iq_tail:.3g} A far below ref {args.iq_a} A") + elif args.iq_a < 0 and iq_tail > 0.5 * args.iq_a: + failures.append( + f"iq_meas mean {iq_tail:.3g} A far above ref {args.iq_a} A") + + imax_all = max(max(map(abs, cols[p])) for p in ("i_a", "i_b", "i_c")) + print(f"rows={n} span={t[-1] - t[0]:.3f} s") + print(f"i_a [{min(cols['i_a']):.3f}, {max(cols['i_a']):.3f}] A") + print(f"i_b [{min(cols['i_b']):.3f}, {max(cols['i_b']):.3f}] A") + print(f"i_c [{min(cols['i_c']):.3f}, {max(cols['i_c']):.3f}] A") + print(f"|i|max={imax_all:.3f} A isum|max|={worst_isum:.3g} A") + print(f"duty_u [{min(cols['duty_u']):.2f}, {max(cols['duty_u']):.2f}] %") + print(f"theta_e [{min(cols['theta_e_rad']):.2f}, " + f"{max(cols['theta_e_rad']):.2f}] rad") + print(f"omega_e [{min(cols['omega_e_rad_s']):.2f}, " + f"{max(cols['omega_e_rad_s']):.2f}] rad/s") + print(f"rpm_mech end={cols['rpm_mech'][-1]:.1f}") + print(f"iq_ref [{min(cols['iq_ref_a']):.3f}, {max(cols['iq_ref_a']):.3f}] A") + print(f"iq_meas [{min(cols['iq_meas_a']):.3f}, {max(cols['iq_meas_a']):.3f}] A") + + if failures: + print("VALIDATION FAILED:") + for f_ in failures: + print(f" - {f_}") + return 1 + print("VALIDATION PASSED") + return 0 + + +if __name__ == "__main__": + sys.exit(main()) diff --git a/Images/HostSIL/sil/sil_app_sensors.cpp b/Images/HostSIL/sil/sil_app_sensors.cpp new file mode 100644 index 00000000..9f3b1834 --- /dev/null +++ b/Images/HostSIL/sil/sil_app_sensors.cpp @@ -0,0 +1,397 @@ +/* + * sil_app_sensors.cpp — SIL replacement for + * Src/Inverter/Drivers/Sensors/ApplicationSensors.cpp. + * + * Slow application analog samplers without ADC hardware: the throttle pins + * read the scenario profile through silWorld and the DC-link current pair + * (ADC1 ranks 5/6 in hardware) reads the plant power-balance estimate. + * Normalization keeps the hardware convention: normalized = (V - MinV) / + * (MaxV - MinV), plausible while |A-B| <= 0.10. + * + * Temperature channels are driven by the scenario through silWorld().temp_c[] + * (NaN = channel not modeled, the default). A driven channel runs the full + * sensor chain — temperature -> sensor resistance -> divider voltage + * (parametrized by the same KV config the hardware driver uses), then the + * firmware's own out-of-range and over-temperature evaluation (ported + * verbatim below, same FaultManager raise paths: + * TempSensor / OvertemperatureMotor / OvertemperatureInverter). + */ +#include "Inverter/Drivers/Sensors/ApplicationSensors.h" +#include "Inverter/Control/FaultManager.h" +#include "Inverter/Drivers/Storage/RteParamStore.h" +#include "Inverter/Telemetry.h" + +#include "main.h" +#include "sil_world.h" + +#include +#include + +namespace Inverter { + +static ApplicationSensors s_instance; + +ApplicationSensors& appSensors() { + return s_instance; +} + +namespace { +/* Differential LA37S600 counts per amp (same physical chain as the + * phase-current shim). */ +constexpr float kCountsPerAmp = ((2.0f / 3.0f) * 1.042e-3f * 65535.0f) / 3.3f; +constexpr float kRefMidCounts = 65535.0f * 0.5f; +/* DC-link transducer reference rail: ~2.5 V (Hw.DclCur.RefMin/MaxV window + * 2.0..3.0 V in DcLinkCurrentSensor). */ +constexpr float kDclRefCounts = (2.5f / 3.3f) * 65535.0f; + +/* KV namespace per temperature channel (same as the hardware driver). */ +constexpr const char* KV_PREFIX[ApplicationSensors::NUM_CHANNELS] = { + "Hw.Temp.B1", "Hw.Temp.B2", "Hw.Temp.B3", "Motor.Temp", +}; +} // namespace + +/* Verbatim port of the hardware driver's KV config load (same keys, same + * defaults); replaced only where it touches the ADC hardware. */ +void ApplicationSensors::loadConfig(bool persist_defaults) { + struct DefaultCfg { + float en, type, r25, beta, rser, orient, crit; + }; + /* Board temp sensors are not populated on current hardware: default to + * disabled so a floating pin can never trip the over-temperature fault. + * Enable per channel via `config set Hw.Temp.Bx.En 1` once stuffed. */ + static constexpr DefaultCfg BOARD_DEF = {0.0f, 1.0f, 10000.0f, 3950.0f, + 10000.0f, 0.0f, 90.0f}; + static constexpr DefaultCfg MOTOR_DEF = {1.0f, 3.0f, 603.0f, 0.0f, + 10000.0f, 0.0f, 150.0f}; + + auto loadOne = [persist_defaults](const char* key, float def) -> float { + float value = def; + if (!RteParamStore::isReady()) { + return def; + } + if (!RteParamStore::get(key, &value) && persist_defaults) { + RteParamStore::set(key, def); + value = def; + } + return value; + }; + + char key[40]; + for (uint8_t i = 0; i < NUM_CHANNELS; ++i) { + const DefaultCfg& d = (i == 3) ? MOTOR_DEF : BOARD_DEF; + Config& c = m_ch[i].cfg; + + std::snprintf(key, sizeof(key), "%s.En", KV_PREFIX[i]); + c.enabled = loadOne(key, d.en) != 0.0f; + std::snprintf(key, sizeof(key), "%s.Type", KV_PREFIX[i]); + c.type = static_cast(loadOne(key, d.type)); + std::snprintf(key, sizeof(key), "%s.R25", KV_PREFIX[i]); + c.r25 = loadOne(key, d.r25); + std::snprintf(key, sizeof(key), "%s.Beta", KV_PREFIX[i]); + c.beta = loadOne(key, d.beta); + std::snprintf(key, sizeof(key), "%s.RSer", KV_PREFIX[i]); + c.rser = loadOne(key, d.rser); + std::snprintf(key, sizeof(key), "%s.Orient", KV_PREFIX[i]); + c.orient = static_cast(loadOne(key, d.orient)); + std::snprintf(key, sizeof(key), "%s.CritC", KV_PREFIX[i]); + c.crit_c = loadOne(key, d.crit); + std::snprintf(key, sizeof(key), "%s.Vexc", KV_PREFIX[i]); + c.vexc = loadOne(key, 0.0f); + std::snprintf(key, sizeof(key), "%s.Gain", KV_PREFIX[i]); + c.gain = loadOne(key, 1.0f); + } + + m_vcc = loadOne("Hw.Temp.Vcc", 3.3f); + m_thr_min_v[0] = loadOne("Hw.ThrA.MinV", 0.5f); + m_thr_max_v[0] = loadOne("Hw.ThrA.MaxV", 4.5f); + m_thr_min_v[1] = loadOne("Hw.ThrB.MinV", 0.5f); + m_thr_max_v[1] = loadOne("Hw.ThrB.MaxV", 4.5f); + + if (persist_defaults && RteParamStore::isReady()) { + RteParamStore::flush(); + } +} + +bool ApplicationSensors::init() { + for (uint8_t i = 0; i < NUM_CHANNELS; ++i) { + m_ch[i].temp_c = NAN; + m_ch[i].voltage = NAN; + m_ch[i].resistance = NAN; + } + + /* Loading KV conversion config: with an empty store the board channels + * are TYPE_DISABLED and the motor channel defaults to KTY84/150 degC — + * the same defaults as the hardware driver. Channels still report NAN + * until the scenario drives a temperature for them. */ + loadConfig(/*persist_defaults=*/true); + m_initialized = true; + m_last_window_ms = HAL_GetTick(); + return true; +} + +void ApplicationSensors::reloadConfig() { + loadConfig(/*persist_defaults=*/false); +} + +/* --- Temperature-fault support ------------------------------------------------ + * updateOutOfRange / updateOverTemp are ports of the hardware driver's + * evaluation (Src/Inverter/Drivers/Sensors/ApplicationSensors.cpp) with the + * same sustain windows, hysteresis, and FaultManager raise paths; the SIL + * feeds them synthesized channel voltages instead of ADC reads. */ + +void ApplicationSensors::updateOutOfRange(uint8_t ch, uint32_t now_ms) { + Channel& c = m_ch[ch]; + const bool oor = (c.voltage > OOR_OPEN_RATIO * m_vcc) || + (c.voltage < OOR_SHORT_RATIO * m_vcc); + + if (!oor) { + /* Back in range: clear the condition; the latched fault stays until + * the user clears it via the shell. */ + c.oor_pending = false; + c.out_of_range = false; + return; + } + + if (!c.oor_pending) { + c.oor_pending = true; + c.oor_since_ms = now_ms; + return; + } + + if ((now_ms - c.oor_since_ms) < FAULT_SUSTAIN_MS) { + return; + } + + if (!c.out_of_range) { + c.out_of_range = true; + static const FaultReason OPEN_REASONS[NUM_CHANNELS] = { + FaultReason::TempSensorOpenInv1, FaultReason::TempSensorOpenInv2, + FaultReason::TempSensorOpenInv3, FaultReason::TempSensorOpenMot, + }; + static const FaultReason SHORT_REASONS[NUM_CHANNELS] = { + FaultReason::TempSensorShortInv1, FaultReason::TempSensorShortInv2, + FaultReason::TempSensorShortInv3, FaultReason::TempSensorShortMot, + }; + const bool open = (c.voltage > OOR_OPEN_RATIO * m_vcc); + FaultManager::instance().raise(FaultSource::TempSensor, + open ? OPEN_REASONS[ch] : SHORT_REASONS[ch]); + } +} + +void ApplicationSensors::updateOverTemp(uint8_t ch, uint32_t now_ms) { + Channel& c = m_ch[ch]; + const Config& cfg = c.cfg; + + if (!cfg.enabled || c.out_of_range || !std::isfinite(c.temp_c)) { + c.over_temp_cond = false; + c.over_temp_raised = false; + return; + } + + /* 5 degC hysteresis on the condition. */ + if (c.over_temp_cond) { + c.over_temp_cond = (c.temp_c > (cfg.crit_c - OVERTEMP_HYST_C)); + } else { + c.over_temp_cond = (c.temp_c > cfg.crit_c); + if (c.over_temp_cond) { + c.ot_since_ms = now_ms; + } + } + + if (!c.over_temp_cond) { + c.over_temp_raised = false; + return; + } + + if ((now_ms - c.ot_since_ms) < FAULT_SUSTAIN_MS) { + return; + } + + if (!c.over_temp_raised) { + c.over_temp_raised = true; + if (ch == 3) { + FaultManager::instance().raise(FaultSource::OvertemperatureMotor, + FaultReason::OvertemperatureMotor); + Telemetry::printf("[TMP] motor over-temperature: %.1f C (limit %.0f C)", + static_cast(c.temp_c), + static_cast(cfg.crit_c)); + } else { + static const FaultReason OT_REASONS[BOARD_CHANNELS] = { + FaultReason::OvertemperatureInv1, FaultReason::OvertemperatureInv2, + FaultReason::OvertemperatureInv3, + }; + FaultManager::instance().raise(FaultSource::OvertemperatureInverter, + OT_REASONS[ch]); + Telemetry::printf("[TMP] inverter ch%u over-temperature: %.1f C (limit %.0f C)", + static_cast(ch + 1), + static_cast(c.temp_c), + static_cast(cfg.crit_c)); + } + } +} + +void ApplicationSensors::update() { + if (!m_initialized) return; + + /* Throttle: pin voltages from the scenario, normalized [0..1]. */ + m_thr_a_v = silWorld().throttle_a_v; + m_thr_b_v = silWorld().throttle_b_v; + const float span_a = m_thr_max_v[0] - m_thr_min_v[0]; + const float span_b = m_thr_max_v[1] - m_thr_min_v[1]; + m_thr_a_cand = (span_a > 1e-6f) + ? (m_thr_a_v - m_thr_min_v[0]) / span_a : 0.0f; + m_thr_b_cand = (span_b > 1e-6f) + ? (m_thr_b_v - m_thr_min_v[1]) / span_b : 0.0f; + if (m_thr_a_cand < 0.0f) m_thr_a_cand = 0.0f; + if (m_thr_a_cand > 1.0f) m_thr_a_cand = 1.0f; + if (m_thr_b_cand < 0.0f) m_thr_b_cand = 0.0f; + if (m_thr_b_cand > 1.0f) m_thr_b_cand = 1.0f; + + m_thr_plausible = + std::fabs(m_thr_a_cand - m_thr_b_cand) <= THROTTLE_PLAUS_TOL; + m_thr_a_norm = m_thr_plausible ? m_thr_a_cand : 0.0f; + m_thr_b_norm = m_thr_plausible ? m_thr_b_cand : 0.0f; + + /* DC-link current pair (power-balance estimate fed by the scheduler). + * This transducer's reference is ~2.5 V (KV window 2.0..3.0 V), NOT the + * phase-current 1.65 V — getting this wrong latches CurrentSensorRef + * after the 500 ms sustain timer. */ + const float i_dc = silWorld().dc_link_current_a; + float sig = kDclRefCounts + i_dc * kCountsPerAmp; + if (sig < 0.0f) sig = 0.0f; + if (sig > 65535.0f) sig = 65535.0f; + m_dclink_sig = static_cast(sig); + m_dclink_ref = static_cast(kDclRefCounts); + ++m_dclink_seq; + + /* Temperature channels: driven by the scenario through silWorld().temp_c + * (NaN = channel not modeled). A driven channel is converted back + * through the sensor chain (temperature -> resistance -> divider voltage, + * the exact inverse of the firmware conversion) at the hardware driver's + * WINDOW_MS cadence, then the ported out-of-range/over-temperature + * evaluation runs on the synthesized voltage. */ + const uint32_t now_ms = HAL_GetTick(); + if ((now_ms - m_last_window_ms) < WINDOW_MS) return; + m_last_window_ms = now_ms; + + /* KTY84 quadratic coefficients: R = R25 * (1 + A*dT + B*dT^2) — the same + * constants the hardware driver inverts in resistanceToTempC. */ + constexpr float KTY84_A = 7.418e-3f; + constexpr float KTY84_B = 1.815e-5f; + + auto tempToResistance = [](const Config& cfg, float t) -> float { + switch (cfg.type) { + case TYPE_NTC_BETA: + case TYPE_PTC_BETA: + if (cfg.r25 <= 0.0f || cfg.beta == 0.0f) return NAN; + return cfg.r25 * std::exp(cfg.beta * (1.0f / (t + 273.15f) - + 1.0f / 298.15f)); + case TYPE_KTY84: { + if (cfg.r25 <= 0.0f) return NAN; + const float dt = t - 25.0f; + return cfg.r25 * (1.0f + KTY84_A * dt + KTY84_B * dt * dt); + } + case TYPE_KTY83_110: { + const float dt = t - 25.0f; + return 1000.0f * (1.0f + KTY84_A * dt + KTY84_B * dt * dt); + } + case TYPE_LINEAR_RTD: + if (cfg.r25 <= 0.0f || cfg.beta == 0.0f) return NAN; + return cfg.r25 * (1.0f + cfg.beta * t); + case TYPE_PT1000: return 1000.0f * (1.0f + 0.00385f * t); + case TYPE_PT100: return 100.0f * (1.0f + 0.00385f * t); + default: return NAN; + } + }; + auto dividerVoltage = [this](const Config& cfg, float r) -> float { + if (!std::isfinite(r)) return NAN; + if (cfg.orient == 0) { + /* Sensor to GND, RSer pull-up: V = Vcc * R/(RSer + R). */ + return (cfg.rser > 0.0f) ? m_vcc * r / (cfg.rser + r) : NAN; + } + /* Sensor to VCC: V = gain * vexc * RSer/(R + RSer) — the inverse of + * the hardware driver's evaluateChannel relation. */ + const float vexc = (cfg.vexc > 0.0f) ? cfg.vexc : m_vcc; + return (r > 0.0f) ? cfg.gain * vexc * cfg.rser / (cfg.rser + r) : NAN; + }; + + for (uint8_t ch = 0; ch < NUM_CHANNELS; ++ch) { + Channel& c = m_ch[ch]; + const float t = silWorld().temp_c[ch]; + if (!c.cfg.enabled || !std::isfinite(t)) { + c.temp_c = NAN; + c.voltage = NAN; + c.resistance = NAN; + c.out_of_range = false; + c.oor_pending = false; + c.over_temp_cond = false; + c.over_temp_raised = false; + continue; + } + c.resistance = tempToResistance(c.cfg, t); + c.voltage = dividerVoltage(c.cfg, c.resistance); + c.temp_c = std::isfinite(c.voltage) ? t : NAN; + updateOutOfRange(ch, now_ms); + updateOverTemp(ch, now_ms); + } +} + +float ApplicationSensors::motorTemperatureC() const { + return m_ch[3].temp_c; +} + +float ApplicationSensors::inverterTemperatureC(uint8_t channel) const { + if (channel >= BOARD_CHANNELS) return NAN; + return m_ch[channel].temp_c; +} + +float ApplicationSensors::throttleAVoltage() const { return m_thr_a_v; } +float ApplicationSensors::throttleBVoltage() const { return m_thr_b_v; } + +float ApplicationSensors::throttleA() const { return m_thr_a_norm; } +float ApplicationSensors::throttleB() const { return m_thr_b_norm; } + +bool ApplicationSensors::throttlePlausible() const { return m_thr_plausible; } + +uint16_t ApplicationSensors::dcLinkSigCounts() const { return m_dclink_sig; } +uint16_t ApplicationSensors::dcLinkRefCounts() const { return m_dclink_ref; } +uint32_t ApplicationSensors::dcLinkSeq() const { return m_dclink_seq; } + +void ApplicationSensors::channelStatus(uint8_t ch, bool& enabled, uint8_t& type, + float& volts, float& ohms, float& tempC, + bool& outOfRange) const { + if (ch >= NUM_CHANNELS) { + enabled = false; type = TYPE_DISABLED; volts = NAN; ohms = NAN; + tempC = NAN; outOfRange = false; + return; + } + const Channel& c = m_ch[ch]; + enabled = c.cfg.enabled; + type = c.cfg.type; + volts = c.voltage; + ohms = c.resistance; + tempC = c.temp_c; + outOfRange = c.out_of_range; +} + +void ApplicationSensors::debugStatus() const { + Telemetry::printf("[SHELL] appSensors (SIL): temps scenario-driven, throttle %.2f/%.2f V", + static_cast(m_thr_a_v), + static_cast(m_thr_b_v)); +} + +const char* ApplicationSensors::typeName(uint8_t type) { + switch (type) { + case 0: return "disabled"; + case 1: return "NTC-beta"; + case 2: return "PTC-beta"; + case 3: return "KTY84"; + case 4: return "linear-RTD"; + case 5: return "PT1000"; + case 6: return "PT100"; + case 7: return "KTY83-110"; + default: return "?"; + } +} + +} // namespace Inverter diff --git a/Images/HostSIL/sil/sil_can.cpp b/Images/HostSIL/sil/sil_can.cpp new file mode 100644 index 00000000..2bd9d7fb --- /dev/null +++ b/Images/HostSIL/sil/sil_can.cpp @@ -0,0 +1,115 @@ +/* + * sil_can.cpp — SIL stubs for the CAN subsystem: + * Src/Inverter/Drivers/CAN/CanBus.cpp (bus driver — no hardware bus here) + * Src/Inverter/Drivers/CAN/FdcanFault.cpp (error-IRQ wiring) + * + * CanSession / CanProtocolTransport / TraceRecorder compile verbatim on top + * of this CanBus API. Behavior: KV-gated enables are honored (Can.A.En + * default 0, Can.B.En default 1), TX always "succeeds" and is dropped, RX + * mailboxes stay empty (no host traffic in SIL). + */ +#include "Inverter/Drivers/CAN/CanBus.h" +#include "Inverter/Drivers/CAN/FdcanFault.h" +#include "Inverter/Drivers/Storage/RteParamStore.h" +#include "Inverter/Telemetry.h" + +namespace Inverter { + +static CanBus s_can; + +CanBus& canBus() { + return s_can; +} + +namespace { +float kvOr(const char* key, float dflt) { + float v = dflt; + if (RteParamStore::isReady()) { + (void)RteParamStore::get(key, &v); + } + return v; +} +} // namespace + +bool CanBus::init() { + m_enabled[0] = kvOr("Can.A.En", 0.0f) >= 0.5f; + m_enabled[1] = kvOr("Can.B.En", 1.0f) >= 0.5f; + m_bitrate = static_cast(kvOr("Can.BitRate", 500000.0f)); + m_fd_enabled[0] = false; + m_fd_enabled[1] = kvOr("Can.Trace.En", 0.0f) >= 0.5f; + resetState(); + return true; +} + +void CanBus::update() {} + +bool CanBus::send(uint8_t bus, uint32_t, bool, const uint8_t*, uint8_t) { + if (bus >= NUM_BUSES || !m_enabled[bus]) return false; + ++m_tx_frames[bus]; + return true; +} + +bool CanBus::sendFd(uint8_t bus, uint32_t, const uint8_t*, uint8_t) { + if (bus >= NUM_BUSES || !m_enabled[bus]) return false; + ++m_fd_tx_frames[bus]; + return true; +} + +bool CanBus::rxLatest(uint8_t, uint32_t, bool, Frame&, uint32_t* seqOut) { + if (seqOut != nullptr) *seqOut = 0; + return false; +} + +size_t CanBus::txFree(uint8_t) const { return TX_RING; } + +void CanBus::setRxHook(RxHook hook, void* user) { + m_hook = hook; + m_hook_user = user; +} + +bool CanBus::enabled(uint8_t bus) const { + return bus < NUM_BUSES && m_enabled[bus]; +} + +bool CanBus::fdEnabled(uint8_t bus) const { + return bus < NUM_BUSES && m_fd_enabled[bus]; +} + +void CanBus::printStatus(uint8_t bus) const { + if (bus >= NUM_BUSES) return; + Telemetry::printf("[CAN] bus %u (SIL): enabled=%d fd=%d tx=%lu rx=%lu", + static_cast(bus + 1), + m_enabled[bus] ? 1 : 0, m_fd_enabled[bus] ? 1 : 0, + static_cast(m_tx_frames[bus]), + static_cast(m_rx_frames[bus])); +} + +void CanBus::printRecentRx(uint8_t) const { + Telemetry::printf("[CAN] (SIL) no bus traffic"); +} + +void CanBus::onRxFifo0(FDCAN_HandleTypeDef*) {} +void CanBus::serviceTx(FDCAN_HandleTypeDef*) {} + +FDCAN_HandleTypeDef* CanBus::handle(uint8_t bus) const { + (void)bus; + return nullptr; +} + +bool CanBus::validId(uint32_t id, bool ext) { + return ext ? (id <= 0x1FFFFFFFU) : (id <= 0x7FFU); +} + +void CanBus::resetState() {} + +bool CanBus::applyTiming(uint8_t, uint32_t, uint32_t) { return true; } +void CanBus::kickTx(uint8_t) {} +void CanBus::recoverIfBusOff(uint8_t) {} +void CanBus::processRx(uint8_t) {} +void CanBus::storeRx(uint8_t, const Frame&) {} + +bool fdcanFaultInit() { + return true; +} + +} // namespace Inverter diff --git a/Images/HostSIL/sil/sil_encoder_adc.cpp b/Images/HostSIL/sil/sil_encoder_adc.cpp new file mode 100644 index 00000000..510b263f --- /dev/null +++ b/Images/HostSIL/sil/sil_encoder_adc.cpp @@ -0,0 +1,549 @@ +/* + * sil_encoder_adc.cpp — SIL replacement for + * Src/Inverter/Drivers/Sensors/EncoderADC.cpp. + * + * Models the analog sin/cos encoder (ADC2 regular + DMA stream): the + * plant's mechanical rotor angle is rendered as quantized 16-bit sin/cos + * ADC counts (center 32768, amplitude 30000, one electrical-style cycle per + * mechanical revolution — CyclesRev=1, well inside the driver's hard caps + * 427..65388), and the decoding pipeline (bounds learning, atan2 decode, + * extrapolation, RPM window estimate, signal-quality diagnostics) is copied + * semantically from the hardware driver. + * + * The simulated sample stream is driven by the scheduler: + * - free-running TIM2 trigger (~10 kHz) while control is off, + * - TIM1 TRGO2-synchronized (one per update event) while control runs + * (useSynchronizedTrigger(true) mirrors the CFGR EXTSEL switch). + * + * Additionally, diagnose() is the firmware app-loop rendezvous point for the + * cooperative SIL runtime (sil_rt_app_gate) — it is called exactly once per + * InverterMain::loop() pass. + * + * The hardware start() spin-waits and DMA/LL plumbing are replaced by direct + * sim hooks; fit capture/compute logic is preserved verbatim. + */ +#include "Inverter/Drivers/Sensors/EncoderADC.h" +#include "Inverter/Telemetry.h" +#include "Inverter/Control/FaultManager.h" + +#include "main.h" +#include "adc.h" + +#include "sil_rt.h" +#include "sil_world.h" + +#include + +namespace Inverter { + +static EncoderADC s_instance; + +/* Raw sin/cos counts for the latest sample (the hardware DMA buffer). */ +static uint16_t s_enc_dma_buffer[2]; + +EncoderADC::FitAccumulator EncoderADC::s_fit_acc; +EncoderADC::SinCosFit EncoderADC::s_fit; +EncoderADC::TraceEntry EncoderADC::m_trace[EncoderADC::TRACE_LEN]; + +EncoderADC& encoderADC() { + return s_instance; +} + +bool EncoderADC::configureAdcChannels() { return true; } + +bool EncoderADC::initTimer() { + /* TIM2 TRGO: 10 kHz free-running sample trigger (APB1 137.5 MHz / + * 13750 ticks as in the hardware configuration). */ + m_sample_hz = 10000.0f; + return true; +} + +bool EncoderADC::initDma() { return true; } + +bool EncoderADC::init() { + CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; + DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; + + initializeFitState(); + m_trace_head = 0; + m_trace_decim = 0; + + if (!configureAdcChannels()) return false; + if (!initTimer()) return false; + if (!initDma()) return false; + return true; +} + +bool EncoderADC::start() { + if (m_running) return true; + m_running = true; + silWorld().encoder_stream_running = true; + return true; +} + +float EncoderADC::computeAngle(uint16_t raw_sin, uint16_t raw_cos) { + /* Clamp to hard limits to reject outliers. */ + uint16_t csin = raw_sin; + uint16_t ccos = raw_cos; + if (csin < SIN_MIN_CAP) csin = SIN_MIN_CAP; + if (csin > SIN_MAX_CAP) csin = SIN_MAX_CAP; + if (ccos < COS_MIN_CAP) ccos = COS_MIN_CAP; + if (ccos > COS_MAX_CAP) ccos = COS_MAX_CAP; + + if (csin < m_obs_sin_min) m_obs_sin_min = csin; + if (csin > m_obs_sin_max) m_obs_sin_max = csin; + if (ccos < m_obs_cos_min) m_obs_cos_min = ccos; + if (ccos > m_obs_cos_max) m_obs_cos_max = ccos; + + const bool learned_valid = + (m_obs_sin_max >= m_obs_sin_min + LEARNED_MIN_SPAN) && + (m_obs_cos_max >= m_obs_cos_min + LEARNED_MIN_SPAN); + uint16_t sin_min, sin_max, cos_min, cos_max; + if (learned_valid) { + sin_min = m_obs_sin_min; sin_max = m_obs_sin_max; + cos_min = m_obs_cos_min; cos_max = m_obs_cos_max; + } else { + sin_min = m_sin_min; sin_max = m_sin_max; + cos_min = m_cos_min; cos_max = m_cos_max; + } + m_active_sin_min = sin_min; + m_active_sin_max = sin_max; + m_active_cos_min = cos_min; + m_active_cos_max = cos_max; + m_learned_active = learned_valid; + + float angle_deg = 0.0f; + + if (s_fit.valid) { + const float s = (static_cast(csin) - s_fit.center_sin) / s_fit.amp_sin; + float c = (static_cast(ccos) - s_fit.center_cos) / s_fit.amp_cos; + c = (c + s * s_fit.phase_err_sin) / s_fit.phase_err_cos; + angle_deg = atan2f(s, c) * (180.0f / static_cast(M_PI)); + if (angle_deg < 0.0f) { + angle_deg += 360.0f; + } + } else if ((sin_max > sin_min) && (cos_max > cos_min)) { + float sin_norm = (static_cast(csin - sin_min) / + static_cast(sin_max - sin_min)) * 2.0f - 1.0f; + float cos_norm = (static_cast(ccos - cos_min) / + static_cast(cos_max - cos_min)) * 2.0f - 1.0f; + angle_deg = atan2f(sin_norm, cos_norm) * (180.0f / static_cast(M_PI)); + if (angle_deg < 0.0f) { + angle_deg += 360.0f; + } + } + + return angle_deg; +} + +float EncoderADC::extrapolatedAngleDeg() { + const float angle = m_snapshot.angle; + if (!m_running || !m_rpm_init) { + return angle; + } + const uint32_t age_cycles = DWT->CYCCNT - m_last_sample_cycles; + const float age_s = static_cast(age_cycles) / + static_cast(SystemCoreClock); + const float deg_per_s = m_rpm_ema * 6.0f; /* rpm -> deg/s */ + float corr = deg_per_s * age_s; + const float bound = std::fabs(deg_per_s) * (1.5f / m_sample_hz); + if (corr > bound) corr = bound; + else if (corr < -bound) corr = -bound; + + float out = angle + corr; + while (out >= 360.0f) out -= 360.0f; + while (out < 0.0f) out += 360.0f; + return out; +} + +void EncoderADC::useSynchronizedTrigger(bool sync) { + /* SIL: remember the trigger select; the scheduler drives the stream. */ + silWorld().encoder_sync_trigger = sync; +} + +void EncoderADC::traceDump() { + Telemetry::printf("[SHELL] enc trace: %d samples @ ~1 kHz (sin cos angle_deg), oldest first", + static_cast(TRACE_LEN)); + __disable_irq(); + const size_t head = m_trace_head; + __enable_irq(); + for (size_t k = 0; k < TRACE_LEN; ++k) { + const TraceEntry& e = m_trace[(head + k) % TRACE_LEN]; + Telemetry::printf("[TR] %u %u %.3f", e.raw_sin, e.raw_cos, + static_cast(e.angle_deg)); + } +} + +void EncoderADC::onDmaComplete() { + const uint16_t raw_sin = s_enc_dma_buffer[0]; + const uint16_t raw_cos = s_enc_dma_buffer[1]; + + const float angle = computeAngle(raw_sin, raw_cos); + + m_snapshot.angle = angle; + m_snapshot.raw_sin = raw_sin; + m_snapshot.raw_cos = raw_cos; + m_new_data = true; + m_last_sample_ms = HAL_GetTick(); + m_last_sample_cycles = DWT->CYCCNT; + ++m_isr_count; + + if (m_fit_capture) { + s_fit_acc.add(raw_sin, raw_cos); + } + + if (++m_trace_decim >= TRACE_DECIM) { + m_trace_decim = 0; + m_trace[m_trace_head] = {raw_sin, raw_cos, angle}; + m_trace_head = (m_trace_head + 1) % TRACE_LEN; + } +} + +bool EncoderADC::sample(float& angle_deg) { + if (!m_new_data) { + return false; + } + + __disable_irq(); + angle_deg = m_snapshot.angle; + m_new_data = false; + __enable_irq(); + + return true; +} + +bool EncoderADC::sample(float& angle_deg, uint16_t& raw_sin, uint16_t& raw_cos) { + if (!m_new_data) { + return false; + } + + __disable_irq(); + angle_deg = m_snapshot.angle; + raw_sin = m_snapshot.raw_sin; + raw_cos = m_snapshot.raw_cos; + m_new_data = false; + __enable_irq(); + + return true; +} + +void EncoderADC::setBounds(uint16_t sin_min, uint16_t sin_max, + uint16_t cos_min, uint16_t cos_max) { + __disable_irq(); + m_sin_min = sin_min; + m_sin_max = sin_max; + m_cos_min = cos_min; + m_cos_max = cos_max; + m_obs_sin_min = sin_min; + m_obs_sin_max = sin_max; + m_obs_cos_min = cos_min; + m_obs_cos_max = cos_max; + m_mag_ema = 0.0f; + m_mag_ema_init = false; + m_amp_low_count = 0; + m_rail_count = 0; + __enable_irq(); +} + +void EncoderADC::resetBounds() { + __disable_irq(); + m_sin_min = SIN_MIN_CAP; + m_sin_max = SIN_MAX_CAP; + m_cos_min = COS_MIN_CAP; + m_cos_max = COS_MAX_CAP; + m_obs_sin_min = 65535U; + m_obs_sin_max = 0U; + m_obs_cos_min = 65535U; + m_obs_cos_max = 0U; + m_learned_active = false; + m_active_sin_min = SIN_MIN_CAP; + m_active_sin_max = SIN_MAX_CAP; + m_active_cos_min = COS_MIN_CAP; + m_active_cos_max = COS_MAX_CAP; + m_mag_ema = 0.0f; + m_mag_ema_init = false; + m_amp_low_count = 0; + m_rail_count = 0; + __enable_irq(); +} + +void EncoderADC::startFitCapture() { + __disable_irq(); + m_fit_capture = false; + s_fit_acc.reset(); + m_fit_capture = true; + __enable_irq(); +} + +void EncoderADC::stopFitCapture() { + __disable_irq(); + m_fit_capture = false; + __enable_irq(); +} + +bool EncoderADC::computeFit(SinCosFit& out) { + __disable_irq(); + m_fit_capture = false; + FitAccumulator acc = s_fit_acc; + s_fit_acc.reset(); + __enable_irq(); + + out = SinCosFit(); + + if (acc.count < FIT_MIN_SAMPLES) { + return false; + } + if ((acc.max_sin < acc.min_sin + FIT_MIN_SPAN) || + (acc.max_cos < acc.min_cos + FIT_MIN_SPAN)) { + return false; + } + + const float span_sin = static_cast(acc.max_sin - acc.min_sin); + const float span_cos = static_cast(acc.max_cos - acc.min_cos); + if ((span_sin < FIT_MIN_SPAN) || (span_cos < FIT_MIN_SPAN)) { + return false; + } + + const float center_sin = static_cast(acc.min_sin) + span_sin * 0.5f; + const float center_cos = static_cast(acc.min_cos) + span_cos * 0.5f; + const float amp_sin = span_sin * 0.5f; + const float amp_cos = span_cos * 0.5f; + if ((amp_sin < FIT_MIN_AMP) || (amp_cos < FIT_MIN_AMP)) { + return false; + } + + const double n = static_cast(acc.count); + const double mean_sin = acc.sum_sin / n; + const double mean_cos = acc.sum_cos / n; + const double var_sin = acc.sum_sin2 / n - mean_sin * mean_sin; + const double var_cos = acc.sum_cos2 / n - mean_cos * mean_cos; + const double cov_sincos = acc.sum_sincos / n - mean_sin * mean_cos; + + const float moment_amp_sin = static_cast(std::sqrt(2.0 * var_sin)); + const float moment_amp_cos = static_cast(std::sqrt(2.0 * var_cos)); + if ((moment_amp_sin < FIT_MIN_AMP) || (moment_amp_cos < FIT_MIN_AMP)) { + return false; + } + const float amp_mismatch_sin = std::fabs(moment_amp_sin - amp_sin) / amp_sin; + const float amp_mismatch_cos = std::fabs(moment_amp_cos - amp_cos) / amp_cos; + if ((amp_mismatch_sin > 0.10f) || (amp_mismatch_cos > 0.10f)) { + return false; + } + + const float sin_phi = static_cast( + -2.0 * cov_sincos / (static_cast(amp_sin) * static_cast(amp_cos))); + + float clamped_sin_phi = sin_phi; + if (clamped_sin_phi > FIT_MAX_SIN_PHASE) clamped_sin_phi = FIT_MAX_SIN_PHASE; + if (clamped_sin_phi < -FIT_MAX_SIN_PHASE) clamped_sin_phi = -FIT_MAX_SIN_PHASE; + const float phi = asinf(clamped_sin_phi); + + if (std::fabs(phi) > (FIT_MAX_PHASE_DEG * static_cast(M_PI) / 180.0f)) { + return false; + } + + out.center_sin = center_sin; + out.center_cos = center_cos; + out.amp_sin = amp_sin; + out.amp_cos = amp_cos; + out.phase_err = phi; + out.phase_err_sin = clamped_sin_phi; + out.phase_err_cos = cosf(phi); + out.sample_count = static_cast(acc.count); + out.valid = true; + return true; +} + +void EncoderADC::applyFit(const SinCosFit& fit) { + __disable_irq(); + s_fit = fit; + __enable_irq(); +} + +void EncoderADC::clearFit() { + __disable_irq(); + s_fit = SinCosFit(); + __enable_irq(); +} + +EncoderADC::SinCosFit EncoderADC::currentFit() const { + __disable_irq(); + SinCosFit fit = s_fit; + __enable_irq(); + return fit; +} + +void EncoderADC::initializeFitState() { + __disable_irq(); + s_fit_acc.reset(); + s_fit = SinCosFit(); + __enable_irq(); +} + +void EncoderADC::onDmaError() { + FaultManager::instance().raise(FaultSource::EncoderDma, + FaultReason::EncoderDmaError); +} + +void EncoderADC::diagnose() { + /* Cooperative SIL runtime app-loop rendezvous: diagnose() runs exactly + * once per InverterMain::loop() pass, so the scheduler releases one + * app_loop iteration per call here. */ + sil_rt_app_gate(); + + const uint32_t now_ms = HAL_GetTick(); + + /* Mechanical speed: time-window estimate at main-loop cadence (copied + * from the hardware driver). */ + { + const float angle = m_snapshot.angle; + if (!m_rpm_init) { + m_rpm_init = true; + m_unwrapped_angle = angle; + m_window_ref_angle = angle; + m_rpm_prev_angle = angle; + m_rpm_filt_angle = angle; + m_rpm_ema = 0.0f; + m_rpm_window_ms = now_ms; + } else { + float delta = angle - m_rpm_prev_angle; + if (delta > 180.0f) delta -= 360.0f; + else if (delta < -180.0f) delta += 360.0f; + m_unwrapped_angle += delta; + m_rpm_prev_angle = angle; + + const uint32_t win_ms = now_ms - m_rpm_window_ms; + if (win_ms >= RPM_WINDOW_MS) { + const float win_deg = m_unwrapped_angle - m_window_ref_angle; + const float rpm_inst = (win_deg / 360.0f) * (60000.0f / static_cast(win_ms)); + m_rpm_ema += RPM_ALPHA * (rpm_inst - m_rpm_ema); + m_window_ref_angle = m_unwrapped_angle; + m_rpm_window_ms = now_ms; + } + } + } + + /* Signal-quality faults: magnitude collapse and rail sticking. */ + const bool range_ok = (m_active_sin_max - m_active_sin_min > MIN_AMP_RANGE) && + (m_active_cos_max - m_active_cos_min > MIN_AMP_RANGE); + if (range_ok) { + const uint16_t raw_sin = m_snapshot.raw_sin; + const uint16_t raw_cos = m_snapshot.raw_cos; + const float sin_mid = 0.5f * static_cast(m_active_sin_min + m_active_sin_max); + const float cos_mid = 0.5f * static_cast(m_active_cos_min + m_active_cos_max); + const float dx = static_cast(raw_sin) - sin_mid; + const float dy = static_cast(raw_cos) - cos_mid; + const float mag = std::sqrt(dx * dx + dy * dy); + + if (!m_mag_ema_init) { + m_mag_ema = mag; + m_mag_ema_init = true; + } else { + m_mag_ema += MAG_EMA_ALPHA * (mag - m_mag_ema); + } + + if (m_mag_ema < AMP_COLLAPSE_THRESHOLD) { + if (++m_amp_low_count >= AMP_COLLAPSE_COUNT) { + FaultManager::instance().raise( + FaultSource::EncoderAmplitude, FaultReason::EncoderAmplitudeLow); + m_amp_low_count = 0; + } + } else { + m_amp_low_count = 0; + } + + const bool at_rail = + (raw_sin < SIN_MIN_CAP + RAIL_MARGIN) || + (raw_sin > SIN_MAX_CAP - RAIL_MARGIN) || + (raw_cos < COS_MIN_CAP + RAIL_MARGIN) || + (raw_cos > COS_MAX_CAP - RAIL_MARGIN); + if (at_rail) { + if (++m_rail_count >= RAIL_COUNT) { + FaultManager::instance().raise( + FaultSource::EncoderOutOfRange, FaultReason::EncoderAtRail); + m_rail_count = 0; + } + } else { + m_rail_count = 0; + } + + if (s_fit.valid) { + const bool signal_bad = (m_mag_ema < AMP_COLLAPSE_THRESHOLD) || at_rail; + if (signal_bad) { + if (++m_fit_fault_count >= FIT_FAULT_COUNT) { + Telemetry::printf("[ENC] fit invalidated: repeated signal-quality fault"); + clearFit(); + } + } else if (m_fit_fault_count > 0) { + --m_fit_fault_count; + } + } + } + + /* Publish the measured trigger/ISR rate once a second; self-calibrate + * the estimator's time base from it (identical to hardware behavior). */ + static uint32_t s_last_ms = 0; + static uint32_t s_last_count = 0; + if (s_last_ms != 0U && (now_ms - s_last_ms) >= 1000U) { + const float hz = static_cast(m_isr_count - s_last_count) * + (1000.0f / static_cast(now_ms - s_last_ms)); + Telemetry::log("enc_isr_hz", hz); + m_sample_hz = hz; + s_last_count = m_isr_count; + s_last_ms = now_ms; + } else if (s_last_ms == 0U) { + s_last_count = m_isr_count; + s_last_ms = now_ms; + } + + if (m_running && (now_ms - m_last_sample_ms) > SAMPLE_TIMEOUT_MS) { + /* Same as hardware: timeout fault currently disabled (interferes + * with calibration work). */ + } +} + +} // namespace Inverter + +/* -------------------------------------------------------------------------- + * Scheduler hooks (not firmware-visible) + * ------------------------------------------------------------------------ */ + +bool silEncoderRunning() { + return silWorld().encoder_stream_running; +} + +bool silEncoderSyncTrigger() { + return silWorld().encoder_sync_trigger; +} + +void silEncoderSampleFromPlant() { + /* Render the plant's mechanical rotor angle as quantized sin/cos counts: + * center 32768, amplitude 30000, one sin/cos cycle per mechanical rev. */ + const SilWorld& w = silWorld(); + if (w.encoder_sig_lost) { + /* Sensor excitation loss: ratiometric sin/cos outputs fall back to + * the bias mid-supply, so the decoded signal magnitude collapses in + * the firmware's EncoderADC::diagnose amplitude check. */ + Inverter::s_enc_dma_buffer[0] = 32768; + Inverter::s_enc_dma_buffer[1] = 32768; + Inverter::encoderADC().onDmaComplete(); + return; + } + const auto& st = w.plant.State(); + const float pp = static_cast(silWorld().plant.Model().Params().pole_pairs); + const float two_pi = 6.28318530718f; + float theta_m = (pp > 0.0f) ? (st.theta_e_rad / pp) : 0.0f; + theta_m = std::fmod(theta_m, two_pi); + if (theta_m < 0.0f) theta_m += two_pi; + + const float s = 32768.0f + 30000.0f * sinf(theta_m); + const float c = 32768.0f + 30000.0f * cosf(theta_m); + auto q = [](float x) -> uint16_t { + if (x < 0.0f) x = 0.0f; + if (x > 65535.0f) x = 65535.0f; + return static_cast(x + 0.5f); + }; + Inverter::s_enc_dma_buffer[0] = q(s); + Inverter::s_enc_dma_buffer[1] = q(c); + Inverter::encoderADC().onDmaComplete(); +} diff --git a/Images/HostSIL/sil/sil_fram.c b/Images/HostSIL/sil/sil_fram.c new file mode 100644 index 00000000..1e1a459b --- /dev/null +++ b/Images/HostSIL/sil/sil_fram.c @@ -0,0 +1,101 @@ +/* + * sil_fram.c — SIL replacement for + * Src/Inverter/Drivers/Storage/cy15b102q_driver.c. + * + * In-memory CY15B102Q (2-Mbit FRAM) model: a zero-initialised 256 KiB image + * with optional file persistence (sil_fram_attach path from the scenario). + * No SPI/GPIO traffic is simulated beyond keeping the chip-select line + * bookkeeping visible to the GPIO model. + */ +#include "cy15b102q_driver.h" + +#include +#include + +static uint8_t g_image[CY15B102Q_SIZE]; +static char g_path[512]; +static int g_dirty = 0; + +/* Hook called by host_sil main() before the firmware boots. With path == + * NULL the image starts zeroed (fresh FRAM) and is never persisted. */ +void sil_fram_attach(const char* path) { + if (path == NULL || path[0] == '\0') return; + snprintf(g_path, sizeof(g_path), "%s", path); + FILE* f = fopen(g_path, "rb"); + if (f != NULL) { + const size_t got = fread(g_image, 1, sizeof(g_image), f); + (void)got; /* short read = smaller/former image; rest stays 0 */ + fclose(f); + } + /* Missing file => first-boot zeroed image; it is created on detach. */ +} + +/* Flush back to the backing file if attached. */ +void sil_fram_detach_save(void) { + if (g_path[0] == '\0' || !g_dirty) return; + FILE* f = fopen(g_path, "wb"); + if (f != NULL) { + (void)fwrite(g_image, 1, sizeof(g_image), f); + fclose(f); + } +} + +static void select_chip(CY15B102Q_HandleTypeDef* dev) { + HAL_GPIO_WritePin(dev->cs_port, dev->cs_pin, GPIO_PIN_RESET); +} + +static void deselect_chip(CY15B102Q_HandleTypeDef* dev) { + HAL_GPIO_WritePin(dev->cs_port, dev->cs_pin, GPIO_PIN_SET); +} + +HAL_StatusTypeDef CY15B102Q_Init(CY15B102Q_HandleTypeDef* dev) { + if (dev == NULL) return HAL_ERROR; + HAL_GPIO_WritePin(dev->cs_port, dev->cs_pin, GPIO_PIN_SET); + HAL_GPIO_WritePin(dev->wp_port, dev->wp_pin, GPIO_PIN_SET); + HAL_GPIO_WritePin(dev->hold_port, dev->hold_pin, GPIO_PIN_SET); + HAL_Delay(1); + /* ID check always passes in SIL (no JEDEC mismatch possible). */ + return HAL_OK; +} + +uint8_t CY15B102Q_ReadStatus(CY15B102Q_HandleTypeDef* dev) { + (void)dev; + return 0; /* WIP=0 (always ready) */ +} + +void CY15B102Q_WriteEnable(CY15B102Q_HandleTypeDef* dev) { (void)dev; } +void CY15B102Q_WriteDisable(CY15B102Q_HandleTypeDef* dev) { (void)dev; } + +void CY15B102Q_Read(CY15B102Q_HandleTypeDef* dev, uint32_t addr, + uint8_t* buf, uint32_t len) { + select_chip(dev); + for (uint32_t i = 0; i < len; ++i) { + buf[i] = g_image[(addr + i) & CY15B102Q_ADDR_MASK]; + } + deselect_chip(dev); +} + +void CY15B102Q_Write(CY15B102Q_HandleTypeDef* dev, uint32_t addr, + const uint8_t* buf, uint32_t len) { + select_chip(dev); + for (uint32_t i = 0; i < len; ++i) { + g_image[(addr + i) & CY15B102Q_ADDR_MASK] = buf[i]; + } + g_dirty = 1; + deselect_chip(dev); +} + +uint64_t CY15B102Q_ReadID(CY15B102Q_HandleTypeDef* dev) { + (void)dev; + return 0x047F5E03ULL; /* plausible Cypress JEDEC-style ID */ +} + +void CY15B102Q_Sleep(CY15B102Q_HandleTypeDef* dev) { (void)dev; } +void CY15B102Q_Wake(CY15B102Q_HandleTypeDef* dev) { (void)dev; } + +__attribute__((weak)) void CY15B102Q_FaultCallback(CY15B102Q_FaultCode code) { + (void)code; +} + +uint32_t CY15B102Q_GetErrorCount(void) { return 0; } +void CY15B102Q_ClearErrorCount(void) {} diff --git a/Images/HostSIL/sil/sil_fw_console.cpp b/Images/HostSIL/sil/sil_fw_console.cpp new file mode 100644 index 00000000..363d7825 --- /dev/null +++ b/Images/HostSIL/sil/sil_fw_console.cpp @@ -0,0 +1,122 @@ +/* + * sil_fw_console.cpp — see sil_fw_console.h. Mirrors firmware Telemetry + * "print" strings (USART3 COBS/InverterProtocol byte stream) onto stdout. + * + * Wire format recap (Lib/InverterProtocol): + * frame = ivp_cobs_encode(packet) followed by a 0x00 delimiter + * packet = 16-byte header (magic/version/type/payload_len/seq/time_us) + * + payload + CRC16-CCITT + * DEFINE payloads map dynamic ids -> keys; the firmware's printf strings + * travel as "print" key values inside DATA frames (VT_STR, or VT_STR_FRAG + * sequences for lines longer than STR_MAXLEN). + */ +#include "sil_fw_console.h" + +#include +#include + +#include +#include +#include +#include +#include +#include + +namespace { + +constexpr size_t kAccCap = 32 * 1024; /* accumulator bound (resync cap) */ + +std::vector s_acc; +std::unordered_map s_key_name; +std::string s_frag; +bool s_enabled = true; + +void emitLine(uint32_t time_us, const std::string& text) { + std::printf("[FW t=%8.3f] %s\n", static_cast(time_us) / 1e6, + text.c_str()); + std::fflush(stdout); +} + +void onDataItem(uint32_t time_us, const ivp_data_item_t& item) { + if (item.type != IVP_VT_STR && item.type != IVP_VT_STR_FRAG) return; + const auto it = s_key_name.find(item.id); + if (it == s_key_name.end() || it->second != "print") return; + + if (item.type == IVP_VT_STR) { + emitLine(time_us, std::string(item.v.str.data, item.v.str.len)); + return; + } + /* Fragmented string: START begins a fresh buffer, END flushes. */ + const uint8_t frag = item.v.frag.frag; + if ((frag & IVP_SF_START) != 0U) s_frag.clear(); + s_frag.append(item.v.frag.data, item.v.frag.len); + if ((frag & IVP_SF_END) != 0U) { + emitLine(time_us, s_frag); + s_frag.clear(); + } +} + +void onPacket(const uint8_t* frame, size_t frame_len) { + if (frame_len == 0) return; + std::vector decoded(frame_len); + const size_t n = ivp_cobs_decode(frame, frame_len, decoded.data(), + decoded.size()); + if (n == 0) return; /* not a valid encoder frame: resync by dropping */ + + ivp_header_t hdr{}; + const uint8_t* payload = nullptr; + uint16_t payload_len = 0; + if (ivp_packet_parse(decoded.data(), n, &hdr, &payload, &payload_len) != + IVP_OK) { + return; + } + + if (hdr.msg_type == IVP_MSG_TELEMETRY_DEFINE) { + ivp_define_iter_t it; + if (ivp_telemetry_define_iter_init(payload, payload_len, &it) != IVP_OK) + return; + uint16_t id = 0; + uint8_t type = 0; + const char* key = nullptr; + uint8_t key_len = 0; + while (ivp_telemetry_define_iter_next(&it, &id, &type, &key, &key_len)) { + (void)type; /* only "print"-keyed strings are mirrored */ + s_key_name[id] = std::string(key, key_len); + } + } else if (hdr.msg_type == IVP_MSG_TELEMETRY_DATA) { + ivp_data_iter_t it; + if (ivp_telemetry_data_iter_init(payload, payload_len, &it) != IVP_OK) + return; + ivp_data_item_t item; + while (ivp_telemetry_data_iter_next(&it, &item)) { + onDataItem(hdr.time_us, item); + } + } +} + +} // namespace + +void silFwConsoleReset() { + s_acc.clear(); + s_key_name.clear(); + s_frag.clear(); +} + +void silFwConsoleSetEnabled(bool enabled) { s_enabled = enabled; } + +void silFwConsoleFeed(const uint8_t* data, size_t len) { + if (!s_enabled || data == nullptr || len == 0) return; + s_acc.insert(s_acc.end(), data, data + len); + if (s_acc.size() > kAccCap) { + /* Garbage on the wire (should not happen on the modeled UART): keep + * the newest half so decoding can resync on the next delimiter. */ + s_acc.erase(s_acc.begin(), s_acc.begin() + s_acc.size() / 2); + } + + for (;;) { + auto it = std::find(s_acc.begin(), s_acc.end(), uint8_t{0}); + if (it == s_acc.end()) return; + onPacket(s_acc.data(), static_cast(it - s_acc.begin())); + s_acc.erase(s_acc.begin(), it + 1); + } +} diff --git a/Images/HostSIL/sil/sil_fw_console.h b/Images/HostSIL/sil/sil_fw_console.h new file mode 100644 index 00000000..82d220a9 --- /dev/null +++ b/Images/HostSIL/sil/sil_fw_console.h @@ -0,0 +1,40 @@ +/* + * sil_fw_console.h — host-side mirror of the firmware's "print" telemetry + * strings onto stdout. + * + * In --live mode the firmware's USART3 byte stream is already observable via + * RTEStudio / ivp_probe.py on the TCP link; in batch mode the bytes are + * dropped. This module taps the same stream (fed from + * HAL_UART_Transmit_DMA), decodes the COBS-framed InverterProtocol packets + * with the shared Lib/InverterProtocol walker, and prints complete "print" + * key strings as "[FW ...]" lines — so boot messages, fault raises + * ([FAULT][C][...] Name triggered: reason), and supervisor transitions are + * visible in batch logs with the firmware's own timestamps. + * + * Call from the scheduler context only (the UART shim runs there / at ISR + * points while the firmware is blocked). + */ +#ifndef SIL_FW_CONSOLE_H +#define SIL_FW_CONSOLE_H + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* Clear all decoder state (call once before the firmware thread starts). */ +void silFwConsoleReset(); + +/* Feed one chunk of the firmware's USART3 TX byte stream. */ +void silFwConsoleFeed(const uint8_t* data, size_t len); + +/* Enable/disable the mirror (default: enabled). */ +void silFwConsoleSetEnabled(bool enabled); + +#ifdef __cplusplus +} /* extern "C" */ +#endif + +#endif /* SIL_FW_CONSOLE_H */ diff --git a/Images/HostSIL/sil/sil_hal.cpp b/Images/HostSIL/sil/sil_hal.cpp new file mode 100644 index 00000000..3d22f916 --- /dev/null +++ b/Images/HostSIL/sil/sil_hal.cpp @@ -0,0 +1,473 @@ +/* + * sil_hal.cpp — SIL implementations of the stm32h7xx_hal.h surface. + * + * All "peripherals" are plain structs; the simulated clock (sil_rt) backs + * HAL_GetTick/HAL_Delay. GPIO is a tiny pin-state model with the few + * virtual inputs the firmware can observe (gate-driver READY/FAULT). + */ +#include "main.h" /* SIL CubeMX-style pin map (sil/stm32shim) */ +#include "tim.h" +#include "adc.h" +#include "spi.h" +#include "usart.h" +#include "fdcan.h" +#include "gpio.h" +#include "dma.h" + +#include "sil_rt.h" +#include "sil_hooks.h" +#include "sil_live_server.h" +#include "sil_fw_console.h" + +#include +#include +#include + +/* -------------------------------------------------------------------------- + * Global peripheral register blocks, handles, and port objects + * ------------------------------------------------------------------------ */ + +SIL_DWT_Type sil_dwt; +SIL_CoreDebug_Type sil_coredebug; +uint32_t SystemCoreClock = 550000000U; + +GPIO_TypeDef sil_gpio_a{0, 0, 0, 0, 0, 0, 0, 0}; +GPIO_TypeDef sil_gpio_b{1, 0, 0, 0, 0, 0, 0, 0}; +GPIO_TypeDef sil_gpio_c{2, 0, 0, 0, 0, 0, 0, 0}; +GPIO_TypeDef sil_gpio_d{3, 0, 0, 0, 0, 0, 0, 0}; +GPIO_TypeDef sil_gpio_e{4, 0, 0, 0, 0, 0, 0, 0}; +GPIO_TypeDef sil_gpio_f{5, 0, 0, 0, 0, 0, 0, 0}; +GPIO_TypeDef sil_gpio_g{6, 0, 0, 0, 0, 0, 0, 0}; + +namespace { +} // namespace + +TIM_TypeDef sil_tim1; +TIM_HandleTypeDef htim1; + +ADC_TypeDef sil_adc1; +ADC_TypeDef sil_adc2; +ADC_TypeDef sil_adc3; +ADC_HandleTypeDef hadc1; +ADC_HandleTypeDef hadc2; +ADC_HandleTypeDef hadc3; + +SPI_TypeDef sil_spi2{1}; +SPI_TypeDef sil_spi4{3}; +SPI_HandleTypeDef hspi2; +SPI_HandleTypeDef hspi4; + +USART_TypeDef sil_usart3{2}; +UART_HandleTypeDef huart3; + +FDCAN_GlobalTypeDef sil_fdcan1{0}; +FDCAN_GlobalTypeDef sil_fdcan2{1}; +FDCAN_HandleTypeDef hfdcan1; +FDCAN_HandleTypeDef hfdcan2; + +namespace { +struct UartState { + bool tx_pending = false; + UART_HandleTypeDef* pending_huart = nullptr; + + /* IT-RX model (huart3): the firmware arms single-byte reception with + * HAL_UART_Receive_IT and expects HAL_UART_RxCpltCallback per byte. + * Bytes arrive from the live-link clients via silUartRxEnqueue() + * (scheduler context) and are delivered by silUartRxPoll() (scheduler + * context, firmware blocked — the SIL stand-in for the RXNE ISR). */ + bool rx_armed = false; + uint8_t* rx_buf = nullptr; + uint16_t rx_size = 0; + uint16_t rx_count = 0; + std::deque rx_fifo; +}; + +/* Bound on queued client->firmware bytes (bytes are tiny text commands; + * the cap only bounds memory if the firmware stops polling). */ +constexpr size_t kUartRxFifoCap = 4096; + +/* Throttle for the cap-drop notice: at most one line per ~1 s of sim time — + * a permanently stuffed FIFO stays visible without spamming the log. */ +uint64_t g_rx_cap_warn_after_us = 0; + +UartState g_uart3; +} // namespace + +/* Called once from host_sil main() before the firmware thread starts. */ +void sil_hal_init() { + sil_tim1 = {}; + /* Mirror MX_TIM1_Init (Src/tim.c): PSC=0, ARR=27500, RCR=0 — + * 275 MHz counter, center-aligned, ~5 kHz switching. */ + sil_tim1.PSC = 0; + sil_tim1.ARR = 27500; + sil_tim1.RCR = 0; + htim1 = TIM_HandleTypeDef{}; + htim1.Instance = &sil_tim1; + htim1.Init.Prescaler = 0; + htim1.Init.Period = 27500; + htim1.Init.RepetitionCounter = 0; + + hadc1 = ADC_HandleTypeDef{}; hadc1.Instance = &sil_adc1; + hadc2 = ADC_HandleTypeDef{}; hadc2.Instance = &sil_adc2; + hadc3 = ADC_HandleTypeDef{}; hadc3.Instance = &sil_adc3; + hspi2 = SPI_HandleTypeDef{}; hspi2.Instance = &sil_spi2; + hspi4 = SPI_HandleTypeDef{}; hspi4.Instance = &sil_spi4; + huart3 = UART_HandleTypeDef{}; huart3.Instance = &sil_usart3; + hfdcan1 = FDCAN_HandleTypeDef{}; hfdcan1.Instance = &sil_fdcan1; + hfdcan2 = FDCAN_HandleTypeDef{}; hfdcan2.Instance = &sil_fdcan2; +} + +/* -------------------------------------------------------------------------- + * Tick / delay / interrupts + * ------------------------------------------------------------------------ */ + +extern "C" { + +uint32_t HAL_GetTick(void) { + return static_cast(sil_rt_now_us() / 1000ULL); +} + +void HAL_Delay(uint32_t Delay) { + sil_rt_delay_ms(Delay); +} + +void __disable_irq(void) { /* cooperative model: no preemption (see README) */ } +void __enable_irq(void) {} +void __NOP(void) { __asm__ volatile("nop"); } +void __WFI(void) {} +void __DMB(void) { __asm__ volatile("" ::: "memory"); } + +unsigned int __get_PRIMASK(void) { return 0; } +void __set_PRIMASK(unsigned int) {} +unsigned int __get_IPSR(void) { return 0; } + +void HAL_NVIC_SetPriority(int32_t, uint32_t, uint32_t) {} +void HAL_NVIC_EnableIRQ(int32_t) {} +void HAL_NVIC_DisableIRQ(int32_t) {} +void HAL_NVIC_ClearPendingIRQ(int32_t) {} + +void HAL_NVIC_SystemReset(void) { + fprintf(stderr, "[SIL] HAL_NVIC_SystemReset called — aborting sim\n"); + abort(); +} + +void Error_Handler(void) { + fprintf(stderr, "[SIL] Error_Handler called by firmware — aborting sim\n"); + abort(); +} + +/* -------------------------------------------------------------------------- + * GPIO model + * + * Output state lives in each port's ODR; firmware bit-bang through BSRR is + * folded in at read time. Virtual inputs the firmware can observe: + * GPIOC.12 GATE_DRIVER_READY = power(PC10); the NCD57100 /RDY reports + * driver supply/UVLO state and is not gated by the RESET pin — the reset + * pin only gates the gate outputs, which is modeled separately by + * silGateOutputsEnabled(). Folding reset into /RDY would deadlock the + * firmware's own OpenLoopController::start(), which polls /RDY while the + * reset it is about to release is still asserted. + * GPIOC.11 GATE_DRIVER_FAULT = high (never faulted) + * ------------------------------------------------------------------------ */ + +namespace { +uint32_t effOdr(const GPIO_TypeDef* port) { + /* BSRR is write-only on real hardware; here it retains the last write, + * so fold it into the visible state. */ + return (port->ODR | (port->BSRR & 0xFFFFU)) & ~(port->BSRR >> 16U); +} + +bool silPinState(uint32_t port_idx, uint16_t pin) { + GPIO_TypeDef* ports[7] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG}; + return (effOdr(ports[port_idx]) & pin) != 0; +} +} // namespace + +void HAL_GPIO_WritePin(GPIO_TypeDef* port, uint16_t pin, GPIO_PinState state) { + if (port == nullptr || port->sil_index >= 7) return; + /* Explicit HAL write wins over any pending BSRR state for this pin. */ + port->BSRR &= ~(static_cast(pin) | (static_cast(pin) << 16U)); + port->BSRR |= (state == GPIO_PIN_SET) + ? static_cast(pin) + : (static_cast(pin) << 16U); +} + +GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* port, uint16_t pin) { + if (port == nullptr || port->sil_index >= 7) return GPIO_PIN_RESET; + const uint32_t idx = port->sil_index; + + if (idx == 2 && pin == GPIO_PIN_12) { /* GATE_DRIVER_READY */ + return silPinState(2, GPIO_PIN_10) ? GPIO_PIN_SET : GPIO_PIN_RESET; + } + if (idx == 2 && pin == GPIO_PIN_11) { /* GATE_DRIVER_FAULT */ + return GPIO_PIN_SET; /* active-low: no fault */ + } + return (effOdr(port) & pin) ? GPIO_PIN_SET : GPIO_PIN_RESET; +} + +void HAL_GPIO_TogglePin(GPIO_TypeDef* port, uint16_t pin) { + if (port == nullptr || port->sil_index >= 7) return; + /* Real BSRR is write-only and edge-triggered; our retained model latches + * the last WritePin in BSRR, and a set/reset bit there would keep + * masking the ODR toggle at read time. Clear the pin's latch bits so the + * toggle actually shows. */ + port->BSRR &= ~(static_cast(pin) | (static_cast(pin) << 16U)); + port->ODR ^= pin; +} + +/* -------------------------------------------------------------------------- + * TIM + * ------------------------------------------------------------------------ */ + +uint32_t* SIL_TIM_CcrPtr(TIM_HandleTypeDef* htim, uint32_t channel) { + switch (channel) { + case TIM_CHANNEL_1: return const_cast(&htim->Instance->CCR1); + case TIM_CHANNEL_2: return const_cast(&htim->Instance->CCR2); + case TIM_CHANNEL_3: return const_cast(&htim->Instance->CCR3); + case TIM_CHANNEL_4: return const_cast(&htim->Instance->CCR4); + default: return const_cast(&htim->Instance->CCR1); + } +} + +HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef* htim, uint32_t channel) { + if (channel <= TIM_CHANNEL_4) { + htim->sil_active_channels |= (1U << (channel >> 2)); + } + return HAL_OK; +} + +HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef* htim, uint32_t channel) { + if (channel <= TIM_CHANNEL_4) { + htim->sil_active_channels &= ~(1U << (channel >> 2)); + } + return HAL_OK; +} + +HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef* htim, uint32_t channel) { + if (channel <= TIM_CHANNEL_4) { + htim->sil_active_channels_n |= (1U << (channel >> 2)); + } + /* Real HAL: the complementary-output start sets BDTR.MOE (the plain + * HAL_TIM_PWM_Start does not). silTimOutputsDriving() then observes a + * genuinely driven bridge without the firmware having to call + * PWM_ClearFault() first. */ + __HAL_TIM_MOE_ENABLE(htim); + return HAL_OK; +} + +HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef*, uint32_t) { return HAL_OK; } +HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef*, uint32_t) { return HAL_OK; } + +HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef* htim, uint32_t channel) { + if (channel <= TIM_CHANNEL_4) { + htim->sil_active_channels_n &= ~(1U << (channel >> 2)); + } + __HAL_TIM_MOE_DISABLE(htim); /* real HAL clears BDTR.MOE on stop */ + return HAL_OK; +} + +HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef* htim) { + htim->sil_base_running = 1; + return HAL_OK; +} + +HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef* htim) { + htim->sil_base_running = 0; + return HAL_OK; +} + +HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef*, + const TIM_OC_InitTypeDef*, + uint32_t) { + return HAL_OK; +} + +void HAL_TIM_IRQHandler(TIM_HandleTypeDef*) {} + +/* -------------------------------------------------------------------------- + * ADC + * ------------------------------------------------------------------------ */ + +HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) { + hadc->sil_regular_running = 1; + return HAL_OK; +} +HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) { + hadc->sil_regular_running = 0; + return HAL_OK; +} +HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef*, uint32_t) { + return HAL_OK; +} +uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) { + return hadc->Instance->DR; +} +HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef*, + const ADC_ChannelConfTypeDef*) { + return HAL_OK; +} +uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t rank) { + switch (rank) { + case ADC_INJECTED_RANK_1: return hadc->Instance->JDR1; + case ADC_INJECTED_RANK_2: return hadc->Instance->JDR2; + case ADC_INJECTED_RANK_3: return hadc->Instance->JDR3; + case ADC_INJECTED_RANK_4: return hadc->Instance->JDR4; + default: return 0; + } +} +HAL_StatusTypeDef HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef*) { return HAL_OK; } +HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef*, + const ADC_InjectionConfTypeDef*) { + return HAL_OK; +} +HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef*, + const ADC_MultiModeTypeDef*) { + return HAL_OK; +} +HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef*, uint32_t, uint32_t) { + return HAL_OK; +} +HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc) { + hadc->sil_injected_running = 1; + return HAL_OK; +} +HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc) { + hadc->sil_injected_running = 0; + return HAL_OK; +} +HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef*, + const ADC_AnalogWDGConfTypeDef*) { + return HAL_OK; +} + +/* -------------------------------------------------------------------------- + * SPI (no slave devices modeled; always succeeds) + * ------------------------------------------------------------------------ */ + +HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef*, const uint8_t*, + uint16_t, uint32_t) { return HAL_OK; } +HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef*, uint8_t*, + uint16_t, uint32_t) { return HAL_OK; } +HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef* hspi, + const uint8_t* tx, uint8_t* rx, + uint16_t size, uint32_t timeout_ms) { + return HAL_SPI_Transmit(hspi, tx, size, timeout_ms); +} + +/* -------------------------------------------------------------------------- + * UART (TX DMA completes via silUartPumpTxCompletion from the scheduler) + * + * In this image the only in-firmware user of HAL_UART_Transmit_DMA is the + * Telemetry module: the bytes handed over here are the COBS-framed + * InverterProtocol stream exactly as it would leave USART3 on hardware. + * When the live server is active, forward them verbatim to TCP clients; the + * batch console mirror (sil_fw_console) also walks the same byte stream and + * prints "print" key strings to stdout. + * + * RX (huart3, IT mode): the firmware's CommandShell arms single-byte + * reception in HAL_UART_Receive_IT and consumes bytes in + * HAL_UART_RxCpltCallback. Arming only records the intent here; bytes from + * live-link clients (silUartRxEnqueue) are delivered by silUartRxPoll on the + * scheduler context while the firmware is blocked, one byte per callback — + * the cooperative stand-in for the hardware RXNE interrupt. + * ------------------------------------------------------------------------ */ + +HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef* huart, + const uint8_t* data, uint16_t len) { + if (huart != &huart3) return HAL_ERROR; + if (g_uart3.tx_pending) return HAL_BUSY; + sil_live_feed_tx(data, len); + silFwConsoleFeed(data, len); + g_uart3.tx_pending = true; + g_uart3.pending_huart = huart; + return HAL_OK; +} + +HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef* huart, uint8_t* data, + uint16_t size) { + if (huart == &huart3 && data != nullptr && size > 0) { + g_uart3.rx_armed = true; + g_uart3.rx_buf = data; + g_uart3.rx_size = size; + g_uart3.rx_count = 0; + /* Never deliver inline: the shell re-arms from within + * HAL_UART_RxCpltCallback, so delivery happens in silUartRxPoll on + * the scheduler context. */ + } + return HAL_OK; +} + +/* -------------------------------------------------------------------------- + * CubeMX init shells (never called in SIL; defined for link completeness) + * ------------------------------------------------------------------------ */ + +void MX_ADC1_Init(void) {} +void MX_ADC2_Init(void) {} +void MX_ADC3_Init(void) {} +void MX_TIM1_Init(void) {} +void HAL_TIM_MspPostInit(TIM_HandleTypeDef*) {} +void MX_SPI2_Init(void) {} +void MX_SPI4_Init(void) {} +void MX_USART3_UART_Init(void) {} +void MX_FDCAN1_Init(void) {} +void MX_FDCAN2_Init(void) {} +void MX_GPIO_Init(void) {} +void MX_DMA_Init(void) {} + +} /* extern "C" */ + +/* -------------------------------------------------------------------------- + * Scheduler hooks + * ------------------------------------------------------------------------ */ + +bool silGateOutputsEnabled() { + const bool powered = silPinState(2, GPIO_PIN_10); + const bool released = silPinState(3, GPIO_PIN_5); + return powered && released; +} + +void silUartPumpTxCompletion() { + if (!g_uart3.tx_pending) return; + UART_HandleTypeDef* h = g_uart3.pending_huart; + g_uart3.tx_pending = false; + g_uart3.pending_huart = nullptr; + HAL_UART_TxCpltCallback(h); /* declared by the shim HAL header */ +} + +void silUartRxEnqueue(const uint8_t* data, size_t len) { + if (data == nullptr || len == 0) return; + auto& fifo = g_uart3.rx_fifo; + if (!g_uart3.rx_armed) { + /* Hardware overrun model: with reception disarmed the UART drops + * incoming bytes (RXNE is masked, nothing is retained); the FIFO + * must not hold them for the next arm either. */ + return; + } + size_t n = len; + if (fifo.size() + n > kUartRxFifoCap) { + const size_t keep = + fifo.size() < kUartRxFifoCap ? kUartRxFifoCap - fifo.size() : 0; + const uint64_t now_us = sil_rt_now_us(); + if (now_us >= g_rx_cap_warn_after_us) { + g_rx_cap_warn_after_us = now_us + 1000000ULL; + std::fprintf(stderr, + "[SIL] uart3 rx fifo full (%zu B cap): dropped %zu " + "client byte(s)\n", + kUartRxFifoCap, n - keep); + } + n = keep; + } + fifo.insert(fifo.end(), data, data + n); +} + +void silUartRxPoll() { + while (g_uart3.rx_armed && !g_uart3.rx_fifo.empty()) { + g_uart3.rx_buf[g_uart3.rx_count++] = g_uart3.rx_fifo.front(); + g_uart3.rx_fifo.pop_front(); + if (g_uart3.rx_count >= g_uart3.rx_size) { + g_uart3.rx_armed = false; + g_uart3.rx_count = 0; + HAL_UART_RxCpltCallback(&huart3); /* firmware re-arms for next */ + } + } +} diff --git a/Images/HostSIL/sil/sil_hooks.h b/Images/HostSIL/sil/sil_hooks.h new file mode 100644 index 00000000..8df015e2 --- /dev/null +++ b/Images/HostSIL/sil/sil_hooks.h @@ -0,0 +1,60 @@ +/* + * sil_hooks.h — scheduler-side entry points into the SIL sensor/actuator + * shims. These are NOT firmware-visible; the scheduler uses them to drive + * the modeled hardware peripherals. + * + * All functions must be called from the scheduler context only (firmware + * blocked — see sil_rt.h). + */ +#ifndef SIL_HOOKS_H +#define SIL_HOOKS_H + +#include +#include + +/* --- TIM1 / PWM (sil_pwm.cpp) -------------------------------------------*/ +float silTimSwitchingHz(); /* current TRGO (injected trigger) rate */ +float silTimUpdateHz(); /* current update-event rate */ +bool silTimBaseRunning(); /* HAL_TIM_Base_Start() has run */ +bool silTimUpdateIrqEnabled(); /* UIE set (PWM_StartUpdateInterrupt) */ +bool silTimOutputsDriving(); /* MOE + CH1..3(N) running + gate outputs */ + +/* Fires HAL_TIM_PeriodElapsedCallback(&htim1) — one update event. */ +void silTimFireUpdateIrq(); + +/* --- Phase-current ADC (sil_phase_current_adc.cpp) -----------------------*/ +bool silPhaseCurrentAdcRunning(); +/* Fires onInjectedConversionComplete() — one injected micro-burst. */ +void silPhaseCurrentAdcTrigger(); + +/* --- Encoder (sil_encoder_adc.cpp) --------------------------------------*/ +bool silEncoderRunning(); +bool silEncoderSyncTrigger(); /* TIM1-synced vs TIM2 free-running */ +void silEncoderSampleFromPlant(); /* fill ADC counts, fire DMA hook */ + +/* --- Gate driver / GPIO model (sil_hal.cpp) ----------------------------- */ +bool silGateOutputsEnabled(); /* power rail on AND reset released */ + +/* --- UART (sil_hal.cpp) --------------------------------------------------*/ +/* Fire a deferred UART TX-complete callback if one is pending — call once + * per app tick while the firmware is blocked. */ +void silUartPumpTxCompletion(); + +/* Queue client->firmware bytes (live-link RX) into the modeled huart3 FIFO. + * Call on the scheduler context only (from sil_live_poll). Hardware overrun + * model: bytes arriving while reception is disarmed are dropped; the FIFO is + * cap-bounded and excess bytes are dropped (throttled stderr notice). */ +void silUartRxEnqueue(const uint8_t* data, size_t len); + +/* Deliver queued RX bytes to the armed IT reception: one byte per + * HAL_UART_RxCpltCallback, exactly like the hardware RXNE interrupt, with + * the firmware blocked (its callback re-arms for the next byte). No-op + * when the FIFO is empty or reception is not armed. */ +void silUartRxPoll(); + +/* --- Host-side board init (sil_hal.cpp) ----------------------------------*/ +/* Peripheral register defaults (TIM1 ARR mirror of MX init, etc.). Call + * once before sil_rt_start_firmware(). */ +void sil_hal_init(); + +#endif /* SIL_HOOKS_H */ diff --git a/Images/HostSIL/sil/sil_live_server.cpp b/Images/HostSIL/sil/sil_live_server.cpp new file mode 100644 index 00000000..4674915c --- /dev/null +++ b/Images/HostSIL/sil/sil_live_server.cpp @@ -0,0 +1,302 @@ +/* + * sil_live_server.cpp — see sil_live_server.h. + * + * Socket plumbing mirrors HostSim's telemetry_publisher.cpp (non-blocking + * listen socket, per-client drain). Unlike HostSim — which re-frames a + * host-side key/value map — this server is a pure byte proxy: the firmware's + * own COBS-framed InverterProtocol UART bytes are forwarded verbatim, so the + * TCP stream is bit-identical to the hardware USART3 wire. Client→server + * bytes (RTEStudio text console lines, which end with '\n') are likewise + * forwarded verbatim into the firmware's huart3 IT-RX model + * (silUartRxEnqueue); the Gen6FW CommandShell accepts both '\n' and '\r\n' + * line endings, so no translation is needed. + */ +#include "sil_live_server.h" +#include "sil_hooks.h" /* silUartRxEnqueue */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +namespace { + +using Socket = int; +constexpr Socket kInvalid = -1; + +/* Bytes held for connected clients between polls. At the firmware's default + * telemetry rates this never exceeds a few hundred bytes; the cap only + * exists to bound memory if poll() stops being called. */ +constexpr size_t kPendingCap = 1u << 20; + +/* send() attempts per client per poll; a client whose socket buffer never + * drains is called stalled, and one stalled for this many polls is dropped. + * Polls run once per app-loop iteration (1 kHz at --realtime 1.0), so + * 500 stalls ~ 0.5 s of a completely wedged client. */ +constexpr int kSendAttemptsPerPoll = 64; +constexpr int kMaxStallPolls = 500; + +/* Bound on client->firmware bytes drained per client per poll: one modeled + * UART RX FIFO's worth (sil_hal.cpp caps g_uart3.rx_fifo at the same size). + * Without a cap a flooding client's recv loop never exits and starves the + * app loop; excess bytes simply stay in the socket buffer until next poll. */ +constexpr size_t kRxDrainCapPerPoll = 4096; + +struct Client { + Socket fd = kInvalid; + std::string rx; /* demux buffer for client->device text lines */ + int stall_polls = 0; /* polls where the socket buffer stayed full */ + /* Firmware UART TX bytes this client has not yet acknowledged (sent + * remainder requeued after a partial write; cap-dropped like the shared + * pending buffer so a slow client loses oldest bytes, not the tail). */ + std::vector tx_backlog; +}; + +struct LiveServer { + int listen_fd = -1; + std::vector clients; + std::vector pending; /* firmware UART TX bytes not yet flushed */ + std::mutex mu; /* guards pending (feed runs fw-context) */ +}; + +LiveServer g_live; + +bool SetNonBlocking(Socket s) { + const int flags = fcntl(s, F_GETFL, 0); + if (flags < 0) return false; + return fcntl(s, F_SETFL, flags | O_NONBLOCK) == 0; +} + +bool WouldBlock() { + return errno == EAGAIN || errno == EWOULDBLOCK || errno == EINTR; +} + +void CloseSock(Socket s) { + if (s != kInvalid) ::close(s); +} + +/* Write as many bytes as possible within a bounded number of send() + * attempts. Returns false on a hard socket error (caller drops the client); + * otherwise `written` reports how many bytes the client accepted (0 = the + * socket buffer stayed full through every attempt = stalled this poll). */ +bool WriteAll(Socket fd, const uint8_t* data, size_t n, size_t& written) { + written = 0; + for (int attempt = 0; attempt < kSendAttemptsPerPoll && written < n; + ++attempt) { +#ifdef MSG_NOSIGNAL + const ssize_t wrote = + ::send(fd, data + written, n - written, MSG_NOSIGNAL); +#else + const ssize_t wrote = ::send(fd, data + written, n - written, 0); +#endif + if (wrote < 0) { + if (WouldBlock()) continue; + return false; + } + if (wrote == 0) break; + written += static_cast(wrote); + } + return true; +} + +void HandleRxLine(LiveServer&, const std::string& raw) { + std::string line = raw; + while (!line.empty() && + (line.back() == '\r' || line.back() == '\n' || line.back() == ' ')) { + line.pop_back(); + } + if (line.empty()) return; + std::printf("[SIL live] -> shell: %s\n", line.c_str()); + std::fflush(stdout); +} + +void DropClient(LiveServer& srv, size_t index) { + CloseSock(srv.clients[index].fd); + srv.clients.erase(srv.clients.begin() + static_cast(index)); + std::printf("[SIL live] client disconnected (%zu remaining)\n", + srv.clients.size()); + std::fflush(stdout); +} + +} // namespace + +bool sil_live_start(const char* host, uint16_t port) { + sil_live_stop(); + + Socket fd = ::socket(AF_INET, SOCK_STREAM, IPPROTO_TCP); + if (fd == kInvalid) { + std::fprintf(stderr, "[SIL live] socket() failed: %s\n", + std::strerror(errno)); + return false; + } + + int yes = 1; + setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, &yes, sizeof(yes)); + + sockaddr_in addr{}; + addr.sin_family = AF_INET; + addr.sin_port = htons(port); + if (inet_pton(AF_INET, host != nullptr ? host : "127.0.0.1", + &addr.sin_addr) != 1 || + ::bind(fd, reinterpret_cast(&addr), sizeof(addr)) != 0 || + ::listen(fd, 4) != 0 || !SetNonBlocking(fd)) { + std::fprintf(stderr, "[SIL live] cannot listen on %s:%u: %s " + "(continuing without live link)\n", + host != nullptr ? host : "127.0.0.1", + static_cast(port), std::strerror(errno)); + CloseSock(fd); + return false; + } + + g_live.listen_fd = fd; + std::printf("[SIL live] listening on %s:%u " + "(RTEStudio: --tcp %s:%u --protocol ivp)\n", + host != nullptr ? host : "127.0.0.1", + static_cast(port), host != nullptr ? host : "127.0.0.1", + static_cast(port)); + std::fflush(stdout); + return true; +} + +void sil_live_stop() { + for (auto& c : g_live.clients) CloseSock(c.fd); + g_live.clients.clear(); + if (g_live.listen_fd != -1) { + CloseSock(static_cast(g_live.listen_fd)); + g_live.listen_fd = -1; + } + { + std::lock_guard lock(g_live.mu); + g_live.pending.clear(); + } +} + +bool sil_live_active() { + return g_live.listen_fd != -1; +} + +void sil_live_feed_tx(const uint8_t* data, size_t len) { + if (data == nullptr || len == 0) return; + if (g_live.listen_fd == -1 || g_live.clients.empty()) return; + + std::lock_guard lock(g_live.mu); + auto& p = g_live.pending; + if (p.size() + len > kPendingCap) { + /* Client is not draining; drop oldest bytes (clients resync on the + * next 0x00 COBS delimiter and CRC-check each frame). */ + const size_t drop = p.size() + len - kPendingCap; + p.erase(p.begin(), p.begin() + static_cast(drop)); + } + p.insert(p.end(), data, data + len); +} + +void sil_live_poll() { + if (g_live.listen_fd == -1) return; + + /* Accept all pending connects. */ + for (;;) { + sockaddr_in peer{}; + socklen_t plen = sizeof(peer); + Socket cfd = ::accept(static_cast(g_live.listen_fd), + reinterpret_cast(&peer), &plen); + if (cfd == kInvalid) break; + SetNonBlocking(cfd); + Client c; + c.fd = cfd; + g_live.clients.push_back(std::move(c)); + std::printf("[SIL live] client connected (%zu total)\n", + g_live.clients.size()); + std::fflush(stdout); + } + + /* Drain client -> server bytes: forward every byte verbatim into the + * modeled huart3 IT-RX FIFO (the firmware CommandShell path) and mirror + * complete text lines to stdout. Bounded per client per poll so a + * flooding client cannot starve the app loop. */ + for (size_t i = 0; i < g_live.clients.size();) { + Client& c = g_live.clients[i]; + char buf[256]; + size_t drained = 0; + bool drop = false; + while (drained < kRxDrainCapPerPoll) { + const size_t room = + std::min(sizeof(buf), kRxDrainCapPerPoll - drained); + const ssize_t n = ::recv(c.fd, buf, room, 0); + if (n < 0) { + drop = !WouldBlock(); + break; + } + if (n == 0) { + drop = true; + break; + } + drained += static_cast(n); + silUartRxEnqueue(reinterpret_cast(buf), + static_cast(n)); + c.rx.append(buf, buf + n); + size_t pos; + while ((pos = c.rx.find('\n')) != std::string::npos) { + std::string line = c.rx.substr(0, pos); + c.rx.erase(0, pos + 1); + HandleRxLine(g_live, line); + } + if (c.rx.size() > 4096) c.rx.erase(0, c.rx.size() - 1024); + } + if (drop) { + DropClient(g_live, i); + continue; + } + ++i; + } + + /* Flush queued firmware UART bytes to every client. The per-client + * backlog keeps bytes a client could not take yet (previously a slow but + * alive client lost the unsent tail — telemetry frames vanished); + * oldest bytes are dropped past the same cap as the shared buffer. */ + std::vector bytes; + { + std::lock_guard lock(g_live.mu); + bytes.swap(g_live.pending); + } + + for (size_t i = 0; i < g_live.clients.size();) { + Client& c = g_live.clients[i]; + c.tx_backlog.insert(c.tx_backlog.end(), bytes.begin(), bytes.end()); + if (!c.tx_backlog.empty()) { + size_t written = 0; + const bool ok = WriteAll(c.fd, c.tx_backlog.data(), + c.tx_backlog.size(), written); + if (!ok) { + DropClient(g_live, i); + continue; + } + c.tx_backlog.erase( + c.tx_backlog.begin(), + c.tx_backlog.begin() + static_cast(written)); + if (c.tx_backlog.size() > kPendingCap) { + c.tx_backlog.erase( + c.tx_backlog.begin(), + c.tx_backlog.begin() + + static_cast(c.tx_backlog.size() - + kPendingCap)); + } + c.stall_polls = (written > 0) ? 0 : c.stall_polls + 1; + if (c.stall_polls >= kMaxStallPolls) { + std::printf("[SIL live] dropping stalled client\n"); + std::fflush(stdout); + DropClient(g_live, i); + continue; + } + } + ++i; + } +} diff --git a/Images/HostSIL/sil/sil_live_server.h b/Images/HostSIL/sil/sil_live_server.h new file mode 100644 index 00000000..2654c16f --- /dev/null +++ b/Images/HostSIL/sil/sil_live_server.h @@ -0,0 +1,60 @@ +/* + * sil_live_server.h — live telemetry link for host_sil. + * + * A small non-blocking TCP server that proxies the firmware's own USART3 TX + * byte stream (COBS-framed InverterProtocol packets produced by the firmware + * Telemetry module, tapped in sil_hal.cpp's HAL_UART_Transmit_DMA) verbatim + * to every connected client. RTEStudio attaches to this stream exactly like + * it does to HostSim: + * + * RTEStudio --tcp 127.0.0.1:14608 --protocol ivp + * + * The bytes are not re-framed or re-sampled: whatever the firmware puts on + * its UART TX DMA goes onto the socket unmodified, at the firmware's own + * cadence (100 Hz DATA + periodic DEFINE re-announce, so a client connecting + * at any point has the full key table within ~100 ms). + * + * Threading: sil_live_feed_tx() runs on the firmware context (from the HAL + * tap); sil_live_poll()/sil_live_stop() run on the scheduler context. The + * cooperative runtime keeps the two contexts strictly alternating, and the + * pending buffer is additionally mutex-guarded. + * RX direction: bytes a client sends are fed verbatim into the modeled + * huart3 IT-RX path (silUartRxEnqueue -> silUartRxPoll -> the firmware's + * HAL_UART_RxCpltCallback), so the Gen6FW CommandShell sees them exactly as + * minicom-typed bytes on hardware; text lines are additionally logged to + * stdout for observability. + */ +#ifndef SIL_LIVE_SERVER_H +#define SIL_LIVE_SERVER_H + +#include +#include + +/* Default listen port (matches HostSim's live port). */ +#define SIL_LIVE_DEFAULT_PORT 14608 + +/* Open the listen socket (bound to host:port, non-blocking). + * Returns false (and logs why) if the socket could not be created/bound — + * the simulation continues without a live link in that case. */ +bool sil_live_start(const char* host, uint16_t port); + +/* Close listen socket and all clients. */ +void sil_live_stop(); + +/* True while the server is listening. */ +bool sil_live_active(); + +/* Firmware context: queue UART TX bytes for all connected clients. + * No-op when the server is not running; zero copies when there is neither a + * client nor pending data. */ +void sil_live_feed_tx(const uint8_t* data, size_t len); + +/* Scheduler context: accept pending connects, flush queued bytes to every + * client (bytes a slow client cannot take stay queued in a per-client + * backlog, cap-bounded like the shared buffer; only a wedged client is + * dropped), and drain client RX bytes into the modeled huart3 IT-RX FIFO + * (silUartRxEnqueue) — bounded to one FIFO's worth per client per poll. + * Call once per app-loop iteration. */ +void sil_live_poll(); + +#endif /* SIL_LIVE_SERVER_H */ diff --git a/Images/HostSIL/sil/sil_max22530.cpp b/Images/HostSIL/sil/sil_max22530.cpp new file mode 100644 index 00000000..348b6ef3 --- /dev/null +++ b/Images/HostSIL/sil/sil_max22530.cpp @@ -0,0 +1,230 @@ +/* + * sil_max22530.cpp — SIL replacement for Src/Inverter/Drivers/Sensors/MAX22530.cpp. + * + * Models the isolated 4-channel ADC: no SPI transactions, voltages arrive + * directly from the SIL world (DC-link on channel 0, phase pole voltages on + * channels 1..3, both through the 1516:1 sense divider). dataReady() is + * always true once initialized (the real chip free-runs at 20 kHz into DMA). + * + * The comparator windows are modeled at register-behavior level: + * setComparatorThreshold() stores COUTHI/COUTLO counts and mirrors the + * hardware driver's INTERRUPT_ENABLE bookkeeping (INT_EEOC plus the + * per-channel CO_POS/CO_NEG bits); update() re-evaluates the (filtered == + * raw in SIL) channel voltages against the windows, sticks matching bits + * into the latched INTERRUPT_STATUS word, and raises the same FaultManager + * faults the hardware driver raises from its EXTI/burst path (Max22530Ov / + * Max22530Uv on the DC-link channel). SPI/CRC, field-loss and ADC-diagnostic + * INTERRUPT_STATUS bits are not modelable without a bus model and stay zero. + */ +#include "Inverter/Drivers/Sensors/MAX22530.h" +#include "Inverter/Control/FaultManager.h" + +#include "sil_world.h" + +namespace Inverter { + +MAX22530::MAX22530(SPI_HandleTypeDef* hspi, + GPIO_TypeDef* cs_port, uint16_t cs_pin, + GPIO_TypeDef* int_port, uint16_t int_pin, + IRQn_Type int_irqn) + : m_hspi(hspi), + m_cs_port(cs_port), m_cs_pin(cs_pin), + m_int_port(int_port), m_int_pin(int_pin), + m_int_irqn(int_irqn) { +} + +namespace { + +/* INTERRUPT_ENABLE / INTERRUPT_STATUS bits (same layout as the hardware + * driver's anonymous-namespace table in MAX22530.cpp). */ +constexpr uint16_t INT_CO_NEG_1 = (1U << 0); /* channel 0 below COUTLO */ +constexpr uint16_t INT_CO_POS_1 = (1U << 4); /* channel 0 above COUTHI */ +constexpr uint16_t INT_EEOC = (1U << 12); + +/* Modeled comparator registers — one chip in this design (the + * DC-link sensor's instance), indexed by channel. s_cout_status is the live + * (non-latching) COUT_STATUS word; INTERRUPT_STATUS lives in the driver's + * own m_int_status (latched, sticky until clearInterruptStatus()). */ +struct ComparatorModel { + uint16_t hi_counts = 0; + uint16_t lo_counts = 0; +}; +ComparatorModel s_comp[4]; +uint16_t s_cout_status = 0; + +float hostVoltage(uint8_t channel) { + const SilWorld& w = silWorld(); + switch (channel) { + case 0: return w.vdc_v / 1516.0f; + case 1: return w.phase_pole_v[0] / 1516.0f; + case 2: return w.phase_pole_v[1] / 1516.0f; + case 3: return w.phase_pole_v[2] / 1516.0f; + default: return 0.0f; + } +} +} // namespace + +bool MAX22530::init() { + m_data_ready = true; + return true; +} + +bool MAX22530::reset() { return true; } +bool MAX22530::softReset() { return true; } +bool MAX22530::clearPOR() { return true; } +bool MAX22530::clearFilter(uint8_t) { return true; } +bool MAX22530::enableCRC(bool enable) { + m_crc_enabled = enable; + return true; +} + +bool MAX22530::readRegister(uint8_t, uint16_t& out) { + out = 0; + return true; +} + +bool MAX22530::writeRegister(uint8_t, uint16_t) { return true; } + +uint16_t MAX22530::voltageToCounts(float v) const { + if (v < 0.0f) v = 0.0f; + if (v > 1.8f) v = 1.8f; + return static_cast(v / 1.8f * 4095.0f + 0.5f); +} + +float MAX22530::countsToVoltage(uint16_t counts) const { + return static_cast(counts) * (1.8f / 4095.0f); +} + +uint16_t MAX22530::readRawCounts(uint8_t channel) { + return voltageToCounts(hostVoltage(channel)); +} + +uint16_t MAX22530::readFilteredCounts(uint8_t channel) { + return voltageToCounts(hostVoltage(channel)); +} + +float MAX22530::readRawVoltage(uint8_t channel) { + return hostVoltage(channel); +} + +float MAX22530::readFilteredVoltage(uint8_t channel) { + return hostVoltage(channel); +} + +bool MAX22530::burstReadRaw(uint16_t out_counts[4], uint16_t* int_status) { + for (uint8_t ch = 0; ch < 4; ++ch) out_counts[ch] = readRawCounts(ch); + if (int_status != nullptr) *int_status = m_int_status; + return true; +} + +bool MAX22530::burstReadFiltered(uint16_t out_counts[4], uint16_t* int_status) { + for (uint8_t ch = 0; ch < 4; ++ch) out_counts[ch] = readFilteredCounts(ch); + if (int_status != nullptr) *int_status = m_int_status; + return true; +} + +bool MAX22530::setComparatorThreshold(uint8_t channel, float high_v, float low_v, + bool use_filtered, bool digital_status, + bool enable_pos_interrupt, bool enable_neg_interrupt) { + if (channel > 3 || high_v < low_v) { + return false; + } + (void)use_filtered; /* raw == filtered in the SIL model */ + (void)digital_status; /* always out-of-window digital-status semantics */ + + s_comp[channel].hi_counts = voltageToCounts(high_v); + s_comp[channel].lo_counts = voltageToCounts(low_v); + + /* Mirror the hardware driver's INTERRUPT_ENABLE bookkeeping: the channel's + * bits are re-written from the enable args so a later call can disable a + * direction (e.g. UV disabled while OV stays armed). */ + const uint16_t pos_bit = static_cast(INT_CO_POS_1 << channel); + const uint16_t neg_bit = static_cast(INT_CO_NEG_1 << channel); + uint16_t int_en = m_int_enable; + int_en = static_cast(int_en & ~pos_bit); + int_en = static_cast(int_en & ~neg_bit); + int_en = static_cast(int_en | INT_EEOC); + if (enable_pos_interrupt) int_en = static_cast(int_en | pos_bit); + if (enable_neg_interrupt) int_en = static_cast(int_en | neg_bit); + m_int_enable = int_en; + + /* Clear any comparator events latched before the interrupt was enabled so + * they are not mistaken for a new fault (same as the hardware driver). */ + (void)clearInterruptStatus(); + return true; +} + +bool MAX22530::getComparatorStatus(uint16_t& status) { + status = s_cout_status; + return true; +} + +bool MAX22530::readComparatorThreshold(uint8_t channel, uint16_t& high_counts, + uint16_t& low_counts) { + if (channel > 3) { + return false; + } + high_counts = s_comp[channel].hi_counts; + low_counts = s_comp[channel].lo_counts; + return true; +} + +bool MAX22530::clearInterruptStatus() { + m_int_status = 0; + return true; +} + +void MAX22530::onInterrupt() { ++m_irq_cnt; } +void MAX22530::onDmaComplete() { ++m_dma_cnt; } +void MAX22530::onDmaError() { ++m_err_cnt; } + +void MAX22530::update() { + /* Samples free-run in SIL; refresh the converted voltages from the + * world and keep the ready flag so consumers stay "fresh". */ + for (uint8_t ch = 0; ch < 4; ++ch) { + m_voltages[ch] = hostVoltage(ch); + } + m_data_ready = true; + + /* Comparator model: the chip re-evaluates each window per conversion and + * latches matching INTERRUPT_STATUS bits until cleared. */ + uint16_t cout = 0; + for (uint8_t ch = 0; ch < 4; ++ch) { + const uint16_t counts = voltageToCounts(m_voltages[ch]); + if (counts > s_comp[ch].hi_counts) { + cout |= static_cast(INT_CO_POS_1 << ch); + } + if (counts < s_comp[ch].lo_counts) { + cout |= static_cast(INT_CO_NEG_1 << ch); + } + } + s_cout_status = cout; + + /* Same masking as the hardware driver's raiseFaultsFromInterruptStatus(): + * only interrupt-enabled bits count; channel 0 maps to DC-link OV/UV. + * Raising on the latch edge keeps a persistent out-of-window condition + * from spamming; clearInterruptStatus() re-arms. */ + const uint16_t enabled_status = + static_cast(cout & m_int_enable); + const uint16_t prev = m_int_status; + m_int_status = static_cast(m_int_status | enabled_status); + const uint16_t newly = static_cast(m_int_status & ~prev); + if ((newly & INT_CO_POS_1) != 0U) { + FaultManager::instance().raise(FaultSource::Max22530Ov, + FaultReason::Max22530Overvoltage); + } + if ((newly & INT_CO_NEG_1) != 0U) { + FaultManager::instance().raise(FaultSource::Max22530Uv, + FaultReason::Max22530Undervoltage); + } +} + +bool MAX22530::resetInternal(uint16_t) { return true; } +void MAX22530::updateDmaTxBuffer() {} +bool MAX22530::burstTransaction(uint8_t, uint16_t*, uint16_t*) { return true; } +bool MAX22530::parseBurst(const uint8_t*, uint8_t) { return true; } +void MAX22530::raiseFaultsFromInterruptStatus(uint16_t) {} + +MAX22530* MAX22530::instanceForPin(uint16_t) { return nullptr; } + +} // namespace Inverter diff --git a/Images/HostSIL/sil/sil_misc.cpp b/Images/HostSIL/sil/sil_misc.cpp new file mode 100644 index 00000000..ef63df1b --- /dev/null +++ b/Images/HostSIL/sil/sil_misc.cpp @@ -0,0 +1,39 @@ +/* + * sil_misc.cpp — small SIL replacements: + * Src/Inverter/Drivers/Logging/SupplyMonitor.cpp (no PMIC rails here) + * Src/Inverter/Drivers/Sensors/SampleScheduler.cpp (TIM1-OC4 trigger model) + */ +#include "Inverter/Drivers/Logging/SupplyMonitor.h" +#include "Inverter/Drivers/Sensors/SampleScheduler.h" + +#include "main.h" +#include "tim.h" + +namespace Inverter { + +/* --- Supply monitor: all rails are always good in SIL --------------------*/ +bool supplyMonitorInit() { return true; } +void supplyMonitorUpdate() {} +void supplyMonitorPrintStatus() {} + +/* --- Sample scheduler ------------------------------------------------------ + * The TIM1-OC4 trigger position does not affect the averaged plant sample + * (the SIL models one clean sample per trigger), so scheduling reduces to + * bookkeeping that register-level readers can observe. */ +bool Tim1SampleScheduler::scheduleNextSample(uint32_t ccr4_ticks, uint32_t arr) { + (void)arr; + TIM1->CCR4 = ccr4_ticks; + return true; +} + +void Tim1SampleScheduler::scheduleFallback() { + /* Bottom-of-triangle trigger position retained by default. */ +} + +static Tim1SampleScheduler s_scheduler; + +SampleScheduler& sampleScheduler() { + return s_scheduler; +} + +} // namespace Inverter diff --git a/Images/HostSIL/sil/sil_phase_current_adc.cpp b/Images/HostSIL/sil/sil_phase_current_adc.cpp new file mode 100644 index 00000000..b174211b --- /dev/null +++ b/Images/HostSIL/sil/sil_phase_current_adc.cpp @@ -0,0 +1,472 @@ +/* + * sil_phase_current_adc.cpp — SIL replacement for + * Src/Inverter/Drivers/Sensors/PhaseCurrentADC.cpp. + * + * Reproduces the firmware-visible behavior of the PWM-synchronous + * phase-current ADC against the simulated plant: + * + * - The scheduler calls onInjectedConversionComplete() once per TIM1 TRGO + * (see sil_hooks.h); the function mirrors the hardware ISR order: + * LoopStats, domain dt, generated adc_isr step (which reads the PREVIOUS + * sample through platform_get_phase_currents(), exactly one tick stale — + * the emitter inserts app::AdcIsrStep at the same point in the real + * file), then the new burst conversion. + * - Plant phase currents are converted to raw 16-bit LA37S600 differential + * sig/ref counts. The sensor wiring inversion documented in + * FocControlManager.cpp ("sensors wired with inverted polarity") is + * modeled here: sig = ref_mid - i * counts/A. Downstream firmware + * (generated adc_isr graph, InvertPolarity=1) re-inverts, matching + * hardware. + * - start()/stop() mirror the hardware sequence (calibration, injected + * start, TIM1 base start) and perform the zero-offset capture directly + * against the (standstill) plant instead of spin-waiting on ISR state — + * the SIL runtime is cooperative, so the hardware's + * "while (!m_new_data)" pattern would deadlock. + */ +#include "Inverter/Drivers/Sensors/PhaseCurrentADC.h" +#include "Inverter/AppState.h" +#include "Inverter/LoopStats.h" +#include "Inverter/Drivers/PWM/pwm.h" +#include "Inverter/platform_api.h" +#include "Inverter/Calibration/EncoderCycleCalibrator.h" +#include "Inverter/Control/FaultManager.h" +#include "Inverter/Drivers/Sensors/EncoderADC.h" +#include "Inverter/Drivers/Sensors/PoleEstimator.h" +#include "Inverter/Drivers/Sensors/SpikeRecorder.h" +#include "Inverter/Drivers/Storage/RteParamStore.h" +#include "Inverter/Calibration/MotorCalibration.h" +#include "Inverter/Telemetry.h" + +#include "main.h" +#include "adc.h" +#include "tim.h" + +#include "domain_adc_isr_generated.h" + +#include "sil_world.h" +#include "sil_hooks.h" + +#include +#include + +namespace Inverter { + +static PhaseCurrentADC s_instance; + +PhaseCurrentADC& phaseCurrentADC() { + return s_instance; +} + +/* Physical LA37S600 model: differential output vs. 1.65 V reference, through + * the 2/3 divider into the 16-bit ADC. kCountsPerAmp matches + * PhaseCurrentADC::countsToCurrent in reverse. */ +namespace { +constexpr float kDivider = 2.0f / 3.0f; +constexpr float kSensVa = 1.042e-3f; +constexpr float kCountsFull = 65535.0f; +constexpr float kCountsPerAmp = + (kDivider * kSensVa * kCountsFull) / 3.3f; +constexpr float kRefMidCounts = kCountsFull * 0.5f; + +uint32_t sigCountsForCurrent(float i_a) { + float c = kRefMidCounts - i_a * kCountsPerAmp; /* inverted wiring */ + if (c < 0.0f) c = 0.0f; + if (c > kCountsFull) c = kCountsFull; + return static_cast(c + 0.5f); +} + +/* One raw acquisition from the plant into the ADC data registers, in the + * real hardware channel order (U sig/ref on rank 1/3, V sig/ref on 2/4). + * Scenario overcurrent injection (faults.oc_inject_*) enters here, at the + * conversion level: the fault is exactly what a saturated/glitched current + * channel looks like — the plant itself stays physically consistent. */ +void silAcquireFromPlant() { + const auto& st = silWorld().plant.State(); + float ia = st.ia_a; + float ib = st.ib_a; + const SilWorld& w = silWorld(); + if (w.oc_fault_active) { + /* iu+iv+iw=0 at the sensor: a W-channel spike is the negative + * injection into both measured channels. */ + switch (w.oc_fault_phase) { + case 1: ib += w.oc_fault_a; break; + case 2: ia -= w.oc_fault_a; ib -= w.oc_fault_a; break; + default: ia += w.oc_fault_a; break; + } + } + const uint32_t u_sig = sigCountsForCurrent(ia); + const uint32_t v_sig = sigCountsForCurrent(ib); + const uint32_t ref = static_cast(kRefMidCounts + 0.5f); + + sil_adc1.JDR1 = u_sig; + sil_adc1.JDR2 = v_sig; + sil_adc1.JDR3 = u_sig; + sil_adc1.JDR4 = v_sig; + sil_adc2.JDR1 = ref; + sil_adc2.JDR2 = ref; + sil_adc2.JDR3 = ref; + sil_adc2.JDR4 = ref; +} +} // namespace + +/* Map measured physical U/V currents to the logical UVW frame, accounting + * for Motor.PhaseSwap (same as the hardware driver). */ +static void applyPhaseSwap(float iu_phys_a, float iv_phys_a, + float& iu_log_a, float& iv_log_a) { + switch (motorCalibration().phase_swap) { + case PhaseSwap::SwapUV: + iu_log_a = iv_phys_a; + iv_log_a = iu_phys_a; + break; + case PhaseSwap::SwapVW: + iu_log_a = iv_phys_a; + iv_log_a = -(iu_phys_a + iv_phys_a); + break; + case PhaseSwap::SwapUW: + iu_log_a = -(iu_phys_a + iv_phys_a); + iv_log_a = iv_phys_a; + break; + default: + iu_log_a = iu_phys_a; + iv_log_a = iv_phys_a; + break; + } +} + +bool PhaseCurrentADC::init() { + /* DWT cycle counter (burst timestamps); the SIL DWT always runs. */ + CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; + DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; + + if (!configureAnalogWatchdog()) return false; + + return true; +} + +bool PhaseCurrentADC::configureAdcChannels() { return true; } +bool PhaseCurrentADC::initTrigger() { return true; } + +bool PhaseCurrentADC::start() { + if (m_running) return true; + + /* Arm the injected path and start the TIM1 counter (the SIL scheduler + * starts firing TRGO/injected events once this returns). */ + if (HAL_ADCEx_InjectedStart_IT(&hadc2) != HAL_OK) return false; + if (HAL_ADCEx_InjectedStart_IT(&hadc1) != HAL_OK) { + HAL_ADCEx_InjectedStop_IT(&hadc2); + return false; + } + if (HAL_TIM_Base_Start(&htim1) != HAL_OK) { + HAL_ADCEx_InjectedStop_IT(&hadc1); + HAL_ADCEx_InjectedStop_IT(&hadc2); + return false; + } + + m_running = true; + + if (!calibrateOffsets()) { + HAL_TIM_Base_Stop(&htim1); + HAL_ADCEx_InjectedStop_IT(&hadc1); + HAL_ADCEx_InjectedStop_IT(&hadc2); + m_running = false; + return false; + } + + Telemetry::printf("[CUR] start cal done U=%.3f V=%.3f", + static_cast(m_offset_u), + static_cast(m_offset_v)); + return true; +} + +bool PhaseCurrentADC::stop() { + if (!m_running) return true; + HAL_TIM_Base_Stop(&htim1); + HAL_ADCEx_InjectedStop_IT(&hadc1); + HAL_ADCEx_InjectedStop_IT(&hadc2); + m_running = false; + return true; +} + +bool PhaseCurrentADC::configureAnalogWatchdog() { + /* The hardware AWD is not modeled; software OC checks still run. */ + return true; +} + +bool PhaseCurrentADC::setHardwareOvercurrentThreshold(float amps) { + if (m_running) { + return false; + } + if (amps < 0.0f) amps = 0.0f; + m_hw_oc_threshold_a = amps; + return configureAnalogWatchdog(); +} + +bool PhaseCurrentADC::recalibrateOffsets() { + if (!m_running) { + return false; + } + const bool ok = calibrateOffsets(); + if (ok) { + Telemetry::printf("[CUR] recal done U=%.3f V=%.3f", + static_cast(m_offset_u), + static_cast(m_offset_v)); + } + return ok; +} + +void PhaseCurrentADC::setUseFixedReference(bool use_fixed) { + if (use_fixed && !m_use_fixed_ref) { + m_fixed_ref_u = m_raw_u_ref; + m_fixed_ref_v = m_raw_v_ref; + } + m_use_fixed_ref = use_fixed; +} + +float PhaseCurrentADC::countsToCurrent(uint32_t sig, uint32_t ref) const { + const float lsb = ADC_VREF / static_cast((1U << ADC_BITS) - 1U); + const float scale = lsb / (DIVIDER * SENSITIVITY_VA); + if (m_use_fixed_ref) { + const float sampled = static_cast(ref); + const float fixed_u = static_cast(m_fixed_ref_u); + const float fixed_v = static_cast(m_fixed_ref_v); + const float fixed = (std::fabs(sampled - fixed_u) < std::fabs(sampled - fixed_v)) + ? fixed_u : fixed_v; + return (static_cast(sig) - fixed) * scale; + } + return (static_cast(sig) - static_cast(ref)) * scale; +} + +/* (raw acquisition helper lives in the file-static namespace above) */ + +bool PhaseCurrentADC::calibrateOffsets() { + constexpr uint32_t DISCARD_SAMPLES = 500; + constexpr uint32_t AVG_SAMPLES = 1000; + + /* SIL: sample the (standstill) plant directly — the hardware spins on + * ISR-fed m_new_data here; the cooperative SIL runtime would deadlock. */ + m_new_data = false; + float sum_u = 0.0f; + float sum_v = 0.0f; + for (uint32_t i = 0; i < DISCARD_SAMPLES + AVG_SAMPLES; ++i) { + silAcquireFromPlant(); + const float iu = countsToCurrent(sil_adc1.JDR1, sil_adc2.JDR1); + const float iv = countsToCurrent(sil_adc1.JDR2, sil_adc2.JDR2); + if (i >= DISCARD_SAMPLES) { + sum_u += iu; + sum_v += iv; + } + } + + m_offset_u = sum_u / static_cast(AVG_SAMPLES); + m_offset_v = sum_v / static_cast(AVG_SAMPLES); + + constexpr float MAX_SANE_OFFSET_A = 50.0f; + m_offset_valid = (std::fabs(m_offset_u) < MAX_SANE_OFFSET_A) && + (std::fabs(m_offset_v) < MAX_SANE_OFFSET_A); + if (!m_offset_valid) { + Telemetry::printf("[CUR] WARNING: bad offset U=%.2f V=%.2f A; sensor not settled", + static_cast(m_offset_u), + static_cast(m_offset_v)); + } + + return m_offset_valid; +} + +void PhaseCurrentADC::onInjectedConversionComplete() { + ++LoopStats::adc_isr; + platform_set_current_domain_dt(1.0f / PWM_GetUpdateFrequency()); + + /* Equivalent of the emitter-filled `// RTE_EMIT: adc_isr step`: + * the generated domain reads the PREVIOUS sample via + * platform_get_phase_currents() before the new burst is decoded below — + * one tick of latency, exactly like hardware. */ + app::AdcIsrStep(appState.adc_isr); + + /* New micro-burst from the plant. */ + silAcquireFromPlant(); + m_raw_burst_u_sig[0] = HAL_ADCEx_InjectedGetValue(&hadc1, ADC_INJECTED_RANK_1); + m_raw_burst_v_sig[0] = HAL_ADCEx_InjectedGetValue(&hadc1, ADC_INJECTED_RANK_2); + m_raw_burst_u_sig[1] = HAL_ADCEx_InjectedGetValue(&hadc1, ADC_INJECTED_RANK_3); + m_raw_burst_v_sig[1] = HAL_ADCEx_InjectedGetValue(&hadc1, ADC_INJECTED_RANK_4); + + m_raw_burst_u_ref[0] = HAL_ADCEx_InjectedGetValue(&hadc2, ADC_INJECTED_RANK_1); + m_raw_burst_v_ref[0] = HAL_ADCEx_InjectedGetValue(&hadc2, ADC_INJECTED_RANK_2); + m_raw_burst_u_ref[1] = HAL_ADCEx_InjectedGetValue(&hadc2, ADC_INJECTED_RANK_3); + m_raw_burst_v_ref[1] = HAL_ADCEx_InjectedGetValue(&hadc2, ADC_INJECTED_RANK_4); + + m_last_burst_us = DWT->CYCCNT / (SystemCoreClock / 1000000U); + + m_raw_u_sig = m_raw_burst_u_sig[0]; + m_raw_v_sig = m_raw_burst_v_sig[0]; + m_raw_u_ref = m_raw_burst_u_ref[0]; + m_raw_v_ref = m_raw_burst_v_ref[0]; + + m_iu = countsToCurrent(m_raw_u_sig, m_raw_u_ref); + m_iv = countsToCurrent(m_raw_v_sig, m_raw_v_ref); + + const float iu_phys = m_iu - m_offset_u; + const float iv_phys = m_iv - m_offset_v; + float iu_log = 0.0f, iv_log = 0.0f; + applyPhaseSwap(iu_phys, iv_phys, iu_log, iv_log); + m_current_u = iu_log; + m_current_v = iv_log; + + /* Spike event recorder: synchronized raw currents + encoder snapshot. */ + spikeRecorder().onSample(HAL_GetTick(), + static_cast(m_raw_u_sig), + static_cast(m_raw_v_sig), + static_cast(m_raw_u_ref), + static_cast(m_raw_v_ref), + m_current_u, m_current_v, + encoderADC().extrapolatedAngleDeg(), + static_cast(encoderADC().lastRawSin()), + static_cast(encoderADC().lastRawCos()), + appState.tim_isr.Svpwm.Duty_A, + appState.tim_isr.Svpwm.Duty_B, + appState.tim_isr.Svpwm.Duty_C); + + /* Software overcurrent protection. */ + if (m_oc_threshold_a > 0.0f) { + if (std::fabs(m_current_u) > m_oc_threshold_a || + std::fabs(m_current_v) > m_oc_threshold_a) { + if (++m_oc_count >= OC_CONSEC_SAMPLES) { + m_oc_count = 0; + FaultManager::instance().raise(FaultSource::PhaseOvercurrent, + FaultReason::PhaseOvercurrentSoftware); + } + } else { + m_oc_count = 0; + } + } + + /* Pole estimator and encoder-cycle counter feeds. */ + PoleEstimator::instance().onSample( + m_current_u, encoderADC().lastRawSin(), encoderADC().lastRawCos()); + EncoderCycleCalibrator::instance().onSample(encoderADC().lastRawSin(), + encoderADC().lastRawCos()); + + m_new_data = true; +} + +bool PhaseCurrentADC::sample(float& iu, float& iv, float& iw) { + if (!m_new_data) { + return false; + } + + __disable_irq(); + iu = m_current_u; + iv = m_current_v; + m_new_data = false; + __enable_irq(); + + iw = -(iu + iv); + return true; +} + +bool PhaseCurrentADC::latest(float& iu, float& iv, float& iw) const { + if (!m_running) { + return false; + } + + __disable_irq(); + iu = m_current_u; + iv = m_current_v; + __enable_irq(); + + iw = -(iu + iv); + return true; +} + +bool PhaseCurrentADC::sampleBurst(BurstSample& out) { + if (!m_new_data) { + return false; + } + + __disable_irq(); + const float iu0_phys = countsToCurrent(m_raw_burst_u_sig[0], m_raw_burst_u_ref[0]) - m_offset_u; + const float iv0_phys = countsToCurrent(m_raw_burst_v_sig[0], m_raw_burst_v_ref[0]) - m_offset_v; + const float iu1_phys = countsToCurrent(m_raw_burst_u_sig[1], m_raw_burst_u_ref[1]) - m_offset_u; + const float iv1_phys = countsToCurrent(m_raw_burst_v_sig[1], m_raw_burst_v_ref[1]) - m_offset_v; + applyPhaseSwap(iu0_phys, iv0_phys, out.point[0].iu_a, out.point[0].iv_a); + applyPhaseSwap(iu1_phys, iv1_phys, out.point[1].iu_a, out.point[1].iv_a); + out.point[0].time_us = m_last_burst_us; + out.point[1].time_us = m_last_burst_us; + out.valid = true; + m_new_data = false; + __enable_irq(); + + return true; +} + +bool PhaseCurrentADC::latestBurst(BurstSample& out) const { + if (!m_running) { + return false; + } + + __disable_irq(); + const float iu0_phys = countsToCurrent(m_raw_burst_u_sig[0], m_raw_burst_u_ref[0]) - m_offset_u; + const float iv0_phys = countsToCurrent(m_raw_burst_v_sig[0], m_raw_burst_v_ref[0]) - m_offset_v; + const float iu1_phys = countsToCurrent(m_raw_burst_u_sig[1], m_raw_burst_u_ref[1]) - m_offset_u; + const float iv1_phys = countsToCurrent(m_raw_burst_v_sig[1], m_raw_burst_v_ref[1]) - m_offset_v; + applyPhaseSwap(iu0_phys, iv0_phys, out.point[0].iu_a, out.point[0].iv_a); + applyPhaseSwap(iu1_phys, iv1_phys, out.point[1].iu_a, out.point[1].iv_a); + out.point[0].time_us = m_last_burst_us; + out.point[1].time_us = m_last_burst_us; + out.valid = true; + __enable_irq(); + + return true; +} + +void PhaseCurrentADC::diagnose() { + constexpr float COUNTS_TO_V = 3.3f / 65535.0f; + const float u_ref_v = static_cast(m_raw_u_ref) * COUNTS_TO_V; + const float v_ref_v = static_cast(m_raw_v_ref) * COUNTS_TO_V; + + float lo = 1.4f, hi = 1.9f; + if (RteParamStore::isReady()) { + RteParamStore::get("Hw.PhCur.RefMinV", &lo); + RteParamStore::get("Hw.PhCur.RefMaxV", &hi); + } + + const bool plausible = (u_ref_v >= lo && u_ref_v <= hi && + v_ref_v >= lo && v_ref_v <= hi); + if (plausible) { + m_ref_armed = true; + m_ref_implausible_since_ms = 0; + m_ref_fault_raised = false; + return; + } + if (!m_ref_armed) { + return; + } + if (m_ref_implausible_since_ms == 0) { + m_ref_implausible_since_ms = HAL_GetTick(); + return; + } + if (!m_ref_fault_raised && + (HAL_GetTick() - m_ref_implausible_since_ms) >= 500U) { + m_ref_fault_raised = true; + FaultManager::instance().raise(FaultSource::CurrentSensorRef, + FaultReason::SensorRefOutOfRange); + Telemetry::printf("[CUR] sensor ref implausible: U=%.2f V V=%.2f V (window %.1f..%.1f)", + static_cast(u_ref_v), + static_cast(v_ref_v), + static_cast(lo), + static_cast(hi)); + } +} + +} // namespace Inverter + +/* Scheduler hooks (not firmware-visible). */ +bool silPhaseCurrentAdcRunning() { + /* Injected conversions run once the driver was started (TIM1 base + IT + * armed inside start()). */ + extern ADC_HandleTypeDef hadc1; + return hadc1.sil_injected_running != 0; +} + +void silPhaseCurrentAdcTrigger() { + Inverter::phaseCurrentADC().onInjectedConversionComplete(); +} diff --git a/Images/HostSIL/sil/sil_pwm.cpp b/Images/HostSIL/sil/sil_pwm.cpp new file mode 100644 index 00000000..2d8bea83 --- /dev/null +++ b/Images/HostSIL/sil/sil_pwm.cpp @@ -0,0 +1,499 @@ +/* + * sil_pwm.cpp — SIL replacement for Src/Inverter/Drivers/PWM/pwm.cpp. + * + * Reproduces the public pwm.h contract and, crucially, the TIM1 update-ISR + * dispatch semantics of the hardware driver: + * + * HAL_TIM_PeriodElapsedCallback (per update event) + * -> LoopStats::tim_isr++ + * -> platform_set_current_domain_dt(1 / pwm_update_freq_hz) + * -> app::TimIsrStep(appState.tim_isr) iff ControlSupervisor running + * -> FocControlManager_OnPwmPeriod() iff FOC mode active + * -> open-loop SPWM ramp iff SPWM running + * + * Duties are latched into the fake TIM1 CCR registers exactly like the real + * code (CCR = duty% * ARR / 100), so register-level readbacks + * (PWM_GetCurrentDuties, FocControlManager telemetry) behave identically. + * + * The SIL scheduler fires update events at the firmware-visible update rate + * (PWM_GetUpdateFrequency()); TRGO/injected conversions at the switching + * rate. See README for the rate-modeling note. + */ +#include "pwm.h" +#include "tim.h" +#include "Inverter/AppState.h" +#include "Inverter/LoopStats.h" +#include "Inverter/platform_api.h" +#include "Inverter/Control/ControlSupervisor.h" +#include "Inverter/Calibration/MotorCalibration.h" +#include "mcp2221a_driver.h" + +#include "domain_tim_isr_generated.h" + +#include "sil_hooks.h" + +#include +#include + +/* The real pwm.cpp declares a weak fallback; FocControlManager.cpp (compiled + * verbatim) provides the strong definition. */ +extern "C" void FocControlManager_OnPwmPeriod(void) __attribute__((weak)); +extern "C" void FocControlManager_OnPwmPeriod(void) {} + +#define TIM1_CLOCK_HZ 275000000UL +#define TIM_MAX_ARR 65535U +#define TWO_PI 6.283185307f + +static const uint32_t pwm_phase_channels[3] = { + TIM_CHANNEL_1, + TIM_CHANNEL_2, + TIM_CHANNEL_3 +}; + +static volatile float pwm_switching_freq_hz = (float)PWM_DEFAULT_SWITCHING_FREQ_HZ; +static volatile float pwm_update_freq_hz = (float)PWM_DEFAULT_SWITCHING_FREQ_HZ; + +static volatile float spwm_angle = 0.0f; +static volatile float spwm_fundamental_freq_hz = 1.0f; +static volatile float spwm_modulation_index = 0.0f; +static volatile uint8_t spwm_running = 0; +static volatile uint32_t spwm_elec_cycles = 0; + +static volatile uint8_t foc_active = 0; + +static uint32_t PWM_PhaseToChannel(uint8_t phase) +{ + if (phase > 2) return 0; + return pwm_phase_channels[phase]; +} + +void PWM_SetFrequency(uint32_t freq_hz) +{ + if (freq_hz == 0) return; + + uint32_t target = TIM1_CLOCK_HZ / (2UL * freq_hz); + uint32_t psc = 0; + uint32_t arr = target; + + while (arr > TIM_MAX_ARR) + { + psc++; + arr = target / (psc + 1); + if (psc > TIM_MAX_ARR) return; + } + + __HAL_TIM_SET_PRESCALER(&htim1, psc); + __HAL_TIM_SET_AUTORELOAD(&htim1, arr); + + pwm_switching_freq_hz = (float)TIM1_CLOCK_HZ / + (2.0f * (float)(arr + 1U) * (float)(psc + 1U)); + + TIM1->RCR = 1U; + pwm_update_freq_hz = pwm_switching_freq_hz; +} + +void PWM_SetDeadTime(uint32_t deadtime_ns) +{ + /* Dead-time is a no-op in the averaged-duty SIL model; keep the BDTR DTG + * bookkeeping so register dumps look sane. */ + uint32_t dtg = (deadtime_ns > 127U) ? 127U : deadtime_ns; + uint32_t bdtr = TIM1->BDTR; + bdtr &= ~TIM_BDTR_DTG; + bdtr |= dtg; + TIM1->BDTR = bdtr; +} + +void PWM_SetDutyCycle(uint8_t phase, float duty_percent) +{ + if (phase > 2) return; + if (duty_percent < 0.0f) duty_percent = 0.0f; + if (duty_percent > 100.0f) duty_percent = 100.0f; + + uint32_t arr = __HAL_TIM_GET_AUTORELOAD(&htim1); + uint32_t pulse = (uint32_t)((duty_percent * (float)arr) / 100.0f); + + uint32_t channel = PWM_PhaseToChannel(phase); + __HAL_TIM_SET_COMPARE(&htim1, channel, pulse); +} + +#define SVPWM_M_MAX 1.154700538f + +void PWM_SetThreePhaseDuty(float duty_u, float duty_v, float duty_w) +{ + using Inverter::PhaseSwap; + switch (Inverter::motorCalibration().phase_swap) { + case PhaseSwap::SwapUV: { + const float tmp = duty_u; + duty_u = duty_v; + duty_v = tmp; + break; + } + case PhaseSwap::SwapVW: { + const float tmp = duty_v; + duty_v = duty_w; + duty_w = tmp; + break; + } + case PhaseSwap::SwapUW: { + const float tmp = duty_u; + duty_u = duty_w; + duty_w = tmp; + break; + } + default: + break; + } + + PWM_SetDutyCycle(0, duty_u); + PWM_SetDutyCycle(1, duty_v); + PWM_SetDutyCycle(2, duty_w); +} + +void PWM_SetVoltageAngle(float angle_rad, float modulation_index) +{ + if (modulation_index < 0.0f) modulation_index = 0.0f; + if (modulation_index > SVPWM_M_MAX) modulation_index = SVPWM_M_MAX; + + float u = modulation_index * sinf(angle_rad); + float v = modulation_index * sinf(angle_rad - TWO_PI / 3.0f); + float w = modulation_index * sinf(angle_rad + TWO_PI / 3.0f); + + float v_max = (u > v) ? ((u > w) ? u : w) : ((v > w) ? v : w); + float v_min = (u < v) ? ((u < w) ? u : w) : ((v < w) ? v : w); + float v0 = -0.5f * (v_max + v_min); + + float du = 50.0f + 50.0f * (u + v0); + float dv = 50.0f + 50.0f * (v + v0); + float dw = 50.0f + 50.0f * (w + v0); + + if (du < 0.0f) du = 0.0f; else if (du > 100.0f) du = 100.0f; + if (dv < 0.0f) dv = 0.0f; else if (dv > 100.0f) dv = 100.0f; + if (dw < 0.0f) dw = 0.0f; else if (dw > 100.0f) dw = 100.0f; + + PWM_SetThreePhaseDuty(du, dv, dw); +} + +void PWM_SetVoltageVector(float valpha_v, float vbeta_v, float vdc_v) +{ + if (vdc_v <= 1.0f) { + PWM_SetThreePhaseDuty(50.0f, 50.0f, 50.0f); + return; + } + + const float sqrt3 = 1.7320508075688772f; + float valpha = valpha_v; + float vbeta = vbeta_v; + const float v_max_linear = (vdc_v / sqrt3) * 0.95f; + const float v_albe_sq = valpha * valpha + vbeta * vbeta; + if (v_albe_sq > v_max_linear * v_max_linear && v_albe_sq > 1e-12f) { + const float scale = v_max_linear / sqrtf(v_albe_sq); + valpha *= scale; + vbeta *= scale; + } + + float va = valpha; + float vb = -0.5f * valpha + 0.5f * sqrt3 * vbeta; + float vc = -0.5f * valpha - 0.5f * sqrt3 * vbeta; + + float v_max = (va > vb) ? ((va > vc) ? va : vc) : ((vb > vc) ? vb : vc); + float v_min = (va < vb) ? ((va < vc) ? va : vc) : ((vb < vc) ? vb : vc); + float vcom = 0.5f * (v_max + v_min); + + float du = 50.0f + 50.0f * (va - vcom) / vdc_v; + float dv = 50.0f + 50.0f * (vb - vcom) / vdc_v; + float dw = 50.0f + 50.0f * (vc - vcom) / vdc_v; + + if (du < 0.0f) du = 0.0f; else if (du > 100.0f) du = 100.0f; + if (dv < 0.0f) dv = 0.0f; else if (dv > 100.0f) dv = 100.0f; + if (dw < 0.0f) dw = 0.0f; else if (dw > 100.0f) dw = 100.0f; + + PWM_SetThreePhaseDuty(du, dv, dw); +} + +void PWM_EnableFocMode(void) +{ + foc_active = 1; + TIM1->RCR = 0U; + pwm_update_freq_hz = 2.0f * pwm_switching_freq_hz; +} + +void PWM_DisableFocMode(void) +{ + foc_active = 0; + TIM1->RCR = 1U; + pwm_update_freq_hz = pwm_switching_freq_hz; +} + +bool PWM_IsFocModeActive(void) +{ + return foc_active != 0; +} + +void PWM_StartUpdateInterrupt(void) +{ + __HAL_TIM_ENABLE_IT(&htim1, TIM_IT_UPDATE); +} + +void PWM_StopUpdateInterrupt(void) +{ + if (!spwm_running) { + __HAL_TIM_DISABLE_IT(&htim1, TIM_IT_UPDATE); + } +} + +float PWM_GetFrequency(void) +{ + return pwm_switching_freq_hz; +} + +float PWM_GetUpdateFrequency(void) +{ + return pwm_update_freq_hz; +} + +void PWM_GetCurrentDuties(float* duty_u, float* duty_v, float* duty_w) +{ + const uint32_t arr = __HAL_TIM_GET_AUTORELOAD(&htim1); + if (arr == 0U) { + *duty_u = 0.0f; + *duty_v = 0.0f; + *duty_w = 0.0f; + return; + } + *duty_u = 100.0f * (float)__HAL_TIM_GET_COMPARE(&htim1, TIM_CHANNEL_1) / (float)arr; + *duty_v = 100.0f * (float)__HAL_TIM_GET_COMPARE(&htim1, TIM_CHANNEL_2) / (float)arr; + *duty_w = 100.0f * (float)__HAL_TIM_GET_COMPARE(&htim1, TIM_CHANNEL_3) / (float)arr; +} + +bool PWM_FindSafeSamplePoint(float duty_u, float duty_v, float duty_w, + uint32_t arr, uint32_t min_gap_ticks, + uint32_t* out_ccr4, uint32_t* out_gap_ticks) +{ + if (duty_u < 0.0f) duty_u = 0.0f; else if (duty_u > 100.0f) duty_u = 100.0f; + if (duty_v < 0.0f) duty_v = 0.0f; else if (duty_v > 100.0f) duty_v = 100.0f; + if (duty_w < 0.0f) duty_w = 0.0f; else if (duty_w > 100.0f) duty_w = 100.0f; + + const uint32_t ccr_u = (uint32_t)((duty_u * (float)arr) / 100.0f); + const uint32_t ccr_v = (uint32_t)((duty_v * (float)arr) / 100.0f); + const uint32_t ccr_w = (uint32_t)((duty_w * (float)arr) / 100.0f); + + uint32_t min_ccr = ccr_u; + if (ccr_v < min_ccr) min_ccr = ccr_v; + if (ccr_w < min_ccr) min_ccr = ccr_w; + + uint32_t max_ccr = ccr_u; + if (ccr_v > max_ccr) max_ccr = ccr_v; + if (ccr_w > max_ccr) max_ccr = ccr_w; + + const uint32_t gap_all_high = 2U * min_ccr; + const uint32_t gap_all_low = 2U * (arr - max_ccr); + + uint32_t best_gap = 0; + uint32_t best_mid = 0; + if (gap_all_low >= gap_all_high) { + best_gap = gap_all_low; + best_mid = (max_ccr + arr) / 2U; + } else { + best_gap = gap_all_high; + best_mid = min_ccr / 2U; + } + + if (best_gap < min_gap_ticks) { + *out_gap_ticks = best_gap; + return false; + } + + *out_ccr4 = best_mid; + *out_gap_ticks = best_gap; + return true; +} + +void PWM_StartSPWM(float fundamental_freq_hz, float modulation_index) +{ + if (modulation_index < 0.0f) modulation_index = 0.0f; + if (modulation_index > SVPWM_M_MAX) modulation_index = SVPWM_M_MAX; + + TIM1->RCR = 1U; + pwm_update_freq_hz = pwm_switching_freq_hz; + + spwm_fundamental_freq_hz = fundamental_freq_hz; + spwm_modulation_index = modulation_index; + spwm_angle = 0.0f; + spwm_running = 1; + + __HAL_TIM_ENABLE_IT(&htim1, TIM_IT_UPDATE); +} + +void PWM_StopSPWM(void) +{ + spwm_running = 0; + __HAL_TIM_DISABLE_IT(&htim1, TIM_IT_UPDATE); +} + +void PWM_SetSPWMParams(float fundamental_freq_hz, float modulation_index) +{ + if (modulation_index < 0.0f) modulation_index = 0.0f; + if (modulation_index > SVPWM_M_MAX) modulation_index = SVPWM_M_MAX; + + spwm_fundamental_freq_hz = fundamental_freq_hz; + spwm_modulation_index = modulation_index; +} + +/* TIM1 update ISR callback. The emitter fills the // RTE_EMIT marker in the + * hardware tree with app::TimIsrStep(appState.tim_isr); this SIL copy carries + * that expansion by hand (same gating, same order). */ +void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) +{ + if (htim->Instance != TIM1) return; + ++Inverter::LoopStats::tim_isr; + + platform_set_current_domain_dt(1.0f / pwm_update_freq_hz); + + if (Inverter::ControlSupervisor::instance().isRunning()) { + app::TimIsrStep(appState.tim_isr); + } + + if (foc_active) { + FocControlManager_OnPwmPeriod(); + return; + } + + if (!spwm_running) return; + + float angle = spwm_angle; + float m = spwm_modulation_index; + + float u = m * sinf(angle); + float v = m * sinf(angle - TWO_PI / 3.0f); + float w = m * sinf(angle + TWO_PI / 3.0f); + + float v_max = (u > v) ? ((u > w) ? u : w) : ((v > w) ? v : w); + float v_min = (u < v) ? ((u < w) ? u : w) : ((v < w) ? v : w); + float v0 = -0.5f * (v_max + v_min); + + float du = 50.0f + 50.0f * (u + v0); + float dv = 50.0f + 50.0f * (v + v0); + float dw = 50.0f + 50.0f * (w + v0); + + if (du < 0.0f) du = 0.0f; else if (du > 100.0f) du = 100.0f; + if (dv < 0.0f) dv = 0.0f; else if (dv > 100.0f) dv = 100.0f; + if (dw < 0.0f) dw = 0.0f; else if (dw > 100.0f) dw = 100.0f; + + PWM_SetThreePhaseDuty(du, dv, dw); + + angle += TWO_PI * spwm_fundamental_freq_hz / pwm_switching_freq_hz; + if (angle >= TWO_PI) { + angle -= TWO_PI; + ++spwm_elec_cycles; + } else if (angle < 0.0f) { + angle += TWO_PI; + } + spwm_angle = angle; +} + +uint32_t PWM_GetSPWMElectricalCycles(void) +{ + return spwm_elec_cycles; +} + +void PWM_ResetSPWMElectricalCycles(void) +{ + spwm_elec_cycles = 0; +} + +float PWM_GetSPWMAngle(void) +{ + return spwm_running ? spwm_angle : 0.0f; +} + +void PWM_StartPhase(uint8_t phase) +{ + if (phase > 2) return; + uint32_t channel = PWM_PhaseToChannel(phase); + HAL_TIM_PWM_Start(&htim1, channel); + HAL_TIMEx_PWMN_Start(&htim1, channel); +} + +void PWM_StopPhase(uint8_t phase) +{ + if (phase > 2) return; + uint32_t channel = PWM_PhaseToChannel(phase); + HAL_TIM_PWM_Stop(&htim1, channel); + HAL_TIMEx_PWMN_Stop(&htim1, channel); +} + +void PWM_Start(void) +{ + PWM_StartPhase(0); + PWM_StartPhase(1); + PWM_StartPhase(2); +} + +void PWM_Stop(void) +{ + PWM_StopPhase(0); + PWM_StopPhase(1); + PWM_StopPhase(2); +} + +void PWM_ClearFault(void) +{ + __HAL_TIM_CLEAR_FLAG(&htim1, TIM_FLAG_BREAK); + __HAL_TIM_MOE_ENABLE(&htim1); +} + +void PWM_ClearBreakFlag(void) +{ + __HAL_TIM_CLEAR_FLAG(&htim1, TIM_FLAG_BREAK); +} + +void PWM_PrintState(void) +{ + uint32_t bdtr = TIM1->BDTR; + + MCP2221A_Printf("[PWM] BDTR=0x%04lX | MOE=%lu | DTG=0x%02lX\r\n", + (unsigned long)bdtr, (unsigned long)((bdtr >> 15) & 1), + (unsigned long)(bdtr & TIM_BDTR_DTG)); +} + +void PWM_PrintSPWMState(void) +{ + float du = 0.0f, dv = 0.0f, dw = 0.0f; + PWM_GetCurrentDuties(&du, &dv, &dw); + + MCP2221A_Printf("[SPWM] running=%u f=%.2f Hz m=%.3f | duties U=%.1f V=%.1f W=%.1f %%\r\n", + (unsigned)spwm_running, + (double)spwm_fundamental_freq_hz, + (double)spwm_modulation_index, + (double)du, (double)dv, (double)dw); +} + +/* -------------------------------------------------------------------------- + * SIL scheduler hooks + * ------------------------------------------------------------------------ */ + +float silTimSwitchingHz() { + return pwm_switching_freq_hz; +} + +float silTimUpdateHz() { + return pwm_update_freq_hz; +} + +bool silTimBaseRunning() { + return htim1.sil_base_running != 0; +} + +bool silTimUpdateIrqEnabled() { + return (sil_tim1.DIER & TIM_IT_UPDATE) != 0U; +} + +bool silTimOutputsDriving() { + const bool moe = (sil_tim1.BDTR & TIM_BDTR_MOE) != 0U; + const bool ch123 = (htim1.sil_active_channels & 0x7U) == 0x7U; + return moe && ch123 && silGateOutputsEnabled(); +} + +void silTimFireUpdateIrq() { + HAL_TIM_PeriodElapsedCallback(&htim1); +} diff --git a/Images/HostSIL/sil/sil_rt.cpp b/Images/HostSIL/sil/sil_rt.cpp new file mode 100644 index 00000000..bacea6df --- /dev/null +++ b/Images/HostSIL/sil/sil_rt.cpp @@ -0,0 +1,275 @@ +#include "sil_rt.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "stm32h7xx_hal.h" /* SIL shim: sil_dwt/SystemCoreClock */ + +extern "C" void InverterMain_Run(void); + +namespace { + +struct SilRtState { + std::mutex mtx; + std::condition_variable cv; + + uint64_t now_us = 0; /* simulated time base */ + + /* Time-wait (HAL_Delay) handshake. */ + bool delay_waiting = false; + uint64_t delay_deadline_us = 0; + + /* App-gate ping-pong. */ + uint64_t fw_park_gen = 0; + uint64_t sched_release_gen = 0; + bool fw_parked = false; + + /* Deferred host->firmware commands, run FIFO at the next gate entry. + * A queue (not a single slot) so posts made between gate releases — + * e.g. a command batch and the engageControl post in the same app + * period — all execute in order instead of silently overwriting. */ + std::deque> pending; + + bool abort = false; + bool fw_done = false; /* thread function returned */ + bool fw_fail = false; + std::string fw_error; + + std::thread fw_thread; +}; + +SilRtState g_rt; + +/* Long wall-clock waits use this poll quantum; full stall is reported after + * kWatchdog wall time so a firmware hang never wedges the harness. */ +constexpr auto kWallPoll = std::chrono::milliseconds(1); +constexpr auto kWatchdog = std::chrono::seconds(20); + +void firmware_thread_main() { + try { + InverterMain_Run(); + std::lock_guard lk(g_rt.mtx); + g_rt.fw_done = true; + g_rt.fw_fail = true; + g_rt.fw_error = "InverterMain_Run returned (firmware main loop exited)"; + g_rt.cv.notify_all(); + } catch (const __cxxabiv1::__forced_unwind&) { + /* pthread_exit() unwinds as __forced_unwind; swallowing it is what + * triggered "exception not rethrown". Always rethrow. */ + throw; + } catch (const std::exception& e) { + fprintf(stderr, "[SIL] firmware thread exception: %s\n", e.what()); + std::lock_guard lk(g_rt.mtx); + g_rt.fw_done = true; + g_rt.fw_fail = true; + g_rt.fw_error = e.what(); + g_rt.cv.notify_all(); + } catch (...) { + fprintf(stderr, "[SIL] firmware thread: unknown exception\n"); + std::lock_guard lk(g_rt.mtx); + g_rt.fw_done = true; + g_rt.fw_fail = true; + g_rt.fw_error = "unknown exception on firmware thread"; + g_rt.cv.notify_all(); + } +} + +/* Shared schedule-side wait: returns when the firmware blocks at the app + * gate; pumps while the firmware holds a time-wait. The pump function + * drives one fast-tick of simulated work (sil_rt_advance_time_us + sensor + * and ISR service) and only ever runs while the firmware is blocked. */ +bool idle_to_gate_impl(SilPumpFn pump, uint64_t seen_park_gen) { + const auto t0 = std::chrono::steady_clock::now(); + for (;;) { + bool do_pump = false; + { + std::unique_lock lk(g_rt.mtx); + if (g_rt.fw_done) return false; + if (g_rt.fw_parked && g_rt.fw_park_gen > seen_park_gen) return true; + do_pump = g_rt.delay_waiting && + g_rt.now_us < g_rt.delay_deadline_us; + if (!do_pump) { + /* Firmware computing (or a just-expired delay not yet + * left): poll; the cv predicate re-check happens above. */ + g_rt.cv.wait_for(lk, kWallPoll); + } + } + if (do_pump) { + pump(); + } + if (std::chrono::steady_clock::now() - t0 > kWatchdog) { + std::lock_guard lk(g_rt.mtx); + /* Leave the reason in fw_error for the caller's error path; the + * stderr line alone is lost from main()'s "failed: %s" print. */ + char reason[128]; + std::snprintf( + reason, sizeof(reason), + "watchdog: firmware did not reach the app gate " + "(delay_waiting=%d parked=%d)", + g_rt.delay_waiting ? 1 : 0, g_rt.fw_parked ? 1 : 0); + g_rt.fw_error = reason; + fprintf(stderr, "[SIL] %s\n", g_rt.fw_error.c_str()); + return false; + } + } +} + +} // namespace + +/* -------------------------------------------------------------------------- + * Firmware context + * ------------------------------------------------------------------------ */ + +void sil_rt_delay_ms(uint32_t ms) { + std::unique_lock lk(g_rt.mtx); + g_rt.delay_deadline_us = g_rt.now_us + static_cast(ms) * 1000ULL; + g_rt.delay_waiting = true; + g_rt.cv.notify_all(); + while (!g_rt.abort && g_rt.now_us < g_rt.delay_deadline_us) { + g_rt.cv.wait(lk); + } + g_rt.delay_waiting = false; + if (g_rt.abort) { + /* Teardown: end the firmware thread cooperatively (SIL-only path; + * InverterMain_Run has no return channel on real hardware either). */ + lk.unlock(); + pthread_exit(nullptr); + } +} + +void sil_rt_app_gate() { + std::unique_lock lk(g_rt.mtx); + + /* Drain the posted host commands on the firmware context, in post order + * (a command that posts again is run in this same drain pass). */ + while (!g_rt.pending.empty()) { + auto fn = std::move(g_rt.pending.front()); + g_rt.pending.pop_front(); + lk.unlock(); + fn(); /* host command on firmware context */ + lk.lock(); + } + + g_rt.fw_parked = true; + g_rt.fw_park_gen++; + const uint64_t my_gen = g_rt.fw_park_gen; + g_rt.cv.notify_all(); + while (!g_rt.abort && g_rt.sched_release_gen != my_gen) { + g_rt.cv.wait(lk); + } + g_rt.fw_parked = false; + if (g_rt.abort) { + lk.unlock(); + pthread_exit(nullptr); + } +} + +/* -------------------------------------------------------------------------- + * Scheduler context + * ------------------------------------------------------------------------ */ + +void sil_rt_start_firmware() { + g_rt.fw_thread = std::thread(firmware_thread_main); +} + +bool sil_rt_idle_to_gate(SilPumpFn pump) { + uint64_t seen; + { + std::lock_guard lk(g_rt.mtx); + seen = g_rt.fw_park_gen; + } + return idle_to_gate_impl(pump, seen); +} + +bool sil_rt_run_app_iteration(SilPumpFn pump) { + uint64_t gen; + { + std::lock_guard lk(g_rt.mtx); + if (g_rt.fw_done) return false; + gen = g_rt.fw_park_gen; + g_rt.sched_release_gen = gen; + g_rt.cv.notify_all(); + } + return idle_to_gate_impl(pump, gen); +} + +void sil_rt_advance_time_us(uint64_t us) { + std::lock_guard lk(g_rt.mtx); + g_rt.now_us += us; + /* Fake DWT cycle counter tracks sim time (CYCCNT = us * MHz). */ + sil_dwt.CYCCNT = + static_cast(g_rt.now_us * (SystemCoreClock / 1000000ULL)); + if (g_rt.delay_waiting && g_rt.now_us >= g_rt.delay_deadline_us) { + g_rt.cv.notify_all(); + } +} + +void sil_rt_post(std::function fn) { + std::lock_guard lk(g_rt.mtx); + g_rt.pending.push_back(std::move(fn)); + g_rt.cv.notify_all(); +} + +uint64_t sil_rt_now_us() { + std::lock_guard lk(g_rt.mtx); + return g_rt.now_us; +} + +bool sil_rt_fw_delay_waiting() { + std::lock_guard lk(g_rt.mtx); + return g_rt.delay_waiting; +} + +bool sil_rt_fw_parked() { + std::lock_guard lk(g_rt.mtx); + return g_rt.fw_parked; +} + +void sil_rt_shutdown() { + { + std::lock_guard lk(g_rt.mtx); + g_rt.abort = true; + g_rt.cv.notify_all(); + } + if (!g_rt.fw_thread.joinable()) return; + + /* Timed join: abort is only observed at a delay/gate point, so a + * firmware spin that never reaches one would wedge join() (and the + * harness) forever. Bound the wait, then abandon the thread: the future + * (holding the thread object, still joinable inside its task) is leaked + * on purpose — with the firmware still running, unwinding statics is + * unsafe, so exit the process immediately. Callers have already + * flushed the trace/FRAM at this point. */ + auto* join_fut = new std::future(std::async( + std::launch::async, + [t = std::move(g_rt.fw_thread)]() mutable { t.join(); })); + if (join_fut->wait_for(std::chrono::seconds(10)) == + std::future_status::timeout) { + fprintf(stderr, "[SIL] shutdown: firmware thread did not exit within " + "10 s of abort (never reached a delay/gate point) — " + "detaching and exiting immediately\n"); + fflush(stderr); + std::quick_exit(0); + } + delete join_fut; +} + +bool sil_rt_fw_failed() { + std::lock_guard lk(g_rt.mtx); + return g_rt.fw_fail; +} + +const char* sil_rt_fw_error() { + std::lock_guard lk(g_rt.mtx); + return g_rt.fw_error.c_str(); +} diff --git a/Images/HostSIL/sil/sil_rt.h b/Images/HostSIL/sil/sil_rt.h new file mode 100644 index 00000000..49fc2e7a --- /dev/null +++ b/Images/HostSIL/sil/sil_rt.h @@ -0,0 +1,79 @@ +/* + * sil_rt.h — cooperative two-context runtime for HostSIL. + * + * The firmware (InverterMain_Run) runs on a dedicated host thread (the + * "firmware context"); the SIL scheduler runs on the main thread. The two + * contexts are strictly exclusive: the firmware blocks in exactly two places + * + * HAL_Delay(ms) -> sil_rt_delay_ms() (time-wait) + * EncoderADC::diagnose() -> sil_rt_app_gate() (once per loop() pass) + * + * and the scheduler only advances the simulated clock / fires sensor and ISR + * hooks while the firmware context is blocked. No per-variable locking of + * firmware state is needed anywhere ("cooperative hardware": on real hardware + * ISRs preempt at any instruction; here they run at tick boundaries — see + * README for the fidelity note). + * + * Boot sequence: sil_rt_start_firmware(), then sil_rt_idle_to_gate(pump) + * waits until firmware init() has run and loop() first parks at the app gate; + * while the firmware sits in a boot-time HAL_Delay the supplied pump callback + * is invoked (advancing sim time and feeding sensor/plant hooks). + */ +#ifndef SIL_RT_H +#define SIL_RT_H + +#include +#include + +/* Firmware-context entry points ----------------------------------------*/ + +/* Block the firmware context for `ms` milliseconds of simulated time. */ +void sil_rt_delay_ms(uint32_t ms); + +/* App-loop rendezvous. Runs any posted host command on the firmware + * context, then parks until the scheduler releases the next iteration. */ +void sil_rt_app_gate(); + +/* Scheduler-context entry points ---------------------------------------*/ + +using SilPumpFn = const std::function&; + +/* Launch InverterMain_Run() on the firmware thread. */ +void sil_rt_start_firmware(); + +/* Wait until the firmware context is parked at the app gate (next park). + * While the firmware is blocked in HAL_Delay, keep calling pump() to + * advance sim time; while it is merely computing, sleep-poll briefly. + * Returns false if the firmware thread died or the wall-clock watchdog + * fired (deadlock diagnostic). */ +bool sil_rt_idle_to_gate(SilPumpFn pump); + +/* Release the parked firmware for one app_loop iteration and wait until it + * re-parks (pumping through any HAL_Delay it performs). */ +bool sil_rt_run_app_iteration(SilPumpFn pump); + +/* Advance simulated time by `us` (scheduler context only; firmware must be + * blocked). Wakes delay-waiters via the condition predicate. */ +void sil_rt_advance_time_us(uint64_t us); + +/* Queue `fn` to run on the firmware context at the next app-gate entry, + * before the firmware parks. Posts are queued FIFO: any number posted + * between gate releases all execute, in post order. */ +void sil_rt_post(std::function fn); + +/* Current simulated time in microseconds. */ +uint64_t sil_rt_now_us(); + +/* True while the firmware is blocked in HAL_Delay (scheduler safe window). */ +bool sil_rt_fw_delay_waiting(); + +/* True while the firmware is parked at the app gate. */ +bool sil_rt_fw_parked(); + +/* Request teardown and join the firmware thread. */ +void sil_rt_shutdown(); + +bool sil_rt_fw_failed(); +const char* sil_rt_fw_error(); + +#endif /* SIL_RT_H */ diff --git a/Images/HostSIL/sil/sil_uart_c.c b/Images/HostSIL/sil/sil_uart_c.c new file mode 100644 index 00000000..5408f803 --- /dev/null +++ b/Images/HostSIL/sil/sil_uart_c.c @@ -0,0 +1,69 @@ +/* + * sil_uart_c.c — SIL replacement for Src/Inverter/Drivers/UART/mcp2221a_driver.c, + * C-linkage half (firmware C TUs reference these unmangled names). + * + * The MCP2221A text console maps to the host stdout; the USB-enumeration + * delay is skipped (not load-bearing). Binary telemetry frames do not use + * this path (Telemetry transmits via HAL_UART_Transmit_DMA directly; in + * --live mode those bytes are proxied onto the TCP link — see + * sil_live_server.cpp). + * + * mcp2221a_driver.h has no extern "C" guards, so firmware C++ TUs reference + * the mangled C++ spellings — those live in sil_uart_cpp.cpp and forward to + * the sil_mcp_impl_* aliases here. + */ +#include "mcp2221a_driver.h" + +#include + +void sil_mcp_impl_init(UART_HandleTypeDef* huart) { + (void)huart; +} + +void sil_mcp_impl_transmit(const uint8_t* data, uint16_t len) { + if (data == NULL) return; + (void)fwrite(data, 1, len, stdout); + fflush(stdout); +} + +void sil_mcp_impl_print(const char* str) { + if (str == NULL) return; + fputs(str, stdout); + fflush(stdout); +} + +void sil_mcp_impl_println(const char* str) { + if (str == NULL) return; + fputs(str, stdout); + fputc('\n', stdout); + fflush(stdout); +} + +void MCP2221A_Init(UART_HandleTypeDef* huart) { + sil_mcp_impl_init(huart); +} + +void MCP2221A_Transmit(const uint8_t* data, uint16_t len) { + sil_mcp_impl_transmit(data, len); +} + +void MCP2221A_Print(const char* str) { + sil_mcp_impl_print(str); +} + +void MCP2221A_PrintLn(const char* str) { + sil_mcp_impl_println(str); +} + +void MCP2221A_Printf(const char* fmt, ...) { + va_list ap; + va_start(ap, fmt); + vfprintf(stdout, fmt, ap); + va_end(ap); + fputc('\n', stdout); + fflush(stdout); +} + +int __io_putchar(int ch) { + return putchar(ch); +} diff --git a/Images/HostSIL/sil/sil_uart_cpp.cpp b/Images/HostSIL/sil/sil_uart_cpp.cpp new file mode 100644 index 00000000..3d6e0c77 --- /dev/null +++ b/Images/HostSIL/sil/sil_uart_cpp.cpp @@ -0,0 +1,43 @@ +/* + * sil_uart_cpp.cpp — C++-linkage spellings of the MCP2221A console API. + * + * mcp2221a_driver.h lacks extern "C" guards: firmware C++ TUs therefore + * reference the mangled C++ names, while the implementations compiled as C + * (sil_uart_c.c) export the plain names. These wrappers bridge the two. + */ +#include "mcp2221a_driver.h" + +#include +#include + +extern "C" { +void sil_mcp_impl_init(UART_HandleTypeDef* huart); +void sil_mcp_impl_transmit(const uint8_t* data, uint16_t len); +void sil_mcp_impl_print(const char* str); +void sil_mcp_impl_println(const char* str); +} + +void MCP2221A_Init(UART_HandleTypeDef* huart) { + sil_mcp_impl_init(huart); +} + +void MCP2221A_Transmit(const uint8_t* data, uint16_t len) { + sil_mcp_impl_transmit(data, len); +} + +void MCP2221A_Print(const char* str) { + sil_mcp_impl_print(str); +} + +void MCP2221A_PrintLn(const char* str) { + sil_mcp_impl_println(str); +} + +void MCP2221A_Printf(const char* fmt, ...) { + va_list ap; + va_start(ap, fmt); + vfprintf(stdout, fmt, ap); + va_end(ap); + fputc('\n', stdout); + fflush(stdout); +} diff --git a/Images/HostSIL/sil/sil_world.cpp b/Images/HostSIL/sil/sil_world.cpp new file mode 100644 index 00000000..049ce7b7 --- /dev/null +++ b/Images/HostSIL/sil/sil_world.cpp @@ -0,0 +1,6 @@ +#include "sil_world.h" + +SilWorld& silWorld() { + static SilWorld w; + return w; +} diff --git a/Images/HostSIL/sil/sil_world.h b/Images/HostSIL/sil/sil_world.h new file mode 100644 index 00000000..d5cbb997 --- /dev/null +++ b/Images/HostSIL/sil/sil_world.h @@ -0,0 +1,69 @@ +/* + * sil_world.h — shared simulation state for HostSIL. + * + * One SilWorld instance owns the PMSM plant (HostSim's OdePlant/MotorModel) + * plus the small amount of "physical world" state the firmware sensor shims + * read: DC-link voltage, applied pole voltages, DC-link current estimate and + * the throttle pin voltages from the scenario. + * + * Concurrency: written by the SIL scheduler, read by the firmware shims — + * but the two contexts are strictly exclusive (see sil_rt.h), so the fields + * are plain values, no atomics. + */ +#ifndef SIL_WORLD_H +#define SIL_WORLD_H + +#include "plant/ode_plant.h" + +#include +#include + +struct SilWorld { + hostsim::OdePlant plant; + + /* Scenario constants (set once before boot). */ + float vdc_v = 48.0f; + float ambient_temp_c = 25.0f; + + /* Latest inverter pole voltages [V] (duty * vdc when driving, else 0). */ + float phase_pole_v[3] = {0.0f, 0.0f, 0.0f}; + + /* Estimated DC-link current [A] from instantaneous power balance. */ + float dc_link_current_a = 0.0f; + + /* Throttle input pin voltages [V] (from the scenario profiles). */ + float throttle_a_v = 0.0f; + float throttle_b_v = 0.0f; + + /* Encoder trigger select: false = free-running (TIM2, 10 kHz), true = + * synchronized to the TIM1 update event (set by + * EncoderADC::useSynchronizedTrigger). */ + bool encoder_sync_trigger = false; + + /* Set by EncoderADC::start(); the scheduler only feeds the sin/cos + * stream while the firmware has the channel running. */ + bool encoder_stream_running = false; + + /* --- Fault-injection state (scenario "faults" block, applied by the + * scheduler in main.cpp; read by the shims). Defaults inject nothing. */ + /* Phase-current spike added at the ADC counts level in + * sil_phase_current_adc.cpp (oc_fault_phase: 0=U, 1=V, 2=W). */ + bool oc_fault_active = false; + int oc_fault_phase = 0; + float oc_fault_a = 0.0f; + + /* Encoder stream faults (sil_encoder_adc.cpp): frozen = no new samples + * (staleness), sig_lost = sin/cos pinned at the bias mid (amplitude + * collapse). */ + bool encoder_frozen = false; + bool encoder_sig_lost = false; + + /* Scenario-driven temperature channels [degC] (sil_app_sensors.cpp); + * NaN = channel not modeled (application reports NAN, as when the + * sensor is not populated). 0..2 = board, 3 = motor. */ + float temp_c[4] = {NAN, NAN, NAN, NAN}; +}; + +SilWorld& silWorld(); + +#endif /* SIL_WORLD_H */ diff --git a/Images/HostSIL/sil/stm32h7xx_hal.h b/Images/HostSIL/sil/stm32h7xx_hal.h new file mode 100644 index 00000000..cb67f7a5 --- /dev/null +++ b/Images/HostSIL/sil/stm32h7xx_hal.h @@ -0,0 +1,12 @@ +/* + * Forwarder for firmware headers that do #include "../stm32h7xx_hal.h" + * (e.g. Inc/Inverter/Telemetry.h). With sil/stm32shim on the include path, + * the quoted relative include resolves to /../stm32h7xx_hal.h, + * i.e. this file, once the per-file-directory lookup misses. + */ +#ifndef SIL_STM32H7XX_HAL_FORWARDER_H +#define SIL_STM32H7XX_HAL_FORWARDER_H + +#include "stm32shim/stm32h7xx_hal.h" + +#endif diff --git a/Images/HostSIL/sil/stm32shim/adc.h b/Images/HostSIL/sil/stm32shim/adc.h new file mode 100644 index 00000000..c5824457 --- /dev/null +++ b/Images/HostSIL/sil/stm32shim/adc.h @@ -0,0 +1,23 @@ +/* adc.h — SIL CubeMX-style header: peripheral handle externs for the ADCs. */ +#ifndef SIL_ADC_H +#define SIL_ADC_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "main.h" + +extern ADC_HandleTypeDef hadc1; +extern ADC_HandleTypeDef hadc2; +extern ADC_HandleTypeDef hadc3; + +void MX_ADC1_Init(void); +void MX_ADC2_Init(void); +void MX_ADC3_Init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* SIL_ADC_H */ diff --git a/Images/HostSIL/sil/stm32shim/dma.h b/Images/HostSIL/sil/stm32shim/dma.h new file mode 100644 index 00000000..081c93cd --- /dev/null +++ b/Images/HostSIL/sil/stm32shim/dma.h @@ -0,0 +1,17 @@ +/* dma.h — SIL CubeMX-style header (DMA handles unused in SIL). */ +#ifndef SIL_DMA_H +#define SIL_DMA_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "main.h" + +void MX_DMA_Init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* SIL_DMA_H */ diff --git a/Images/HostSIL/sil/stm32shim/fdcan.h b/Images/HostSIL/sil/stm32shim/fdcan.h new file mode 100644 index 00000000..fa563a0e --- /dev/null +++ b/Images/HostSIL/sil/stm32shim/fdcan.h @@ -0,0 +1,21 @@ +/* fdcan.h — SIL CubeMX-style header: FDCAN peripheral handle externs. */ +#ifndef SIL_FDCAN_H +#define SIL_FDCAN_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "main.h" + +extern FDCAN_HandleTypeDef hfdcan1; +extern FDCAN_HandleTypeDef hfdcan2; + +void MX_FDCAN1_Init(void); +void MX_FDCAN2_Init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* SIL_FDCAN_H */ diff --git a/Images/HostSIL/sil/stm32shim/gpio.h b/Images/HostSIL/sil/stm32shim/gpio.h new file mode 100644 index 00000000..bd9cc473 --- /dev/null +++ b/Images/HostSIL/sil/stm32shim/gpio.h @@ -0,0 +1,17 @@ +/* gpio.h — SIL CubeMX-style header (no extra surface beyond main.h). */ +#ifndef SIL_GPIO_H +#define SIL_GPIO_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "main.h" + +void MX_GPIO_Init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* SIL_GPIO_H */ diff --git a/Images/HostSIL/sil/stm32shim/main.h b/Images/HostSIL/sil/stm32shim/main.h new file mode 100644 index 00000000..678fdb79 --- /dev/null +++ b/Images/HostSIL/sil/stm32shim/main.h @@ -0,0 +1,135 @@ +/* + * main.h — SIL replacement for the CubeMX-generated main.h. + * + * Pin map copied 1:1 from Images/Gen6FW/Inc/main.h so firmware code sees the + * same macro names; GPIO "ports" are SIL model endpoints (stm32h7xx_hal.h). + */ +#ifndef SIL_MAIN_H +#define SIL_MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "stm32h7xx_hal.h" + +void Error_Handler(void); + +#define FRAM_SPI_SCK_Pin GPIO_PIN_2 +#define FRAM_SPI_SCK_GPIO_Port GPIOE +#define DEBUG_GREEN_LED_Pin GPIO_PIN_3 +#define DEBUG_GREEN_LED_GPIO_Port GPIOE +#define FRAM_SPI_MISO_Pin GPIO_PIN_5 +#define FRAM_SPI_MISO_GPIO_Port GPIOE +#define FRAM_SPI_MOSI_Pin GPIO_PIN_6 +#define FRAM_SPI_MOSI_GPIO_Port GPIOE +#define FRAM_WP_Pin GPIO_PIN_13 +#define FRAM_WP_GPIO_Port GPIOC +#define FRAM_CS_Pin GPIO_PIN_14 +#define FRAM_CS_GPIO_Port GPIOC +#define FRAM_HOLD_Pin GPIO_PIN_15 +#define FRAM_HOLD_GPIO_Port GPIOC +#define PERIPHERAL_POWER_ENABLE_Pin GPIO_PIN_2 +#define PERIPHERAL_POWER_ENABLE_GPIO_Port GPIOF +#define AIN_MOTOR_TMP_Pin GPIO_PIN_4 +#define AIN_MOTOR_TMP_GPIO_Port GPIOF +#define AIN_ENCODER_SIN_HALL_U_Pin GPIO_PIN_0 +#define AIN_ENCODER_SIN_HALL_U_GPIO_Port GPIOC +#define AIN_ENCODER_COS_HALL_V_Pin GPIO_PIN_1 +#define AIN_ENCODER_COS_HALL_V_GPIO_Port GPIOC +#define AIN_PH_W_CURSENS_REF_Pin GPIO_PIN_2 +#define AIN_PH_W_CURSENS_REF_GPIO_Port GPIOC +#define AIN_PH_W_CURSENS_Pin GPIO_PIN_3 +#define AIN_PH_W_CURSENS_GPIO_Port GPIOC +#define AIN_TMP_SENSE_3_Pin GPIO_PIN_0 +#define AIN_TMP_SENSE_3_GPIO_Port GPIOA +#define AIN_TMP_SENSE_2_Pin GPIO_PIN_1 +#define AIN_TMP_SENSE_2_GPIO_Port GPIOA +#define AIN_HALL_W_Pin GPIO_PIN_2 +#define AIN_HALL_W_GPIO_Port GPIOA +#define AIN_THROTTLE_A_Pin GPIO_PIN_3 +#define AIN_THROTTLE_A_GPIO_Port GPIOA +#define AIN_THROTTLE_B_Pin GPIO_PIN_4 +#define AIN_THROTTLE_B_GPIO_Port GPIOA +#define AIN_TMP_SENSE_1_Pin GPIO_PIN_5 +#define AIN_TMP_SENSE_1_GPIO_Port GPIOA +#define AIN_PH_V_CURSENS_Pin GPIO_PIN_6 +#define AIN_PH_V_CURSENS_GPIO_Port GPIOA +#define AIN_PH_V_CURSENS_REF_Pin GPIO_PIN_7 +#define AIN_PH_V_CURSENS_REF_GPIO_Port GPIOA +#define AIN_PH_U_CURSENS_Pin GPIO_PIN_4 +#define AIN_PH_U_CURSENS_GPIO_Port GPIOC +#define AIN_PH_U_CURSENS_REF_Pin GPIO_PIN_5 +#define AIN_PH_U_CURSENS_REF_GPIO_Port GPIOC +#define AIN_PH_W_CURSENS_REFB0_Pin GPIO_PIN_0 +#define AIN_PH_W_CURSENS_REFB0_GPIO_Port GPIOB +#define AIN_PH_W_CURSENSB1_Pin GPIO_PIN_1 +#define AIN_PH_W_CURSENSB1_GPIO_Port GPIOB +#define AIN_DC_LINK_CURSENS_Pin GPIO_PIN_11 +#define AIN_DC_LINK_CURSENS_GPIO_Port GPIOF +#define AIN_DC_LINK_CURSENS_REF_Pin GPIO_PIN_12 +#define AIN_DC_LINK_CURSENS_REF_GPIO_Port GPIOF +#define AIN_PH_W_CURSENSF13_Pin GPIO_PIN_13 +#define AIN_PH_W_CURSENSF13_GPIO_Port GPIOF +#define AIN_PH_W_CURSENS_REFF14_Pin GPIO_PIN_14 +#define AIN_PH_W_CURSENS_REFF14_GPIO_Port GPIOF +#define PH_U_HIGH_Pin GPIO_PIN_8 +#define PH_U_HIGH_GPIO_Port GPIOE +#define PH_U_LOW_Pin GPIO_PIN_9 +#define PH_U_LOW_GPIO_Port GPIOE +#define PH_V_HIGH_Pin GPIO_PIN_10 +#define PH_V_HIGH_GPIO_Port GPIOE +#define PH_V_LOW_Pin GPIO_PIN_11 +#define PH_V_LOW_GPIO_Port GPIOE +#define PH_W_HIGH_Pin GPIO_PIN_12 +#define PH_W_HIGH_GPIO_Port GPIOE +#define PH_W_LOW_Pin GPIO_PIN_13 +#define PH_W_LOW_GPIO_Port GPIOE +#define GATE_DRIVER_FAULT_PWM_BREAK_Pin GPIO_PIN_15 +#define GATE_DRIVER_FAULT_PWM_BREAK_GPIO_Port GPIOE +#define USER_DIN_6_Pin GPIO_PIN_15 +#define USER_DIN_6_GPIO_Port GPIOD +#define USER_DIN_5_Pin GPIO_PIN_2 +#define USER_DIN_5_GPIO_Port GPIOG +#define USER_DIN_4_Pin GPIO_PIN_3 +#define USER_DIN_4_GPIO_Port GPIOG +#define USER_DIN_3_Pin GPIO_PIN_4 +#define USER_DIN_3_GPIO_Port GPIOG +#define USER_DIN_2_Pin GPIO_PIN_5 +#define USER_DIN_2_GPIO_Port GPIOG +#define USER_DIN_1_Pin GPIO_PIN_6 +#define USER_DIN_1_GPIO_Port GPIOG +#define USER_DIN_7_Pin GPIO_PIN_7 +#define USER_DIN_7_GPIO_Port GPIOG +#define USER_DIN_8_Pin GPIO_PIN_8 +#define USER_DIN_8_GPIO_Port GPIOG +#define CANBUS_POWER_ENABLE_Pin GPIO_PIN_8 +#define CANBUS_POWER_ENABLE_GPIO_Port GPIOC +#define GATE_DRIVER_POWER_ENABLE_Pin GPIO_PIN_10 +#define GATE_DRIVER_POWER_ENABLE_GPIO_Port GPIOC +#define GATE_DRIVER_FAULT_Pin GPIO_PIN_11 +#define GATE_DRIVER_FAULT_GPIO_Port GPIOC +#define GATE_DRIVER_READY_Pin GPIO_PIN_12 +#define GATE_DRIVER_READY_GPIO_Port GPIOC +#define VSENSE_ISO_ADC_INTERRUPT_Pin GPIO_PIN_1 +#define VSENSE_ISO_ADC_INTERRUPT_GPIO_Port GPIOD +#define SPI2_CS_Pin GPIO_PIN_2 +#define SPI2_CS_GPIO_Port GPIOD +#define GATE_DRIVER_RESET_Pin GPIO_PIN_5 +#define GATE_DRIVER_RESET_GPIO_Port GPIOD +#define USER_DOUT_4_Pin GPIO_PIN_11 +#define USER_DOUT_4_GPIO_Port GPIOG +#define USER_DOUT_3_Pin GPIO_PIN_12 +#define USER_DOUT_3_GPIO_Port GPIOG +#define USER_DOUT_2_Pin GPIO_PIN_13 +#define USER_DOUT_2_GPIO_Port GPIOG +#define USER_DOUT_1_Pin GPIO_PIN_14 +#define USER_DOUT_1_GPIO_Port GPIOG +#define DEBUG_ORANGE_LED_Pin GPIO_PIN_1 +#define DEBUG_ORANGE_LED_GPIO_Port GPIOE + +#ifdef __cplusplus +} +#endif + +#endif /* SIL_MAIN_H */ diff --git a/Images/HostSIL/sil/stm32shim/spi.h b/Images/HostSIL/sil/stm32shim/spi.h new file mode 100644 index 00000000..b76e1db2 --- /dev/null +++ b/Images/HostSIL/sil/stm32shim/spi.h @@ -0,0 +1,21 @@ +/* spi.h — SIL CubeMX-style header: SPI peripheral handle externs. */ +#ifndef SIL_SPI_H +#define SIL_SPI_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "main.h" + +extern SPI_HandleTypeDef hspi2; +extern SPI_HandleTypeDef hspi4; + +void MX_SPI2_Init(void); +void MX_SPI4_Init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* SIL_SPI_H */ diff --git a/Images/HostSIL/sil/stm32shim/stm32h7xx_hal.h b/Images/HostSIL/sil/stm32shim/stm32h7xx_hal.h new file mode 100644 index 00000000..8eb6d335 --- /dev/null +++ b/Images/HostSIL/sil/stm32shim/stm32h7xx_hal.h @@ -0,0 +1,530 @@ +/* + * stm32h7xx_hal.h — SIL shim for the STM32H7 HAL. + * + * Minimal host-compiled re-implementation of exactly the HAL surface the + * Gen6FW application code touches (verified by grepping the compiled TUs). + * All peripheral state lives in plain host variables; HAL_GetTick/HAL_Delay + * are backed by the simulated clock (see sil_world.h / sil_rt.h). + * + * This file shadows the real HAL header via include-path ordering and must + * stay compilable as both C and C++ (firmware .c drivers include it). + */ +#ifndef SIL_STM32H7XX_HAL_H +#define SIL_STM32H7XX_HAL_H + +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* -------------------------------------------------------------------------- + * Status / tick + * ------------------------------------------------------------------------ */ +typedef enum { + HAL_OK = 0x00U, + HAL_ERROR = 0x01U, + HAL_BUSY = 0x02U, + HAL_TIMEOUT = 0x03U +} HAL_StatusTypeDef; + +uint32_t HAL_GetTick(void); /* simulated ms tick (sil clock) */ +void HAL_Delay(uint32_t Delay); /* advances sim time; pumps scheduler */ + +/* CMSIS intrinsics used by the firmware. */ +void __disable_irq(void); +void __enable_irq(void); +void __NOP(void); +void __WFI(void); +void __DMB(void); +unsigned int __get_PRIMASK(void); +void __set_PRIMASK(unsigned int primask); +unsigned int __get_IPSR(void); + +#define TIM_EGR_BG 0x0080U + +/* FunctionalState like the real HAL (enum, NOT a macro — firmware has + * class-scoped enum members named ENABLE/DISABLE). */ +typedef enum { DISABLE = 0U, ENABLE = 1U } FunctionalState; + +/* IRQ priority grouping etc. are irrelevant in SIL. */ +void HAL_NVIC_SetPriority(int32_t irqn, uint32_t preempt_priority, uint32_t sub_priority); +void HAL_NVIC_EnableIRQ(int32_t irqn); +void HAL_NVIC_DisableIRQ(int32_t irqn); +void HAL_NVIC_ClearPendingIRQ(int32_t irqn); +void HAL_NVIC_SystemReset(void); + +typedef int32_t IRQn_Type; +#define TIM1_UP_IRQn ((IRQn_Type)25) +#define ADC_IRQn ((IRQn_Type)18) +#define EXTI1_IRQn ((IRQn_Type)7) +#define USART3_IRQn ((IRQn_Type)39) +#define FDCAN1_IT0_IRQn ((IRQn_Type)19) +#define FDCAN2_IT0_IRQn ((IRQn_Type)21) + +/* -------------------------------------------------------------------------- + * CMSIS core peripherals (DWT cycle counter drives all microsecond timing) + * ------------------------------------------------------------------------ */ +typedef struct { + volatile uint32_t CTRL; + volatile uint32_t CYCCNT; +} SIL_DWT_Type; + +typedef struct { + volatile uint32_t DHCSR; + volatile uint32_t DCRSR; + volatile uint32_t DCRDR; + volatile uint32_t DEMCR; +} SIL_CoreDebug_Type; + +extern SIL_DWT_Type sil_dwt; +extern SIL_CoreDebug_Type sil_coredebug; + +#define DWT ((SIL_DWT_Type*)&sil_dwt) +#define CoreDebug ((SIL_CoreDebug_Type*)&sil_coredebug) + +#define CoreDebug_DEMCR_TRCENA_Msk (1UL << 24) +#define DWT_CTRL_CYCCNTENA_Msk (1UL << 0) + +/* H723 clock tree: PLLN=68 frac .75 on 8 MHz HSE -> 550 MHz SYSCLK. */ +extern uint32_t SystemCoreClock; + +/* -------------------------------------------------------------------------- + * GPIO + * ------------------------------------------------------------------------ */ +typedef struct { + uint32_t sil_index; /* port index (0=A .. 6=G) used by the sim model */ + + /* Register-level view for firmware that pokes ports directly (e.g. + * ResistanceCalibrator's GPIOE MODER/BSRR bit-bang). */ + volatile uint32_t MODER; + volatile uint32_t OTYPER; + volatile uint32_t OSPEEDR; + volatile uint32_t PUPDR; + volatile uint32_t IDR; + volatile uint32_t ODR; + volatile uint32_t BSRR; +} GPIO_TypeDef; + +typedef enum { + GPIO_PIN_RESET = 0U, + GPIO_PIN_SET = 1U +} GPIO_PinState; + +#define GPIO_PIN_0 ((uint16_t)0x0001U) +#define GPIO_PIN_1 ((uint16_t)0x0002U) +#define GPIO_PIN_2 ((uint16_t)0x0004U) +#define GPIO_PIN_3 ((uint16_t)0x0008U) +#define GPIO_PIN_4 ((uint16_t)0x0010U) +#define GPIO_PIN_5 ((uint16_t)0x0020U) +#define GPIO_PIN_6 ((uint16_t)0x0040U) +#define GPIO_PIN_7 ((uint16_t)0x0080U) +#define GPIO_PIN_8 ((uint16_t)0x0100U) +#define GPIO_PIN_9 ((uint16_t)0x0200U) +#define GPIO_PIN_10 ((uint16_t)0x0400U) +#define GPIO_PIN_11 ((uint16_t)0x0800U) +#define GPIO_PIN_12 ((uint16_t)0x1000U) +#define GPIO_PIN_13 ((uint16_t)0x2000U) +#define GPIO_PIN_14 ((uint16_t)0x4000U) +#define GPIO_PIN_15 ((uint16_t)0x8000U) + +extern GPIO_TypeDef sil_gpio_a; +extern GPIO_TypeDef sil_gpio_b; +extern GPIO_TypeDef sil_gpio_c; +extern GPIO_TypeDef sil_gpio_d; +extern GPIO_TypeDef sil_gpio_e; +extern GPIO_TypeDef sil_gpio_f; +extern GPIO_TypeDef sil_gpio_g; + +#define GPIOA ((GPIO_TypeDef*)&sil_gpio_a) +#define GPIOB ((GPIO_TypeDef*)&sil_gpio_b) +#define GPIOC ((GPIO_TypeDef*)&sil_gpio_c) +#define GPIOD ((GPIO_TypeDef*)&sil_gpio_d) +#define GPIOE ((GPIO_TypeDef*)&sil_gpio_e) +#define GPIOF ((GPIO_TypeDef*)&sil_gpio_f) +#define GPIOG ((GPIO_TypeDef*)&sil_gpio_g) + +void HAL_GPIO_WritePin(GPIO_TypeDef* port, uint16_t pin, GPIO_PinState state); +GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* port, uint16_t pin); +void HAL_GPIO_TogglePin(GPIO_TypeDef* port, uint16_t pin); + +#define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) ((void)0) + +/* -------------------------------------------------------------------------- + * TIM + * ------------------------------------------------------------------------ */ +typedef struct { + volatile uint32_t CR1; + volatile uint32_t CR2; + volatile uint32_t SMCR; + volatile uint32_t DIER; + volatile uint32_t SR; + volatile uint32_t EGR; + volatile uint32_t CCMR1; + volatile uint32_t CCMR2; + volatile uint32_t CCER; + volatile uint32_t CNT; + volatile uint32_t PSC; + volatile uint32_t ARR; + volatile uint32_t RCR; + volatile uint32_t CCR1; + volatile uint32_t CCR2; + volatile uint32_t CCR3; + volatile uint32_t CCR4; + volatile uint32_t BDTR; +} TIM_TypeDef; + +extern TIM_TypeDef sil_tim1; +#define TIM1 ((TIM_TypeDef*)&sil_tim1) + +#define TIM_CHANNEL_1 0x0000U +#define TIM_CHANNEL_2 0x0004U +#define TIM_CHANNEL_3 0x0008U +#define TIM_CHANNEL_4 0x000CU +#define TIM_CHANNEL_ALL 0x0018U + +#define TIM_IT_UPDATE 0x0001U +#define TIM_FLAG_UPDATE 0x0001U +#define TIM_FLAG_BREAK 0x0080U +#define TIM_BDTR_DTG 0x00FFU +#define TIM_BDTR_MOE (1UL << 15) +#define TIM_CR2_MMS (7UL << 4) +#define TIM_CR2_MMS2 (15UL << 20) +#define TIM_TRGO_OC4REF (6UL << 4) +#define TIM_TRGO2_UPDATE (2UL << 20) + +#define TIM_OCMODE_PWM1 0x0060U +#define TIM_OCPOLARITY_HIGH 0x0000U +#define TIM_OCNPOLARITY_HIGH 0x0000U +#define TIM_OCFAST_DISABLE 0x0000U +#define TIM_OCIDLESTATE_RESET 0x0000U +#define TIM_OCNIDLESTATE_RESET 0x0000U +#define TIM_CLOCKDIVISION_DIV1 0x0000U +#define TIM_COUNTERMODE_UP 0x0000U +#define TIM_DIER_UIE 0x0001U +#define TIM_CCER_CC1E (1U << 0) +#define TIM_CCER_CC1NE (1U << 2) +#define TIM_CCER_CC2E (1U << 4) +#define TIM_CCER_CC2NE (1U << 6) +#define TIM_CCER_CC3E (1U << 8) +#define TIM_CCER_CC3NE (1U << 10) + +typedef struct { + uint32_t OCMode; + uint32_t Pulse; + uint32_t OCPolarity; + uint32_t OCNPolarity; + uint32_t OCFastMode; + uint32_t OCIdleState; + uint32_t OCNIdleState; +} TIM_OC_InitTypeDef; + +typedef struct { + uint32_t Prescaler; + uint32_t CounterMode; + uint32_t Period; + uint32_t ClockDivision; + uint32_t RepetitionCounter; + uint32_t AutoReloadPreload; +} TIM_Base_InitTypeDef; + +typedef struct SIL_TimHandle { + TIM_TypeDef* Instance; + TIM_Base_InitTypeDef Init; + /* SIL-side bookkeeping (not part of the real struct layout contract — + * only shim code reads these). */ + uint32_t sil_active_channels; /* bitmask of started PWM chs */ + uint32_t sil_active_channels_n; + int sil_base_running; /* HAL_TIM_Base_Start was called */ +} TIM_HandleTypeDef; + +extern TIM_HandleTypeDef sil_htim1_impl; +#define htim1_ptr (&sil_htim1_impl) + +HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef* htim, uint32_t channel); +HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef* htim, uint32_t channel); +HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef* htim, uint32_t channel); +HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef* htim, uint32_t channel); +HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef* htim, uint32_t channel); +HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef* htim, uint32_t channel); +HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef* htim); +HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef* htim); +HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef* htim, + const TIM_OC_InitTypeDef* sConfig, + uint32_t channel); +void HAL_TIM_IRQHandler(TIM_HandleTypeDef* htim); + +#define __HAL_TIM_SET_PRESCALER(__HANDLE__, __VALUE__) \ + ((__HANDLE__)->Instance->PSC = (__VALUE__)) +#define __HAL_TIM_SET_AUTORELOAD(__HANDLE__, __VALUE__) \ + ((__HANDLE__)->Instance->ARR = (__VALUE__)) +#define __HAL_TIM_GET_AUTORELOAD(__HANDLE__) ((__HANDLE__)->Instance->ARR) +#define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ + ((__HANDLE__)->Instance->DIER |= (__INTERRUPT__)) +#define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ + ((__HANDLE__)->Instance->DIER &= ~(__INTERRUPT__)) +#define __HAL_TIM_CLEAR_FLAG(__HANDLE__, __FLAG__) \ + ((__HANDLE__)->Instance->SR = ~(__FLAG__)) +#define __HAL_TIM_MOE_ENABLE(__HANDLE__) \ + ((__HANDLE__)->Instance->BDTR |= TIM_BDTR_MOE) +#define __HAL_TIM_MOE_DISABLE(__HANDLE__) \ + ((__HANDLE__)->Instance->BDTR &= ~TIM_BDTR_MOE) + +/* Channel compare accessors used by __HAL_TIM_SET_COMPARE / GET_COMPARE. */ +uint32_t* SIL_TIM_CcrPtr(TIM_HandleTypeDef* htim, uint32_t channel); +#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \ + (*SIL_TIM_CcrPtr((__HANDLE__), (__CHANNEL__)) = (__COMPARE__)) +#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \ + (*SIL_TIM_CcrPtr((__HANDLE__), (__CHANNEL__))) + +#define MODIFY_REG(REG, CLEARMASK, SETMASK) \ + ((REG) = (((REG) & ~(CLEARMASK)) | (SETMASK))) + +/* HAL callback symbols the firmware overrides and the SIL scheduler calls. */ +void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef* htim); + +/* -------------------------------------------------------------------------- + * ADC + * ------------------------------------------------------------------------ */ +typedef struct { + volatile uint32_t ISR; + volatile uint32_t CR; + volatile uint32_t CFGR; + volatile uint32_t DR; + volatile uint32_t JDR1; + volatile uint32_t JDR2; + volatile uint32_t JDR3; + volatile uint32_t JDR4; +} ADC_TypeDef; + +extern ADC_TypeDef sil_adc1; +extern ADC_TypeDef sil_adc2; +extern ADC_TypeDef sil_adc3; +#define ADC1 ((ADC_TypeDef*)&sil_adc1) +#define ADC2 ((ADC_TypeDef*)&sil_adc2) +#define ADC3 ((ADC_TypeDef*)&sil_adc3) + +#define ADC_SCAN_ENABLE 1U +#define ADC_SCAN_DISABLE 0U +#define ADC_EOC_SEQ_CONV 1U +#define ADC_EOC_SINGLE_CONV 0U +#define ADC_SINGLE_ENDED 0U +#define ADC_OFFSET_NONE 0U +#define ADC_RIGHTBITSHIFT_NONE 0U +#define ADC_SAMPLETIME_8CYCLES_5 2U +#define ADC_CALIB_OFFSET 0U +#define ADC_CALIB_OFFSET_LINEARITY 0U + +#define ADC_CHANNEL_3 3U +#define ADC_CHANNEL_4 4U +#define ADC_CHANNEL_7 7U +#define ADC_CHANNEL_8 8U +#define ADC_CHANNEL_10 10U +#define ADC_CHANNEL_11 11U + +#define ADC_INJECTED_RANK_1 1U +#define ADC_INJECTED_RANK_2 2U +#define ADC_INJECTED_RANK_3 3U +#define ADC_INJECTED_RANK_4 4U + +#define ADC_INJECTED_SOFTWARE_START 0U +#define ADC_EXTERNALTRIGINJEC_T1_TRGO 1U +#define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE 0U +#define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING 2U + +#define ADC_EXTERNALTRIG_T2_TRGO 0x0BU +#define ADC_EXTERNALTRIG_T1_TRGO2 0x1BU +#define ADC_CFGR_EXTSEL 0x1FUL + +#define ADC_DUALMODE_INJECSIMULT 7U +#define ADC_DUALMODEDATAFORMAT_DISABLED 0U +#define ADC_TWOSAMPLINGDELAY_5CYCLES 4U + +#define ADC_ANALOGWATCHDOG_1 1U +#define ADC_ANALOGWATCHDOG_NONE 0U +#define ADC_ANALOGWATCHDOG_ALL_INJEC 0x00C00000U + +/* NOTE: the real HAL defines ENABLE/DISABLE macros; Gen6FW has enum members + * named ENABLE/DISABLE, so this shim deliberately does NOT define them (no + * compiled firmware TU uses the macro forms). */ + +#define ADC_REGULAR_RANK_1 1U +#define ADC_REGULAR_RANK_2 2U +#define ADC_SAMPLETIME_24CYCLES_5 1U +#define ADC_SAMPLETIME_32CYCLES_5 2U +#define ADC3_SAMPLETIME_24CYCLES_5 1U +#define ADC3_OFFSET_SIGN_NEGATIVE 0U + +typedef struct { + uint32_t ScanConvMode; + uint32_t EOCSelection; +} SIL_ADC_InitTypeDef; + +typedef struct SIL_AdcHandle { + ADC_TypeDef* Instance; + SIL_ADC_InitTypeDef Init; + int sil_regular_running; + int sil_injected_running; +} ADC_HandleTypeDef; + +extern ADC_HandleTypeDef sil_hadc1_impl; +extern ADC_HandleTypeDef sil_hadc2_impl; +extern ADC_HandleTypeDef sil_hadc3_impl; + +typedef struct { + uint32_t InjectedChannel; + uint32_t InjectedRank; + uint32_t InjectedSamplingTime; + uint32_t InjectedSingleDiff; + uint32_t InjectedOffsetNumber; + uint32_t InjectedOffset; + uint32_t InjectedOffsetSignedSaturation; + uint32_t InjectedNbrOfConversion; + uint32_t InjectedDiscontinuousConvMode; + uint32_t AutoInjectedConv; + uint32_t QueueInjectedContext; + uint32_t ExternalTrigInjecConv; + uint32_t ExternalTrigInjecConvEdge; + uint32_t InjecOversamplingMode; + struct { + uint32_t Ratio; + uint32_t RightBitShift; + } InjecOversampling; +} ADC_InjectionConfTypeDef; + +typedef struct { + uint32_t Mode; + uint32_t DualModeData; + uint32_t TwoSamplingDelay; +} ADC_MultiModeTypeDef; + +typedef struct { + uint32_t WatchdogNumber; + uint32_t WatchdogMode; + uint32_t ITMode; + uint32_t HighThreshold; + uint32_t LowThreshold; + uint32_t Channel; +} ADC_AnalogWDGConfTypeDef; + +typedef struct { + uint32_t Channel; + uint32_t Rank; + uint32_t SamplingTime; + uint32_t SingleDiff; + uint32_t OffsetNumber; + uint32_t Offset; + uint32_t OffsetSignedSaturation; + uint32_t OffsetSign; +} ADC_ChannelConfTypeDef; + +HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc); +HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc); +HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t timeout_ms); +uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc); +HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, + const ADC_ChannelConfTypeDef* sConfig); +uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t rank); +HAL_StatusTypeDef HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef* hadc); +HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, + const ADC_InjectionConfTypeDef* cfg); +HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, + const ADC_MultiModeTypeDef* mm); +HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, + uint32_t calib, uint32_t diff); +HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc); +HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc); +HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, + const ADC_AnalogWDGConfTypeDef* awd); + +/* -------------------------------------------------------------------------- + * SPI + * ------------------------------------------------------------------------ */ +typedef struct { + uint32_t sil_index; +} SPI_TypeDef; + +extern SPI_TypeDef sil_spi2; +extern SPI_TypeDef sil_spi4; +#define SPI2 ((SPI_TypeDef*)&sil_spi2) +#define SPI4 ((SPI_TypeDef*)&sil_spi4) + +typedef struct { + SPI_TypeDef* Instance; +} SPI_HandleTypeDef; + +extern SPI_HandleTypeDef sil_hspi2_impl; +extern SPI_HandleTypeDef sil_hspi4_impl; + +HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef* hspi, const uint8_t* data, + uint16_t size, uint32_t timeout_ms); +HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef* hspi, uint8_t* data, + uint16_t size, uint32_t timeout_ms); +HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef* hspi, + const uint8_t* tx, uint8_t* rx, + uint16_t size, uint32_t timeout_ms); + +/* -------------------------------------------------------------------------- + * UART + * ------------------------------------------------------------------------ */ +typedef struct { + uint32_t sil_index; +} USART_TypeDef; + +extern USART_TypeDef sil_usart3; +#define USART3 ((USART_TypeDef*)&sil_usart3) + +typedef struct { + USART_TypeDef* Instance; +} UART_HandleTypeDef; + +extern UART_HandleTypeDef sil_huart3_impl; + +/* SIL: transmit "succeeds" immediately; the completion callback is fired by + * the SIL scheduler one context-switch later (see sil_hal_pump()). */ +HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef* huart, + const uint8_t* data, uint16_t size); +HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef* huart, + uint8_t* data, uint16_t size); + +#define UART_CLEAR_PEF 0x0001U +#define UART_CLEAR_FEF 0x0002U +#define UART_CLEAR_NEF 0x0004U +#define UART_CLEAR_OREF 0x0008U +#define UART_CLEAR_IDLEF 0x0010U +#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((void)0) + +void HAL_UART_TxCpltCallback(UART_HandleTypeDef* huart); /* firmware defines */ +void HAL_UART_RxCpltCallback(UART_HandleTypeDef* huart); /* firmware may define */ + +/* -------------------------------------------------------------------------- + * FDCAN (only handle shells — the CanBus driver is a SIL stub) + * ------------------------------------------------------------------------ */ +typedef struct { + uint32_t sil_index; +} FDCAN_GlobalTypeDef; + +extern FDCAN_GlobalTypeDef sil_fdcan1; +extern FDCAN_GlobalTypeDef sil_fdcan2; +#define FDCAN1 ((FDCAN_GlobalTypeDef*)&sil_fdcan1) +#define FDCAN2 ((FDCAN_GlobalTypeDef*)&sil_fdcan2) + +typedef struct { + FDCAN_GlobalTypeDef* Instance; +} FDCAN_HandleTypeDef; + +extern FDCAN_HandleTypeDef sil_hfdcan1_impl; +extern FDCAN_HandleTypeDef sil_hfdcan2_impl; + +/* -------------------------------------------------------------------------- + * Misc + * ------------------------------------------------------------------------ */ +void Error_Handler(void); + +#ifdef __cplusplus +} /* extern "C" */ +#endif + +#endif /* SIL_STM32H7XX_HAL_H */ diff --git a/Images/HostSIL/sil/stm32shim/tim.h b/Images/HostSIL/sil/stm32shim/tim.h new file mode 100644 index 00000000..54c556d5 --- /dev/null +++ b/Images/HostSIL/sil/stm32shim/tim.h @@ -0,0 +1,20 @@ +/* tim.h — SIL CubeMX-style header: TIM peripheral handle externs. */ +#ifndef SIL_TIM_H +#define SIL_TIM_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "main.h" + +extern TIM_HandleTypeDef htim1; + +void MX_TIM1_Init(void); +void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim); + +#ifdef __cplusplus +} +#endif + +#endif /* SIL_TIM_H */ diff --git a/Images/HostSIL/sil/stm32shim/usart.h b/Images/HostSIL/sil/stm32shim/usart.h new file mode 100644 index 00000000..443bde1a --- /dev/null +++ b/Images/HostSIL/sil/stm32shim/usart.h @@ -0,0 +1,19 @@ +/* usart.h — SIL CubeMX-style header: UART peripheral handle externs. */ +#ifndef SIL_USART_H +#define SIL_USART_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "main.h" + +extern UART_HandleTypeDef huart3; + +void MX_USART3_UART_Init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* SIL_USART_H */ diff --git a/Images/HostSIL/src/main.cpp b/Images/HostSIL/src/main.cpp new file mode 100644 index 00000000..e84bac2e --- /dev/null +++ b/Images/HostSIL/src/main.cpp @@ -0,0 +1,780 @@ +/* + * host_sil — firmware-in-the-loop SIL simulator. + * + * Boots the real Gen6FW application (unmodified, compiled for the host) + * against the HostSim ODE PMSM plant on a simulated clock. Every TIM1 + * update event the scheduler fires, in hardware order: + * + * 1. plant step with the latched PWM duties (ODE averaged-duty model) + * 2. phase-current injected-conversion-complete (= ADC ISR) + * 3. encoder sample (TIM2 10 kHz, or TIM1-synced while control runs) + * 4. HAL_TIM_PeriodElapsedCallback (= TIM1 UP ISR -> FOC step) + * + * The firmware application loop runs at scenario app_loop_hz through a + * cooperative rendezvous (see sil_rt.h / README.md). + * + * Usage: + * host_sil [--realtime N] [--live [--port P]] + * --realtime N wall-clock pacing factor (0 or omitted = as fast as + * possible; 1 = realtime) + * --live serve the firmware's own USART3 telemetry byte stream + * (COBS-framed InverterProtocol) verbatim on a TCP port for + * RTEStudio (--tcp H:P --protocol ivp); implies realtime 1.0 + * unless --realtime overrides it + * --port P live listen port (default 14608, same as HostSim) + * + * In --live mode bytes a client sends (e.g. RTEStudio's text console, or a + * raw tcp client) are forwarded verbatim into the firmware's huart3 IT-RX + * path, so the Gen6FW CommandShell receives them exactly like minicom-typed + * bytes on hardware (see sil/sil_live_server.h and silUartRxPoll). + * + * Scenario JSON: see scenarios/sil_foc_demo.json and src/scenario.h. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "scenario.h" + +#include "sil_rt.h" +#include "sil_world.h" +#include "sil_hooks.h" +#include "sil_fw_console.h" +#include "sil_live_server.h" + +#include "Inverter/AppState.h" +#include "Inverter/Control/ControlSupervisor.h" +#include "Inverter/Control/FaultManager.h" +#include "Inverter/Command/CommandManager.h" +#include "Inverter/Calibration/CalKvStore.h" +#include "Inverter/Drivers/PWM/pwm.h" +#include "Inverter/Drivers/Sensors/ApplicationSensors.h" + +#include "domain_tim_isr_generated.h" + +extern "C" void sil_fram_attach(const char* path); +extern "C" void sil_fram_detach_save(void); +void sil_hal_init(); /* sil_hal.cpp: peripheral register defaults */ + +namespace { + +/* -------------------------------------------------------------------------- + * Fast-tick event bookkeeping (all times in sim microseconds) + * ------------------------------------------------------------------------ */ +struct Sched { + double next_inj_us = 0.0; /* TIM1 TRGO => injected conversion */ + double next_upd_us = 0.0; /* TIM1 update event => UP ISR */ + double next_enc_us = 0.0; /* encoder DMA sample (free-run trigger) */ + double next_app_us = 0.0; /* app_loop iteration */ + double next_trace_us = 0.0; /* trace CSV row */ + + double inj_period_us = 400.0; + double upd_period_us = 200.0; + double enc_period_us = 100.0; /* TIM2: 10 kHz */ + double app_period_us = 1000.0; + + bool control_posted = false; +}; + +sil::Scenario g_scn; +bool g_failed = false; +Sched g_sched; +FILE* g_trace = nullptr; /* open trace CSV (set in main) */ +bool g_boot_done = false; /* boot-pump ticks emit no trace rows */ + +void writeTraceRow(FILE* f); + +/* Sorted timeline of scenario shell commands (from the "commands" block). */ +std::vector> g_commands; +size_t g_cmd_next = 0; + +/* -------------------------------------------------------------------------- + * Fault injection (scenario "faults" block) + * + * Each tick the scheduler recomputes which injection windows are active and + * writes the shared fault state consumed by the sensor shims. Edges are + * logged as host-side "[SIL] inject ..." lines; the firmware-visible effect + * (bits latched in FaultManager) is logged separately by + * pollFaultTransitions() and by the firmware console mirror. + * ------------------------------------------------------------------------ */ + +bool faultWindowActive(float t_s, float t0_s, float dur_s) { + if (t0_s < 0.0f || t_s < t0_s) return false; + return dur_s <= 0.0f || t_s < t0_s + dur_s; +} + +struct FaultPrevState { + bool vdc = false; + bool oc = false; + bool enc_freeze = false; + bool enc_loss = false; + bool temp = false; +}; +FaultPrevState g_fault_prev; + +void applyFaultWindows() { + SilWorld& w = silWorld(); + const float t = static_cast(sil_rt_now_us()) / 1.0e6f; + + /* DC-link glitch: the sensed bus voltage and the plant's drive voltage + * dip together (the firmware reads bus V through the MAX22530 shim). */ + const float vdc = + faultWindowActive(t, g_scn.vdc_glitch_time_s, g_scn.vdc_glitch_duration_s) + ? g_scn.vdc_glitch_v + : g_scn.vdc_v; + w.vdc_v = vdc; + if (std::fabs(w.plant.Model().Params().vdc_v - vdc) > 1.0e-3f) { + hostsim::MotorParams mp = w.plant.Model().Params(); + mp.vdc_v = vdc; + w.plant.SetParams(mp); + } + const bool vdc_act = (vdc != g_scn.vdc_v); + if (vdc_act != g_fault_prev.vdc) { + std::printf("[SIL] t=%.3f inject vdc_glitch %s (bus %.1f V)\n", + static_cast(t), vdc_act ? "ON" : "off", + static_cast(vdc)); + g_fault_prev.vdc = vdc_act; + } + + /* Phase overcurrent at the ADC conversion level. */ + const bool oc = faultWindowActive(t, g_scn.oc_inject_time_s, + g_scn.oc_inject_duration_s); + w.oc_fault_active = oc; + w.oc_fault_phase = g_scn.oc_inject_phase; + w.oc_fault_a = g_scn.oc_inject_a; + if (oc != g_fault_prev.oc) { + static const char* phase_name[3] = {"U", "V", "W"}; + const int ph = (g_scn.oc_inject_phase >= 0 && g_scn.oc_inject_phase <= 2) + ? g_scn.oc_inject_phase : 0; + std::printf("[SIL] t=%.3f inject oc_inject %s (phase %s, %+.1f A)\n", + static_cast(t), oc ? "ON" : "off", + phase_name[ph], static_cast(g_scn.oc_inject_a)); + g_fault_prev.oc = oc; + } + + /* Encoder stream faults. */ + const bool enc_freeze = + faultWindowActive(t, g_scn.encoder_freeze_time_s, + g_scn.encoder_freeze_duration_s); + w.encoder_frozen = enc_freeze; + if (enc_freeze != g_fault_prev.enc_freeze) { + std::printf("[SIL] t=%.3f inject encoder_freeze %s (no new samples)\n", + static_cast(t), enc_freeze ? "ON" : "off"); + g_fault_prev.enc_freeze = enc_freeze; + } + const bool enc_loss = + faultWindowActive(t, g_scn.encoder_loss_time_s, + g_scn.encoder_loss_duration_s); + w.encoder_sig_lost = enc_loss; + if (enc_loss != g_fault_prev.enc_loss) { + std::printf("[SIL] t=%.3f inject encoder_loss %s (sin/cos to bias mid)\n", + static_cast(t), enc_loss ? "ON" : "off"); + g_fault_prev.enc_loss = enc_loss; + } + + /* Temperature channel override. Only the scenario's spike channel is + * modeled; outside the fault window it reads the ambient baseline (a + * populated sensor does not vanish when the fault ends — previously the + * channel snapped back to NAN = "not populated"). */ + const bool temp = faultWindowActive(t, g_scn.temp_spike_time_s, + g_scn.temp_spike_duration_s); + for (int ch = 0; ch < 4; ++ch) { + if (ch == g_scn.temp_spike_channel && + g_scn.temp_spike_time_s >= 0.0f) { + w.temp_c[ch] = temp ? g_scn.temp_spike_c : w.ambient_temp_c; + } else { + w.temp_c[ch] = NAN; + } + } + if (temp != g_fault_prev.temp) { + std::printf("[SIL] t=%.3f inject temp_spike %s (ch%d -> %.1f C)\n", + static_cast(t), temp ? "ON" : "off", + g_scn.temp_spike_channel, + static_cast(g_scn.temp_spike_c)); + g_fault_prev.temp = temp; + } +} + +/* -------------------------------------------------------------------------- + * Firmware-observed fault transition log + * + * Watches FaultManager::activeFlags() from the scheduler side and prints + * every edge with the sim timestamp; trips are accumulated for the end-of-run + * summary. The firmware's own "triggered" lines (with the FaultReason + * string) appear shortly after via the console mirror ([FW ...]). + * ------------------------------------------------------------------------ */ +struct FaultTrip { + double t_s; + const char* source; /* static storage: FaultMeta::name */ + const char* description; + char severity; /* 'W' / 'H' / 'C' */ +}; +std::vector g_fault_history; +uint32_t g_fault_flags_seen = 0; + +char severityChar(Inverter::FaultSeverity s) { + switch (s) { + case Inverter::FaultSeverity::Warning: return 'W'; + case Inverter::FaultSeverity::High: return 'H'; + case Inverter::FaultSeverity::Critical: return 'C'; + } + return '?'; +} + +void pollFaultTransitions() { + const uint32_t flags = Inverter::FaultManager::instance().activeFlags(); + if (flags == g_fault_flags_seen) return; + const double t = static_cast(sil_rt_now_us()) / 1e6; + const uint32_t raised = flags & ~g_fault_flags_seen; + const uint32_t cleared = g_fault_flags_seen & ~flags; + for (size_t i = 0; i < Inverter::FaultManager::metaCount(); ++i) { + const auto* m = &Inverter::FaultManager::metaTable()[i]; + const uint32_t bit = static_cast(m->source); + if ((raised & bit) != 0U) { + const char sev = severityChar(m->severity); + std::printf("[SIL] t=%.3f fault raised: source=%s severity=%c (%s)\n", + t, m->name, sev, m->description); + g_fault_history.push_back({t, m->name, m->description, sev}); + } + if ((cleared & bit) != 0U) { + std::printf("[SIL] t=%.3f fault cleared: source=%s\n", t, m->name); + } + } + g_fault_flags_seen = flags; +} + +/* One fast tick of modeled hardware. Must only run while the firmware + * context is blocked (sil_rt guarantees this at every call site). */ +void fastTick() { + SilWorld& w = silWorld(); + + /* 0. Scenario fault windows feed the world state first, so every sensor + * shim below already sees the injected values. */ + applyFaultWindows(); + + /* 1. Plant step with the latched duties (0 V phases while not driving). */ + float du = 0.0f, dv = 0.0f, dw_ = 0.0f; + const bool driving = silTimOutputsDriving(); + if (driving) { + PWM_GetCurrentDuties(&du, &dv, &dw_); + } + w.plant.Step(du, dv, dw_, 1.0e-6f); + + /* Physical side-channels for the sensor shims. */ + if (driving) { + w.phase_pole_v[0] = du * w.vdc_v / 100.0f; + w.phase_pole_v[1] = dv * w.vdc_v / 100.0f; + w.phase_pole_v[2] = dw_ * w.vdc_v / 100.0f; + const auto& st = w.plant.State(); + const float p = w.phase_pole_v[0] * st.ia_a + + w.phase_pole_v[1] * st.ib_a + + w.phase_pole_v[2] * st.ic_a; + w.dc_link_current_a = (w.vdc_v > 1.0f) ? (p / w.vdc_v) : 0.0f; + } else { + w.phase_pole_v[0] = w.phase_pole_v[1] = w.phase_pole_v[2] = 0.0f; + w.dc_link_current_a = 0.0f; + } + + sil_rt_advance_time_us(1); + const uint64_t now = sil_rt_now_us(); + + /* 2. TIM1 TRGO -> injected phase-current conversion (ADC ISR). */ + if (silPhaseCurrentAdcRunning() && silTimBaseRunning()) { + const float inj_hz = silTimSwitchingHz(); + if (inj_hz > 0.0f) { + const double period = 1.0e6 / static_cast(inj_hz); + if (static_cast(now) >= g_sched.next_inj_us) { + silPhaseCurrentAdcTrigger(); + g_sched.next_inj_us += period; + if (g_sched.next_inj_us < static_cast(now)) { + g_sched.next_inj_us = static_cast(now) + period; + } + } + g_sched.inj_period_us = period; + } + } + + /* 3. Encoder: free-running TIM2 stream (or taken per update event when + * synchronized — handled below). encoder_frozen drops the sample stream + * entirely, so the firmware's sample-age bookkeeping goes stale. */ + if (silEncoderRunning() && !w.encoder_frozen && !silEncoderSyncTrigger()) { + if (static_cast(now) >= g_sched.next_enc_us) { + silEncoderSampleFromPlant(); + g_sched.next_enc_us += g_sched.enc_period_us; + if (g_sched.next_enc_us < static_cast(now)) { + g_sched.next_enc_us = static_cast(now) + g_sched.enc_period_us; + } + } + } + + /* 4. TIM1 update event -> PWM-period ISR (FOC control step). */ + if (silTimBaseRunning() && silTimUpdateIrqEnabled()) { + const float upd_hz = silTimUpdateHz(); + if (upd_hz > 0.0f) { + const double period = 1.0e6 / static_cast(upd_hz); + if (static_cast(now) >= g_sched.next_upd_us) { + /* The encoder trigger is TIM1-synchronized while control + * runs: sample it just before the control step. */ + if (silEncoderRunning() && silEncoderSyncTrigger() && + !w.encoder_frozen) { + silEncoderSampleFromPlant(); + } + silTimFireUpdateIrq(); + g_sched.next_upd_us += period; + if (g_sched.next_upd_us < static_cast(now)) { + g_sched.next_upd_us = static_cast(now) + period; + } + } + g_sched.upd_period_us = period; + } + } + + /* 5. Firmware-visible fault bookkeeping (source/severity edges with sim + * timestamps; the firmware console mirror prints the matching lines). */ + pollFaultTransitions(); + + /* 6. Trace CSV row cadence — time-driven at the fast tick so + * trace_decim_us below the app-loop period still takes effect (an + * app-boundary cadence would silently clamp the row period to + * 1/app_loop_hz). Boot pump ticks are skipped: the trace covers the + * scheduled run, from boot-complete on. */ + if (g_boot_done && g_trace != nullptr && + static_cast(now) >= g_sched.next_trace_us) { + writeTraceRow(g_trace); + g_sched.next_trace_us = static_cast(now) + + static_cast(g_scn.trace_decim_us); + } +} + +/* Throttle profile -> pin voltages for the slow-sensor shim. */ +void updateThrottleVoltages() { + SilWorld& w = silWorld(); + const float t_s = static_cast(sil_rt_now_us() / 1000000ULL) + + static_cast(sil_rt_now_us() % 1000000ULL) / 1.0e6f; + const float a = g_scn.throttle_a.at(t_s); + const float b = g_scn.throttle_b_set ? g_scn.throttle_b.at(t_s) + : g_scn.throttle_a.at(t_s); + /* 0.5 .. 4.5 V pin range (header default KV bounds). */ + w.throttle_a_v = 0.5f + a * 4.0f; + w.throttle_b_v = 0.5f + b * 4.0f; +} + +void writeTraceRow(FILE* f) { + SilWorld& w = silWorld(); + float du = 0.0f, dv = 0.0f, dw_ = 0.0f; + PWM_GetCurrentDuties(&du, &dv, &dw_); + const auto& st = w.plant.State(); + + float theta_m = st.theta_e_rad / + static_cast(w.plant.Model().Params().pole_pairs); + const float rpm_mech = st.omega_e_rad_s * 60.0f / + (6.28318530718f * static_cast(w.plant.Model().Params().pole_pairs)); + + const float iq_ref = appState.tim_isr.IqGate.Out; + const float id_meas = appState.tim_isr.Park.I_D.in(au::amperes); + const float iq_meas = appState.tim_isr.Park.I_Q.in(au::amperes); + + std::fprintf(f, "%llu,%.4f,%.4f,%.4f,%.5f,%.5f,%.5f,%.5f,%.5f,%.4f,%.1f,%.4f,%.4f,%.4f,%.4f\n", + (unsigned long long)sil_rt_now_us(), + static_cast(du), static_cast(dv), + static_cast(dw_), + static_cast(st.ia_a), static_cast(st.ib_a), + static_cast(st.ic_a), + static_cast(st.theta_e_rad), + static_cast(st.omega_e_rad_s), + static_cast(theta_m), + static_cast(rpm_mech), + static_cast(w.vdc_v), + static_cast(iq_ref), + static_cast(id_meas), + static_cast(iq_meas)); +} + +#define SIL_TRACE_HEADER \ + "time_us,duty_u,duty_v,duty_w,i_a,i_b,i_c,theta_e_rad,omega_e_rad_s," \ + "theta_m_rad,rpm_mech,vdc_v,iq_ref_a,id_meas_a,iq_meas_a\n" + +/* Deferred firmware-context actions ------------------------------------- */ + +void runShellLines(const std::vector* lines) { + for (const auto& line : *lines) { + /* Logged at execution (firmware context), not when queued: every + * "shell>" line reflects work that actually ran. */ + std::printf("[SIL] t=%.3f shell> %s\n", + static_cast(sil_rt_now_us()) / 1e6, line.c_str()); + CommandManager::instance().processLine(line.c_str()); + } +} + +void applyFirmwareConfig() { + for (const auto& kv : g_scn.firmware_config) { + char line[128]; + std::snprintf(line, sizeof(line), "config set %s %g", + kv.first.c_str(), static_cast(kv.second)); + CommandManager::instance().processLine(line); + std::snprintf(line, sizeof(line), "config save %s", kv.first.c_str()); + CommandManager::instance().processLine(line); + } + /* Refresh the runtime motor calibration from the seeded KV store so the + * platform rpm/feedforward helpers see matching poles/sign. */ + Inverter::CalKvStore::loadMotorCalibration(); + /* Same for the temperature channel config (firmware `temp reload` + * equivalent) so seeded Hw.Temp.* / Motor.Temp.* keys take effect. */ + Inverter::appSensors().reloadConfig(); +} + +void engageControl() { + if (g_scn.pwm_switching_hz > 0.0f) { + PWM_SetFrequency(static_cast(g_scn.pwm_switching_hz + 0.5f)); + } + CommandManager::instance().processLine("control start"); + if (g_scn.iq_a != 0.0f || g_scn.id_a != 0.0f) { + char line[128]; + std::snprintf(line, sizeof(line), "var set IqVar %g", + static_cast(g_scn.iq_a)); + CommandManager::instance().processLine(line); + std::snprintf(line, sizeof(line), "var set IdVar %g", + static_cast(g_scn.id_a)); + CommandManager::instance().processLine(line); + } +} + +/* Host-side active-fault listing (works even without the --live link). */ +void printActiveFaults() { + const uint32_t flags = Inverter::FaultManager::instance().activeFlags(); + if (flags == 0) { + std::printf("[SIL] no active faults\n"); + return; + } + for (size_t i = 0; i < Inverter::FaultManager::metaCount(); ++i) { + const auto* m = &Inverter::FaultManager::metaTable()[i]; + if ((flags & static_cast(m->source)) != 0) { + std::printf("[SIL] FAULT active: %s (%s)\n", m->name, m->description); + } + } +} + +} // namespace + +/* Ensure the live server socket is closed on every early return path. */ +struct LiveServerGuard { + ~LiveServerGuard() { sil_live_stop(); } /* safe when never started */ +}; + +int main(int argc, char** argv) { + const char* scenario_path = "scenarios/sil_foc_demo.json"; + float realtime = 0.0f; + bool realtime_set = false; + bool live = false; + uint16_t live_port = SIL_LIVE_DEFAULT_PORT; + + for (int i = 1; i < argc; ++i) { + const char* arg = argv[i]; + if (std::strcmp(arg, "--realtime") == 0) { + if (++i >= argc) { + std::fprintf(stderr, "missing value for --realtime\n"); + return 1; + } + realtime = static_cast(std::atof(argv[i])); + realtime_set = true; + } else if (std::strcmp(arg, "--live") == 0) { + live = true; + } else if (std::strcmp(arg, "--port") == 0) { + if (++i >= argc) { + std::fprintf(stderr, "missing value for --port\n"); + return 1; + } + const int p = std::atoi(argv[i]); + if (p < 1 || p > 65535) { + std::fprintf(stderr, "invalid port: %s\n", argv[i]); + return 1; + } + live_port = static_cast(p); + } else if (std::strcmp(arg, "--help") == 0 || std::strcmp(arg, "-h") == 0) { + std::fprintf(stderr, + "usage: %s [scenario.json] [--realtime N] " + "[--live [--port P]]\n", + argv[0]); + return 0; + } else if (arg[0] != '-') { + scenario_path = arg; + } else { + std::fprintf(stderr, "unknown argument: %s\n", arg); + return 1; + } + } + + /* --live is meant to be watched from RTEStudio; default to realtime + * pacing (an explicit --realtime still wins). */ + if (live && !realtime_set) { + realtime = 1.0f; + } + + std::string err; + if (!sil::LoadScenario(scenario_path, g_scn, err)) { + std::fprintf(stderr, "[SIL] %s\n", err.c_str()); + return 1; + } + + /* Scheduled shell commands, sorted by absolute sim time (stable for + * equal times). */ + g_commands = g_scn.commands; + std::stable_sort(g_commands.begin(), g_commands.end(), + [](const auto& a, const auto& b) { return a.first < b.first; }); + g_cmd_next = 0; + + /* Plant + static world config. */ + { + hostsim::MotorParams mp; + mp.rs_ohm = g_scn.rs_ohm; + mp.ld_h = g_scn.ld_h; + mp.lq_h = g_scn.lq_h; + mp.flux_wb = g_scn.flux_wb; + mp.pole_pairs = g_scn.pole_pairs; + mp.inertia_kg_m2 = g_scn.inertia_kg_m2; + mp.friction_nm_per_rad_s = g_scn.friction_nm_per_rad_s; + mp.vdc_v = g_scn.vdc_v; + if (g_scn.machine == "induction") mp.machine = hostsim::MachineType::Induction; + mp.rr_ohm = g_scn.rr_ohm; + mp.lm_h = g_scn.lm_h; + mp.lls_h = g_scn.lls_h; + mp.llr_h = g_scn.llr_h; + silWorld().plant.SetParams(mp); + silWorld().plant.Reset(); + silWorld().vdc_v = g_scn.vdc_v; + } + + g_sched.app_period_us = 1.0e6 / static_cast(g_scn.app_loop_hz); + + sil_fram_attach(g_scn.fram_image.empty() ? nullptr : g_scn.fram_image.c_str()); + sil_hal_init(); + silFwConsoleReset(); + + FILE* trace = std::fopen(g_scn.trace_csv.c_str(), "w"); + if (trace == nullptr) { + std::fprintf(stderr, "[SIL] cannot open trace_csv %s\n", + g_scn.trace_csv.c_str()); + return 1; + } + std::fputs(SIL_TRACE_HEADER, trace); + g_trace = trace; /* rows are emitted time-driven from fastTick() */ + + std::printf("[SIL] scenario=%s duration=%.2f s app_loop=%.0f Hz trace=%s\n", + scenario_path, static_cast(g_scn.duration_s), + static_cast(g_scn.app_loop_hz), + g_scn.trace_csv.c_str()); + std::printf("[SIL] motor: %s rs=%.4f ohm ld=%.1f uH lq=%.1f uH flux=%.4f Wb " + "pp=%d J=%.2e B=%.2e vdc=%.1f\n", + g_scn.machine.c_str(), + static_cast(g_scn.rs_ohm), + static_cast(g_scn.ld_h) * 1e6, + static_cast(g_scn.lq_h) * 1e6, + static_cast(g_scn.flux_wb), g_scn.pole_pairs, + static_cast(g_scn.inertia_kg_m2), + static_cast(g_scn.friction_nm_per_rad_s), + static_cast(g_scn.vdc_v)); + + /* Announce configured fault injections and scheduled shell commands. */ + { + auto window = [](float t0, float dur) -> std::string { + char buf[64]; + if (dur > 0.0f) { + std::snprintf(buf, sizeof(buf), "@%.3f s for %.3f s", + static_cast(t0), static_cast(dur)); + } else { + std::snprintf(buf, sizeof(buf), "@%.3f s (latching)", + static_cast(t0)); + } + return buf; + }; + if (g_scn.vdc_glitch_time_s >= 0.0f) + std::printf("[SIL] fault cfg: vdc_glitch to %.1f V %s\n", + static_cast(g_scn.vdc_glitch_v), + window(g_scn.vdc_glitch_time_s, g_scn.vdc_glitch_duration_s).c_str()); + if (g_scn.oc_inject_time_s >= 0.0f) + std::printf("[SIL] fault cfg: oc_inject %.1f A phase %d %s\n", + static_cast(g_scn.oc_inject_a), g_scn.oc_inject_phase, + window(g_scn.oc_inject_time_s, g_scn.oc_inject_duration_s).c_str()); + if (g_scn.encoder_freeze_time_s >= 0.0f) + std::printf("[SIL] fault cfg: encoder_freeze %s\n", + window(g_scn.encoder_freeze_time_s, g_scn.encoder_freeze_duration_s).c_str()); + if (g_scn.encoder_loss_time_s >= 0.0f) + std::printf("[SIL] fault cfg: encoder_loss %s\n", + window(g_scn.encoder_loss_time_s, g_scn.encoder_loss_duration_s).c_str()); + if (g_scn.temp_spike_time_s >= 0.0f) + std::printf("[SIL] fault cfg: temp_spike ch%d to %.1f C %s\n", + g_scn.temp_spike_channel, + static_cast(g_scn.temp_spike_c), + window(g_scn.temp_spike_time_s, g_scn.temp_spike_duration_s).c_str()); + for (const auto& [t_s, line] : g_commands) + std::printf("[SIL] command cfg: @%.3f s: %s\n", + static_cast(t_s), line.c_str()); + } + + /* --- Boot the firmware on its own thread. --- */ + LiveServerGuard live_guard; + if (live && !sil_live_start("127.0.0.1", live_port)) { + std::fprintf(stderr, "[SIL] --live requested but the listen socket " + "failed (see above); running without live link\n"); + } + sil_rt_start_firmware(); + g_failed = !sil_rt_idle_to_gate(fastTick); + if (g_failed) { + std::fprintf(stderr, "[SIL] firmware failed during boot: %s\n", + sil_rt_fw_error()); + std::fclose(trace); + sil_rt_shutdown(); + return 2; + } + std::printf("[SIL] firmware boot complete at t=%.3f s (sim)\n", + static_cast(sil_rt_now_us()) / 1e6); + g_boot_done = true; /* trace rows run from here on (fastTick-gated) */ + + /* Post-boot config seeds (graph config live values + FRAM persistence). */ + if (!g_scn.firmware_config.empty()) { + sil_rt_post(&applyFirmwareConfig); + if (!sil_rt_run_app_iteration(fastTick)) { + std::fprintf(stderr, "[SIL] firmware died applying config: %s\n", + sil_rt_fw_error()); + std::fclose(trace); + sil_rt_shutdown(); + return 2; + } + } + + /* Main scheduling loop. */ + const uint64_t end_us = + static_cast(g_scn.duration_s * 1.0e6); + const auto wall0 = std::chrono::steady_clock::now(); + const double wall_rate = (realtime > 0.0f) ? static_cast(realtime) + : 0.0; + + while (sil_rt_now_us() < end_us) { + const uint64_t now = sil_rt_now_us(); + + /* Due scenario shell commands (posted as one firmware-context call + * per due batch; sil_rt_post is a FIFO, so a batch shares the app + * period safely with the control-start post below and everything + * runs in post order at the next gate). The "shell>" log lines + * print on execution (see runShellLines). */ + if (g_cmd_next < g_commands.size() && + static_cast(g_commands[g_cmd_next].first) * 1.0e6 <= + static_cast(now) + 1.0) { + auto due_lines = std::make_shared>(); + while (g_cmd_next < g_commands.size() && + static_cast(g_commands[g_cmd_next].first) * 1.0e6 <= + static_cast(now) + 1.0) { + due_lines->push_back(g_commands[g_cmd_next].second); + ++g_cmd_next; + } + auto keepalive = due_lines; + const auto* lines_ptr = due_lines.get(); + sil_rt_post([keepalive, lines_ptr]() { runShellLines(lines_ptr); }); + } + + /* Control engagement at the scenario time. */ + if (g_scn.control_start && !g_sched.control_posted && + now >= static_cast(g_scn.control_start_time_s * 1.0e6)) { + sil_rt_post(&engageControl); + g_sched.control_posted = true; + /* It executes at the next app-gate entry below. */ + } + + /* App-loop boundary. */ + if (static_cast(now) >= g_sched.next_app_us) { + updateThrottleVoltages(); + silUartPumpTxCompletion(); + sil_live_poll(); + silUartRxPoll(); /* deliver live-link client bytes to the shell */ + if (!sil_rt_run_app_iteration(fastTick)) { + std::fprintf(stderr, "[SIL] firmware died in main loop: %s\n", + sil_rt_fw_error()); + g_failed = true; + break; + } + g_sched.next_app_us = static_cast(sil_rt_now_us()) + + g_sched.app_period_us; + + /* Host-side health check after control start. */ + if (g_sched.control_posted) { + auto& sup = Inverter::ControlSupervisor::instance(); + static bool s_reported = false; + if (!s_reported) { + std::printf("[SIL] control state at t=%.3f s: %s " + "(faults active: %s)\n", + static_cast(sil_rt_now_us()) / 1e6, + sup.stateName(), + Inverter::FaultManager::instance().isActive() + ? "YES" : "no"); + if (!sup.isRunning()) { + std::fprintf(stderr, + "[SIL] ERROR: control failed to start\n"); + Inverter::FaultManager::instance().printSummary(); + g_failed = true; + break; + } + s_reported = true; + } + } + continue; + } + + fastTick(); + + /* Realtime pacing once per simulated millisecond. */ + if (wall_rate > 0.0 && (sil_rt_now_us() % 1000ULL) == 0ULL) { + const double sim_s = static_cast(sil_rt_now_us()) / 1e6; + const double wall_s = + std::chrono::duration(std::chrono::steady_clock::now() - + wall0).count(); + const double ahead_s = wall_s * wall_rate - sim_s; + if (ahead_s < 0.0) { + std::this_thread::sleep_for( + std::chrono::duration(-ahead_s / wall_rate)); + } + } + } + + std::fclose(trace); + + /* Diagnostics + teardown. */ + if (g_failed) { + sil_fram_detach_save(); + sil_rt_shutdown(); + return 2; + } + + std::printf("[SIL] simulation complete at t=%.3f s (sim)\n", + static_cast(sil_rt_now_us()) / 1e6); + { + pollFaultTransitions(); /* drain any late raise from the last tick */ + auto& sup = Inverter::ControlSupervisor::instance(); + std::printf("[SIL] final control state: %s (faults: %s)\n", + sup.stateName(), + Inverter::FaultManager::instance().isActive() ? "YES" : "no"); + printActiveFaults(); + if (g_fault_history.empty()) { + std::printf("[SIL] fault history: none raised this run\n"); + } else { + std::printf("[SIL] fault history (%zu trips raised this run):\n", + g_fault_history.size()); + for (const FaultTrip& trip : g_fault_history) { + std::printf("[SIL] t=%.3f [%c] %s (%s)\n", + trip.t_s, trip.severity, trip.source, + trip.description); + } + } + } + + sil_fram_detach_save(); + sil_rt_shutdown(); + return 0; +} diff --git a/Images/HostSIL/src/scenario.cpp b/Images/HostSIL/src/scenario.cpp new file mode 100644 index 00000000..c8996236 --- /dev/null +++ b/Images/HostSIL/src/scenario.cpp @@ -0,0 +1,298 @@ +/* + * scenario.cpp — hand-rolled JSON extraction in the same style as + * Images/HostSim/src/sim_runtime.cpp (Trim/ExtractString/ExtractNumber/ + * ExtractObject), extended with a flat object enumerator for + * firmware_config KV seeds. + */ +#include "scenario.h" + +#include +#include +#include +#include + +namespace sil { + +float ScalarProfile::at(float t_s) const { + if (type == "ramp") { + if (t_s <= start_s) return start; + if (t_s >= end_s) return end; + if (end_s <= start_s) return end; + const float f = (t_s - start_s) / (end_s - start_s); + return start + f * (end - start); + } + if (type == "step") { + return (t_s >= step_time_s) ? step_value : value; + } + return value; +} + +namespace { + +std::string Trim(const std::string& s) { + size_t b = 0; + while (b < s.size() && std::isspace(static_cast(s[b]))) ++b; + size_t e = s.size(); + while (e > b && std::isspace(static_cast(s[e - 1]))) --e; + return s.substr(b, e - b); +} + +std::string ExtractString(const std::string& blob, const std::string& key) { + const std::string needle = "\"" + key + "\""; + const size_t pos = blob.find(needle); + if (pos == std::string::npos) return {}; + const size_t colon = blob.find(':', pos); + const size_t q1 = blob.find('"', colon); + const size_t q2 = blob.find('"', q1 + 1); + if (q1 == std::string::npos || q2 == std::string::npos) return {}; + return blob.substr(q1 + 1, q2 - q1 - 1); +} + +/* Index just past the closing quote of the JSON string whose opening quote + * sits at `open`, honoring backslash escapes (\" must not terminate the + * value). npos when unterminated. Shared scanner primitive: the readers + * below must never treat quotes/braces inside a string literal as syntax. */ +size_t StringEnd(const std::string& s, size_t open) { + for (size_t i = open + 1; i < s.size(); ++i) { + if (s[i] == '\\') { ++i; continue; } + if (s[i] == '"') return i + 1; + } + return std::string::npos; +} + +bool ExtractNumber(const std::string& blob, const std::string& key, float* out) { + const std::string needle = "\"" + key + "\""; + const size_t pos = blob.find(needle); + if (pos == std::string::npos) return false; + const size_t colon = blob.find(':', pos); + if (colon == std::string::npos) return false; + const char* start = blob.c_str() + colon + 1; + char* end = nullptr; + const float v = std::strtof(start, &end); + if (end == start) return false; + if (out) *out = v; + return true; +} + +std::string ExtractObject(const std::string& blob, const std::string& key) { + const std::string needle = "\"" + key + "\""; + const size_t pos = blob.find(needle); + if (pos == std::string::npos) return {}; + const size_t brace = blob.find('{', pos); + if (brace == std::string::npos) return {}; + /* Match braces while skipping quoted regions wholesale (a '{' inside a + * string value — e.g. a "commands" line — must not corrupt the count). */ + int depth = 0; + for (size_t i = brace; i < blob.size(); ++i) { + if (blob[i] == '"') { + const size_t end = StringEnd(blob, i); + if (end == std::string::npos) return {}; + i = end - 1; + continue; + } + if (blob[i] == '{') ++depth; + if (blob[i] == '}') { + --depth; + if (depth == 0) return blob.substr(brace, i - brace + 1); + } + } + return {}; +} + +bool ExtractBool(const std::string& blob, const std::string& key, bool* out) { + const std::string needle = "\"" + key + "\""; + const size_t pos = blob.find(needle); + if (pos == std::string::npos) return false; + const size_t colon = blob.find(':', pos); + if (colon == std::string::npos) return false; + const std::string rest = Trim(blob.substr(colon + 1)); + if (rest.rfind("true", 0) == 0) { *out = true; return true; } + if (rest.rfind("false", 0) == 0) { *out = false; return true; } + return false; +} + +/* Enumerate "key": number pairs in a flat object blob. + * String values would otherwise alias the next pair's colon (a value in + * quotes is not a number): skip them instead. */ +void EnumerateKv(const std::string& blob, + std::vector>& out) { + size_t i = 0; + while (i < blob.size()) { + const size_t q1 = blob.find('"', i); + if (q1 == std::string::npos) break; + const size_t q2 = StringEnd(blob, q1); + if (q2 == std::string::npos) break; + const std::string key = blob.substr(q1 + 1, q2 - q1 - 2); + const size_t colon = blob.find(':', q2); + if (colon == std::string::npos) break; + size_t start = colon + 1; + while (start < blob.size() && + std::isspace(static_cast(blob[start]))) ++start; + if (start < blob.size() && blob[start] == '"') { + /* String value: skip it wholesale so neither its colon nor its + * braces can alias the next pair's syntax. */ + const size_t vend = StringEnd(blob, start); + i = (vend != std::string::npos) ? vend : blob.size(); + continue; + } + char* end = nullptr; + const float v = std::strtof(blob.c_str() + start, &end); + if (end != blob.c_str() + start) { + out.emplace_back(key, v); + } + i = colon + 1; + } +} + +/* Enumerate "key": "string-value" pairs in a flat object blob — the string + * counterpart of EnumerateKv (used for the "commands" schedule). Keys and + * values with backslash escapes are tolerated for scanning purposes (the + * extracted value keeps its raw, escape-encoded text). */ +void EnumerateStringKv(const std::string& blob, + std::vector>& out) { + size_t i = 0; + while (i < blob.size()) { + const size_t q1 = blob.find('"', i); + if (q1 == std::string::npos) break; + const size_t q2 = StringEnd(blob, q1); + if (q2 == std::string::npos) break; + const std::string key = blob.substr(q1 + 1, q2 - q1 - 2); + const size_t colon = blob.find(':', q2); + if (colon == std::string::npos) break; + size_t start = colon + 1; + while (start < blob.size() && + std::isspace(static_cast(blob[start]))) ++start; + if (start >= blob.size() || blob[start] != '"') { + /* Non-string value: let EnumerateKv-style parsing own it. */ + i = colon + 1; + continue; + } + const size_t vend = StringEnd(blob, start); + if (vend == std::string::npos) break; + out.emplace_back(key, blob.substr(start + 1, vend - start - 2)); + i = vend; + } +} + +ScalarProfile ParseProfile(const std::string& blob) { + ScalarProfile p{}; + const std::string t = ExtractString(blob, "type"); + if (t == "ramp") p.type = "ramp"; + else if (t == "step") p.type = "step"; + else p.type = "constant"; + float v = 0.0f; + if (ExtractNumber(blob, "value", &v)) p.value = v; + if (ExtractNumber(blob, "start", &v)) p.start = v; + if (ExtractNumber(blob, "end", &v)) p.end = v; + if (ExtractNumber(blob, "start_s", &v)) p.start_s = v; + if (ExtractNumber(blob, "end_s", &v)) p.end_s = v; + if (ExtractNumber(blob, "step_time_s", &v)) p.step_time_s = v; + if (ExtractNumber(blob, "step_value", &v)) p.step_value = v; + return p; +} + +} // namespace + +bool LoadScenario(const char* path, Scenario& out, std::string& error) { + std::ifstream f(path); + if (!f) { + error = std::string("cannot open scenario: ") + path; + return false; + } + std::ostringstream ss; + ss << f.rdbuf(); + const std::string blob = ss.str(); + + float v = 0.0f; + bool b = false; + + const std::string motor = ExtractObject(blob, "motor"); + if (!motor.empty()) { + if (ExtractNumber(motor, "rs_ohm", &v)) out.rs_ohm = v; + if (ExtractNumber(motor, "ld_h", &v)) out.ld_h = v; + if (ExtractNumber(motor, "lq_h", &v)) out.lq_h = v; + if (ExtractNumber(motor, "flux_wb", &v)) out.flux_wb = v; + if (ExtractNumber(motor, "pole_pairs", &v)) out.pole_pairs = (int)v; + if (ExtractNumber(motor, "inertia_kg_m2", &v)) out.inertia_kg_m2 = v; + if (ExtractNumber(motor, "friction_nm_per_rad_s", &v)) out.friction_nm_per_rad_s = v; + if (ExtractNumber(motor, "vdc_v", &v)) out.vdc_v = v; + const std::string machine = ExtractString(motor, "machine"); + if (!machine.empty()) out.machine = machine; + if (ExtractNumber(motor, "rr_ohm", &v)) out.rr_ohm = v; + if (ExtractNumber(motor, "lm_h", &v)) out.lm_h = v; + if (ExtractNumber(motor, "lls_h", &v)) out.lls_h = v; + if (ExtractNumber(motor, "llr_h", &v)) out.llr_h = v; + } + + const std::string sim = ExtractObject(blob, "simulation"); + if (!sim.empty()) { + if (ExtractNumber(sim, "duration_s", &v)) out.duration_s = v; + if (ExtractNumber(sim, "app_loop_hz", &v)) out.app_loop_hz = v; + const std::string csv = ExtractString(sim, "trace_csv"); + if (!csv.empty()) out.trace_csv = csv; + if (ExtractNumber(sim, "trace_decim_us", &v)) out.trace_decim_us = v; + if (ExtractNumber(sim, "pwm_switching_hz", &v)) out.pwm_switching_hz = v; + /* Accepted for schema compatibility with HostSim; the SIL scheduler + * derives the actual ISR rates from the firmware's PWM state. */ + } + + const std::string thr_a = ExtractObject(blob, "throttle_a"); + if (!thr_a.empty()) out.throttle_a = ParseProfile(thr_a); + const std::string thr_b = ExtractObject(blob, "throttle_b"); + if (!thr_b.empty()) { + out.throttle_b = ParseProfile(thr_b); + out.throttle_b_set = true; + } + + const std::string ctl = ExtractObject(blob, "control"); + if (!ctl.empty()) { + if (ExtractBool(ctl, "start", &b)) out.control_start = b; + if (ExtractNumber(ctl, "iq_a", &v)) out.iq_a = v; + if (ExtractNumber(ctl, "id_a", &v)) out.id_a = v; + if (ExtractNumber(ctl, "start_time_s", &v)) out.control_start_time_s = v; + } + + const std::string cfg = ExtractObject(blob, "firmware_config"); + if (!cfg.empty()) { + EnumerateKv(cfg, out.firmware_config); + } + + const std::string faults = ExtractObject(blob, "faults"); + if (!faults.empty()) { + if (ExtractNumber(faults, "vdc_glitch_time_s", &v)) out.vdc_glitch_time_s = v; + if (ExtractNumber(faults, "vdc_glitch_duration_s", &v)) out.vdc_glitch_duration_s = v; + if (ExtractNumber(faults, "vdc_glitch_v", &v)) out.vdc_glitch_v = v; + if (ExtractNumber(faults, "oc_inject_time_s", &v)) out.oc_inject_time_s = v; + if (ExtractNumber(faults, "oc_inject_duration_s", &v)) out.oc_inject_duration_s = v; + if (ExtractNumber(faults, "oc_inject_phase", &v)) out.oc_inject_phase = (int)v; + if (ExtractNumber(faults, "oc_inject_a", &v)) out.oc_inject_a = v; + if (ExtractNumber(faults, "encoder_freeze_time_s", &v)) out.encoder_freeze_time_s = v; + if (ExtractNumber(faults, "encoder_freeze_duration_s", &v)) out.encoder_freeze_duration_s = v; + if (ExtractNumber(faults, "encoder_loss_time_s", &v)) out.encoder_loss_time_s = v; + if (ExtractNumber(faults, "encoder_loss_duration_s", &v)) out.encoder_loss_duration_s = v; + if (ExtractNumber(faults, "temp_spike_time_s", &v)) out.temp_spike_time_s = v; + if (ExtractNumber(faults, "temp_spike_duration_s", &v)) out.temp_spike_duration_s = v; + if (ExtractNumber(faults, "temp_spike_channel", &v)) out.temp_spike_channel = (int)v; + if (ExtractNumber(faults, "temp_spike_c", &v)) out.temp_spike_c = v; + } + + const std::string commands = ExtractObject(blob, "commands"); + if (!commands.empty()) { + std::vector> kv; + EnumerateStringKv(commands, kv); + for (const auto& [k, line] : kv) { + char* end = nullptr; + const float t = std::strtof(k.c_str(), &end); + if (end != k.c_str() && *end == '\0') { + out.commands.emplace_back(t, line); + } + } + } + + const std::string fram = ExtractString(blob, "fram_image"); + if (!fram.empty()) out.fram_image = fram; + + return true; +} + +} // namespace sil diff --git a/Images/HostSIL/src/scenario.h b/Images/HostSIL/src/scenario.h new file mode 100644 index 00000000..6a790a1b --- /dev/null +++ b/Images/HostSIL/src/scenario.h @@ -0,0 +1,123 @@ +/* + * scenario.h — HostSIL scenario description (mirrors the HostSim JSON + * schema style). + */ +#ifndef SIL_SCENARIO_H +#define SIL_SCENARIO_H + +#include +#include +#include + +namespace sil { + +struct ScalarProfile { + /* type: "constant" (value), "ramp" (start->end over + * [start_s,end_s]), "step" (value, then step_value at step_time_s). */ + std::string type = "constant"; + float value = 0.0f; + float start = 0.0f; + float end = 0.0f; + float start_s = 0.0f; + float end_s = 0.0f; + float step_time_s = 0.0f; + float step_value = 0.0f; + + float at(float t_s) const; +}; + +struct Scenario { + /* motor */ + float rs_ohm = 0.05f; + float ld_h = 1.0e-4f; + float lq_h = 1.0e-4f; + float flux_wb = 0.008f; + int pole_pairs = 7; + float inertia_kg_m2 = 1.0e-3f; + float friction_nm_per_rad_s = 1.0e-3f; + float vdc_v = 48.0f; + /* Machine selection mirrors HostSim's motor.machine: "pmsm" (default) or + * "induction"; the rr/lm/lls/llr fields only apply to induction. */ + std::string machine = "pmsm"; + float rr_ohm = 0.3f; + float lm_h = 0.025f; + float lls_h = 0.002f; + float llr_h = 0.002f; + + /* simulation */ + float duration_s = 2.0f; + float app_loop_hz = 1000.0f; + float trace_decim_us = 500.0f; /* trace row period [us] */ + float pwm_switching_hz = 0.0f; /* 0: leave firmware default */ + std::string trace_csv = "sil_trace.csv"; + std::string fram_image; /* optional FRAM backing file */ + + /* throttle profiles (normalized [0..1]) */ + ScalarProfile throttle_a; + ScalarProfile throttle_b; + bool throttle_b_set = false; /* false: mirror channel A */ + + /* control engagement after boot */ + bool control_start = true; + float control_start_time_s = 1.6f; /* absolute sim time */ + float iq_a = 8.0f; + float id_a = 0.0f; + + /* firmware config KV seeds applied post-boot (config set/save). */ + std::vector> firmware_config; + + /* Scheduled firmware shell commands ("commands": {"": ""}): + * each line is run through CommandManager::processLine exactly like a + * typed shell command (e.g. "maxcfg_uv 20.0", "foc start 8 0"). */ + std::vector> commands; + + /* Fault injection ("faults" block). Every fault is a time window + * [time_s, time_s + duration_s); duration_s <= 0 latches to the end of + * the run. A negative time_s (the default) disables the fault. The + * injection enters through the modeled sensor/actuator surface, never + * through the firmware, so the fault response (FaultManager source + reason) + * is produced by the firmware itself: + * + * vdc_glitch_* DC-link bus sag seen by the MAX22530 sense channel + * (and the plant). Arms the firmware UV/OV comparator + * via shell ("maxcfg_uv ") to trip Max22530Uv/Ov. + * oc_inject_* Phase-current spike added at the ADC counts level + * (sil_phase_current_adc); 3 consecutive over-threshold + * injected samples raise PhaseOvercurrent (software OC, + * default threshold 500 A, "ocset" to change). + * encoder_freeze_* Encoder sample stream stalls (no new DMA samples); + * trips firmware staleness checks (ENCODER_STALE_MS in + * FocControlManager — legacy `foc start` path). + * encoder_loss_* Sin/cos outputs collapse to the bias mid (sensor + * excitation loss); trips EncoderAmplitude in + * EncoderADC::diagnose (Warning severity). + * temp_spike_* Drives one temperature channel (0..2 board, 3 motor) + * to temp_c, through the sensor curve + divider model; + * trips Overtemperature* after the firmware's sustain + * window (500 ms). */ + float vdc_glitch_time_s = -1.0f; + float vdc_glitch_duration_s = 0.0f; + float vdc_glitch_v = 0.0f; + + float oc_inject_time_s = -1.0f; + float oc_inject_duration_s = 0.01f; + int oc_inject_phase = 0; /* 0 = U, 1 = V, 2 = W */ + float oc_inject_a = 600.0f; + + float encoder_freeze_time_s = -1.0f; + float encoder_freeze_duration_s = 0.0f; + + float encoder_loss_time_s = -1.0f; + float encoder_loss_duration_s = 0.1f; + + float temp_spike_time_s = -1.0f; + float temp_spike_duration_s = 0.0f; + int temp_spike_channel = 3; /* 0..2 = board, 3 = motor */ + float temp_spike_c = 200.0f; +}; + +bool LoadScenario(const char* path, Scenario& out, std::string& error); + +} // namespace sil + +#endif diff --git a/Images/HostSim/.gitignore b/Images/HostSim/.gitignore new file mode 100644 index 00000000..9668f6a8 --- /dev/null +++ b/Images/HostSim/.gitignore @@ -0,0 +1,3 @@ +trace.csv +build/ +build*/ diff --git a/Images/HostSim/CMakeLists.txt b/Images/HostSim/CMakeLists.txt new file mode 100644 index 00000000..58211e90 --- /dev/null +++ b/Images/HostSim/CMakeLists.txt @@ -0,0 +1,60 @@ +cmake_minimum_required(VERSION 3.24) +project(HostSim LANGUAGES CXX C) + +set(CMAKE_CXX_STANDARD 20) +set(CMAKE_CXX_STANDARD_REQUIRED ON) +set(CMAKE_CXX_EXTENSIONS OFF) + +set(IVP_ROOT "${CMAKE_CURRENT_SOURCE_DIR}/../../Lib/InverterProtocol") +if(NOT EXISTS "${IVP_ROOT}/include/inverter_protocol/protocol.h") + message(FATAL_ERROR "InverterProtocol not found at ${IVP_ROOT}") +endif() + +file(GLOB GENERATED_SOURCES CONFIGURE_DEPENDS + "${CMAKE_CURRENT_SOURCE_DIR}/generated/domain_*_generated.cpp" +) + +if(EXISTS "${CMAKE_CURRENT_SOURCE_DIR}/generated/bridges_generated.cpp") + list(APPEND GENERATED_SOURCES + "${CMAKE_CURRENT_SOURCE_DIR}/generated/bridges_generated.cpp") +endif() + +add_executable(host_sim + src/main.cpp + src/can_bridge.cpp + src/current_observer.cpp + src/platform_api.cpp + src/sim_runtime.cpp + src/motor_model.cpp + src/pwm_scope.cpp + src/plant/plant_backend.cpp + src/plant/ngspice_plant.cpp + src/telemetry_publisher.cpp + src/realtime_platform.cpp + # Portable IVP C core (no host serial layer needed for the publisher). + "${IVP_ROOT}/src/protocol.c" + "${IVP_ROOT}/src/packet_builder.c" + "${IVP_ROOT}/src/packet_parser.c" + ${GENERATED_SOURCES} +) + +target_include_directories(host_sim PRIVATE + ${CMAKE_CURRENT_SOURCE_DIR}/include + ${CMAKE_CURRENT_SOURCE_DIR}/generated + ${CMAKE_CURRENT_SOURCE_DIR}/src + "${IVP_ROOT}/include" +) + +if(WIN32) + target_link_libraries(host_sim PRIVATE ws2_32 winmm avrt) +endif() + +if(UNIX) + target_link_libraries(host_sim PRIVATE m dl) +endif() + +if(MSVC) + target_compile_options(host_sim PRIVATE /W4 /wd4200) +else() + target_compile_options(host_sim PRIVATE -Wall -Wextra -Wpedantic) +endif() diff --git a/Images/HostSim/README.md b/Images/HostSim/README.md new file mode 100644 index 00000000..ed0851e6 --- /dev/null +++ b/Images/HostSim/README.md @@ -0,0 +1,455 @@ +# HostSim — upstream-compatible host simulator base image + +> Overview of both simulators, `rte sim`, the live GUI loop, and the ngspice +> backend: [docs/simulation.md](../../docs/simulation.md). + +Host-side base image for `RTECodeEmitter`. Generated domain code calls +`platform_api.h` only; motor plant, sensor injection, and scheduling live in +this base image. + +## Architecture + +HostSim is a **software-in-the-loop (SIL)** simulator, not an interpreter: + +```text +Node graph JSON + │ + ▼ +RTECodeEmitter ──► generates C++ for tim_isr / adc_isr / app_loop + │ + ▼ +cmake --build ──► host_sim executable + │ + ▼ +compiled control loop ──► platform_api.h ──► plant backend + │ │ + │ ┌───────────────────────────────┘ + │ ▼ + │ OdePlant (default) ── discrete PMSM ODE + │ NgspicePlant (experimental) ── libngspice circuit sim + │ + ▼ +telemetry → RTEStudio / CSV +``` + +The control code inside `host_sim` is the **same compiled firmware** that runs +on the STM32 images. The only difference is the base image underneath it: +HostSim provides simulator implementations of `platform_pwm_set()`, +`platform_get_phase_currents()`, etc., instead of STM32 HAL drivers. + +The default plant is a fast discrete machine ODE (`src/motor_model.cpp`): +a salient PMSM (per-axis Ld/Lq and the (Ld−Lq)·id·iq reluctance torque term) +or a squirrel-cage **induction** machine (`src/induction_model.h`, stationary +αβ frame), selected per scenario with `motor.machine`. An +optional **ngspice** backend exists (`src/plant/ngspice_plant.cpp`) but is +experimental, supports electrical RL / PMSM-backEMF netlists only (no +induction machine — it falls back to the ODE plant with a stderr notice), +and is not the default. + +## Domains + +| Domain | Default rate | Host location | +|--------|--------------|---------------| +| `tim_isr` | 10 kHz | `SimRuntime::StepOnce()` | +| `adc_isr` | 10 kHz | `SimRuntime::StepOnce()` | +| `app_loop` | 1 kHz | `SimRuntime::StepOnce()` | + +Rates are configurable in the scenario JSON (`scenarios/default_motor.json`). + +## RTE_EMIT markers + +| File | Markers | +|------|---------| +| `include/AppState.h` | `app_loop`, `tim_isr`, `adc_isr` **state** | +| `src/sim_runtime.cpp` | all three **init** and **step** | + +## Quick start (base image only) + +```powershell +cd Images\HostSim +cmake -S . -B build +cmake --build build +.\build\Debug\host_sim.exe scenarios\default_motor.json +``` + +Writes `trace.csv` with columns: +`time_us, throttle_a, throttle_b, duty_u, duty_v, duty_w, i_a, i_b, i_c, theta_e, omega_e`. + +## Emit-and-run (graph + codegen) + +From repo root (WSL for `RTECodeEmitter`): + +```powershell +powershell -File Images\HostSim\scripts\emit_and_run.ps1 +``` + +Or on Linux/macOS: + +```bash +./Images/HostSim/scripts/emit_and_run.sh +``` + +This copies `Images/HostSim` to `build/hostsim_emitted`, runs `RTECodeEmitter` with +`baseline_graph.json`, and builds the emitted tree with CMake. + +## Scenario file + +Motor parameters are **not** hardcoded to a specific machine. Edit +`scenarios/default_motor.json` (or pass another file as argv[1]): + +- `motor.*` — machine model parameters + - `machine` — `"pmsm"` (default) or `"induction"` (squirrel cage, stationary + αβ model in `src/induction_model.h`) + - shared: `rs_ohm`, `pole_pairs`, `inertia_kg_m2`, `friction_nm_per_rad_s`, + `vdc_v` (friction/inertia act on the *electrical* speed, the simulator's + convention for both machines) + - PMSM: `ld_h`, `lq_h`, `flux_wb` — Ld≠Lq gives the plant the reluctance + torque term exercised by `scenarios/salient_pmsm.json` (and by + `Assets/Examples/foc_mtpa_demo.json`'s MTPA reference) + - induction: `rr_ohm`, `lm_h`, `lls_h`, `llr_h` (Ls=Lm+Lls, Lr=Lm+Llr) +- `vars.*` — graph **Var node seeds** (`{"TargetHz": 40.0}`), applied to the + emitted graph's `Stored` state after domain init — the batch-mode equivalent + of the live firmware's `var set` (e.g. `TargetHz` in the induction_vhz + example). Names that match no Var node are warned about and ignored. +- `throttle_a` / `throttle_b` — `constant`, `ramp`, or `step` profiles +- `simulation.duration_s`, `trace_csv`, domain rates +- `simulation.demo_fallback` — opt-in legacy open-loop SPWM synthesized by the + scheduler when no graph node drives `platform_pwm_set` (default **false**; + when off and duties stay at 0 despite non-zero throttle, HostSim logs a + warning once). Only `default_motor.json` enables it, for plant bring-up + without a graph. +- `simulation.config_file` — backing file for the `platform_config_*` key/value + store (`key=value` lines, preloaded at startup, flushed on every set); + absent = in-memory only. +- `adc.*` — phase-current ADC model error terms; absent = ideal behaviour. + `resolution_bits` (16), `vref_v` (3.3), `ref_v` (1.65), `divider` (2/3), + `sensitivity_v_per_a` (1.042e-3), `gain_error` (1.0), `offset_u_a`, + `offset_v_a`, `noise_std_a` — defaults in parentheses come from the Gen6 + signal-chain constants in `include/RteParams.h`. +- `environment.*` — `motor_temp_c` (25), `inverter_temp_c` (25) surfaced by the + platform temperature APIs. +- `faults.*` — simple triggers surfaced via `platform_has_critical_fault()`: + `overcurrent_a` (trip when any |i_phase| exceeds), `undervoltage_v` (trip + when the DC link drops below), `vdc_glitch_time_s` + `vdc_glitch_v` (timed + DC-link drop applied to both control code and plant). +- `can.*` — `loopback` (default true: frames sent via `platform_can_send` are + readable via `platform_can_rx`, latest-frame store keyed by (bus, id)) and + `frames`: scheduled injected traffic, e.g. + `{"bus": 1, "id": 291, "period_s": 0.01, "start_s": 0.1, "data": "DEADBEEF"}` + (numeric id accepts decimal or `0x` hex; `data` is a hex string, ≤ 8 bytes; + `period_s` > 0 repeats, otherwise single shot at `start_s`). + +A comment field documents where to paste calibrated values (e.g. 75-5 bench motor). + +### Machine demos + +- `scenarios/salient_pmsm.json` — salient IPMSM (`ld_h` 500 µH, `lq_h` 1.5 mH, + pp = 7). Run it through any duty-driving graph, e.g. the SPWM demo tree: + the synchronous plant locks to the rotating field with zero steady slip. + Saliency is *torque-producing*: the plant's `(Ld−Lq)·id·iq` term engages + whenever id ≠ 0 — forced directly by the MTPA reference graph + (`Assets/Examples/foc_mtpa_demo.json`, id ref via `Control.Mtpa`) or by the + real firmware FOC (`Images/HostSIL/scenarios/sil_foc_salient.json` with + `control.id_a = −2`, same iq yields ~23 % more speed than with id = 0). +- `scenarios/induction_vhz.json` — 4-pole 48 V squirrel-cage induction machine + under open-loop V/Hz. Run it with the bundled example graph: + + ```bash + ./build/bin/RTECodeEmitter --base-src Images/HostSim \ + --graph Assets/Examples/induction_vhz.json \ + --output build/hostsim_induction_emitted + cmake -S build/hostsim_induction_emitted -B build/hostsim_induction_emitted_build + cmake --build build/hostsim_induction_emitted_build -j + cd build/hostsim_induction_emitted + ../hostsim_induction_emitted_build/host_sim scenarios/induction_vhz.json --realtime 0 + ``` + + The scenario's `vars` block seeds the graph's `TargetHz` (40 Hz) and its + `config_file` (`scenarios/induction_vhz.cfg`) retunes the V/Hz ratio for a + 48 V link. The trace shows the rotor settle just *below* synchronous speed + (measurable slip, ~5 % here) instead of locking to it like the PMSM. + +Both scenarios are exercised by `Tools/tests/run_sim_smoke.sh --only plants`. + +## Platform coupling + +`platform_phase_voltage_u/v/w()` read the terminal voltages the plant actually +applied on its last step (recorded by the ODE motor model from its clamped +duty×Vdc drive), not the requested duties — so telemetry reflects a Vdc glitch +or a live duty override automatically. ADC injected channel reads are +conversion-latched per `adc_isr` tick; CAN `rx`/`send` follow the Gen6 +latest-frame semantics; `platform_critical_enter/exit` are a real recursive +mutex. + +### platform_api coverage notes + +Implemented with Gen6FW (`Images/Gen6FW`) semantics, reading the same plant +state everywhere: + +- **Phase currents** — the full PhaseCurrentADC signal chain modeled in counts + (RteParams.h constants), including the hardware's **inverted sensor wiring** + (sig counts *decrease* with positive phase current — same model as HostSIL's + `sil_phase_current_adc.cpp`). `platform_get_phase_currents()` returns the + latched sensor recovery with the calibrated zero offset removed and W as + `-(U+V)`, exactly like Gen6 `PhaseCurrentADC::sample()`; graphs fix the sign + with their `InvertPolarity` parameter / explicit negation, as on hardware. + `platform_adc_get_burst_sample()` serves the Gen6 `BurstSample` layout (two + points per phase from injected ranks 1/2 and 3/4 — the sim's zero-order-held + latch makes both points identical, so no intra-burst di/dt) with the + latch timestamp in `time_us`. +- **Encoder** — Gen6 sin/cos-encoder semantics: the angle APIs report + **mechanical** degrees in [0, 360) (one sin/cos cycle per mechanical + revolution; the plant integrates the electrical angle, so + `theta_mech = theta_e / pole_pairs`), and `platform_get_encoder_raw_sin/cos()` + render that angle as 16-bit ADC counts (center 32768, amplitude 30000, inside + the driver's 427..65388 hard caps). `platform_get_rpm_mech()` aliases + `platform_get_motor_rpm()` (Gen6: both are `encoderADC().rpmMech()`); + `platform_get_rpm_elec()` is `mech rpm × pole pairs` with encoder sign +1 + (the simulated encoder counts in the positive rotation direction). The sim + reports the exact plant speed instead of the Gen6 EMA-windowed estimate. +- **Adaptive sampling** — `platform_pwm_get_arr()` returns the Gen6 TIM1 + value (27500 ticks at 275 MHz, center-aligned) and + `platform_schedule_adaptive_sample()` is a direct port of Gen6 + `PWM_FindSafeSamplePoint` + its wrapper (1650-tick minimum quiet window, + 0 = bottom-trigger fallback). The sim's conversions stay adc_isr-tick + driven; the firmware's CCR4 side effect has no sim equivalent. +- **Current observer** — `platform_observer_predict/correct`, + `platform_observer_set_motor_params`, + `platform_observer_init_from_calibration`, + `platform_get_observer_currents` and `platform_set/get_use_observer`, used + by the `hw.current_observer` template. The observer itself is a faithful + port of Gen6 `Inverter::CurrentObserver` (`src/current_observer.cpp`; + same predict/correct math and gains as + `Images/Gen6FW/Src/Inverter/Control/CurrentObserver.cpp`). Calibration + semantics as on hardware: `platform_observer_init_from_calibration()` + re-reads the calibration snapshot and resets the state — and here the + scenario `motor` block (`rs_ohm`, `ld_h`, `flux_wb`, `pole_pairs`) plays + the role of Gen6's `MotorCalibration`, seeded at domain init by the runtime + (and re-applied by the node's constructor). For a salient machine the + predictor uses Ld, exactly like Gen6. The prediction dt comes from + `platform_get_current_domain_dt()` (the scheduler now sets it per domain — + see below), so `hw.current_observer` needs no manual `Dt` wiring. + `platform_set/get_use_observer` is a pure flag, as in Gen6: the platform + never gates the observer on it. On hardware the flag is set by the `obs` + shell command and *consumed* by the control path (Gen6 + `FocControlManager::onPwmPeriod()` switches feedback); in a graph the + equivalent is a mux/gate node that calls `platform_get_use_observer()` and + selects between `Sensors.PhaseCurrents`/`hw.phase_currents` output and the + observer currents. Fidelity caveats: the observer estimates against the + same ideal ODE plant that produces the measurements, the ADC latch is + zero-order-held (no intra-burst droop), and no inverter nonidealities + (deadtime, device drops, switching ripple) exist — so estimates converge + within a few control ticks, much faster and cleaner than on hardware where + the observer battles real sensor noise and parameter error. The αβ voltage + vector keeps Gen6's leg-referenced convention (phase-leg average + `duty·vdc`, so the phase-neutral fundamental is half the |vαβ| magnitude) — + identical on hardware and in the sim, so the same disturbance/back-EMF + absorption behaviour applies to both. +- **Domain dt** — `platform_set/get_current_domain_dt()`: the scheduler now + calls the setter before each generated domain step (`tim_dt`, `adc_dt`, + `app_dt` respectively), mirroring the Gen6 ISR wrappers + (`pwm.cpp`/`PhaseCurrentADC.cpp`/`InverterMain.cpp` all set + `platform_set_current_domain_dt()` ahead of `RTE_EMIT: step`). + `hw.current_observer` relies on this for its prediction step. + +Intentionally absent (graphs using these will fail to link — by design, they +need hardware subsystems a position/current sim does not model): + +- **DC-link current/power** — `platform_get_dc_link_current/power()` (the sim + models the DC link as an ideal voltage source). +- **Supplemental trace channels** — `platform_trace_configure8/capture8`, + `platform_trace_register_event/event` (use `Debug.TelemetryLog` / + `TelemetryCurrentSink` instead). + +## Multi-instance CAN bridge + +Concurrently running `host_sim` instances can share one simulated CAN over +localhost TCP (Linux only; on Windows the flags print a notice and the bridge +stays off). Topology is hub-and-spoke: one instance listens, the rest connect, +and the hub rebroadcasts every record it receives to all *other* spokes — so +every participant sees everyone else's frames. Start the hub before the +spokes (batch runs finish in a fraction of a second; a spoke that connects +after the hub has exited runs unbridged by design, see limits below). + +| Flag | Meaning | +|---|---| +| `--can-bridge-listen PORT` | Run as the hub (binds `0.0.0.0:PORT`) | +| `--can-bridge-connect HOST:PORT` | Connect to a hub (dotted IPv4) | +| `--can-bridge-id N` | Instance tag used for loop-back filtering (default: pid-derived) | +| `--can-bridge-debug` | Also log transmitted frames | +| `--can-selftest` | Emit one `platform_can_send` per 100 ms of sim time (bus 0, id `0x123`, stepping payload) — a headless proof channel | + +Everything is mirrored through the existing CAN path: every +`platform_can_send` is also published to the bridge, and frames arriving from +the bridge are injected exactly like scenario `can.frames` traffic +(`SimCanInject` into the latest-frame store keyed by (bus, id), so +queue/dlc/seq semantics match). Two refinements: + +- The graph/shell bus numbering stays 1-based (1 = "A", 2 = "B"); bus 0 is + not a local bus and exists **only on the bridge** as the + selftest/diagnostic channel, so `--can-selftest` traffic cannot collide + with real graph traffic and never enters the sender's own store. +- A received record tagged with the instance's own id is treated as a loop + and dropped (`filtered` in the shutdown stats) — an instance never reads + back its own transmissions. + +Two-instance headless demo (after emitting the SPWM harness, e.g. into +`build/hostsim_can_emitted`). Use live mode so both instances overlap in wall +time (batch runs full-speed; note each instance needs its own telemetry port): + +```bash +cd build/hostsim_can_emitted +../hostsim_can_emitted_build/host_sim scenarios/spwm_demo.json --live --realtime 1.0 \ + --listen 127.0.0.1:14608 --can-bridge-listen 7900 --can-bridge-id 1 --can-selftest \ + > /tmp/canA.log 2>&1 & +sleep 0.5 +../hostsim_can_emitted_build/host_sim scenarios/spwm_demo.json --live --realtime 1.0 \ + --listen 127.0.0.1:14609 --can-bridge-connect 127.0.0.1:7900 --can-bridge-id 2 \ + --can-selftest > /tmp/canB.log 2>&1 & +sleep 3.5 && kill %1 %2 +grep "id=0x123" /tmp/canB.log # one line per bridged frame, stepping payload +``` + +Received frames are always witnessed one per line +(`[CAN bridge] rx bus=... id=0x... src=... data=...`); startup announces +(`[CAN bridge] hub on :7900 id=1`, peer connect/disconnect) and a shutdown +`stats` line (tx/rx/dropped/filtered counters) are the only other output. + +**Wire format (v1)** — the first word is a framing magic, then a fixed-size +record; all multi-byte fields little-endian: + +``` +u16 payload_len (= 24) +u32 magic = 0x314E4143 ("CAN1") +u32 src instance id +u32 CAN id +u8 bus | u8 ext | u8 dlc | u8 reserved +u8 data[8] +``` + +**Limits (v1):** Linux only; intended for localhost (plain TCP, no +auth/encryption — the hub binds the wildcard address); no reconnect — a +failed connect, a dead spoke or a lost hub is logged once and the sim +continues unbridged; sends are best-effort (a peer that cannot keep up misses +frames — counted as `dropped`, never queued, so the sim never blocks on the +bridge); IPv4 numeric addresses only; use realistic CAN rates (the bridge is +designed for app-loop-rate traffic, not 10 kHz ISR floods; a batch run's sim +clock can advance far faster than wall time, so very high sim-time frame +rates are just dropped when sockets would block). + +## SPWM demo (RTEStudio + HostSim live) + +Open-loop **sinusoidal PWM** graph for the host simulator. Throttle A sets modulation +index (0..1), throttle B maps to electrical frequency (1..20 Hz via the graph). + +```powershell +powershell -File Images\HostSim\scripts\run_spwm_live.ps1 +``` + +This emits `graphs/spwm_demo_graph.json`, builds `build/hostsim_spwm_demo_graph_emitted`, starts +HostSim live, and opens RTEStudio with the graph loaded. + +**Suggested Runtime plots (check G1/G2/G3):** +- `duty_u`, `duty_v`, `duty_w` — slow SPWM duty commands (%) +- `pwm_gate_u`, `pwm_gate_v`, `pwm_gate_w` — switched gate outputs (0/1, scope-style) +- `pwm_v_u`, `pwm_v_v`, `pwm_v_uv` — phase / line-line voltages (V, vs DC-) +- `i_a`, `i_b`, `i_c` — simulated motor currents +- `spwm_angle_deg`, `encoder_angle_deg` — field angle vs rotor angle +- `mod_index`, `elec_freq_hz` — live control inputs + +PWM scope uses a triangle carrier (default 800 Hz in `spwm_demo.json`). Scope +channels ride their own auto-derived `pwm_telem_hz` (carrier × 12, clamped to +1000–4000 Hz); the plain signal channels use `telem_hz` — and in live mode +HostSim raises a `telem_hz` below 1500 Hz to 2000 Hz (set ≥1500 to keep a +custom rate). RTEStudio decimates bursts and refreshes plots at ~30 Hz. + +Edit graph parameters in RTEStudio (`FreqMin`/`FreqMax`, `TimDt`) then re-run the script +to regenerate firmware. + +```powershell +.\build\Debug\host_sim.exe scenarios\default_motor.json +python scripts\plot_sim.py trace.csv +``` + +**Live dashboard (Path A — RTEStudio Runtime tab):** + +```powershell +# Terminal 1 — long-running HostSim with InverterProtocol over TCP +.\build\Debug\host_sim.exe scenarios\default_motor.json --live --realtime 1.0 + +# Terminal 2 — RTEStudio Runtime tab connected to HostSim +.\build\bin\RTEStudio.exe --tcp 127.0.0.1:14608 --protocol ivp +``` + +In the RTEStudio **Runtime** console, adjust live: + +```text +throttle a 0.5 +throttle b 0.0 +clear +quit +``` + +## Windows live-mode tuning + +HostSim live mode runs a 10 kHz simulation loop. On Windows, smooth pacing needs +help from the OS scheduler: + +**Built-in (automatic in `--live` mode):** +- 1 ms multimedia timer resolution (`timeBeginPeriod`) +- Elevated thread priority + MMCSS `Pro Audio` class +- Wall-clock pacing every 1 ms sim time (not every 100 µs step) +- Hybrid sleep + short spin-wait for sub-millisecond accuracy + +**Manual OS tweaks (recommended on laptops):** +1. **Power plan** — set Windows to *High performance* or plug in AC power. +2. **Close heavy apps** — browsers/GPU tools competing for the same cores. +3. **Exclude from Game Bar capture** if recording causes stutter. +4. **Start HostSim before RTEStudio** so the sim claims a performance core first. + +**If plots still stutter:** +- Use `--realtime 0` on HostSim to run as fast as possible (no wall-clock pacing). +- Lower plot window (e.g. 5 s instead of 10 s) in the Signals panel. +- Set `HOSTSIM_TELEM_STDERR=1` only when debugging — stderr logging is off by default. + +**Waveform sampling (live plots):** +- Live mode forces the telemetry rate: a configured `telem_hz` (scenario key or + `--telem-hz N`; 500 Hz default) below 1500 Hz is raised to **2000 Hz** so + duty/current waveforms have enough points per cycle + (`src/sim_runtime.cpp` — set ≥1500 Hz to keep a custom rate). +- Rule of thumb: `telem_hz` ≥ 10× your highest electrical frequency (e.g. 20 Hz → use ≥200 Hz). +- Use **Pause Sim** in the Runtime console to freeze the plant while inspecting a trace. +- **Slow motion:** set sim speed to `0.25x` / `0.5x` in the Runtime console, or `speed 0.25` on the HostSim shell. `1x` = realtime, `turbo` = as fast as possible. + +Built-in streamed keys: `throttle_a`, `throttle_b`, `duty_u/v/w`, `i_a/b/c`, +`theta_e`, `omega_e`, `vdc_v`, plus any `platform_telemetry_log_f32` keys from +the emitted graph. + +`platform_telemetry_log_f32` still prints to stderr and also registers into the +live IVP publisher when `--live` is active. + + +## Upstream compatibility + +- Same `platform_api.h` surface as Gen6FW / NucleoL476FW (subset + stubs). +- Same three timing domains as Gen6 baseline graphs. +- No changes to `NodeAPI`, `InverterCodegen`, or `RTECodeEmitter` core. +- Intended for contribution back to `OpenVVVF/RTE` as `Images/HostSim/`. + +## Roadmap + +- **Today:** the ODE plant (PMSM + induction machine) is the default and only + fully-supported backend; the ngspice backend remains electrical RL / + PMSM-backEMF only. +- **Experimental:** ngspice plant backend (`src/plant/ngspice_plant.cpp`) is + present but not complete. Select it with `"plant": { "backend": "ngspice", + "netlist": "plants/your.cir" }` in the scenario JSON. If `libngspice.so` is + missing or loading fails, HostSim falls back to `OdePlant`. +- See [docs/Implementation_Plan.md](docs/Implementation_Plan.md) for the full + ngspice integration plan. + +## Dependencies + +- CMake 3.24+, C++20 host compiler +- Python 3 + matplotlib (optional, for `plot_sim.py`) +- WSL/Linux build of `RTECodeEmitter` for emit-and-run scripts diff --git a/Images/HostSim/baseline_graph.json b/Images/HostSim/baseline_graph.json new file mode 100644 index 00000000..7ac4ea1e --- /dev/null +++ b/Images/HostSim/baseline_graph.json @@ -0,0 +1,160 @@ +{ + "name": "hostsim_baseline", + "nodeTypes": [ + { + "id": "constant.duty", + "displayName": "Constant Duty", + "maxInstances": 0, + "isEntryPoint": false, + "domain": "", + "inputPorts": [], + "outputPorts": [ + { + "name": "Value", + "direction": "output", + "type": {"quantity": "dimensionless", "frame": "scalar", "dtype": "f32"} + } + ], + "parameterTypes": { + "Duty": {"quantity": "dimensionless", "frame": "scalar", "dtype": "f32"} + }, + "inlineCode": "Value = Duty;", + "constructorCode": "", + "classHeader": "", + "classDefinition": "" + }, + { + "id": "hw.pwm.set_duty", + "displayName": "Set PWM Duty Cycles", + "maxInstances": 1, + "isEntryPoint": false, + "domain": "tim_isr", + "inputPorts": [ + { + "name": "Duty_A", + "direction": "input", + "type": {"quantity": "dimensionless", "frame": "scalar", "dtype": "f32"} + }, + { + "name": "Duty_B", + "direction": "input", + "type": {"quantity": "dimensionless", "frame": "scalar", "dtype": "f32"} + }, + { + "name": "Duty_C", + "direction": "input", + "type": {"quantity": "dimensionless", "frame": "scalar", "dtype": "f32"} + } + ], + "outputPorts": [], + "parameterTypes": {}, + "inlineCode": "platform_pwm_set(Duty_A, Duty_B, Duty_C);", + "constructorCode": "", + "classHeader": "", + "classDefinition": "" + }, + { + "id": "app.telemetry_log", + "displayName": "Telemetry Log", + "maxInstances": 0, + "isEntryPoint": false, + "domain": "", + "inputPorts": [ + { + "name": "Value", + "direction": "input", + "type": {"quantity": "dimensionless", "frame": "scalar", "dtype": "f32"} + } + ], + "outputPorts": [], + "parameterTypes": { + "Key": {"quantity": "string", "frame": "scalar", "dtype": "f32"} + }, + "inlineCode": "platform_telemetry_log_f32(Key, Value);", + "constructorCode": "", + "classHeader": "", + "classDefinition": "" + } + ], + "nodes": [ + { + "id": "DutyU", + "type": "constant.duty", + "displayName": "Duty U", + "domain": "tim_isr", + "position": {"x": 0.0, "y": 0.0}, + "parameters": {"Duty": "60.0"} + }, + { + "id": "DutyV", + "type": "constant.duty", + "displayName": "Duty V", + "domain": "tim_isr", + "position": {"x": 0.0, "y": 120.0}, + "parameters": {"Duty": "35.0"} + }, + { + "id": "DutyW", + "type": "constant.duty", + "displayName": "Duty W", + "domain": "tim_isr", + "position": {"x": 0.0, "y": 240.0}, + "parameters": {"Duty": "85.0"} + }, + { + "id": "PwmOut", + "type": "hw.pwm.set_duty", + "displayName": "PWM Out", + "domain": "tim_isr", + "position": {"x": 300.0, "y": 120.0}, + "parameters": {} + }, + { + "id": "Heartbeat", + "type": "constant.duty", + "displayName": "Heartbeat Constant", + "domain": "app_loop", + "position": {"x": 0.0, "y": 400.0}, + "parameters": {"Duty": "1.0"} + }, + { + "id": "LogHeartbeat", + "type": "app.telemetry_log", + "displayName": "Log Heartbeat", + "domain": "app_loop", + "position": {"x": 300.0, "y": 400.0}, + "parameters": {"Key": "cg_heartbeat"} + }, + { + "id": "noop_adc", + "type": "constant.duty", + "displayName": "ADC noop", + "domain": "adc_isr", + "position": {"x": 0.0, "y": 600.0}, + "parameters": {"Duty": "0.0"} + } + ], + "connections": [ + { + "id": "c1", + "from": {"nodeId": "DutyU", "portName": "Value"}, + "to": {"nodeId": "PwmOut", "portName": "Duty_A"} + }, + { + "id": "c2", + "from": {"nodeId": "DutyV", "portName": "Value"}, + "to": {"nodeId": "PwmOut", "portName": "Duty_B"} + }, + { + "id": "c3", + "from": {"nodeId": "DutyW", "portName": "Value"}, + "to": {"nodeId": "PwmOut", "portName": "Duty_C"} + }, + { + "id": "c4", + "from": {"nodeId": "Heartbeat", "portName": "Value"}, + "to": {"nodeId": "LogHeartbeat", "portName": "Value"} + } + ], + "bridges": [] +} diff --git a/Images/HostSim/build_linux/CMakeCache.txt b/Images/HostSim/build_linux/CMakeCache.txt deleted file mode 100644 index 6edac897..00000000 --- a/Images/HostSim/build_linux/CMakeCache.txt +++ /dev/null @@ -1,379 +0,0 @@ -# This is the CMakeCache file. -# For build in directory: /home/tliao/Desktop/RTE/Images/HostSim/build_linux -# It was generated by CMake: /usr/bin/cmake -# You can edit this file to change values found and used by cmake. -# If you do not want to change any of the values, simply exit the editor. -# If you do want to change a value, simply edit, save, and exit the editor. -# The syntax for the file is as follows: -# KEY:TYPE=VALUE -# KEY is the name of a variable in the cache. -# TYPE is a hint to GUIs for the type of VALUE, DO NOT EDIT TYPE!. -# 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- -/* Construct a string literal encoding the version number components. */ -#elif defined(COMPILER_VERSION_MAJOR) -char const info_version[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', - COMPILER_VERSION_MAJOR, -# ifdef COMPILER_VERSION_MINOR - '.', COMPILER_VERSION_MINOR, -# ifdef COMPILER_VERSION_PATCH - '.', COMPILER_VERSION_PATCH, -# ifdef COMPILER_VERSION_TWEAK - '.', COMPILER_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct a string literal encoding the internal version number. */ -#ifdef COMPILER_VERSION_INTERNAL -char const info_version_internal[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', - 'i','n','t','e','r','n','a','l','[', - COMPILER_VERSION_INTERNAL,']','\0'}; -#elif defined(COMPILER_VERSION_INTERNAL_STR) -char const* info_version_internal = "INFO" ":" "compiler_version_internal[" COMPILER_VERSION_INTERNAL_STR "]"; -#endif - -/* Construct a string literal encoding the version number components. */ -#ifdef SIMULATE_VERSION_MAJOR -char const info_simulate_version[] = { - 'I', 'N', 'F', 'O', ':', - 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', - SIMULATE_VERSION_MAJOR, -# ifdef SIMULATE_VERSION_MINOR - '.', SIMULATE_VERSION_MINOR, -# ifdef SIMULATE_VERSION_PATCH - '.', SIMULATE_VERSION_PATCH, -# ifdef SIMULATE_VERSION_TWEAK - '.', SIMULATE_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct the string literal in pieces to prevent the source from - getting matched. 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Store it in a pointer rather than an array - because some compilers will just produce instructions to fill the - array rather than assigning a pointer to a static array. */ -char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]"; -#ifdef SIMULATE_ID -char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]"; -#endif - -#ifdef __QNXNTO__ -char const* qnxnto = "INFO" ":" "qnxnto[]"; -#endif - -#if defined(__CRAYXT_COMPUTE_LINUX_TARGET) -char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]"; -#endif - -#define STRINGIFY_HELPER(X) #X -#define STRINGIFY(X) STRINGIFY_HELPER(X) - -/* Identify known platforms by name. */ -#if defined(__linux) || defined(__linux__) || defined(linux) -# define PLATFORM_ID "Linux" - -#elif defined(__MSYS__) -# define PLATFORM_ID "MSYS" - -#elif defined(__CYGWIN__) -# define PLATFORM_ID "Cygwin" - -#elif defined(__MINGW32__) -# define PLATFORM_ID "MinGW" - -#elif defined(__APPLE__) -# define PLATFORM_ID "Darwin" - -#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32) -# define PLATFORM_ID "Windows" - -#elif defined(__FreeBSD__) || defined(__FreeBSD) -# define PLATFORM_ID "FreeBSD" - -#elif defined(__NetBSD__) || defined(__NetBSD) -# define PLATFORM_ID "NetBSD" - -#elif defined(__OpenBSD__) || defined(__OPENBSD) -# define PLATFORM_ID "OpenBSD" - -#elif defined(__sun) || defined(sun) -# define PLATFORM_ID "SunOS" - -#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__) -# define PLATFORM_ID "AIX" - -#elif defined(__hpux) || defined(__hpux__) -# define PLATFORM_ID "HP-UX" - -#elif defined(__HAIKU__) -# define PLATFORM_ID "Haiku" - -#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS) -# define PLATFORM_ID "BeOS" - -#elif defined(__QNX__) || defined(__QNXNTO__) -# define PLATFORM_ID "QNX" - -#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__) -# define PLATFORM_ID "Tru64" - -#elif defined(__riscos) || defined(__riscos__) -# define PLATFORM_ID "RISCos" - -#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__) -# define PLATFORM_ID "SINIX" - -#elif defined(__UNIX_SV__) -# define PLATFORM_ID "UNIX_SV" - -#elif defined(__bsdos__) -# define PLATFORM_ID "BSDOS" - -#elif defined(_MPRAS) || defined(MPRAS) -# define PLATFORM_ID "MP-RAS" - -#elif defined(__osf) || defined(__osf__) -# define PLATFORM_ID "OSF1" - -#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv) -# define PLATFORM_ID "SCO_SV" - -#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX) -# define PLATFORM_ID "ULTRIX" - -#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX) -# define PLATFORM_ID "Xenix" - -#elif defined(__WATCOMC__) -# if defined(__LINUX__) -# define PLATFORM_ID "Linux" - -# elif defined(__DOS__) -# define PLATFORM_ID "DOS" - -# elif defined(__OS2__) -# define PLATFORM_ID "OS2" - -# elif defined(__WINDOWS__) -# define PLATFORM_ID "Windows3x" - -# elif defined(__VXWORKS__) -# define PLATFORM_ID "VxWorks" - -# else /* unknown platform */ -# define PLATFORM_ID -# endif - -#elif defined(__INTEGRITY) -# if defined(INT_178B) -# define PLATFORM_ID "Integrity178" - -# else /* regular Integrity */ -# define PLATFORM_ID "Integrity" -# endif - -# elif defined(_ADI_COMPILER) -# define PLATFORM_ID "ADSP" - -#else /* unknown platform */ -# define PLATFORM_ID - -#endif - -/* For windows compilers MSVC and Intel we can determine - the architecture of the compiler being used. This is because - the compilers do not have flags that can change the architecture, - but rather depend on which compiler is being used -*/ -#if defined(_WIN32) && defined(_MSC_VER) -# if defined(_M_IA64) -# define ARCHITECTURE_ID "IA64" - -# elif defined(_M_ARM64EC) -# define ARCHITECTURE_ID "ARM64EC" - -# elif defined(_M_X64) || defined(_M_AMD64) -# define ARCHITECTURE_ID "x64" - -# elif defined(_M_IX86) -# define ARCHITECTURE_ID "X86" - -# elif defined(_M_ARM64) -# define ARCHITECTURE_ID "ARM64" - -# elif defined(_M_ARM) -# if _M_ARM == 4 -# define ARCHITECTURE_ID "ARMV4I" -# elif _M_ARM == 5 -# define ARCHITECTURE_ID "ARMV5I" -# else -# define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM) -# endif - -# elif defined(_M_MIPS) -# define ARCHITECTURE_ID "MIPS" - -# elif defined(_M_SH) -# define ARCHITECTURE_ID "SHx" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__WATCOMC__) -# if defined(_M_I86) -# define ARCHITECTURE_ID "I86" - -# elif defined(_M_IX86) -# define ARCHITECTURE_ID "X86" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC) -# if defined(__ICCARM__) -# define ARCHITECTURE_ID "ARM" - -# elif defined(__ICCRX__) -# define ARCHITECTURE_ID "RX" - -# elif defined(__ICCRH850__) -# define ARCHITECTURE_ID "RH850" - -# elif defined(__ICCRL78__) -# define ARCHITECTURE_ID "RL78" - -# elif defined(__ICCRISCV__) -# define ARCHITECTURE_ID "RISCV" - -# elif defined(__ICCAVR__) -# define ARCHITECTURE_ID "AVR" - -# elif defined(__ICC430__) -# define ARCHITECTURE_ID "MSP430" - -# elif defined(__ICCV850__) -# define ARCHITECTURE_ID "V850" - -# elif defined(__ICC8051__) -# define ARCHITECTURE_ID "8051" - -# elif defined(__ICCSTM8__) -# define ARCHITECTURE_ID "STM8" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__ghs__) -# if defined(__PPC64__) -# define ARCHITECTURE_ID "PPC64" - -# elif defined(__ppc__) -# define ARCHITECTURE_ID "PPC" - -# elif defined(__ARM__) -# define ARCHITECTURE_ID "ARM" - -# elif defined(__x86_64__) -# define ARCHITECTURE_ID "x64" - -# elif defined(__i386__) -# define ARCHITECTURE_ID "X86" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__clang__) && defined(__ti__) -# if defined(__ARM_ARCH) -# define ARCHITECTURE_ID "Arm" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -#elif defined(__TI_COMPILER_VERSION__) -# if defined(__TI_ARM__) -# define ARCHITECTURE_ID "ARM" - -# elif defined(__MSP430__) -# define ARCHITECTURE_ID "MSP430" - -# elif defined(__TMS320C28XX__) -# define ARCHITECTURE_ID "TMS320C28x" - -# elif defined(__TMS320C6X__) || defined(_TMS320C6X) -# define ARCHITECTURE_ID "TMS320C6x" - -# else /* unknown architecture */ -# define ARCHITECTURE_ID "" -# endif - -# elif defined(__ADSPSHARC__) -# define ARCHITECTURE_ID "SHARC" - -# elif defined(__ADSPBLACKFIN__) -# define ARCHITECTURE_ID "Blackfin" - -#elif defined(__TASKING__) - -# if defined(__CTC__) || defined(__CPTC__) -# define ARCHITECTURE_ID "TriCore" - -# elif defined(__CMCS__) -# define ARCHITECTURE_ID "MCS" - -# elif defined(__CARM__) -# define ARCHITECTURE_ID "ARM" - -# elif defined(__CARC__) -# define ARCHITECTURE_ID "ARC" - -# elif defined(__C51__) -# define ARCHITECTURE_ID "8051" - -# elif defined(__CPCP__) -# define ARCHITECTURE_ID "PCP" - -# else -# define ARCHITECTURE_ID "" -# endif - -#else -# define ARCHITECTURE_ID -#endif - -/* Convert integer to decimal digit literals. */ -#define DEC(n) \ - ('0' + (((n) / 10000000)%10)), \ - ('0' + (((n) / 1000000)%10)), \ - ('0' + (((n) / 100000)%10)), \ - ('0' + (((n) / 10000)%10)), \ - ('0' + (((n) / 1000)%10)), \ - ('0' + (((n) / 100)%10)), \ - ('0' + (((n) / 10)%10)), \ - ('0' + ((n) % 10)) - -/* Convert integer to hex digit literals. */ -#define HEX(n) \ - ('0' + ((n)>>28 & 0xF)), \ - ('0' + ((n)>>24 & 0xF)), \ - ('0' + ((n)>>20 & 0xF)), \ - ('0' + ((n)>>16 & 0xF)), \ - ('0' + ((n)>>12 & 0xF)), \ - ('0' + ((n)>>8 & 0xF)), \ - ('0' + ((n)>>4 & 0xF)), \ - ('0' + ((n) & 0xF)) - -/* Construct a string literal encoding the version number. */ -#ifdef COMPILER_VERSION -char const* info_version = "INFO" ":" "compiler_version[" COMPILER_VERSION "]"; - -/* Construct a string literal encoding the version number components. */ -#elif defined(COMPILER_VERSION_MAJOR) -char const info_version[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[', - COMPILER_VERSION_MAJOR, -# ifdef COMPILER_VERSION_MINOR - '.', COMPILER_VERSION_MINOR, -# ifdef COMPILER_VERSION_PATCH - '.', COMPILER_VERSION_PATCH, -# ifdef COMPILER_VERSION_TWEAK - '.', COMPILER_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct a string literal encoding the internal version number. */ -#ifdef COMPILER_VERSION_INTERNAL -char const info_version_internal[] = { - 'I', 'N', 'F', 'O', ':', - 'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_', - 'i','n','t','e','r','n','a','l','[', - COMPILER_VERSION_INTERNAL,']','\0'}; -#elif defined(COMPILER_VERSION_INTERNAL_STR) -char const* info_version_internal = "INFO" ":" "compiler_version_internal[" COMPILER_VERSION_INTERNAL_STR "]"; -#endif - -/* Construct a string literal encoding the version number components. */ -#ifdef SIMULATE_VERSION_MAJOR -char const info_simulate_version[] = { - 'I', 'N', 'F', 'O', ':', - 's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[', - SIMULATE_VERSION_MAJOR, -# ifdef SIMULATE_VERSION_MINOR - '.', SIMULATE_VERSION_MINOR, -# ifdef SIMULATE_VERSION_PATCH - '.', SIMULATE_VERSION_PATCH, -# ifdef SIMULATE_VERSION_TWEAK - '.', SIMULATE_VERSION_TWEAK, -# endif -# endif -# endif - ']','\0'}; -#endif - -/* Construct the string literal in pieces to prevent the source from - getting matched. Store it in a pointer rather than an array - because some compilers will just produce instructions to fill the - array rather than assigning a pointer to a static array. */ -char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]"; -char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]"; - - - -#define CXX_STD_98 199711L -#define CXX_STD_11 201103L -#define CXX_STD_14 201402L -#define CXX_STD_17 201703L -#define CXX_STD_20 202002L -#define CXX_STD_23 202302L - -#if defined(__INTEL_COMPILER) && defined(_MSVC_LANG) -# if _MSVC_LANG > CXX_STD_17 -# define CXX_STD _MSVC_LANG -# elif _MSVC_LANG == CXX_STD_17 && defined(__cpp_aggregate_paren_init) -# define CXX_STD CXX_STD_20 -# elif _MSVC_LANG > CXX_STD_14 && __cplusplus > CXX_STD_17 -# define CXX_STD CXX_STD_20 -# elif _MSVC_LANG > CXX_STD_14 -# define CXX_STD CXX_STD_17 -# elif defined(__INTEL_CXX11_MODE__) && defined(__cpp_aggregate_nsdmi) -# define CXX_STD CXX_STD_14 -# elif defined(__INTEL_CXX11_MODE__) -# define CXX_STD CXX_STD_11 -# else -# define CXX_STD CXX_STD_98 -# endif -#elif defined(_MSC_VER) && defined(_MSVC_LANG) -# if _MSVC_LANG > __cplusplus -# define CXX_STD _MSVC_LANG -# else -# define CXX_STD __cplusplus -# endif -#elif defined(__NVCOMPILER) -# if __cplusplus == CXX_STD_17 && defined(__cpp_aggregate_paren_init) -# define CXX_STD CXX_STD_20 -# else -# define CXX_STD __cplusplus -# endif -#elif defined(__INTEL_COMPILER) || defined(__PGI) -# if __cplusplus == CXX_STD_11 && defined(__cpp_namespace_attributes) -# define CXX_STD CXX_STD_17 -# elif __cplusplus == CXX_STD_11 && defined(__cpp_aggregate_nsdmi) -# define CXX_STD CXX_STD_14 -# else -# define CXX_STD __cplusplus -# endif -#elif (defined(__IBMCPP__) || defined(__ibmxl__)) && defined(__linux__) -# if __cplusplus == CXX_STD_11 && defined(__cpp_aggregate_nsdmi) -# define CXX_STD CXX_STD_14 -# else -# define CXX_STD __cplusplus -# endif -#elif __cplusplus == 1 && defined(__GXX_EXPERIMENTAL_CXX0X__) -# define CXX_STD CXX_STD_11 -#else -# define CXX_STD __cplusplus -#endif - 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The work described here has **landed**: the `IPlant` seam +> (`src/plant/plant_backend.h`), the ODE refactor (`OdePlant`), the +> sharedspice loader (`NgspicePlant`), scenario-selected backends +> (`simulation.plant.backend`), the bundled `plants/inverter_rl.cir` and +> `plants/inverter_pmsm.cir` netlists, and live IVP telemetry are all in the +> tree. The status tables and "TBD" sections below predate the +> implementation — read them for design rationale only. Current capability +> documentation lives in [docs/simulation.md](../../../docs/simulation.md). + +Host-side base image for `RTECodeEmitter`: generated domain code calls +`platform_api.h`; scheduling, sensors, and the **plant** live in this tree. + +This document tracks planned work. **Current plant:** discrete-time PMSM ODE in +`src/motor_model.cpp` (averaged duty → dq dynamics → ABC currents). **Optional +PWM scope:** triangle-carrier model in `src/pwm_scope.cpp` (visualization only). + +Aligns with the repo roadmap item: [ngspice-based plant/inverter +simulator](https://ngspice.sourceforge.io/) for closed-loop graph testing before +hardware (see root `README.md`). + +--- + +## 1. Goals + +| Goal | Notes | +|------|--------| +| Same control graphs as firmware | No changes to node templates / codegen contract | +| Fast interactive path | ODE plant remains default for live NodeGUI + SPWM/FOC demos | +| Optional higher-fidelity electrical plant | ngspice backend behind the same `platform_api` | +| Scenario-driven | Backend and netlist chosen in JSON, not compile-time only | + +--- + +## 2. Architecture (target) + +``` +scenario JSON + simulation.plant.backend: "ode" | "ngspice" + │ + ▼ + SimRuntime::StepOnce() (10 kHz tim_isr, etc.) + │ + ▼ + platform_api.cpp (unchanged signatures) + │ + ┌────┴─────┐ + ▼ ▼ + OdePlant NgspicePlant + (MotorModel) (sharedspice + netlist) + │ + ▼ + phase currents, encoder angle, vdc → graph / telemetry +``` + +**Principle:** one scheduler; swap plant backend only. PWM scope may stay a +parallel visualization layer (not required for ngspice v1). + +--- + +## 3. Plant backend interface (Phase 0–1) + +Introduce a small C++ seam (names TBD), e.g. `IPlant`: + +- `Reset()`, `SetParams(...)` from scenario `motor` / `plant` blocks +- `Step(duty_u, duty_v, duty_w, dt_s)` — called from existing `SimRuntime` path +- Readouts: `id/iq` or `ia/ib/ic`, `theta_e`, `omega_e` (whatever ODE exposes today) + +Refactor `MotorModel` behind `OdePlant` without behavior change. `platform_api.cpp` +continues to delegate to the active plant instance. + +**Files (expected):** + +- `src/plant/plant_backend.h` — interface +- `src/plant/ode_plant.cpp` — wraps `MotorModel` +- `src/sim_runtime.cpp` — construct backend from scenario +- `scenarios/default_motor.json` — explicit `"plant": { "backend": "ode" }` (optional; default ode) + +--- + +## 4. ngspice integration (Phase 2–4) + +### 4.1 Integration style + +| Approach | Use | +|----------|-----| +| **sharedspice (libngspice)** | In-process stepping; required for closed-loop HostSim + NodeGUI | +| **ngspice CLI** | Optional offline batch / CI smoke; not primary | + +CMake: optional `HOSTSIM_ENABLE_NGSPICE` (or detect shared library). HostSim builds +and runs without ngspice when the flag is off or the library is missing. + +### 4.2 First netlist scope (v1) + +Start small; avoid full Gen6 PCB in v1. + +| Option | Models | Fidelity | Speed | +|--------|--------|----------|-------| +| **A — RL load** | 3-phase controlled sources or simplified bridge + RL | Current waveforms vs duty | Best for first hello-world | +| **B — Hybrid** | Spice for inverter voltages; PMSM mechanics still ODE | Medium | Medium | +| **C — Switched PMSM** | MOSFET/IGBT + machine | Highest | Likely too slow for 10 kHz live | + +**Plan default:** **A**, then **B** if A proves stable. + +### 4.3 Control loop sync + +Each `tim_isr` step (default `dt = 100 µs`): + +1. Map duty commands → spice sources (voltage or behavioral bridge). +2. Advance ngspice by `dt` (or `N` substeps if netlist requires smaller steps). +3. Sample probe nodes → `ia/ib/ic`, optional `vdc`. +4. Mechanical state: either fixed speed / external ODE, or coupled later. + +**Live mode:** expect **slower than real time** for switched models; document that +ODE is the default for interactive `--live`. ngspice v1 can target **offline** +`trace.csv` runs first, then live when performance allows. + +### 4.4 Scenario sketch (ngspice) + +```json +"plant": { + "backend": "ngspice", + "netlist": "plants/inverter_rl.cir", + "sources": { + "duty_u": "Vu", + "duty_v": "Vv", + "duty_w": "Vw" + }, + "probes": { + "i_a": "V(iu)", + "i_b": "V(iv)", + "i_c": "V(iw)", + "vdc": "V(vdc)" + }, + "substeps": 1 +} +``` + +Paths relative to `Images/HostSim/` or scenario file directory (TBD in Phase 2). + +### 4.5 Encoder / sensors + +v1: reuse ODE mechanical integrator for `theta_e` / `omega_e`, or hold angle fixed +for RL-load-only tests. Full electro-mechanical coupling is **post-v1**. + +ADC/encoder stubs in `platform_api.cpp` continue to read from plant + `SimContext`. + +--- + +## 5. Phased delivery + +| Phase | Deliverable | Success criteria | +|-------|-------------|------------------| +| **0** | This plan + `PlantBackend` interface design | Reviewed; no runtime change | +| **1** | ODE behind `IPlant`; scenario `backend: ode` | Bit-identical or equivalent traces vs today | +| **2** | sharedspice loader + minimal RL netlist | Single offline step; currents respond to duty | +| **3** | `SimRuntime` + scenario `backend: ngspice` | Closed-loop emit-and-run on RL plant | +| **4** | Telemetry keys for spice probes | NodeGUI plots spice currents | +| **5** (later) | Hybrid or switched netlist; Gen6-oriented templates | Documented perf limits | + +--- + +## 6. Out of scope (v1) + +- Replacing ODE as default plant +- Full PCB parasitics / deadtime-accurate Gen6 netlist +- Mandatory ngspice in CI for HostSim ODE/SPWM tests +- Changes to `platform_api.h` public signatures +- ngspice inside firmware (host-only) + +--- + +## 7. Open decisions (TBD before Phase 2 coding) + +Record choices here when made: + +| # | Question | Options | Decision | +|---|----------|---------|----------| +| 1 | First netlist | A RL / B hybrid / C switched | _TBD_ | +| 2 | First usage mode | Offline trace only / live NodeGUI | _TBD_ | +| 3 | Platform priority | Windows DLL / Linux-WSL first | _TBD_ | +| 4 | First PR scope | Phase 0–1 only vs through Phase 2 | _TBD_ | + +--- + +## 8. Related docs + +- `Images/HostSim/README.md` — run modes, SPWM demo, live TCP +- Root `README.md` — toolchain roadmap +- `Lib/InverterProtocol/` — live telemetry to NodeGUI (orthogonal to plant choice) + +--- + +## 9. Current status (as of plan write) + +| Item | Status | +|------|--------| +| ODE PMSM plant | **Done** (`motor_model.cpp`) | +| PWM scope (optional) | **Done** (`pwm_scope.cpp`, scenario opt-in) | +| Live IVP telemetry | **Done** (PR branch) | +| `IPlant` / ngspice backend | **Not started** | diff --git a/Images/HostSim/generated/.gitkeep b/Images/HostSim/generated/.gitkeep new file mode 100644 index 00000000..e69de29b diff --git a/Images/HostSim/graphs/spwm_demo_graph.json b/Images/HostSim/graphs/spwm_demo_graph.json new file mode 100644 index 00000000..4be3f7a7 --- /dev/null +++ b/Images/HostSim/graphs/spwm_demo_graph.json @@ -0,0 +1,430 @@ +{ + "name": "hostsim_spwm_demo", + "nodeTypes": [ + { + "id": "hw.throttle_a", + "displayName": "Throttle A", + "maxInstances": 0, + "isEntryPoint": false, + "domain": "", + "inputPorts": [], + "outputPorts": [ + { + "name": "Value", + "direction": "output", + "type": {"quantity": "dimensionless", "frame": "scalar", "dtype": "f32"} + } + ], + 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"Value = platform_get_encoder_angle_latest();", + "constructorCode": "", + "classHeader": "", + "classDefinition": "" + }, + { + "id": "hw.phase_current_a", + "displayName": "Phase Current A", + "maxInstances": 0, + "isEntryPoint": false, + "domain": "", + "inputPorts": [], + "outputPorts": [ + { + "name": "Value", + "direction": "output", + "type": {"quantity": "dimensionless", "frame": "scalar", "dtype": "f32"} + } + ], + "parameterTypes": {}, + "inlineCode": "float iu = 0.0f; float iv = 0.0f; float iw = 0.0f; platform_get_phase_currents(&iu, &iv, &iw); Value = iu;", + "constructorCode": "", + "classHeader": "", + "classDefinition": "" + }, + { + "id": "app.telemetry_log", + "displayName": "Telemetry Log", + "maxInstances": 0, + "isEntryPoint": false, + "domain": "", + "inputPorts": [ + { + "name": "Value", + "direction": "input", + "type": {"quantity": "dimensionless", "frame": "scalar", "dtype": "f32"} + } + ], + "outputPorts": [], + "parameterTypes": { + "Key": {"quantity": "string", "frame": "scalar", "dtype": "f32"} + }, + "inlineCode": "platform_telemetry_log_f32(Key, Value);", + "constructorCode": "", + "classHeader": "", + "classDefinition": "" + } + ], + "nodes": [ + { + "id": "ThrottleA", + "type": "hw.throttle_a", + "displayName": "Throttle A (mod index)", + "domain": "tim_isr", + "position": {"x": 0.0, "y": 0.0}, + "parameters": {} + }, + { + "id": "ThrottleB", + "type": "hw.throttle_b", + "displayName": "Throttle B (freq map)", + "domain": "tim_isr", + "position": {"x": 0.0, "y": 120.0}, + "parameters": {} + }, + { + "id": "FreqMap", + "type": "mod.freq_map", + "displayName": "Electrical Freq Map", + "domain": "tim_isr", + "position": {"x": 240.0, "y": 120.0}, + "parameters": {"FreqMin": "1.0", "FreqMax": "20.0"} + }, + { + "id": "Spwm", + "type": "mod.spwm", + "displayName": "SPWM", + "domain": "tim_isr", + "position": {"x": 480.0, "y": 60.0}, + "parameters": {"TimDt": "0.0001"} + }, + { + "id": "PwmOut", + "type": "hw.pwm.set_duty", + "displayName": "PWM Out", + "domain": "tim_isr", + "position": {"x": 760.0, "y": 60.0}, + "parameters": {} + }, + { + "id": "LogModIndex", + "type": "app.telemetry_log", + "displayName": "Log Mod Index", + "domain": "app_loop", + "position": {"x": 240.0, "y": 360.0}, + "parameters": {"Key": "mod_index"} + }, + { + "id": "LogElecFreq", + "type": "app.telemetry_log", + "displayName": "Log Elec Freq", + "domain": "app_loop", + "position": {"x": 480.0, "y": 360.0}, + "parameters": {"Key": "elec_freq_hz"} + }, + { + "id": "LogSpwmAngle", + "type": "app.telemetry_log", + "displayName": "Log SPWM Angle", + "domain": "app_loop", + "position": {"x": 720.0, "y": 360.0}, + "parameters": {"Key": "spwm_angle_deg"} + }, + { + "id": "LogEncoderAngle", + "type": "app.telemetry_log", + "displayName": "Log Encoder Angle", + "domain": "app_loop", + "position": {"x": 960.0, "y": 360.0}, + "parameters": {"Key": "encoder_angle_deg"} + }, + { + "id": "LogPhaseCurrent", + "type": "app.telemetry_log", + "displayName": "Log Phase A Current", + "domain": "app_loop", + "position": {"x": 1200.0, "y": 360.0}, + "parameters": {"Key": "phase_a_a"} + }, + { + "id": "ThrottleAApp", + "type": "hw.throttle_a", + "displayName": "Throttle A", + "domain": "app_loop", + "position": {"x": 0.0, "y": 360.0}, + "parameters": {} + }, + { + "id": "ThrottleBApp", + "type": "hw.throttle_b", + "displayName": "Throttle B", + "domain": "app_loop", + "position": {"x": 0.0, "y": 480.0}, + "parameters": {} + }, + { + "id": "FreqMapApp", + "type": "mod.freq_map", + "displayName": "Electrical Freq Map", + "domain": "app_loop", + "position": {"x": 240.0, "y": 480.0}, + "parameters": {"FreqMin": "1.0", "FreqMax": "20.0"} + }, + { + "id": "SpwmAngle", + "type": "hw.spwm_angle_deg", + "displayName": "SPWM Angle", + "domain": "app_loop", + "position": {"x": 720.0, "y": 480.0}, + "parameters": {} + }, + { + "id": "EncoderAngle", + "type": "hw.encoder_angle_deg", + "displayName": "Encoder Angle", + "domain": "app_loop", + "position": {"x": 960.0, "y": 480.0}, + "parameters": {} + }, + { + "id": "PhaseCurrentA", + "type": "hw.phase_current_a", + "displayName": "Phase Current A", + "domain": "app_loop", + "position": {"x": 1200.0, "y": 480.0}, + "parameters": {} + }, + { + "id": "noop_adc", + "type": "hw.throttle_a", + "displayName": "ADC noop", + "domain": "adc_isr", + "position": {"x": 0.0, "y": 720.0}, + "parameters": {} + } + ], + "connections": [ + { + "id": "c1", + "from": {"nodeId": "ThrottleA", "portName": "Value"}, + "to": {"nodeId": "Spwm", "portName": "ModIndex"} + }, + { + "id": "c2", + "from": {"nodeId": "ThrottleB", "portName": "Value"}, + "to": {"nodeId": "FreqMap", "portName": "Throttle"} + }, + { + "id": "c3", + "from": {"nodeId": "FreqMap", "portName": "FreqHz"}, + "to": {"nodeId": "Spwm", "portName": "FreqHz"} + }, + { + "id": "c4", + "from": {"nodeId": "Spwm", "portName": "Duty_A"}, + "to": {"nodeId": "PwmOut", "portName": "Duty_A"} + }, + { + "id": "c5", + "from": {"nodeId": "Spwm", "portName": "Duty_B"}, + "to": {"nodeId": "PwmOut", "portName": "Duty_B"} + }, + { + "id": "c6", + "from": {"nodeId": "Spwm", "portName": "Duty_C"}, + "to": {"nodeId": "PwmOut", "portName": "Duty_C"} + }, + { + "id": "c7", + "from": {"nodeId": "ThrottleAApp", "portName": "Value"}, + "to": {"nodeId": "LogModIndex", "portName": "Value"} + }, + { + "id": "c8", + "from": {"nodeId": "ThrottleBApp", "portName": "Value"}, + "to": {"nodeId": "FreqMapApp", "portName": "Throttle"} + }, + { + "id": "c9", + "from": {"nodeId": "FreqMapApp", "portName": "FreqHz"}, + "to": {"nodeId": "LogElecFreq", "portName": "Value"} + }, + { + "id": "c10", + "from": {"nodeId": "SpwmAngle", "portName": "Value"}, + "to": {"nodeId": "LogSpwmAngle", "portName": "Value"} + }, + { + "id": "c11", + "from": {"nodeId": "EncoderAngle", "portName": "Value"}, + "to": {"nodeId": "LogEncoderAngle", "portName": "Value"} + }, + { + "id": "c12", + "from": {"nodeId": "PhaseCurrentA", "portName": "Value"}, + "to": {"nodeId": "LogPhaseCurrent", "portName": "Value"} + } + ], + "bridges": [] +} diff --git a/Images/HostSim/include/AppState.h b/Images/HostSim/include/AppState.h new file mode 100644 index 00000000..0ef40166 --- /dev/null +++ b/Images/HostSim/include/AppState.h @@ -0,0 +1,36 @@ +#pragma once + +/* ============================================================================ + * RTE codegen top-level state container (HostSim base image). + * + * RTECodeEmitter looks for // RTE_EMIT: state markers and replaces + * them with a forward declaration in namespace app plus an #include for the + * generated domain header. + * ============================================================================ */ + +// RTE_EMIT: app_loop state +// RTE_EMIT: tim_isr state +// RTE_EMIT: adc_isr state +// RTE_EMIT: vsense state + +#if !__has_include("../generated/domain_app_loop_generated.h") +namespace app { struct AppLoopState {}; } +#endif +#if !__has_include("../generated/domain_tim_isr_generated.h") +namespace app { struct TimIsrState {}; } +#endif +#if !__has_include("../generated/domain_adc_isr_generated.h") +namespace app { struct AdcIsrState {}; } +#endif +#if !__has_include("../generated/domain_vsense_generated.h") +namespace app { struct VsenseState {}; } +#endif + +struct AppState { + app::AppLoopState app_loop; + app::TimIsrState tim_isr; + app::AdcIsrState adc_isr; + app::VsenseState vsense; +}; + +extern AppState appState; diff --git a/Images/HostSim/include/RteParams.h b/Images/HostSim/include/RteParams.h new file mode 100644 index 00000000..c8a40c4d --- /dev/null +++ b/Images/HostSim/include/RteParams.h @@ -0,0 +1,35 @@ +#pragma once + +/** + * @brief Runtime parameter descriptor for RTE-generated code (HostSim stub). + * + * Generated domain files may emit a table of these so the base image can + * get/set node parameters by name at runtime. HostSim does not implement a + * parameter shell yet; the struct must exist for codegen compatibility. + */ +struct RteParamDesc { + const char* name; + void (*set)(void* state, float value); + float (*get)(const void* state); +}; + +/* ---------------------------------------------------------------------------- + * HostSim phase-current ADC model constants. + * + * These mirror the Gen6FW PhaseCurrentADC signal chain (STM32H7 16-bit ADC, + * resistor divider, LA37S600 current transducer with a 1.65 V zero-current + * reference rail). platform_api.cpp uses them as the ideal defaults; scenario + * JSON "adc" keys can deviate from them to inject gain/offset/noise errors. + * -------------------------------------------------------------------------- */ +#if defined(__cplusplus) +namespace hostsim { namespace adc { + +constexpr unsigned kBits = 16u; /* ADC resolution */ +constexpr float kVrefV = 3.3f; /* ADC reference */ +constexpr float kRefVolts = 1.65f; /* zero-current rail */ +constexpr float kDivider = 2.0f / 3.0f; /* input resistor divider */ +constexpr float kSensitivityVPerA = 1.042e-3f; /* LA37S600 transducer */ +constexpr unsigned kMaxCounts = (1u << kBits) - 1u; + +}} // namespace hostsim::adc +#endif diff --git a/Images/HostSim/include/platform_api.h b/Images/HostSim/include/platform_api.h new file mode 100644 index 00000000..3a5a3dc7 --- /dev/null +++ b/Images/HostSim/include/platform_api.h @@ -0,0 +1,218 @@ +#pragma once + +/** + * @brief Slim platform API exposed to RTE-generated code (HostSim). + * + * Signatures match the Gen6FW / NucleoL476FW platform_api.h subset so graphs + * built against upstream node templates keep working. Simulator behaviour + * lives in src/platform_api.cpp behind these calls. + */ + +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +void platform_pwm_set(float du, float dv, float dw); +void platform_pwm_set_voltage_vector(float valpha, float vbeta, float vdc); + +/* Open-loop sinusoidal PWM (SPWM) helper for graph demos. + * Advances an internal electrical angle each call and writes phase duties in %. */ +void platform_spwm_step(float modulation_index, float electrical_freq_hz, float dt_s, + float* duty_u, float* duty_v, float* duty_w); +float platform_spwm_get_angle_rad(void); +float platform_spwm_get_angle_deg(void); +void platform_spwm_reset(void); + +/* Switched PWM scope outputs (triangle carrier vs duty command). */ +float platform_pwm_scope_get_gate_u(void); +float platform_pwm_scope_get_gate_v(void); +float platform_pwm_scope_get_gate_w(void); +float platform_pwm_scope_get_v_u(void); +float platform_pwm_scope_get_v_v(void); +float platform_pwm_scope_get_v_w(void); +float platform_pwm_scope_get_v_uv(void); +float platform_pwm_scope_get_v_vw(void); +float platform_pwm_scope_get_v_wu(void); + +/* Sensed phase currents [A] from the PWM-synchronous ADC model (Gen6 + * PhaseCurrentADC::sample semantics): the inverted-wiring recovery of the + * latched injected channels minus the calibrated zero offset, with W + * reconstructed as -(U + V). Always reflects the latest conversion; true + * whenever a plant is present. */ +bool platform_get_phase_currents(float* iu_a, float* iv_a, float* iw_a); + +/* Current observer (Gen6FW Inverter::CurrentObserver; sim port lives in + * src/current_observer.cpp and keeps the same predict/correct math). + * + * platform_observer_init_from_calibration seeds R/L/flux from the scenario + * "motor" parameters (rs_ohm, ld_h, flux_wb, pole_pairs) — the sim's + * equivalent of the Gen6 MotorCalibration snapshot — and resets the state, + * exactly like Gen6's platform_api.cpp. The runtime also applies those + * parameters once at domain init, so a graph that only drives + * predict/correct still sees plausible defaults. The predict step uses + * platform_get_current_domain_dt() just like on hardware (the scheduler now + * sets it per domain, see below). + * + * platform_set/get_use_observer is pure flag storage, as on Gen6: the flag + * does not change what the observer computes — generated graph code (or the + * native FOC on hardware) decides whether to consume observer currents. + * (e.g. Gen6 FocControlManager reads m_use_observer to pick its feedback; + * a graph does the same with a gate node calling platform_get_use_observer.) + * + * As in Gen6, platform_get_observer_currents is only meaningful after at + * least one platform_observer_correct call. All quantities use FOC + * convention: graphs feed the sign-corrected currents (the sim models the + * hardware's inverted sensor wiring, graphs negate as usual). */ +void platform_set_use_observer(bool enabled); +bool platform_get_use_observer(void); +void platform_get_observer_currents(float* iu_a, float* iv_a, float* iw_a); +void platform_observer_predict(float valpha_v, float vbeta_v, + float theta_elec_rad, float dt_s); +void platform_observer_set_motor_params(float r_ohm, float l_henry, + float flux_linkage_wb, + float pole_pairs); +void platform_observer_init_from_calibration(void); +void platform_observer_correct(float iu_meas_a, float iv_meas_a, + float diudt_a_per_s, float divdt_a_per_s, + uint32_t t_us); + +/* Phase-current ADC injected channels, mirroring Gen6FW's PhaseCurrentADC + * signal chain (16-bit ADC, resistor divider, current transducer with a + * ~1.65 V zero-current reference rail; constants in RteParams.h), including + * the hardware's inverted sensor wiring (graphs fix the sign with their + * InvertPolarity parameter, as on Gen6): + * + * *_sig = reference counts - phase_current * counts_per_amp (rail-saturated) + * *_ref = reference rail counts + * recovered A = (sig - ref) * (vref / 2^bits) / (divider * sensitivity) + * + * Samples latch per conversion trigger (each adc_isr tick or an explicit + * platform_sample_application_sensors call). Scenario "adc" keys inject + * resolution/reference/gain/offset/noise error terms; the offset getters + * report the calibrated zero-offset in recovered amps (i.e. -(injected + * bias), matching Gen6's standstill calibration). */ +uint32_t platform_adc_get_injected_u_sig(void); +uint32_t platform_adc_get_injected_v_sig(void); +uint32_t platform_adc_get_injected_u_ref(void); +uint32_t platform_adc_get_injected_v_ref(void); +float platform_adc_get_offset_u_a(void); +float platform_adc_get_offset_v_a(void); + +/* Latest phase-current micro-burst [A], Gen6FW PhaseCurrentADC::BurstSample + * layout: two points per phase (ranks 1/2 and 3/4 of the injected sequence). + * Both points come from the same latched conversion (the sim models no + * intra-burst droop, so iu1 == iu0 etc.). Currents are recovered with the + * same (sig - ref) * lsb / (divider * sensitivity) chain and the calibrated + * zero offset is subtracted, exactly like the Gen6 firmware path. + * time_us receives the sim timestamp of the latched conversion (may be + * nullptr). Returns false on null current outputs; valid only after a + * conversion (each adc_isr tick triggers one). */ +bool platform_adc_get_burst_sample(float* iu0_a, float* iv0_a, + float* iu1_a, float* iv1_a, + uint32_t* time_us); + +/* TIM1 auto-reload value from the Gen6 hardware configuration (275 MHz timer + * clock, center-aligned -> ARR 27500, Src/tim.c). Constant in the sim; the + * graph only uses it to scale duty cycle into timer ticks. */ +uint32_t platform_pwm_get_arr(void); + +/* Adaptive phase-current sample scheduling, port of Gen6FW + * PWM_FindSafeSamplePoint + wrapper: converts duties to CCR ticks against + * arr, finds the widest all-low / all-high quiet window in the center-aligned + * PWM period, requires at least 1650 ticks (~6 us at 275 MHz). + * Returns the largest gap in timer ticks, 0 when the legacy bottom-trigger + * fallback would be used. The sim's ADC conversions stay adc_isr tick-driven + * regardless; the CCR4 side effect does not exist here. */ +uint32_t platform_schedule_adaptive_sample(float duty_u, float duty_v, + float duty_w, uint32_t arr); + +/* Encoder angle as the Gen6 sin/cos encoder driver reports it: MECHANICAL + * degrees in [0, 360) — one sin/cos cycle per mechanical revolution. The sim + * plant integrates the electrical angle, so the mechanical angle is derived + * as theta_e / pole_pairs (mod 360). The graph's Transforms.ElecAngle node + * re-applies the pole-pair factor, exactly as FocController does on + * hardware. platform_get_encoder_angle returns true only when a new sample + * arrived since the last call (the value is still written either way). */ +bool platform_get_encoder_angle(float* angle_deg); +float platform_get_encoder_angle_latest(void); +/* Mechanical speed [rpm], signed by direction. Both rpm getters read the + * same plant state; the sim reports the exact plant speed instead of the + * Gen6 encoder driver's EMA-windowed estimate. */ +float platform_get_motor_rpm(void); +float platform_get_rpm_mech(void); +/* Electrical speed [rpm] = mech rpm * pole pairs * encoder sign (Gen6 + * platform_get_rpm_elec: rpmMech * pole_pairs * MotorCalibration sign). + * The simulated encoder counts in the positive rotation direction, so the + * encoder sign is +1. */ +float platform_get_rpm_elec(void); +/* Raw encoder sin/cos ADC counts (Gen6 EncoderADC::lastRawSin/lastRawCos). + * The mechanical angle is rendered as a 16-bit ADC sinusoid: center 32768, + * amplitude 30000 (one cycle per mechanical revolution, inside the driver's + * 427..65388 hard caps — same model as HostSIL's sil_encoder_adc.cpp). + * atan2 of the decoded pair reproduces platform_get_encoder_angle_latest() + * up to count quantization. */ +uint32_t platform_get_encoder_raw_sin(void); +uint32_t platform_get_encoder_raw_cos(void); +float platform_get_dc_link_voltage(void); +/* Plant readback: terminal voltage the plant actually applied last step + * (volt vs DC-), not the requested duty. */ +float platform_phase_voltage_u(void); +float platform_phase_voltage_v(void); +float platform_phase_voltage_w(void); +float platform_get_throttle_a(void); +float platform_get_throttle_b(void); +bool platform_get_throttle_valid(void); +/* Scenario-driven ("environment" object); defaults 25 C. */ +float platform_get_motor_temperature(void); +float platform_get_inverter_temperature(uint8_t channel); + +/* Digital IO loopback: reads see the last written level per pin. */ +bool platform_digital_read(uint8_t pin); +void platform_digital_write(uint8_t pin, bool value); + +/* CAN bus (bus 1 = A, 2 = B). Latest-frame store keyed by (bus, id): sent + * frames are readable via platform_can_rx when loopback is on (scenario "can" + * object, default true); scenario "frames" entries can also inject traffic. + * platform_can_rx returns the DLC (0..8) or -1 when no frame arrived. */ +bool platform_can_send(uint8_t bus, uint32_t id, bool ext, + const uint8_t* data, uint8_t dlc); +int platform_can_rx(uint8_t bus, uint32_t id, uint8_t* data, uint32_t* seq_out); +/* Slow-channel conversion trigger; also refreshes the ADC sample latch. */ +void platform_sample_application_sensors(void); + +void platform_raise_fault(uint32_t source, uint8_t reason); +bool platform_has_critical_fault(void); + +/* Critical sections (recursive mutex guards shared sim/config state). */ +void platform_critical_enter(void); +void platform_critical_exit(void); + +/* Runtime config store. In-memory by default; scenario key + * "config_file" additionally persists key=value lines to a file, preloaded at + * startup and flushed on every set/load-created default. */ +float platform_config_load(const char* key, float default_value); +void platform_config_set(const char* key, float value); +float platform_config_get(const char* key); + +void platform_telemetry_log_f32(const char* key, float value); + +uint32_t platform_millis(void); +uint32_t platform_micros(void); + +/* Time step of the currently executing generated domain. Mirrors the Gen6 + * ISR wrappers (pwm.cpp / PhaseCurrentADC.cpp / InverterMain.cpp): the + * scheduler calls platform_set_current_domain_dt() with the domain's step + * right before each generated domain step, so the getter returns 1/tim_isr_hz + * inside tim_isr nodes, 1/adc_isr_hz inside adc_isr nodes, and 1/app_loop_hz + * inside app_loop nodes. hw.current_observer uses it for the prediction dt; + * nodes that need a step size outside a domain step should still carry a Dt + * parameter. */ +void platform_set_current_domain_dt(float dt_s); +float platform_get_current_domain_dt(void); + +#ifdef __cplusplus +} +#endif diff --git a/Images/HostSim/include/sharedspice.h b/Images/HostSim/include/sharedspice.h new file mode 100644 index 00000000..3b7c82ab --- /dev/null +++ b/Images/HostSim/include/sharedspice.h @@ -0,0 +1,130 @@ +/* Minimal sharedspice.h for runtime dynamic loading of libngspice. + * Derived from the public ngspice shared-library interface. + */ + +#ifndef SHAREDSPICE_H +#define SHAREDSPICE_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* No import/export decoration needed when loading the library dynamically. */ +#ifndef SHAREDSPICE_IMPEXP +#define SHAREDSPICE_IMPEXP +#endif + +/* Portable bool/pstdint macros. In C++ bool is a keyword; in C on Windows we + * typedef it to int to match ngspice's internal bool.h. + */ +#if !defined(__cplusplus) +# if defined(_MSC_VER) || defined(__MINGW32__) || defined(__CYGWIN__) + typedef int bool; +# ifndef true +# define true 1 +# endif +# ifndef false +# define false 0 +# endif +# else +# include +# endif +#endif + +#include + +/* Complex numbers (used by vector_info). */ +struct ngcomplex { + double cx_real; + double cx_imag; +}; +typedef struct ngcomplex ngcomplex_t; + +/* Direct vector info returned by ngGet_Vec_Info. */ +typedef struct vector_info { + char* v_name; + int v_type; + short v_flags; + double* v_realdata; + ngcomplex_t* v_compdata; + int v_length; +} vector_info, *pvector_info; + +/* Values for a single vector at the current time point. */ +typedef struct vecvalues { + char* name; + double creal; + double cimag; + bool is_scale; + bool is_complex; +} vecvalues, *pvecvalues; + +/* Values for all vectors at the current time point. */ +typedef struct vecvaluesall { + int veccount; + int vecindex; + pvecvalues* vecsa; +} vecvaluesall, *pvecvaluesall; + +/* Metadata for a single vector. */ +typedef struct vecinfo { + int number; + char* vecname; + bool is_real; + void* pdvec; + void* pdvecscale; +} vecinfo, *pvecinfo; + +/* Metadata for all vectors in the current plot. */ +typedef struct vecinfoall { + char* name; + char* title; + char* date; + char* type; + int veccount; + pvecinfo* vecs; +} vecinfoall, *pvecinfoall; + +/* Callbacks passed to ngSpice_Init. */ +typedef int (SendChar)(char* output, int ident, void* userdata); +typedef int (SendStat)(char* output, int ident, void* userdata); +typedef int (ControlledExit)(int exitstatus, bool immediate_unloading, + bool quit_on_exit, int ident, void* userdata); +typedef int (SendData)(pvecvaluesall data, int structcount, int ident, + void* userdata); +typedef int (SendInitData)(pvecinfoall data, int ident, void* userdata); +typedef int (BGThreadRunning)(bool running, int ident, void* userdata); + +/* Callbacks passed to ngSpice_Init_Sync. */ +typedef int (GetVSRCData)(double* vval, double timeval, char* node, int ident, + void* userdata); +typedef int (GetISRCData)(double* ival, double timeval, char* node, int ident, + void* userdata); +typedef int (GetSyncData)(double actualtime, double* deltatime, + double olddelta, int redostep, int ident, + int location, void* userdata); + +SHAREDSPICE_IMPEXP int ngSpice_Init(SendChar* printfcn, SendStat* statfcn, + ControlledExit* ngexit, SendData* sdata, + SendInitData* sinitdata, + BGThreadRunning* bgtrun, void* userdata); + +SHAREDSPICE_IMPEXP int ngSpice_Init_Sync(GetVSRCData* vsrcdat, + GetISRCData* isrcdat, + GetSyncData* syncdat, int* ident, + void* userdata); + +SHAREDSPICE_IMPEXP int ngSpice_Command(char* command); +SHAREDSPICE_IMPEXP int ngSpice_Circ(char** circarray); +SHAREDSPICE_IMPEXP bool ngSpice_running(void); +SHAREDSPICE_IMPEXP char* ngSpice_CurPlot(void); +SHAREDSPICE_IMPEXP char** ngSpice_AllPlots(void); +SHAREDSPICE_IMPEXP char** ngSpice_AllVecs(char* plotname); +SHAREDSPICE_IMPEXP bool ngSpice_SetBkpt(double time); +SHAREDSPICE_IMPEXP pvector_info ngGet_Vec_Info(char* vecname); + +#ifdef __cplusplus +} +#endif + +#endif /* SHAREDSPICE_H */ diff --git a/Images/HostSim/plants/dcdc_buck.cir b/Images/HostSim/plants/dcdc_buck.cir new file mode 100644 index 00000000..d3dbb8d3 --- /dev/null +++ b/Images/HostSim/plants/dcdc_buck.cir @@ -0,0 +1,79 @@ +* HostSim 3-leg synchronous buck -> 3 independent DC buses (AVERAGED model). +* +* Why averaged: the HostSim<->ngspice seam injects one voltage per control +* step (zero-order hold across the tick); there is no per-carrier-cycle +* signal path, so each leg's switch node is an ideal behavioral V-source +* driven by the host at the control rate with duty*VDC. Inductor ripple and +* dead-time effects are intentionally out of scope -- the same +* "averaged-duty drive" convention the motor netlists (inverter_rl.cir / +* inverter_pmsm.cir) already use. +* +* Contract with NgspicePlant dcdc mode (src/plant/ngspice_plant.cpp, +* scenario: plant.mode "dcdc"): +* Vu/Vv/Vw external sources per-leg averaged switch-node voltage, +* driven by the host with duty_pct * VDC +* Vsen1..3 0V sense sources leg current read-back: i(vsenN) > 0 means +* current flowing leg -> bus (power out) +* bus1..3 bus nodes probed per control step as v(busN) +* The sense sources exist so the current read-back sign/point is fixed once, +* here in the netlist, instead of depending on how the driven sources are +* wired. Do not rename Vu/Vv/Vw/Vsen1..3/bus1..3; dcdc-mode detection keys +* on the Vsen trio. +* +* alterparam tolerance: NgspicePlant::ApplyParams always pushes +* RS / LS / VDC (from the scenario motor.rs_ohm / ld_h+ld_q / vdc_v), so all +* three are defined AND used here: +* VDC documented retune knob; the host scales duty*VDC itself, so it is +* intentionally not referenced by any element +* RS per-leg conduction resistance (FET Rds_on + winding DCR) +* LS leg filter inductance; the scenario's motor.ld_h/lq_h set it, same +* convention as the motor netlists +* DCDC-side retuning (edit or `alterparam` at runtime): BUS_CAP_UF, +* BUS_ESR_MO, LOAD1/2/3_OHM. Note ngspice brace substitution spacing: unit +* suffixes must live inside the braces — `{BUS_CAP_UF}u` expands to +* "470 u" and the element is dropped with "unknown parameter (u)". + +.param VDC = 48.0 +.param RS = 0.02 +.param LS = 33u +.param BUS_CAP_UF = 470 +.param BUS_ESR_MO = 20 +.param LOAD1_OHM = 5 +.param LOAD2_OHM = 10 +.param LOAD3_OHM = 2.5 + +* Leg 1: averaged switch node -> sense -> RS (conduction loss) -> L -> bus +Vu u1_sw 0 dc 0 external +Vsen1 u1_sw u1_r dc 0 +Rs1 u1_r u1_f {RS} +L1 u1_f bus1 {LS} +* Bus 1: capacitor (with ESR) + resistive load +Cbus1 bus1 bus1_c {BUS_CAP_UF*1e-6} +Resr1 bus1_c 0 {BUS_ESR_MO*1e-3} +Rload1 bus1 0 {LOAD1_OHM} + +* Leg 2 +Vv u2_sw 0 dc 0 external +Vsen2 u2_sw u2_r dc 0 +Rs2 u2_r u2_f {RS} +L2 u2_f bus2 {LS} +Cbus2 bus2 bus2_c {BUS_CAP_UF*1e-6} +Resr2 bus2_c 0 {BUS_ESR_MO*1e-3} +Rload2 bus2 0 {LOAD2_OHM} + +* Leg 3 +Vw u3_sw 0 dc 0 external +Vsen3 u3_sw u3_r dc 0 +Rs3 u3_r u3_f {RS} +L3 u3_f bus3 {LS} +Cbus3 bus3 bus3_c {BUS_CAP_UF*1e-6} +Resr3 bus3_c 0 {BUS_ESR_MO*1e-3} +Rload3 bus3 0 {LOAD3_OHM} + +* UIC: zero-current / zero-voltage cold start; without it the OP shorts the +* inductors and opens the capacitors. TSTOP is deliberately generous -- the +* host pauses the run with stop breakpoints each control substep and can +* abandon the analysis mid-way. +.tran 10us 10s uic + +.end diff --git a/Images/HostSim/plants/dcdc_parallel.cir b/Images/HostSim/plants/dcdc_parallel.cir new file mode 100644 index 00000000..1f119676 --- /dev/null +++ b/Images/HostSim/plants/dcdc_parallel.cir @@ -0,0 +1,58 @@ +* HostSim 3-leg synchronous buck with all legs PARALLELED into one shared DC +* bus (averaged model; see dcdc_buck.cir for the rationale and the full +* interface contract). +* +* Same NgspicePlant dcdc-mode contract as dcdc_buck.cir: +* Vu/Vv/Vw external sources per-leg averaged switch-node voltage +* Vsen1..3 0V sense sources per-leg current, + = leg -> shared bus +* bus1..3 bus nodes v(busN) probes +* +* The three legs share ONE bus node (bus1): one capacitor bank and one load. +* Vtie2/Vtie3 alias bus2/bus3 onto bus1 so the uniform v(bus1..3) probe +* contract holds (they carry no current; all load current returns via the +* legs' sense sources). +* +* Current sharing note: with equal duties and symmetric legs the load current +* splits in exact thirds; a small duty mismatch redistributes current by +* (delta_D*VDC)/RS because averaged legs are near-ideal voltage sources -- +* on hardware this is exactly why paralleled converters need current-mode or +* droop control. + +.param VDC = 48.0 +.param RS = 0.02 +.param LS = 33u +.param BUS_CAP_UF = 470 +.param BUS_ESR_MO = 20 +.param LOAD_OHM = 2.5 + +* Leg 1 +Vu u1_sw 0 dc 0 external +Vsen1 u1_sw u1_r dc 0 +Rs1 u1_r u1_f {RS} +L1 u1_f bus1 {LS} + +* Leg 2 +Vv u2_sw 0 dc 0 external +Vsen2 u2_sw u2_r dc 0 +Rs2 u2_r u2_f {RS} +L2 u2_f bus1 {LS} + +* Leg 3 +Vw u3_sw 0 dc 0 external +Vsen3 u3_sw u3_r dc 0 +Rs3 u3_r u3_f {RS} +L3 u3_f bus1 {LS} + +* Shared bus: single capacitor bank (with ESR) and single load. +Cbus bus1 bus_c {BUS_CAP_UF*1e-6} +Resr bus_c 0 {BUS_ESR_MO*1e-3} +Rload bus1 0 {LOAD_OHM} + +* bus2/bus3 aliases (uniform v(busN) probe contract) +Vtie2 bus1 bus2 dc 0 +Vtie3 bus1 bus3 dc 0 + +* UIC cold start, generous TSTOP (host drives with stop breakpoints). +.tran 10us 10s uic + +.end diff --git a/Images/HostSim/plants/inverter_pmsm.cir b/Images/HostSim/plants/inverter_pmsm.cir new file mode 100644 index 00000000..ac7f4f5c --- /dev/null +++ b/Images/HostSim/plants/inverter_pmsm.cir @@ -0,0 +1,39 @@ +* HostSim 3-Phase Inverter + PMSM (wye) SPICE Netlist +* Per phase the R-L sits in series with an external back-EMF source, so the +* back-EMF is part of the circuit equation instead of being subtracted +* analytically before driving the plant. +* Inverter terminal voltages (Vu/Vv/Vw) and back-EMFs (Veu/Vev/Vew) are +* driven by HostSim via libngspice callbacks. The back-EMF sources must keep +* a 'V' name prefix: ngspice would parse 'Eu'-style names as VCVS elements. +* +* Per-phase KVL (current flows Vu -> Ru -> Veu -> Lu -> neutral): +* v_terminal = R*i + e + L*di/dt +* matches the analytic model v_terminal = R*i + L*di/dt + emf used elsewhere, +* so Veu/Vev/Vew take the plain back-EMF value (e of that phase). + +.param VDC = 48.0 +.param RS = 0.05 +.param LS = 0.0001 + +* Phase U external source +Vu u_node 0 dc 0 external +Ru u_node u_e {RS} +Veu u_e u_mid dc 0 external +Lu u_mid n_node {LS} + +* Phase V external source +Vv v_node 0 dc 0 external +Rv v_node v_e {RS} +Vev v_e v_mid dc 0 external +Lv v_mid n_node {LS} + +* Phase W external source +Vw w_node 0 dc 0 external +Rw w_node w_e {RS} +Vew w_e w_mid dc 0 external +Lw w_mid n_node {LS} + +* UIC: zero-current cold start; no DC OP shorting the inductors. +.tran 10us 1s uic + +.end diff --git a/Images/HostSim/plants/inverter_rl.cir b/Images/HostSim/plants/inverter_rl.cir new file mode 100644 index 00000000..e1c5ebcc --- /dev/null +++ b/Images/HostSim/plants/inverter_rl.cir @@ -0,0 +1,27 @@ +* HostSim 3-Phase Inverter + Wye RL Load SPICE Netlist +* External voltage sources are driven by HostSim via libngspice callbacks. + +.param VDC = 48.0 +.param RS = 0.05 +.param LS = 0.0001 + +* Phase U external source +Vu u_node 0 dc 0 external +Ru u_node u_mid {RS} +Lu u_mid n_node {LS} + +* Phase V external source +Vv v_node 0 dc 0 external +Rv v_node v_mid {RS} +Lv v_mid n_node {LS} + +* Phase W external source +Vw w_node 0 dc 0 external +Rw w_node w_mid {RS} +Lw w_mid n_node {LS} + +* Without UIC the OP shorts the inductors and the transient starts from the +* DC operating point (~416A inrush); UIC forces the zero-current cold start. +.tran 10us 1s uic + +.end diff --git a/Images/HostSim/scenarios/dcdc_3bus.json b/Images/HostSim/scenarios/dcdc_3bus.json new file mode 100644 index 00000000..3028953f --- /dev/null +++ b/Images/HostSim/scenarios/dcdc_3bus.json @@ -0,0 +1,26 @@ +{ + "simulation": { + "duration_s": 0.3, + "tim_isr_hz": 10000.0, + "app_loop_hz": 1000.0, + "telem_hz": 500.0, + "trace_csv": "dcdc_3bus_trace.csv", + "plant": { + "backend": "ngspice", + "netlist": "plants/dcdc_buck.cir", + "substeps": 1, + "mode": "dcdc" + } + }, + "motor": { + "rs_ohm": 0.02, + "ld_h": 0.000033, + "lq_h": 0.000033, + "vdc_v": 48.0 + }, + "dcdc": { + "duty_u_pct": 30.0, + "duty_v_pct": 20.0, + "duty_w_pct": 40.0 + } +} diff --git a/Images/HostSim/scenarios/dcdc_parallel.json b/Images/HostSim/scenarios/dcdc_parallel.json new file mode 100644 index 00000000..b9acfac0 --- /dev/null +++ b/Images/HostSim/scenarios/dcdc_parallel.json @@ -0,0 +1,26 @@ +{ + "simulation": { + "duration_s": 0.3, + "tim_isr_hz": 10000.0, + "app_loop_hz": 1000.0, + "telem_hz": 500.0, + "trace_csv": "dcdc_parallel_trace.csv", + "plant": { + "backend": "ngspice", + "netlist": "plants/dcdc_parallel.cir", + "substeps": 1, + "mode": "dcdc" + } + }, + "motor": { + "rs_ohm": 0.02, + "ld_h": 0.000033, + "lq_h": 0.000033, + "vdc_v": 48.0 + }, + "dcdc": { + "duty_u_pct": 30.0, + "duty_v_pct": 30.0, + "duty_w_pct": 30.0 + } +} diff --git a/Images/HostSim/scenarios/default_motor.json b/Images/HostSim/scenarios/default_motor.json new file mode 100644 index 00000000..7099da88 --- /dev/null +++ b/Images/HostSim/scenarios/default_motor.json @@ -0,0 +1,33 @@ +{ + "motor": { + "name": "generic_pmsm", + "comment": "Replace with calibrated values for your machine (e.g. 75-5 bench motor).", + "rs_ohm": 0.08, + "ld_h": 0.00012, + "lq_h": 0.00012, + "flux_wb": 0.0085, + "pole_pairs": 7, + "inertia_kg_m2": 1.2e-5, + "friction_nm_per_rad_s": 2.0e-4, + "vdc_v": 48.0 + }, + "simulation": { + "duration_s": 0.5, + "tim_isr_hz": 10000, + "adc_isr_hz": 10000, + "app_loop_hz": 1000, + "trace_csv": "trace.csv", + "demo_fallback": true + }, + "throttle_a": { + "type": "ramp", + "start": 0.0, + "end": 0.75, + "start_s": 0.05, + "end_s": 0.4 + }, + "throttle_b": { + "type": "constant", + "value": 0.0 + } +} diff --git a/Images/HostSim/scenarios/induction_vhz.cfg b/Images/HostSim/scenarios/induction_vhz.cfg new file mode 100644 index 00000000..b0138069 --- /dev/null +++ b/Images/HostSim/scenarios/induction_vhz.cfg @@ -0,0 +1,7 @@ +# V/Hz tuning for scenarios/induction_vhz.json (preload for the emitted +# graph's Values.Config nodes). The graph's VoltsPerHz default (1.6) would +# demand ~64 V peak at 40 Hz — far past the 2*Vdc/3 SVPWM ceiling on the 48 V +# link — so the ratio is retuned to keep the voltage vector in the linear +# modulation region, with a small boost for breakaway torque. +Induction.VoltsPerHz=0.55 +Induction.BoostVolts=1.5 diff --git a/Images/HostSim/scenarios/induction_vhz.json b/Images/HostSim/scenarios/induction_vhz.json new file mode 100644 index 00000000..d37821be --- /dev/null +++ b/Images/HostSim/scenarios/induction_vhz.json @@ -0,0 +1,31 @@ +{ + "comment": "Induction-machine V/Hz demo. Drives Assets/Examples/induction_vhz.json: the vars block seeds the graph's TargetHz Var node (the graph ramps it at Induction.SlewRateHzPs) and the config_file retunes the V/Hz ratio for a 48 V link.", + "motor": { + "name": "small_squirrel_cage_48v", + "machine": "induction", + "comment": "4-pole 48 V squirrel-cage induction machine (stationary alpha/beta ODE plant).", + "rs_ohm": 0.4, + "rr_ohm": 0.3, + "lm_h": 0.025, + "lls_h": 0.002, + "llr_h": 0.002, + "pole_pairs": 2, + "inertia_kg_m2": 5e-4, + "friction_nm_per_rad_s": 1e-3, + "vdc_v": 48.0 + }, + "simulation": { + "duration_s": 3.5, + "tim_isr_hz": 5000, + "adc_isr_hz": 5000, + "app_loop_hz": 1000, + "telem_hz": 500, + "trace_csv": "trace_induction_vhz.csv", + "config_file": "scenarios/induction_vhz.cfg" + }, + "vars": { + "TargetHz": 40.0 + }, + "throttle_a": { "type": "constant", "value": 0.0 }, + "throttle_b": { "type": "constant", "value": 0.0 } +} diff --git a/Images/HostSim/scenarios/ngspice_pmsm_demo.json b/Images/HostSim/scenarios/ngspice_pmsm_demo.json new file mode 100644 index 00000000..6408c7c4 --- /dev/null +++ b/Images/HostSim/scenarios/ngspice_pmsm_demo.json @@ -0,0 +1,28 @@ +{ + "simulation": { + "duration_s": 0.5, + "tim_isr_hz": 10000.0, + "app_loop_hz": 1000.0, + "telem_hz": 500.0, + "trace_csv": "ngspice_pmsm_trace.csv", + "plant": { + "backend": "ngspice", + "netlist": "plants/inverter_pmsm.cir", + "substeps": 4 + } + }, + "motor": { + "rs_ohm": 0.05, + "ld_h": 0.0001, + "lq_h": 0.0001, + "flux_wb": 0.008, + "pole_pairs": 7, + "inertia_kg_m2": 0.0005, + "friction_nm_per_rad_s": 0.001, + "vdc_v": 48.0 + }, + "throttle_a": { + "type": "constant", + "value": 1.0 + } +} diff --git a/Images/HostSim/scenarios/ngspice_rl_demo.json b/Images/HostSim/scenarios/ngspice_rl_demo.json new file mode 100644 index 00000000..de8491c5 --- /dev/null +++ b/Images/HostSim/scenarios/ngspice_rl_demo.json @@ -0,0 +1,28 @@ +{ + "simulation": { + "duration_s": 0.5, + "tim_isr_hz": 10000.0, + "app_loop_hz": 1000.0, + "telem_hz": 500.0, + "trace_csv": "ngspice_trace.csv", + "plant": { + "backend": "ngspice", + "netlist": "plants/inverter_rl.cir", + "substeps": 4 + } + }, + "motor": { + "rs_ohm": 0.05, + "ld_h": 0.0001, + "lq_h": 0.0001, + "flux_wb": 0.01, + "pole_pairs": 7, + "inertia_kg_m2": 0.005, + "friction_nm_per_rad_s": 0.001, + "vdc_v": 48.0 + }, + "throttle_a": { + "type": "constant", + "value": 1.0 + } +} diff --git a/Images/HostSim/scenarios/salient_pmsm.json b/Images/HostSim/scenarios/salient_pmsm.json new file mode 100644 index 00000000..a2ced489 --- /dev/null +++ b/Images/HostSim/scenarios/salient_pmsm.json @@ -0,0 +1,25 @@ +{ + "motor": { + "name": "salient_ipmsm", + "machine": "pmsm", + "comment": "Interior PMSM with real saliency (Lq = 3x Ld): the plant torque includes the (Ld-Lq)*id*iq reluctance term. Exercised by any FOC graph that holds id != 0 (e.g. MTPA reference generators, see Assets/Examples/foc_mtpa_demo.json and Images/HostSIL/scenarios/sil_foc_salient.json).", + "rs_ohm": 0.3, + "ld_h": 0.0005, + "lq_h": 0.0015, + "flux_wb": 0.01, + "pole_pairs": 7, + "inertia_kg_m2": 5e-5, + "friction_nm_per_rad_s": 1e-3, + "vdc_v": 48.0 + }, + "simulation": { + "duration_s": 2.5, + "tim_isr_hz": 10000, + "adc_isr_hz": 10000, + "app_loop_hz": 1000, + "telem_hz": 500, + "trace_csv": "trace_salient_pmsm.csv" + }, + "throttle_a": { "type": "ramp", "start": 0.0, "end": 0.2, "start_s": 0.1, "end_s": 1.5 }, + "throttle_b": { "type": "ramp", "start": 0.15, "end": 0.6, "start_s": 0.1, "end_s": 1.2 } +} diff --git a/Images/HostSim/scenarios/spwm_demo.json b/Images/HostSim/scenarios/spwm_demo.json new file mode 100644 index 00000000..b9b39ddc --- /dev/null +++ b/Images/HostSim/scenarios/spwm_demo.json @@ -0,0 +1,41 @@ +{ + "motor": { + "name": "generic_pmsm", + "comment": "SPWM demo: throttle_a = modulation index, throttle_b = electrical frequency map input.", + "rs_ohm": 0.08, + "ld_h": 0.00012, + "lq_h": 0.00012, + "flux_wb": 0.0085, + "pole_pairs": 7, + "inertia_kg_m2": 1.2e-5, + "friction_nm_per_rad_s": 2.0e-4, + "vdc_v": 48.0 + }, + "simulation": { + "duration_s": 2.0, + "tim_isr_hz": 10000, + "adc_isr_hz": 10000, + "app_loop_hz": 1000, + "telem_hz": 500, + "trace_csv": "trace_spwm.csv", + "pwm_scope": { + "enabled": true, + "carrier_hz": 100, + "telem_hz": 2000 + } + }, + "throttle_a": { + "type": "ramp", + "start": 0.0, + "end": 0.8, + "start_s": 0.1, + "end_s": 0.8 + }, + "throttle_b": { + "type": "ramp", + "start": 0.2, + "end": 0.8, + "start_s": 0.1, + "end_s": 1.5 + } +} diff --git a/Images/HostSim/scenarios/svpwm_live.json b/Images/HostSim/scenarios/svpwm_live.json new file mode 100644 index 00000000..5d35d5eb --- /dev/null +++ b/Images/HostSim/scenarios/svpwm_live.json @@ -0,0 +1,44 @@ +{ + "motor": { + "name": "generic_pmsm", + "comment": "SVPWM live demo with PWM scope enabled.", + "rs_ohm": 0.08, + "ld_h": 0.00012, + "lq_h": 0.00012, + "flux_wb": 0.0085, + "pole_pairs": 7, + "inertia_kg_m2": 1.2e-5, + "friction_nm_per_rad_s": 2.0e-4, + "vdc_v": 48.0 + }, + "simulation": { + "duration_s": 999999.0, + "tim_isr_hz": 10000, + "adc_isr_hz": 10000, + "app_loop_hz": 1000, + "telem_hz": 500, + "realtime_factor": 1.0, + "live": true, + "listen_host": "127.0.0.1", + "listen_port": 14608, + "pwm_scope": { + "enabled": 1, + "carrier_hz": 100, + "telem_hz": 2000 + } + }, + "throttle_a": { + "type": "ramp", + "start": 0.5, + "end": 0.85, + "start_s": 0.5, + "end_s": 2.0 + }, + "throttle_b": { + "type": "ramp", + "start": 0.2, + "end": 0.5, + "start_s": 0.5, + "end_s": 3.0 + } +} diff --git a/Images/HostSim/scripts/emit_and_run.ps1 b/Images/HostSim/scripts/emit_and_run.ps1 new file mode 100644 index 00000000..adda9394 --- /dev/null +++ b/Images/HostSim/scripts/emit_and_run.ps1 @@ -0,0 +1,52 @@ +# Run RTECodeEmitter on a graph, then build the emitted HostSim tree. +# Usage: powershell -File scripts\emit_and_run.ps1 [-Graph ] +param( + [string]$Graph = "" +) + +$ErrorActionPreference = "Stop" + +$hostSimRoot = Split-Path $PSScriptRoot -Parent +$repoRoot = Split-Path (Split-Path $hostSimRoot -Parent) -Parent +if ($Graph -eq "") { $Graph = Join-Path $hostSimRoot "baseline_graph.json" } + +function To-WslPath([string]$p) { + $full = (Resolve-Path $p).Path + return "/mnt/" + $full.Substring(0, 1).ToLower() + ($full.Substring(2) -replace '\\', '/') +} + +$wslRepo = To-WslPath $repoRoot +$wslGraph = To-WslPath $Graph +$emitter = "/opt/rtehost/build/Source/RTECodeEmitter/RTECodeEmitter" +$emittedRel = "build/hostsim_emitted" + +Get-Process | Where-Object { $_.ProcessName -match '^(host_sim|NodeGUI)$' } | + Stop-Process -Force -ErrorAction SilentlyContinue +Start-Sleep -Milliseconds 500 + +$winEmitted = Join-Path $repoRoot "build\hostsim_emitted" +if (Test-Path $winEmitted) { + Remove-Item -LiteralPath $winEmitted -Recurse -Force -ErrorAction SilentlyContinue +} +wsl -d Ubuntu -u root -- bash -lc "cd $wslRepo && rm -rf $emittedRel" 2>$null + +wsl -d Ubuntu -u root -- bash -lc "cd $wslRepo && $emitter --base-src Images/HostSim --graph $wslGraph --output $emittedRel --verbosity info" +if ($LASTEXITCODE -ne 0) { throw "RTECodeEmitter failed" } + +$emitted = Join-Path $repoRoot "build\hostsim_emitted" +$buildDir = Join-Path $repoRoot "build\hostsim_emitted_build" +Remove-Item -Recurse -Force $buildDir -ErrorAction SilentlyContinue + +cmake -S $emitted -B $buildDir +if ($LASTEXITCODE -ne 0) { throw "cmake configure failed" } +cmake --build $buildDir +if ($LASTEXITCODE -ne 0) { throw "cmake build failed" } + +$exe = Join-Path $buildDir "host_sim.exe" +if (-not (Test-Path $exe)) { $exe = Join-Path $buildDir "host_sim" } +if (-not (Test-Path $exe)) { $exe = Join-Path $buildDir "Debug\host_sim.exe" } +if (-not (Test-Path $exe)) { $exe = Join-Path $buildDir "Release\host_sim.exe" } + +$scenario = Join-Path $emitted "scenarios\default_motor.json" +& $exe $scenario +Write-Host "Emit-and-run complete: $exe" diff --git a/Images/HostSim/scripts/emit_and_run.sh b/Images/HostSim/scripts/emit_and_run.sh new file mode 100755 index 00000000..756382f0 --- /dev/null +++ b/Images/HostSim/scripts/emit_and_run.sh @@ -0,0 +1,29 @@ +#!/usr/bin/env bash +set -euo pipefail + +SCRIPT_DIR="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)" +HOSTSIM_ROOT="$(cd "${SCRIPT_DIR}/.." && pwd)" +REPO_ROOT="$(cd "${HOSTSIM_ROOT}/../.." && pwd)" +GRAPH="${1:-${HOSTSIM_ROOT}/baseline_graph.json}" + +EMITTER="${RTE_EMITTER:-${REPO_ROOT}/build/bin/RTECodeEmitter}" +if [[ ! -x "${EMITTER}" ]]; then + echo "RTECodeEmitter not found at ${EMITTER}" >&2 + echo "Build host tools: cmake -B build && cmake --build build --target RTECodeEmitter" >&2 + exit 1 +fi + +rm -rf "${REPO_ROOT}/build/hostsim_emitted" +"${EMITTER}" \ + --base-src "${HOSTSIM_ROOT}" \ + --graph "${GRAPH}" \ + --output "${REPO_ROOT}/build/hostsim_emitted" \ + --verbosity info + +BUILD_DIR="${REPO_ROOT}/build/hostsim_emitted_build" +rm -rf "${BUILD_DIR}" +cmake -S "${REPO_ROOT}/build/hostsim_emitted" -B "${BUILD_DIR}" +cmake --build "${BUILD_DIR}" + +"${BUILD_DIR}/host_sim" "${REPO_ROOT}/build/hostsim_emitted/scenarios/default_motor.json" +echo "Emit-and-run complete: ${BUILD_DIR}/host_sim" diff --git a/Images/HostSim/scripts/plot_sim.py b/Images/HostSim/scripts/plot_sim.py new file mode 100644 index 00000000..b6e1a2f8 --- /dev/null +++ b/Images/HostSim/scripts/plot_sim.py @@ -0,0 +1,72 @@ +#!/usr/bin/env python3 +"""Plot HostSim CSV traces for offline inspection.""" + +from __future__ import annotations + +import argparse +import csv +from pathlib import Path + +import matplotlib.pyplot as plt + + +def load_trace(path: Path) -> dict[str, list[float]]: + cols: dict[str, list[float]] = {} + with path.open(newline="") as f: + reader = csv.DictReader(f) + for row in reader: + for k, v in row.items(): + cols.setdefault(k, []).append(float(v)) + return cols + + +def main() -> None: + parser = argparse.ArgumentParser(description=__doc__) + parser.add_argument("csv", type=Path, help="trace.csv from HostSim") + parser.add_argument("-o", "--output", type=Path, help="save figure instead of showing") + args = parser.parse_args() + + data = load_trace(args.csv) + t_ms = [x / 1000.0 for x in data["time_us"]] + + fig, axes = plt.subplots(4, 1, figsize=(10, 9), sharex=True) + fig.suptitle(f"HostSim trace: {args.csv.name}") + + axes[0].plot(t_ms, data["throttle_a"], label="throttle_a") + axes[0].plot(t_ms, data["throttle_b"], label="throttle_b", alpha=0.7) + axes[0].set_ylabel("throttle") + axes[0].legend(loc="upper right") + axes[0].grid(True, alpha=0.3) + + axes[1].plot(t_ms, data["duty_u"], label="duty_u") + axes[1].plot(t_ms, data["duty_v"], label="duty_v") + axes[1].plot(t_ms, data["duty_w"], label="duty_w") + axes[1].set_ylabel("duty %") + axes[1].legend(loc="upper right", ncol=3, fontsize=8) + axes[1].grid(True, alpha=0.3) + + axes[2].plot(t_ms, data["i_a"], label="i_a") + axes[2].plot(t_ms, data["i_b"], label="i_b") + axes[2].plot(t_ms, data["i_c"], label="i_c") + axes[2].set_ylabel("current [A]") + axes[2].legend(loc="upper right", ncol=3, fontsize=8) + axes[2].grid(True, alpha=0.3) + + axes[3].plot(t_ms, data["theta_e"], label="theta_e [deg]") + ax3b = axes[3].twinx() + ax3b.plot(t_ms, data["omega_e"], color="tab:red", alpha=0.6, label="omega_e") + axes[3].set_ylabel("angle [deg]") + ax3b.set_ylabel("omega_e [rad/s]") + axes[3].set_xlabel("time [ms]") + axes[3].grid(True, alpha=0.3) + + fig.tight_layout() + if args.output: + fig.savefig(args.output, dpi=150) + print(f"wrote {args.output}") + else: + plt.show() + + +if __name__ == "__main__": + main() diff --git a/Images/HostSim/scripts/run_live.sh b/Images/HostSim/scripts/run_live.sh new file mode 100755 index 00000000..156cf174 --- /dev/null +++ b/Images/HostSim/scripts/run_live.sh @@ -0,0 +1,44 @@ +#!/usr/bin/env bash +# Run the already-built HostSim base image in live mode and (optionally) open NodeGUI. +set -euo pipefail + +SCRIPT_DIR="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)" +HOSTSIM_ROOT="$(cd "${SCRIPT_DIR}/.." && pwd)" +REPO_ROOT="$(cd "${HOSTSIM_ROOT}/../.." && pwd)" + +SCENARIO="${1:-${HOSTSIM_ROOT}/scenarios/default_motor.json}" +HOSTSIM="${HOSTSIM_ROOT}/build_linux/host_sim" +NODEGUI="${RTE_GUI:-${REPO_ROOT}/build/bin/RTEStudio}" +NO_GUI=0 + +for arg in "$@"; do + case "${arg}" in + --no-gui) NO_GUI=1 ;; + esac +done + +if [[ ! -x "${HOSTSIM}" ]]; then + echo "HostSim not found at ${HOSTSIM}" >&2 + echo "Build it first: cmake -S ${HOSTSIM_ROOT} -B ${HOSTSIM_ROOT}/build_linux && cmake --build ${HOSTSIM_ROOT}/build_linux" >&2 + exit 1 +fi + +pgrep -x host_sim | xargs -r kill 2>/dev/null || true +pgrep -x RTEStudio | xargs -r kill 2>/dev/null || true +sleep 0.5 + +echo "Starting HostSim live: ${SCENARIO}" +nohup "${HOSTSIM}" "${SCENARIO}" --live --realtime 1.0 >/dev/null 2>&1 & + +if [[ "${NO_GUI}" -eq 0 ]]; then + if [[ ! -x "${NODEGUI}" ]]; then + echo "RTEStudio (GUI) not found at ${NODEGUI}. Build with: cmake --build build --target RTEStudio" >&2 + echo "HostSim is still running on 127.0.0.1:14608" + exit 0 + fi + sleep 1 + nohup "${NODEGUI}" --tcp 127.0.0.1:14608 --protocol ivp >/dev/null 2>&1 & + echo "NodeGUI opened." +fi + +echo "HostSim live on 127.0.0.1:14608" diff --git a/Images/HostSim/scripts/run_ngspice_live.ps1 b/Images/HostSim/scripts/run_ngspice_live.ps1 new file mode 100644 index 00000000..3eb6a423 --- /dev/null +++ b/Images/HostSim/scripts/run_ngspice_live.ps1 @@ -0,0 +1,47 @@ +# Run HostSim with ngspice plant simulation live + launch NodeGUI visualization. +param( + [switch]$NoGui +) + +$ErrorActionPreference = "Stop" + +$hostSimRoot = Split-Path $PSScriptRoot -Parent +$repoRoot = Split-Path (Split-Path $hostSimRoot -Parent) -Parent +$scenario = Join-Path $hostSimRoot "scenarios\ngspice_rl_demo.json" +$exe = Join-Path $hostSimRoot "build\Debug\host_sim.exe" + +if (-not (Test-Path $exe)) { + $exe = Join-Path $hostSimRoot "build\host_sim.exe" +} + +if (-not (Test-Path $exe)) { + Write-Host "Building HostSim..." + cmake -S $hostSimRoot -B (Join-Path $hostSimRoot "build") + cmake --build (Join-Path $hostSimRoot "build") --config Debug +} + +function Stop-SimApps { + Get-Process | Where-Object { $_.ProcessName -match '^(host_sim|NodeGUI)$' } | + Stop-Process -Force -ErrorAction SilentlyContinue + Start-Sleep -Milliseconds 500 +} + +Write-Host "Stopping running HostSim / NodeGUI..." +Stop-SimApps + +Write-Host "Starting HostSim with ngspice circuit plant..." +Start-Process -FilePath $exe -ArgumentList "--scenario", $scenario, "--live", "--realtime", "1.0" -WorkingDirectory $hostSimRoot + +if (-not $NoGui) { + Start-Sleep -Seconds 1 + $guiExe = Join-Path $repoRoot "build\Source\NodeGUI\NodeGUI.exe" + if (Test-Path $guiExe) { + $guiWd = Split-Path $guiExe + Start-Process -FilePath $guiExe ` + -ArgumentList "--tcp", "127.0.0.1:14608", "--protocol", "ivp" ` + -WorkingDirectory $guiWd + Write-Host "NodeGUI opened with ngspice live telemetry." + } else { + Write-Host "NodeGUI executable not found at $guiExe. Build NodeGUI using: cmake --build build --target NodeGUI" + } +} diff --git a/Images/HostSim/scripts/run_spwm_live.ps1 b/Images/HostSim/scripts/run_spwm_live.ps1 new file mode 100644 index 00000000..056ad47a --- /dev/null +++ b/Images/HostSim/scripts/run_spwm_live.ps1 @@ -0,0 +1,115 @@ +# Emit a graph into HostSim, build it, and launch live + RTEStudio. +# Defaults to the SPWM demo graph for backward compatibility with the demo menu. +# Mirrors run_spwm_live.sh: RTE_EMITTER / RTE_GUI override the tool paths. +param( + [switch]$NoGui, + [switch]$ForceEmit, + [string]$Graph = "", + [string]$Scenario = "" +) + +$ErrorActionPreference = "Stop" + +$hostSimRoot = Split-Path $PSScriptRoot -Parent +$repoRoot = Split-Path (Split-Path $hostSimRoot -Parent) -Parent + +if ([string]::IsNullOrEmpty($Graph)) { + $Graph = Join-Path $hostSimRoot "graphs\spwm_demo_graph.json" +} +if (-not (Test-Path $Graph)) { throw "Graph not found: $Graph" } +$graph = (Resolve-Path $Graph).Path + +$graphName = [System.IO.Path]::GetFileNameWithoutExtension($graph) + +if ([string]::IsNullOrEmpty($Scenario)) { + # Prefer a scenario named after the graph (minus a trailing _graph), + # else the generic motor scenario — same rule as `rte sim`. + $scenarioBase = $graphName + if ($scenarioBase.EndsWith("_graph")) { + $scenarioBase = $scenarioBase.Substring(0, $scenarioBase.Length - 6) + } + $candidate = Join-Path $hostSimRoot "scenarios\${scenarioBase}.json" + if (Test-Path $candidate) { + $Scenario = $candidate + } else { + $Scenario = Join-Path $hostSimRoot "scenarios\default_motor.json" + } +} +if (-not (Test-Path $Scenario)) { throw "Scenario not found: $Scenario" } +$scenario = (Resolve-Path $Scenario).Path + +$emitter = if ($env:RTE_EMITTER) { $env:RTE_EMITTER } else { Join-Path $repoRoot "build\bin\RTECodeEmitter.exe" } +$rteGui = if ($env:RTE_GUI) { $env:RTE_GUI } else { Join-Path $repoRoot "build\bin\RTEStudio.exe" } + +if (-not (Test-Path $emitter)) { + throw "RTECodeEmitter not found at $emitter (set RTE_EMITTER; build host tools: cmake -B build && cmake --build build --target RTECodeEmitter)" +} + +function Stop-SimApps { + # Exact names only: never kill the powershell host or an unrelated RTEStudio + # instance launched by the IDE. + Get-Process | Where-Object { $_.ProcessName -match '^(host_sim|RTEStudio)$' } | + Stop-Process -Force -ErrorAction SilentlyContinue + Start-Sleep -Milliseconds 500 +} + +$emittedRel = "build\hostsim_${graphName}_emitted" +$emitted = Join-Path $repoRoot $emittedRel +$buildDir = Join-Path $repoRoot "${emittedRel}_build" + +$exe = Join-Path $buildDir "Debug\host_sim.exe" +if (-not (Test-Path $exe)) { $exe = Join-Path $buildDir "host_sim.exe" } + +$needEmit = $ForceEmit.IsPresent -or -not (Test-Path $exe) +if (-not $needEmit -and (Test-Path $exe)) { + $graphTime = (Get-Item $graph).LastWriteTimeUtc + $exeTime = (Get-Item $exe).LastWriteTimeUtc + if ($graphTime -gt $exeTime) { + Write-Host "Graph newer than emitted build - re-emitting..." + $needEmit = $true + } +} + +Write-Host "Stopping running HostSim / RTEStudio (unlocks emit output and the 14608 port)..." +Stop-SimApps + +if ($needEmit) { + if (Test-Path $emitted) { Remove-Item -LiteralPath $emitted -Recurse -Force } + if (Test-Path $buildDir) { Remove-Item -LiteralPath $buildDir -Recurse -Force } + + Write-Host "Emitting ${graphName} graph into HostSim..." + & $emitter --base-src $hostSimRoot --graph $graph --output $emitted --verbosity info + if ($LASTEXITCODE -ne 0) { throw "RTECodeEmitter failed" } + + cmake -S $emitted -B $buildDir + if ($LASTEXITCODE -ne 0) { throw "cmake configure failed" } + cmake --build $buildDir --config Debug + if ($LASTEXITCODE -ne 0) { throw "cmake build failed" } + + $exe = Join-Path $buildDir "Debug\host_sim.exe" + if (-not (Test-Path $exe)) { $exe = Join-Path $buildDir "host_sim.exe" } +} else { + Write-Host "Using existing emitted ${graphName} build (pass -ForceEmit to rebuild)." +} + +if (-not (Test-Path $exe)) { throw "host_sim.exe not found in $buildDir" } + +Write-Host "Starting HostSim live for ${graphName}..." +Start-Process -FilePath $exe -ArgumentList $scenario, "--live", "--realtime", "1.0" -WorkingDirectory $emitted + +if (-not $NoGui) { + Start-Sleep -Seconds 1 + if (Test-Path $rteGui) { + Start-Process -FilePath $rteGui ` + -ArgumentList $graph, "--tcp", "127.0.0.1:14608", "--protocol", "ivp" ` + -WorkingDirectory $repoRoot + Write-Host "RTEStudio opened with ${graphName} graph + live telemetry." + } else { + Write-Host "RTEStudio not found at $rteGui (set RTE_GUI; build with: cmake --build build --target RTEStudio)" + Write-Host "HostSim is still running." + } +} + +Write-Host "" +Write-Host "Scenario: $scenario" +Write-Host "Live telemetry: 127.0.0.1:14608 (IVP)" diff --git a/Images/HostSim/scripts/run_spwm_live.sh b/Images/HostSim/scripts/run_spwm_live.sh new file mode 100755 index 00000000..2686b001 --- /dev/null +++ b/Images/HostSim/scripts/run_spwm_live.sh @@ -0,0 +1,130 @@ +#!/usr/bin/env bash +# Linux HostSim live launcher. +# Emits the requested graph into HostSim, builds it, and starts the live TCP server. +# Defaults to the SPWM demo graph for backward compatibility with the demo menu. +set -euo pipefail + +SCRIPT_DIR="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)" +HOSTSIM_ROOT="$(cd "${SCRIPT_DIR}/.." && pwd)" +REPO_ROOT="$(cd "${HOSTSIM_ROOT}/../.." && pwd)" + +NO_GUI=0 +FORCE_EMIT=0 +GRAPH="" +SCENARIO="" +while [[ $# -gt 0 ]]; do + case "$1" in + --no-gui) NO_GUI=1 ;; + --force-emit) FORCE_EMIT=1 ;; + --graph) + GRAPH="${2:-}" + shift + ;; + --scenario) + SCENARIO="${2:-}" + shift + ;; + *) echo "Unknown option: $1" >&2; exit 1 ;; + esac + shift +done + +if [[ -z "${GRAPH}" ]]; then + GRAPH="${HOSTSIM_ROOT}/graphs/spwm_demo_graph.json" +fi + +if [[ ! -f "${GRAPH}" ]]; then + echo "Graph not found: ${GRAPH}" >&2 + exit 1 +fi + +GRAPH_NAME="$(basename "${GRAPH}" .json)" + +if [[ -z "${SCENARIO}" ]]; then + # Prefer a scenario that matches the graph name (stripping a trailing _graph suffix); + # fall back to the generic motor scenario. + SCENARIO_BASE="${GRAPH_NAME}" + if [[ "${SCENARIO_BASE}" == *_graph ]]; then + SCENARIO_BASE="${SCENARIO_BASE%_graph}" + fi + CANDIDATE="${HOSTSIM_ROOT}/scenarios/${SCENARIO_BASE}.json" + if [[ -f "${CANDIDATE}" ]]; then + SCENARIO="${CANDIDATE}" + else + SCENARIO="${HOSTSIM_ROOT}/scenarios/default_motor.json" + fi +fi + +if [[ ! -f "${SCENARIO}" ]]; then + echo "Scenario not found: ${SCENARIO}" >&2 + exit 1 +fi + +EMITTER="${RTE_EMITTER:-${REPO_ROOT}/build/bin/RTECodeEmitter}" +NODEGUI="${RTE_GUI:-${REPO_ROOT}/build/bin/RTEStudio}" + +if [[ ! -x "${EMITTER}" ]]; then + echo "RTECodeEmitter not found at ${EMITTER}" >&2 + echo "Build host tools: cmake -S . -B build && cmake --build build --target RTECodeEmitter" >&2 + exit 1 +fi + +EMITTED_REL="build/hostsim_${GRAPH_NAME}_emitted" +BUILD_DIR="${REPO_ROOT}/${EMITTED_REL}_build" + +cleanup_apps() { + # Use exact-name matching so we do not kill the shell running this script + # or the NodeGUI instance that launched us via Build -> Build Simulation. + pgrep -x host_sim | xargs -r kill 2>/dev/null || true + sleep 0.5 +} + +cleanup_apps + +EXE="${BUILD_DIR}/host_sim" +need_emit=0 +if [[ "${FORCE_EMIT}" -eq 1 ]] || [[ ! -x "${EXE}" ]]; then + need_emit=1 +elif [[ "${GRAPH}" -nt "${EXE}" ]]; then + echo "Graph newer than emitted build - re-emitting..." + need_emit=1 +fi + +if [[ "${need_emit}" -eq 1 ]]; then + rm -rf "${REPO_ROOT}/${EMITTED_REL}" "${BUILD_DIR}" + + echo "Emitting ${GRAPH_NAME} graph into HostSim..." + "${EMITTER}" \ + --base-src "${HOSTSIM_ROOT}" \ + --graph "${GRAPH}" \ + --output "${EMITTED_REL}" \ + --verbosity info + + cmake -S "${REPO_ROOT}/${EMITTED_REL}" -B "${BUILD_DIR}" + cmake --build "${BUILD_DIR}" -j"$(nproc)" +else + echo "Using existing emitted ${GRAPH_NAME} build (pass --force-emit to rebuild)." +fi + +if [[ ! -x "${EXE}" ]]; then + echo "host_sim not found in ${BUILD_DIR}" >&2 + exit 1 +fi + +echo "Starting HostSim live for ${GRAPH_NAME}..." +nohup "${EXE}" "${SCENARIO}" --live --realtime 1.0 >/dev/null 2>&1 & + +if [[ "${NO_GUI}" -eq 0 ]]; then + if [[ ! -x "${NODEGUI}" ]]; then + echo "RTEStudio not found at ${NODEGUI}. Build with: cmake --build build --target RTEStudio" >&2 + echo "HostSim is still running." + exit 0 + fi + sleep 1 + nohup "${NODEGUI}" "${GRAPH}" --tcp 127.0.0.1:14608 --protocol ivp >/dev/null 2>&1 & + echo "NodeGUI opened with ${GRAPH_NAME} graph + live telemetry." +fi + +echo "" +echo "Scenario: ${SCENARIO}" +echo "Live telemetry: 127.0.0.1:14608 (IVP)" diff --git a/Images/HostSim/src/can_bridge.cpp b/Images/HostSim/src/can_bridge.cpp new file mode 100644 index 00000000..eecf5843 --- /dev/null +++ b/Images/HostSim/src/can_bridge.cpp @@ -0,0 +1,513 @@ +#include "can_bridge.h" + +#include "platform_api.h" /* platform_can_send (selftest emitter) */ +#include "sim_context.h" /* SimCanInject */ + +#include +#include +#include + +#ifdef _WIN32 +#include +#else +#include +#include +#include +#include +#include +#include +#include +#include +#include +#endif + +namespace hostsim { + +CanBridge& GlobalCanBridge() { + static CanBridge bridge; + return bridge; +} + +void CanBridge::Configure(const CanBridgeConfig& cfg) { + cfg_ = cfg; + if (cfg_.instance_id == 0) { + /* Deliberately pid-derived, not telemetry-port-derived: concurrent + * instances commonly share the default telemetry port (14608), which + * would tag their frames identically and make them filter each + * other out. The full pid (31-bit on Linux) is unique by + * construction; truncation to a byte would collide after ~256 + * instances. */ +#ifdef _WIN32 + cfg_.instance_id = static_cast(_getpid()); +#else + cfg_.instance_id = static_cast(::getpid()); +#endif + if (cfg_.instance_id == 0) cfg_.instance_id = 1; + } + configured_ = cfg_.hub || cfg_.connect; +} + +#ifdef _WIN32 + +bool CanBridge::Start() { + if (configured_ || cfg_.selftest) { + std::fprintf(stderr, + "[CAN bridge] not supported on Windows; bridge disabled\n"); + } + return false; +} + +void CanBridge::Poll(float) {} +void CanBridge::Publish(uint8_t, uint32_t, bool, const uint8_t*, uint8_t) {} +void CanBridge::Shutdown() {} + +#else // !_WIN32 + +namespace { + +constexpr uint32_t kMagic = 0x314E4143u; /* "CAN1" on the wire */ +constexpr uint16_t kPayloadLen = 24; +constexpr size_t kRecordLen = 2 + kPayloadLen; +constexpr float kSelftestPeriodS = 0.1f; +constexpr uint32_t kSelftestId = 0x123u; +constexpr uint64_t kConnectTimeoutMs = 5000; + +uint16_t GetLe16(const uint8_t* p) { + return static_cast(p[0] | (static_cast(p[1]) << 8)); +} +uint32_t GetLe32(const uint8_t* p) { + return static_cast(p[0]) | + (static_cast(p[1]) << 8) | + (static_cast(p[2]) << 16) | + (static_cast(p[3]) << 24); +} +void PutLe16(uint8_t* p, uint16_t v) { + p[0] = static_cast(v); + p[1] = static_cast(v >> 8); +} +void PutLe32(uint8_t* p, uint32_t v) { + p[0] = static_cast(v); + p[1] = static_cast(v >> 8); + p[2] = static_cast(v >> 16); + p[3] = static_cast(v >> 24); +} + +uint64_t NowMs() { + return static_cast( + std::chrono::duration_cast( + std::chrono::steady_clock::now().time_since_epoch()) + .count()); +} + +bool SetNonBlocking(int fd) { + const int flags = fcntl(fd, F_GETFL, 0); + return flags >= 0 && fcntl(fd, F_SETFL, flags | O_NONBLOCK) == 0; +} + +void TuneSocket(int fd) { + SetNonBlocking(fd); + int yes = 1; + setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, &yes, sizeof(yes)); +} + +} // namespace + +bool CanBridge::Start() { + if (!configured_) { + if (cfg_.selftest) { + std::fprintf(stderr, + "[CAN bridge] selftest requested but neither " + "--can-bridge-listen nor --can-bridge-connect given; " + "selftest frames go nowhere\n"); + } + return false; + } + const bool ok = cfg_.hub ? StartHub() : StartSpoke(); + if (ok && cfg_.selftest) { + std::printf("[CAN bridge] selftest on: bus=0 id=0x%X every %.0f ms " + "(sim time)\n", + kSelftestId, + static_cast(kSelftestPeriodS * 1000.0f)); + std::fflush(stdout); + } + return ok; +} + +bool CanBridge::StartHub() { + listen_fd_ = ::socket(AF_INET, SOCK_STREAM, IPPROTO_TCP); + if (listen_fd_ < 0) { + std::fprintf(stderr, "[CAN bridge] socket() failed: %s\n", + std::strerror(errno)); + return false; + } + int yes = 1; + setsockopt(listen_fd_, SOL_SOCKET, SO_REUSEADDR, &yes, sizeof(yes)); + + sockaddr_in addr{}; + addr.sin_family = AF_INET; + addr.sin_port = htons(static_cast(cfg_.port)); + addr.sin_addr.s_addr = htonl(INADDR_ANY); + + if (::bind(listen_fd_, reinterpret_cast(&addr), + sizeof(addr)) != 0 || + ::listen(listen_fd_, 8) != 0 || !SetNonBlocking(listen_fd_)) { + std::fprintf(stderr, + "[CAN bridge] hub listen on :%d failed: %s; running " + "unbridged\n", + cfg_.port, std::strerror(errno)); + ::close(listen_fd_); + listen_fd_ = -1; + return false; + } + is_hub_ = true; + enabled_ = true; + std::printf("[CAN bridge] hub on :%d id=%u\n", cfg_.port, cfg_.instance_id); + std::fflush(stdout); + return true; +} + +bool CanBridge::StartSpoke() { + hub_link_.fd = ::socket(AF_INET, SOCK_STREAM, IPPROTO_TCP); + if (hub_link_.fd < 0) { + std::fprintf(stderr, "[CAN bridge] socket() failed: %s\n", + std::strerror(errno)); + return false; + } + TuneSocket(hub_link_.fd); + + sockaddr_in addr{}; + addr.sin_family = AF_INET; + addr.sin_port = htons(static_cast(cfg_.port)); + if (inet_pton(AF_INET, cfg_.host.c_str(), &addr.sin_addr) != 1) { + std::fprintf(stderr, + "[CAN bridge] connect host \"%s\" is not a dotted IPv4 " + "address; running unbridged\n", + cfg_.host.c_str()); + ::close(hub_link_.fd); + hub_link_.fd = -1; + spoke_state_ = SpokeState::Down; + return false; + } + + std::printf("[CAN bridge] connecting to %s:%d id=%u\n", cfg_.host.c_str(), + cfg_.port, cfg_.instance_id); + std::fflush(stdout); + + const int rc = ::connect(hub_link_.fd, reinterpret_cast(&addr), + sizeof(addr)); + if (rc == 0) { + spoke_state_ = SpokeState::Connected; + std::printf("[CAN bridge] connected to hub %s:%d\n", + cfg_.host.c_str(), cfg_.port); + std::fflush(stdout); + } else if (errno == EINPROGRESS) { + spoke_state_ = SpokeState::Pending; + connect_start_ms_ = NowMs(); + } else { + char why[128]; + std::snprintf(why, sizeof(why), "connect failed: %s", + std::strerror(errno)); + DropHubLink(why); + return false; + } + enabled_ = true; + return true; +} + +void CanBridge::DropHubLink(const char* reason) { + if (hub_link_.fd >= 0) { + ::close(hub_link_.fd); + hub_link_.fd = -1; + } + if (spoke_state_ != SpokeState::Down) { + std::printf("[CAN bridge] hub %s:%d %s; continuing unbridged\n", + cfg_.host.c_str(), cfg_.port, reason); + std::fflush(stdout); + } + spoke_state_ = SpokeState::Down; +} + +bool CanBridge::SendRecord(Peer& p, const uint8_t* record, size_t len) { + if (p.fd < 0) return false; + const ssize_t n = ::send(p.fd, record, len, MSG_NOSIGNAL); + if (n == static_cast(len)) { + ++tx_frames_; + return true; + } + ++dropped_; + if (n < 0 && (errno == EAGAIN || errno == EWOULDBLOCK || errno == EINTR)) { + /* Peer too slow: drop the frame, keep the connection. Frames are + * latest-value, not a queue — never block the sim for them. */ + return false; + } + /* Hard error (incl. a rare partial write): the link is unusable. */ + ::close(p.fd); + p.fd = -1; + return false; +} + +bool CanBridge::HandleRecord(const uint8_t* record, int origin_fd) { + const uint8_t* p = record + 2; /* skip length prefix */ + if (GetLe32(p) != kMagic) return false; + const uint32_t src = GetLe32(p + 4); + const uint32_t id = GetLe32(p + 8); + const uint8_t bus = p[12]; + const bool ext = p[13] != 0; + uint8_t dlc = p[14]; + if (dlc > 8) dlc = 8; + const uint8_t* data = p + 16; + + if (src == cfg_.instance_id) { + /* Looped back to the origin: never duplicate own frames into RX. */ + ++filtered_; + return true; + } + + SimCanInject(bus, id, ext, data, dlc); + ++rx_frames_; + + /* Receive witness: always on (greppable), one line per bridged frame. */ + std::printf("[CAN bridge] rx bus=%u id=0x%X dlc=%u src=%u data=", + static_cast(bus), static_cast(id), + static_cast(dlc), static_cast(src)); + for (uint8_t i = 0; i < dlc; ++i) { + std::printf("%s%02X", i == 0 ? "" : " ", data[i]); + } + std::printf("\n"); + std::fflush(stdout); + + if (origin_fd >= 0) { + /* Hub: forward the verbatim record (origin tag preserved) to every + * other spoke. SendRecord only marks a failed peer dead (fd = -1); + * erasing is deferred to SweepDeadPeers() because `record` aliases + * the origin peer's rx buffer and the caller holds a Peer& into + * peers_ — erasing mid-loop would invalidate both. */ + for (auto& other : peers_) { + if (other.fd < 0 || other.fd == origin_fd) continue; + SendRecord(other, record, kRecordLen); + } + } + return true; +} + +void CanBridge::ServicePeer(Peer& p) { + if (p.fd < 0) return; + bool alive = true; + bool framing_ok = true; + while (alive && framing_ok) { + /* Drain every complete record already buffered before reading more: + * a burst between app-tick polls is then limited only by what a + * single iteration can read, not by the buffer size, and the buffer + * never holds more than one partial record. */ + size_t off = 0; + while (p.rx_len - off >= 2) { + const uint16_t plen = GetLe16(p.rx + off); + if (plen != kPayloadLen) { + framing_ok = false; /* unknown protocol; drop the peer */ + break; + } + if (p.rx_len - off < 2u + static_cast(plen)) break; /* wait for the remainder */ + if (!HandleRecord(p.rx + off, is_hub_ ? p.fd : -1)) { + framing_ok = false; /* bad magic */ + break; + } + off += 2 + plen; + } + if (!framing_ok) break; + if (off > 0 && off < p.rx_len) { + std::memmove(p.rx, p.rx + off, p.rx_len - off); + } + p.rx_len -= off; + if (p.rx_len == sizeof(p.rx)) { + /* A full buffer after draining means one unterminated record + * spans everything: genuinely unparseable framing, not load. */ + framing_ok = false; + break; + } + + const ssize_t n = + ::recv(p.fd, p.rx + p.rx_len, sizeof(p.rx) - p.rx_len, 0); + if (n > 0) { + p.rx_len += static_cast(n); + } else if (n == 0) { + alive = false; /* orderly EOF; any buffered records were drained above */ + } else if (errno == EAGAIN || errno == EWOULDBLOCK || errno == EINTR) { + break; + } else { + alive = false; /* hard error */ + } + } + + if (!alive || !framing_ok) { + ::close(p.fd); + p.fd = -1; /* dead marker; SweepDeadPeers does the erase */ + p.rx_len = 0; + } +} + +void CanBridge::SweepDeadPeers() { + const size_t before = peers_.size(); + peers_.erase(std::remove_if(peers_.begin(), peers_.end(), + [](const Peer& p) { return p.fd < 0; }), + peers_.end()); + if (peers_.size() != before) { + std::printf("[CAN bridge] peer disconnected (%zu remaining)\n", + peers_.size()); + std::fflush(stdout); + } +} + +void CanBridge::AcceptAll() { + while (true) { + sockaddr_in peer{}; + socklen_t plen = sizeof(peer); + const int fd = + ::accept(listen_fd_, reinterpret_cast(&peer), &plen); + if (fd < 0) return; /* EAGAIN: nothing pending */ + TuneSocket(fd); + Peer p; + p.fd = fd; + peers_.push_back(p); + char ip[INET_ADDRSTRLEN] = "?"; + inet_ntop(AF_INET, &peer.sin_addr, ip, sizeof(ip)); + std::printf("[CAN bridge] peer connected from %s:%u (%zu peers)\n", ip, + static_cast(ntohs(peer.sin_port)), + peers_.size()); + std::fflush(stdout); + } +} + +void CanBridge::CheckConnect() { + fd_set wfds; + FD_ZERO(&wfds); + FD_SET(hub_link_.fd, &wfds); + timeval tv{0, 0}; + const int rc = ::select(hub_link_.fd + 1, nullptr, &wfds, nullptr, &tv); + if (rc > 0) { + int err = 0; + socklen_t len = sizeof(err); + getsockopt(hub_link_.fd, SOL_SOCKET, SO_ERROR, &err, &len); + if (err == 0) { + spoke_state_ = SpokeState::Connected; + std::printf("[CAN bridge] connected to hub %s:%d\n", + cfg_.host.c_str(), cfg_.port); + std::fflush(stdout); + return; + } + char why[128]; + std::snprintf(why, sizeof(why), "connect failed: %s", + std::strerror(err)); + DropHubLink(why); + return; + } + if (NowMs() - connect_start_ms_ > kConnectTimeoutMs) { + DropHubLink("connect timed out"); + } +} + +void CanBridge::RunSelftest(float now_s) { + if (!cfg_.selftest || now_s + 1e-9f < next_selftest_s_) return; + next_selftest_s_ += kSelftestPeriodS; + uint8_t data[8]; + for (uint32_t i = 0; i < 8; ++i) { + data[i] = static_cast(selftest_step_ + i); + } + ++selftest_step_; + /* Bus 0 is deliberately not a local bus (Gen6 numbering is 1-based): it + * exists only on the bridge as the selftest/diagnostic channel and never + * enters the local latest-frame store. */ + platform_can_send(0, kSelftestId, false, data, 8); +} + +void CanBridge::Poll(float now_s) { + if (!enabled_) return; + + if (is_hub_) { + AcceptAll(); + for (auto& p : peers_) { + ServicePeer(p); + } + /* Dead peers were only marked while servicing (no erases happened + * above — ServicePeer/HandleRecord may alias into peers_); erase + * them now that nothing holds a reference. */ + SweepDeadPeers(); + } else { + if (spoke_state_ == SpokeState::Pending) { + CheckConnect(); + } + if (spoke_state_ == SpokeState::Connected) { + const int fd_before = hub_link_.fd; + ServicePeer(hub_link_); + if (hub_link_.fd < 0 && fd_before >= 0) { + DropHubLink("disconnected"); + } + } + } + + RunSelftest(now_s); +} + +void CanBridge::Publish(uint8_t bus, uint32_t id, bool ext, + const uint8_t* data, uint8_t dlc) { + if (!enabled_) return; + + uint8_t rec[kRecordLen]; + PutLe16(rec, kPayloadLen); + PutLe32(rec + 2, kMagic); + PutLe32(rec + 6, cfg_.instance_id); + PutLe32(rec + 10, id); + rec[14] = bus; + rec[15] = ext ? 1 : 0; + rec[16] = dlc > 8 ? 8 : dlc; + rec[17] = 0; + for (uint8_t i = 0; i < 8; ++i) { + rec[18 + i] = (data && i < rec[16]) ? data[i] : 0; + } + + if (cfg_.debug) { + std::printf("[CAN bridge] tx bus=%u id=0x%X dlc=%u\n", + static_cast(bus), static_cast(id), + static_cast(rec[16])); + std::fflush(stdout); + } + + if (is_hub_) { + for (auto& p : peers_) { + SendRecord(p, rec, kRecordLen); + } + SweepDeadPeers(); + } else if (spoke_state_ == SpokeState::Connected) { + SendRecord(hub_link_, rec, kRecordLen); + if (hub_link_.fd < 0) { + DropHubLink("send failed"); + } + } +} + +void CanBridge::Shutdown() { + if (listen_fd_ >= 0) { + ::close(listen_fd_); + listen_fd_ = -1; + } + for (auto& p : peers_) { + if (p.fd >= 0) ::close(p.fd); + } + peers_.clear(); + if (hub_link_.fd >= 0) { + ::close(hub_link_.fd); + hub_link_.fd = -1; + } + if (!enabled_) return; + enabled_ = false; + std::printf("[CAN bridge] stats: tx=%llu rx=%llu dropped=%llu " + "filtered=%llu\n", + static_cast(tx_frames_), + static_cast(rx_frames_), + static_cast(dropped_), + static_cast(filtered_)); + std::fflush(stdout); +} + +#endif // _WIN32 + +} // namespace hostsim diff --git a/Images/HostSim/src/can_bridge.h b/Images/HostSim/src/can_bridge.h new file mode 100644 index 00000000..93d8ab34 --- /dev/null +++ b/Images/HostSim/src/can_bridge.h @@ -0,0 +1,118 @@ +#pragma once + +#include +#include +#include +#include + +namespace hostsim { + +/* Multi-instance CAN bridge: shares this process' platform_can_send traffic + * with other concurrently running host_sim instances over localhost TCP + * (Linux only; on Windows the flags print a notice and the bridge stays off). + * + * Topology is hub-and-spoke: one instance listens (--can-bridge-listen PORT), + * the others connect (--can-bridge-connect HOST:PORT). The hub rebroadcasts + * every record it receives to all other connected spokes, so every + * participant sees everyone else's frames. + * + * Wire format v1 (all little-endian): + * u16 payload_len (= 24) + * u32 magic 0x314E4143 ("CAN1") + * u32 src instance id + * u32 CAN id + * u8 bus / u8 ext / u8 dlc / u8 reserved + * u8 data[8] + * + * Robustness contract: everything is non-blocking; the sim loop never waits + * on the bridge. A failed connect, a dead peer or a lost hub is logged once + * and the sim continues unbridged (no reconnect in v1). A peer that cannot + * keep up simply misses frames (counted, not queued). + */ +struct CanBridgeConfig { + bool hub = false; /* --can-bridge-listen PORT */ + bool connect = false; /* --can-bridge-connect HOST:PORT */ + std::string host = "127.0.0.1"; /* hub address (connect mode) */ + int port = 0; + /* Frame origin tag; a received record tagged with our own id is treated + * as looped back and dropped. 0 = derive from the pid (unique among + * concurrent instances; the default telemetry port is not). */ + uint32_t instance_id = 0; + bool debug = false; /* --can-bridge-debug: also log tx */ + bool selftest = false; /* --can-selftest */ +}; + +class CanBridge { +public: + void Configure(const CanBridgeConfig& cfg); + bool Enabled() const { return enabled_; } + + /* Open the hub listen socket / start the non-blocking connect and print + * the one-line startup announcement. */ + bool Start(); + /* Accept spokes, drain reads, inject received frames and run the + * selftest emitter. Called once per app-loop tick with sim time. */ + void Poll(float now_s); + /* Mirror one platform_can_send onto the bridge. No-op when unconfigured; + * never blocks. */ + void Publish(uint8_t bus, uint32_t id, bool ext, const uint8_t* data, + uint8_t dlc); + void Shutdown(); + +private: + struct Peer { + int fd = -1; + /* Sized for a burst between app-tick polls (~19 records); the + * recv/parse loop drains complete records between recv() calls, so + * sustained throughput is unbounded and the buffer only ever holds + * one partial record. Only genuinely unparseable framing (a partial + * record filling the whole buffer) drops the peer. */ + uint8_t rx[512] = {0}; + size_t rx_len = 0; + }; + + bool StartHub(); + bool StartSpoke(); + void AcceptAll(); + void CheckConnect(); + void ServicePeer(Peer& p); + /* origin_fd: fd of the peer the record came from (hub rebroadcast skips + * it), -1 when there is nothing to rebroadcast to (spoke side). Passed + * by fd, never by pointer into peers_, so a dead-peer marking can never + * invalidate it. */ + bool HandleRecord(const uint8_t* record, int origin_fd); + /* true = record written; on a hard error the peer is closed and marked + * dead (fd = -1) but left in peers_ for SweepDeadPeers to erase. */ + bool SendRecord(Peer& p, const uint8_t* record, size_t len); + /* erase-remove pass over dead peers; runs only when no Peer&/record + * pointer into peers_ is still live (SendRecord/ServicePeer never + * erase mid-iteration). */ + void SweepDeadPeers(); + void DropHubLink(const char* reason); + void RunSelftest(float now_s); + + CanBridgeConfig cfg_{}; + bool configured_ = false; + bool enabled_ = false; + bool is_hub_ = false; + + int listen_fd_ = -1; + std::vector peers_; /* hub: accepted spokes */ + + enum class SpokeState { Idle, Pending, Connected, Down }; + SpokeState spoke_state_ = SpokeState::Idle; + Peer hub_link_{}; /* spoke: the single hub connection */ + uint64_t connect_start_ms_ = 0; + + uint64_t tx_frames_ = 0; + uint64_t rx_frames_ = 0; + uint64_t dropped_ = 0; /* send would-block / partial writes */ + uint64_t filtered_ = 0; /* received records with our own id */ + + float next_selftest_s_ = 0.0f; + uint32_t selftest_step_ = 0; +}; + +CanBridge& GlobalCanBridge(); + +} // namespace hostsim diff --git a/Images/HostSim/src/current_observer.cpp b/Images/HostSim/src/current_observer.cpp new file mode 100644 index 00000000..9a213b4f --- /dev/null +++ b/Images/HostSim/src/current_observer.cpp @@ -0,0 +1,95 @@ +#include "current_observer.h" + +/* Faithful host port of Gen6FW's Inverter::CurrentObserver + * (Images/Gen6FW/Src/Inverter/Control/CurrentObserver.cpp). See the header + * for the porting contract; the step math below is byte-for-byte the Gen6 + * algorithm so graph behavior matches the STM32 images. */ + +#include + +namespace hostsim { + +namespace { +CurrentObserver s_instance; +} + +CurrentObserver& GlobalCurrentObserver() { + return s_instance; +} + +void CurrentObserver::setMotorParameters(float r_ohm, float l_henry, + float flux_linkage_wb, + float pole_pairs) { + m_r = r_ohm; + m_l = l_henry; + m_flux = flux_linkage_wb; + m_pole_pairs = pole_pairs; +} + +void CurrentObserver::predict(float valpha_v, float vbeta_v, + float theta_elec_rad, float dt_s) { + if (dt_s <= 0.0f || m_l <= 0.0f) { + return; + } + + /* Electrical back-EMF from rotor position and speed. When flux linkage + * is not calibrated we rely on the disturbance-estimator part of the + * observer to track e_alpha/e_beta. */ + float e_alpha = m_e_alpha; + float e_beta = m_e_beta; + if (m_flux > 0.0f) { + const float sin_th = std::sin(theta_elec_rad); + const float cos_th = std::cos(theta_elec_rad); + e_alpha = -m_flux * sin_th; + e_beta = m_flux * cos_th; + } + + const float Ts_over_L = dt_s / m_l; + m_i_alpha += Ts_over_L * (valpha_v - m_r * m_i_alpha - e_alpha); + m_i_beta += Ts_over_L * (vbeta_v - m_r * m_i_beta - e_beta); + + /* Decay confidence if no correction has arrived. */ + m_confidence *= 0.95f; +} + +void CurrentObserver::correct(float iu_meas_a, float iv_meas_a, + float diudt_a_per_s, float divdt_a_per_s, + uint32_t t_us) { + /* Convert two-phase (U,V) to stationary alpha/beta. */ + const float i_alpha_meas = iu_meas_a; + const float i_beta_meas = (iu_meas_a + 2.0f * iv_meas_a) * 0.57735026919f; + + const float err_alpha = i_alpha_meas - m_i_alpha; + const float err_beta = i_beta_meas - m_i_beta; + + m_i_alpha += m_k_i * err_alpha; + m_i_beta += m_k_i * err_beta; + + m_e_alpha += m_k_e * err_alpha; + m_e_beta += m_k_e * err_beta; + + m_diudt_meas = diudt_a_per_s; + m_divdt_meas = divdt_a_per_s; + m_last_correction_us = t_us; + m_confidence = 1.0f; +} + +void CurrentObserver::getPhaseCurrents(float& iu_a, float& iv_a, float& iw_a) const { + /* Inverse Clarke: alpha/beta -> U,V,W. */ + iu_a = m_i_alpha; + iv_a = -0.5f * m_i_alpha + 0.86602540378f * m_i_beta; + iw_a = -0.5f * m_i_alpha - 0.86602540378f * m_i_beta; +} + +void CurrentObserver::reset() { + m_i_alpha = 0.0f; + m_i_beta = 0.0f; + m_e_alpha = 0.0f; + m_e_beta = 0.0f; + m_confidence = 0.0f; + m_diudt_meas = 0.0f; + m_divdt_meas = 0.0f; + m_last_correction_us = 0; +} + +} // namespace hostsim diff --git a/Images/HostSim/src/current_observer.h b/Images/HostSim/src/current_observer.h new file mode 100644 index 00000000..b22cb4d5 --- /dev/null +++ b/Images/HostSim/src/current_observer.h @@ -0,0 +1,111 @@ +#pragma once + +/* Faithful host port of Gen6FW's Inverter::CurrentObserver + * (Images/Gen6FW/Inc/Inverter/Control/CurrentObserver.h and + * Images/Gen6FW/Src/Inverter/Control/CurrentObserver.cpp). The math and + * state layout are identical to firmware; only the namespace and the + * singleton accessor name (GlobalCurrentObserver, matching HostSim's other + * base-image singletons) differ. Warnings/errors in behavior should be + * fixed upstream first and re-ported. */ + +#include + +namespace hostsim { + +/* Current + back-EMF observer for modulation-agnostic current reconstruction. + * + * Runs in the stationary alpha/beta frame. Predicts phase currents from the + * applied voltage vector and corrects them when clean micro-burst samples are + * available. The FOC loop consumes the observer output instead of raw ADC + * samples, so zero-vector periods, short SHE pulses, and noisy switching + * edges do not destabilize the control loop. + * + * Model (per axis): + * v = R*i + L*di/dt + e + * Observer: + * i_hat[k+1] = i_hat[k] + Ts/L * (v - R*i_hat[k] - e_hat[k]) + K_i*(i_meas - i_hat[k]) + * e_hat[k+1] = e_hat[k] + K_e*(i_meas - i_hat[k]) + */ +class CurrentObserver { +public: + CurrentObserver() = default; + + /* Set motor parameters used by the predictor. */ + void setMotorParameters(float r_ohm, float l_henry, float flux_linkage_wb, + float pole_pairs); + + /* Run one prediction step using the applied voltage vector. Call once + * per control ISR with the voltage that will be applied for the next dt + * seconds. */ + void predict(float valpha_v, float vbeta_v, float theta_elec_rad, float dt_s); + + /* Correct the observer with a measured two-phase current pair. The + * slopes diu/dt and div/dt are stored for the RLS estimator but are not + * used by the observer correction itself. */ + void correct(float iu_meas_a, float iv_meas_a, + float diudt_a_per_s, float divdt_a_per_s, + uint32_t t_us); + + /* Get the observer-estimated phase currents. */ + void getPhaseCurrents(float& iu_a, float& iv_a, float& iw_a) const; + + /* Observer confidence [0, 1]. Decays without corrections. */ + float confidence() const { return m_confidence; } + + /* Current estimate in stationary alpha/beta frame. */ + float iAlpha() const { return m_i_alpha; } + float iBeta() const { return m_i_beta; } + + /* Back-EMF estimate in stationary alpha/beta frame. */ + float eAlpha() const { return m_e_alpha; } + float eBeta() const { return m_e_beta; } + + /* Latest measured slopes from the last micro-burst correction. */ + float diudtMeasured() const { return m_diudt_meas; } + float divdtMeasured() const { return m_divdt_meas; } + uint32_t lastCorrectionUs() const { return m_last_correction_us; } + + /* Current motor parameters (for diagnostics / seeding checks). */ + float rOhm() const { return m_r; } + float lHenry() const { return m_l; } + + /* Update R and L used by the predictor (e.g. from RLS estimator). */ + void updateEstimatedParameters(float r_ohm, float l_henry) { + m_r = r_ohm; + m_l = l_henry; + } + + /* Reset observer state. */ + void reset(); + +private: + /* Motor parameters (defaults identical to the Gen6 firmware). */ + float m_r = 0.0145f; /* Phase resistance [ohm]. */ + float m_l = 40.0e-6f; /* Phase inductance [H]. */ + float m_flux = 0.0f; /* PM flux linkage [Wb]. */ + float m_pole_pairs = 5.0f; + + /* Observer state in stationary alpha/beta. */ + float m_i_alpha = 0.0f; + float m_i_beta = 0.0f; + float m_e_alpha = 0.0f; + float m_e_beta = 0.0f; + + /* Correction gains. */ + float m_k_i = 0.25f; + float m_k_e = 0.05f; + + /* Confidence decays each predict step without correction. */ + float m_confidence = 0.0f; + + /* Latest measured slopes (for RLS). */ + float m_diudt_meas = 0.0f; + float m_divdt_meas = 0.0f; + uint32_t m_last_correction_us = 0; +}; + +/* Global observer instance behind the platform_observer_* API, mirroring + * Gen6's currentObserver() singleton. */ +CurrentObserver& GlobalCurrentObserver(); + +} // namespace hostsim diff --git a/Images/HostSim/src/induction_model.h b/Images/HostSim/src/induction_model.h new file mode 100644 index 00000000..6bbf7523 --- /dev/null +++ b/Images/HostSim/src/induction_model.h @@ -0,0 +1,150 @@ +#pragma once + +/* ============================================================================ + * Squirrel-cage induction machine ODE model (stationary alpha/beta frame). + * + * Header-only on purpose: HostSIL compiles HostSim's src/motor_model.cpp + * directly by relative path, and both images' CMake lists name sources + * explicitly — an extra .cpp would not be picked up. MotorModel includes + * this header and forwards to the model when MotorParams::machine is + * Induction. + * + * Frame choice: stationary (stator-fixed) alpha/beta, because the drive + * input is already a stationary-frame quantity (duties -> phase terminal + * volts -> Clarke) and the V/Hz-style graphs emit V_Alpha/V_Beta. The + * rotor-flux angle (and hence slip) falls out of the flux states via + * atan2/lambda magnitude — no frame-tracking divisions that misbehave at + * the 0 Hz start of a V/Hz ramp. + * + * States: stator current (i_sa, i_sb) and rotor flux linkage (l_ra, l_rb), + * all referred to the stator. With Ls = Lm + Lls, Lr = Lm + Llr, + * sigma = 1 - Lm^2/(Ls*Lr), k = Lm/Lr: + * + * d(l_ra)/dt = -(Rr/Lr) l_ra + (Rr*Lm/Lr) i_sa - w_e l_rb + * d(l_rb)/dt = -(Rr/Lr) l_rb + (Rr*Lm/Lr) i_sb + w_e l_ra + * sigma*Ls di_s/dt = v_s - Rs i_s - k d(l_r)/dt + * Te = (3/2) pp k (l_ra i_sb - l_rb i_sa) + * + * Mechanics deliberately mirror MotorModel: the electrical speed is + * integrated directly as d(w_e)/dt = (Te - B w_e)/J, and theta_e wraps in + * [0, 2pi). Same convention as the PMSM path, so scenario inertia/friction + * mean the same thing for both machine types and the HostSIL rpm conversions + * stay valid. + * ========================================================================== */ + +#include +#include + +namespace hostsim { + +struct InductionParams { + float rs_ohm = 0.4f; + float rr_ohm = 0.3f; + float lm_h = 0.025f; + float lls_h = 0.002f; + float llr_h = 0.002f; + int pole_pairs = 2; + float inertia_kg_m2 = 1.0e-3f; + float friction_nm_per_rad_s = 1.0e-4f; +}; + +class InductionMachine { +public: + void SetParams(const InductionParams& params) { params_ = params; } + const InductionParams& Params() const { return params_; } + + void Reset() { + is_alpha_ = is_beta_ = 0.0f; + lambda_r_alpha_ = lambda_r_beta_ = 0.0f; + theta_e_rad_ = 0.0f; + omega_e_rad_s_ = 0.0f; + } + + /* One timestep with the stationary-frame stator voltage vector. */ + void Step(float vs_alpha, float vs_beta, float dt_s) { + if (dt_s <= 0.0f) return; + + const float ls = params_.lm_h + params_.lls_h; + const float lr = params_.lm_h + params_.llr_h; + const float kr = (lr > 1e-12f) ? params_.lm_h / lr : 0.0f; + const float rr_over_lr = (lr > 1e-12f) ? params_.rr_ohm / lr : 0.0f; + const float sigma_ls = + std::max(ls - params_.lm_h * params_.lm_h / std::max(lr, 1e-12f), + 1e-9f); + const float omega = omega_e_rad_s_; + + const float dlra = -rr_over_lr * lambda_r_alpha_ + + rr_over_lr * params_.lm_h * is_alpha_ - + omega * lambda_r_beta_; + const float dlrb = -rr_over_lr * lambda_r_beta_ + + rr_over_lr * params_.lm_h * is_beta_ + + omega * lambda_r_alpha_; + const float disa = (vs_alpha - params_.rs_ohm * is_alpha_ - + kr * dlra) / sigma_ls; + const float disb = (vs_beta - params_.rs_ohm * is_beta_ - + kr * dlrb) / sigma_ls; + + is_alpha_ += disa * dt_s; + is_beta_ += disb * dt_s; + lambda_r_alpha_ += dlra * dt_s; + lambda_r_beta_ += dlrb * dt_s; + + const float torque = 1.5f * static_cast(params_.pole_pairs) * + kr * (lambda_r_alpha_ * is_beta_ - + lambda_r_beta_ * is_alpha_); + const float friction = params_.friction_nm_per_rad_s * omega; + omega_e_rad_s_ += (torque - friction) / params_.inertia_kg_m2 * dt_s; + theta_e_rad_ += omega * dt_s; + constexpr float kTwoPi = 6.28318530717958647692f; + while (theta_e_rad_ >= kTwoPi) theta_e_rad_ -= kTwoPi; + while (theta_e_rad_ < 0.0f) theta_e_rad_ += kTwoPi; + } + + float IsAlpha() const { return is_alpha_; } + float IsBeta() const { return is_beta_; } + float ThetaERad() const { return theta_e_rad_; } + float OmegaERadS() const { return omega_e_rad_s_; } + + /* Rotor-flux-frame decomposition of the stator current: d = magnetizing + * (along the rotor flux), q = torque-producing. |lambda| below epsilon + * means the machine is unexcited and both read zero. */ + void FluxFrameCurrents(float* id_a, float* iq_a) const { + const float mag = std::sqrt(lambda_r_alpha_ * lambda_r_alpha_ + + lambda_r_beta_ * lambda_r_beta_); + if (mag < 1e-9f) { + if (id_a) *id_a = 0.0f; + if (iq_a) *iq_a = 0.0f; + return; + } + const float ca = lambda_r_alpha_ / mag; + const float cb = lambda_r_beta_ / mag; + if (id_a) *id_a = is_alpha_ * ca + is_beta_ * cb; + if (iq_a) *iq_a = -is_alpha_ * cb + is_beta_ * ca; + } + + /* Classical slip frequency w_slip = (Rr*Lm/Lr) * i_sq / |lambda_r|, + * i.e. how much faster the flux vector rotates than the rotor shaft (at + * no load near sync this decays toward 0). */ + float SlipElectricalRadPerSec() const { + const float lr = params_.lm_h + params_.llr_h; + const float mag2 = lambda_r_alpha_ * lambda_r_alpha_ + + lambda_r_beta_ * lambda_r_beta_; + if (mag2 < 1e-18f || lr <= 1e-12f) return 0.0f; + float id = 0.0f, iq = 0.0f; + FluxFrameCurrents(&id, &iq); + (void)id; + const float mag = std::sqrt(mag2); + return (params_.rr_ohm * params_.lm_h / lr) * iq / mag; + } + +private: + InductionParams params_{}; + float is_alpha_ = 0.0f; + float is_beta_ = 0.0f; + float lambda_r_alpha_ = 0.0f; + float lambda_r_beta_ = 0.0f; + float theta_e_rad_ = 0.0f; + float omega_e_rad_s_ = 0.0f; +}; + +} // namespace hostsim diff --git a/Images/HostSim/src/main.cpp b/Images/HostSim/src/main.cpp new file mode 100644 index 00000000..deabb57f --- /dev/null +++ b/Images/HostSim/src/main.cpp @@ -0,0 +1,158 @@ +#include "AppState.h" +#include "can_bridge.h" +#include "sim_runtime.h" + +#include +#include +#include +#include + +AppState appState; + +namespace { + +bool ParseHostPort(const std::string& spec, std::string* host, int* port) { + const auto colon = spec.rfind(':'); + if (colon == std::string::npos || colon == 0 || colon + 1 >= spec.size()) { + return false; + } + *host = spec.substr(0, colon); + *port = std::atoi(spec.substr(colon + 1).c_str()); + return *port > 0 && *port < 65536; +} + +void PrintUsage(const char* exe) { + std::fprintf(stderr, + "usage: %s [scenario.json] [--live] [--listen host:port] [--realtime N] [--telem-hz N]\n" + " --live long-running mode; publish InverterProtocol over TCP\n" + " --listen host:port TCP listen address (default 127.0.0.1:14608)\n" + " --realtime N wall-clock pacing factor (1.0 = realtime, 0 = as-fast)\n" + " --telem-hz N telemetry publish rate (default 500 in live mode)\n" + " --can-bridge-listen PORT share CAN with other host_sim instances (hub)\n" + " --can-bridge-connect HOST:PORT join a hub as a spoke (Linux only)\n" + " --can-bridge-id N instance tag for loop filtering (default: pid-derived)\n" + " --can-bridge-debug also log transmitted frames\n" + " --can-selftest emit platform_can_send bus=0 id=0x123 every 100 ms\n" + "\n" + "NodeGUI: NodeGUI --tcp 127.0.0.1:14608 --protocol ivp\n" + "Console: throttle a 0.5 | pause | resume | clear | quit\n", + exe); +} + +} // namespace + +int main(int argc, char** argv) { + const char* scenario = "scenarios/default_motor.json"; + bool live = false; + bool listen_set = false; + std::string listen_host = "127.0.0.1"; + int listen_port = 14608; + float realtime = -1.0f; + float telem_hz = -1.0f; + hostsim::CanBridgeConfig bridge_cfg; + bool bridge_id_given = false; + + for (int i = 1; i < argc; ++i) { + const char* arg = argv[i]; + if (std::strcmp(arg, "--live") == 0) { + live = true; + } else if (std::strcmp(arg, "--listen") == 0) { + if (++i >= argc) { + PrintUsage(argv[0]); + return 1; + } + if (!ParseHostPort(argv[i], &listen_host, &listen_port)) { + std::fprintf(stderr, "invalid --listen (expected host:port)\n"); + return 1; + } + listen_set = true; + } else if (std::strcmp(arg, "--realtime") == 0) { + if (++i >= argc) { + PrintUsage(argv[0]); + return 1; + } + realtime = static_cast(std::atof(argv[i])); + } else if (std::strcmp(arg, "--telem-hz") == 0) { + if (++i >= argc) { + PrintUsage(argv[0]); + return 1; + } + telem_hz = static_cast(std::atof(argv[i])); + } else if (std::strcmp(arg, "--scenario") == 0) { + if (++i >= argc) { + PrintUsage(argv[0]); + return 1; + } + scenario = argv[i]; + } else if (std::strcmp(arg, "--can-bridge-listen") == 0) { + if (++i >= argc) { + PrintUsage(argv[0]); + return 1; + } + bridge_cfg.port = std::atoi(argv[i]); + if (bridge_cfg.port <= 0 || bridge_cfg.port > 65535) { + std::fprintf(stderr, "invalid --can-bridge-listen port\n"); + return 1; + } + bridge_cfg.hub = true; + } else if (std::strcmp(arg, "--can-bridge-connect") == 0) { + if (++i >= argc) { + PrintUsage(argv[0]); + return 1; + } + if (!ParseHostPort(argv[i], &bridge_cfg.host, &bridge_cfg.port)) { + std::fprintf(stderr, + "invalid --can-bridge-connect (expected HOST:PORT)\n"); + return 1; + } + bridge_cfg.connect = true; + } else if (std::strcmp(arg, "--can-bridge-id") == 0) { + if (++i >= argc) { + PrintUsage(argv[0]); + return 1; + } + bridge_cfg.instance_id = + static_cast(std::strtoul(argv[i], nullptr, 0)); + bridge_id_given = bridge_cfg.instance_id != 0; + } else if (std::strcmp(arg, "--can-bridge-debug") == 0) { + bridge_cfg.debug = true; + } else if (std::strcmp(arg, "--can-selftest") == 0) { + bridge_cfg.selftest = true; + } else if (std::strcmp(arg, "--help") == 0 || std::strcmp(arg, "-h") == 0) { + PrintUsage(argv[0]); + return 0; + } else if (arg[0] != '-') { + scenario = arg; + } else { + PrintUsage(argv[0]); + return 1; + } + } + + if (bridge_cfg.hub && bridge_cfg.connect) { + std::fprintf(stderr, + "--can-bridge-listen and --can-bridge-connect are " + "mutually exclusive\n"); + return 1; + } + if (bridge_id_given && bridge_cfg.instance_id == 0) { + std::fprintf(stderr, "--can-bridge-id must be non-zero\n"); + return 1; + } + + hostsim::SimRuntime& runtime = hostsim::GlobalSimRuntime(); + if (!runtime.LoadScenario(scenario)) { + std::fprintf(stderr, "HostSim: failed to load scenario %s\n", scenario); + return 1; + } + + if (live) runtime.SetLive(true); + if (listen_set || live) runtime.SetListen(listen_host, listen_port); + if (realtime >= 0.0f) runtime.SetRealtimeFactor(realtime); + if (telem_hz > 0.0f) runtime.SetTelemetryHz(telem_hz); + if (bridge_cfg.hub || bridge_cfg.connect || bridge_cfg.selftest) { + hostsim::GlobalCanBridge().Configure(bridge_cfg); + } + + return runtime.Run(); +} diff --git a/Images/HostSim/src/motor_model.cpp b/Images/HostSim/src/motor_model.cpp new file mode 100644 index 00000000..786745ef --- /dev/null +++ b/Images/HostSim/src/motor_model.cpp @@ -0,0 +1,144 @@ +#include "motor_model.h" + +#include + +namespace hostsim { + +namespace { +constexpr float kPi = 3.14159265358979323846f; +constexpr float kTwoPi = 2.0f * kPi; + +float WrapAngle(float theta) { + while (theta >= kTwoPi) theta -= kTwoPi; + while (theta < 0.0f) theta += kTwoPi; + return theta; +} +} // namespace + +/* Salient dq PMSM (machine Pmsm, the default): + * + * v_d = Rs id + Ld d(id)/dt - w_e Lq iq -> integrated as + * diq/dt = (vq - Rs iq - w_e (Ld id + lambda)) / Lq + * did/dt = (vd - Rs id + w_e Lq iq) / Ld + * Te = (3/2) pp (lambda iq + (Ld - Lq) id iq) + * + * with the same electrical-frame mechanics as the induction machine: + * d(w_e)/dt = (Te - B w_e)/J, theta_e wrapped in [0, 2pi). */ + +void MotorModel::SetParams(const MotorParams& params) { + params_ = params; + InductionParams ip{}; + ip.rs_ohm = params.rs_ohm; + ip.rr_ohm = params.rr_ohm; + ip.lm_h = params.lm_h; + ip.lls_h = params.lls_h; + ip.llr_h = params.llr_h; + ip.pole_pairs = params.pole_pairs; + ip.inertia_kg_m2 = params.inertia_kg_m2; + ip.friction_nm_per_rad_s = params.friction_nm_per_rad_s; + induction_.SetParams(ip); +} + +void MotorModel::Reset() { + state_ = MotorState{}; + induction_.Reset(); +} + +float MotorModel::ClampDuty(float duty_pct) { + return std::max(0.0f, std::min(100.0f, duty_pct)); +} + +void MotorModel::DutiesToAbcVoltage(float du, float dv, float dw, float vdc, + float* va, float* vb, float* vc) { + const float scale = vdc / 100.0f; + if (va) *va = ClampDuty(du) * scale; + if (vb) *vb = ClampDuty(dv) * scale; + if (vc) *vc = ClampDuty(dw) * scale; +} + +void MotorModel::AbcToDq(float va, float vb, float vc, float theta, + float* vd, float* vq) { + const float c = std::cos(theta); + const float s = std::sin(theta); + const float v_alpha = (2.0f / 3.0f) * (va - 0.5f * vb - 0.5f * vc); + const float v_beta = (2.0f / 3.0f) * (0.8660254f * vb - 0.8660254f * vc); + if (vd) *vd = v_alpha * c + v_beta * s; + if (vq) *vq = -v_alpha * s + v_beta * c; +} + +void MotorModel::DqToAbc(float id, float iq, float theta, + float* ia, float* ib, float* ic) { + const float c = std::cos(theta); + const float s = std::sin(theta); + const float i_alpha = id * c - iq * s; + const float i_beta = id * s + iq * c; + if (ia) *ia = i_alpha; + if (ib) *ib = -0.5f * i_alpha + 0.8660254f * i_beta; + if (ic) *ic = -0.5f * i_alpha - 0.8660254f * i_beta; +} + +void MotorModel::Step(float duty_u_pct, float duty_v_pct, float duty_w_pct, + float dt_s) { + if (dt_s <= 0.0f) return; + + float va = 0.0f; + float vb = 0.0f; + float vc = 0.0f; + DutiesToAbcVoltage(duty_u_pct, duty_v_pct, duty_w_pct, params_.vdc_v, + &va, &vb, &vc); + state_.va_v = va; + state_.vb_v = vb; + state_.vc_v = vc; + + if (params_.machine == MachineType::Induction) { + /* Same Clarke convention as AbcToDq: peak-phase-amplitude preserving. + * v_alpha/beta is exactly the stationary-frame voltage vector the + * V/Hz and FOC graphs synthesize. */ + const float v_alpha = (2.0f / 3.0f) * (va - 0.5f * vb - 0.5f * vc); + const float v_beta = (2.0f / 3.0f) * (0.8660254f * vb - 0.8660254f * vc); + induction_.Step(v_alpha, v_beta, dt_s); + + const float i_alpha = induction_.IsAlpha(); + const float i_beta = induction_.IsBeta(); + state_.ia_a = i_alpha; + state_.ib_a = -0.5f * i_alpha + 0.8660254f * i_beta; + state_.ic_a = -0.5f * i_alpha - 0.8660254f * i_beta; + induction_.FluxFrameCurrents(&state_.id_a, &state_.iq_a); + state_.theta_e_rad = induction_.ThetaERad(); + state_.omega_e_rad_s = induction_.OmegaERadS(); + return; + } + + float vd = 0.0f; + float vq = 0.0f; + AbcToDq(va, vb, vc, state_.theta_e_rad, &vd, &vq); + + const float omega = state_.omega_e_rad_s; + const float did = (vd - params_.rs_ohm * state_.id_a + + omega * params_.lq_h * state_.iq_a) / + params_.ld_h; + const float diq = (vq - params_.rs_ohm * state_.iq_a - + omega * (params_.ld_h * state_.id_a + params_.flux_wb)) / + params_.lq_h; + + state_.id_a += did * dt_s; + state_.iq_a += diq * dt_s; + + const float torque = + 1.5f * static_cast(params_.pole_pairs) * + (params_.flux_wb * state_.iq_a + + (params_.ld_h - params_.lq_h) * state_.id_a * state_.iq_a); + const float friction = params_.friction_nm_per_rad_s * omega; + const float domega = (torque - friction) / params_.inertia_kg_m2; + state_.omega_e_rad_s += domega * dt_s; + state_.theta_e_rad = WrapAngle(state_.theta_e_rad + omega * dt_s); + + DqToAbc(state_.id_a, state_.iq_a, state_.theta_e_rad, + &state_.ia_a, &state_.ib_a, &state_.ic_a); +} + +float MotorModel::ThetaElectricalDeg() const { + return state_.theta_e_rad * 180.0f / kPi; +} + +} // namespace hostsim diff --git a/Images/HostSim/src/motor_model.h b/Images/HostSim/src/motor_model.h new file mode 100644 index 00000000..9c94d6e5 --- /dev/null +++ b/Images/HostSim/src/motor_model.h @@ -0,0 +1,77 @@ +#pragma once + +#include + +#include "induction_model.h" + +namespace hostsim { + +enum class MachineType { Pmsm = 0, Induction }; + +struct MotorParams { + float rs_ohm = 0.05f; + float ld_h = 0.0001f; + float lq_h = 0.0001f; + float flux_wb = 0.01f; + int pole_pairs = 7; + float inertia_kg_m2 = 1.0e-5f; + float friction_nm_per_rad_s = 1.0e-4f; + float vdc_v = 48.0f; + /* Machine selection: Pmsm (default) integrates the salient dq PMSM below + * and ignores the induction-only fields. */ + MachineType machine = MachineType::Pmsm; + /* Induction machine (squirrel cage, stationary alpha/beta). rs_ohm, + * pole_pairs, inertia, friction and vdc_v are shared with the PMSM. */ + float rr_ohm = 0.3f; + float lm_h = 0.025f; + float lls_h = 0.002f; + float llr_h = 0.002f; +}; + +struct MotorState { + float id_a = 0.0f; + float iq_a = 0.0f; + float theta_e_rad = 0.0f; + float omega_e_rad_s = 0.0f; + float ia_a = 0.0f; + float ib_a = 0.0f; + float ic_a = 0.0f; + /* Phase terminal voltages applied by the inverter on the last Step() + * (duty-derived, vs DC-). Read back by platform_phase_voltage_u/v/w so + * telemetry sees what the plant actually received, not the duty request. */ + float va_v = 0.0f; + float vb_v = 0.0f; + float vc_v = 0.0f; +}; + +class MotorModel { +public: + void SetParams(const MotorParams& params); + const MotorParams& Params() const { return params_; } + const MotorState& State() const { return state_; } + + void Reset(); + void Step(float duty_u_pct, float duty_v_pct, float duty_w_pct, float dt_s); + + float ThetaElectricalDeg() const; + float OmegaElectricalRadPerSec() const { return state_.omega_e_rad_s; } + /* Rotor-flux slip (induction only; 0 for PMSM). Diagnostic accessor for + * scenario/debug sessions — the runtime trace derives slip from the + * commanded feed frequency instead. */ + float SlipElectricalRadPerSec() const { return induction_.SlipElectricalRadPerSec(); } + +private: + MotorParams params_{}; + MotorState state_{}; + InductionMachine induction_{}; + + static float ClampDuty(float duty_pct); + static void DutiesToAbcVoltage(float du, float dv, float dw, float vdc, + float* va, float* vb, float* vc); + static void AbcToDq(float va, float vb, float vc, float theta, + float* vd, float* vq); + static void DqToAbc(float id, float iq, float theta, + float* ia, float* ib, float* ic); +}; + +} // namespace hostsim diff --git a/Images/HostSim/src/plant/ngspice_plant.cpp b/Images/HostSim/src/plant/ngspice_plant.cpp new file mode 100644 index 00000000..3a390077 --- /dev/null +++ b/Images/HostSim/src/plant/ngspice_plant.cpp @@ -0,0 +1,863 @@ +#include "ngspice_plant.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#if defined(_WIN32) +#ifndef NOMINMAX +#define NOMINMAX +#endif +#include +#else +#include +#include +#endif + +namespace hostsim { + +namespace { +constexpr float kPi = 3.14159265358979323846f; +constexpr float kTwoPi = 2.0f * kPi; +constexpr float kPhase120Rad = 2.0f * kPi / 3.0f; +constexpr float kSqrt3 = 1.7320508075688772f; + +std::string Trim(const std::string& s) { + size_t b = 0; + while (b < s.size() && std::isspace(static_cast(s[b]))) ++b; + size_t e = s.size(); + while (e > b && std::isspace(static_cast(s[e - 1]))) --e; + return s.substr(b, e - b); +} + +float WrapAngle(float theta) { + while (theta >= kTwoPi) theta -= kTwoPi; + while (theta < 0.0f) theta += kTwoPi; + return theta; +} + +float ClampDuty(float duty_pct) { + return std::max(0.0f, std::min(100.0f, duty_pct)); +} + +void DutiesToAbcVoltage(float du, float dv, float dw, float vdc, + float* va, float* vb, float* vc) { + const float scale = vdc / 100.0f; + if (va) *va = ClampDuty(du) * scale; + if (vb) *vb = ClampDuty(dv) * scale; + if (vc) *vc = ClampDuty(dw) * scale; +} + +int CaseInsensitiveCompare(const char* a, const char* b) { +#if defined(_WIN32) + return _stricmp(a, b); +#else + return strcasecmp(a, b); +#endif +} + +/* SPICE literal like "10us", "1meg", "0.33m": decimal mantissa plus the + * ngspice suffix table (t/g/meg/k/m/mil/u/n/p/f). ngspice ignores trailing + * letters past a recognized suffix, so "1s" is 1 and "10us" is 1e-5. Returns + * false when the token is no plain literal (e.g. a {param} expression). */ +bool ParseSpiceValue(const std::string& tok, double* out) { + if (!out) return false; + char* end = nullptr; + const double mantissa = std::strtod(tok.c_str(), &end); + if (end == tok.c_str()) return false; + std::string suffix(end); + for (auto& c : suffix) { + c = static_cast(std::tolower(static_cast(c))); + } + double mult = 1.0; + if (suffix.rfind("meg", 0) == 0) { + mult = 1.0e6; + } else if (suffix.rfind("mil", 0) == 0) { + mult = 25.4e-6; + } else if (!suffix.empty()) { + switch (suffix[0]) { + case 't': mult = 1.0e12; break; + case 'g': mult = 1.0e9; break; + case 'k': mult = 1.0e3; break; + case 'm': mult = 1.0e-3; break; + case 'u': mult = 1.0e-6; break; + case 'n': mult = 1.0e-9; break; + case 'p': mult = 1.0e-12; break; + case 'f': mult = 1.0e-15; break; + default: mult = 1.0; break; /* trailing letters ngspice ignores */ + } + } + *out = mantissa * mult; + return std::isfinite(*out); +} + +/* Stand-in TSTOP for live runs (no scenario duration bounds them). */ +constexpr double kLiveTstopS = 1.0e9; + +} // namespace + +NgspicePlant::NgspicePlant() { + if (std::getenv("HOSTSIM_NGSPICE_SYNC_JUMP")) sync_override_ = true; + if (LoadSharedLibrary() && BindSymbols()) { + sharedspice_loaded_ = true; + int ident = 0; + fn_ngSpice_Init_(CallbackSendChar, CallbackSendStat, CallbackControlledExit, + CallbackSendData, CallbackSendInitData, CallbackBGThreadRunning, + this); + fn_ngSpice_Init_Sync_(CallbackGetVSRCData, CallbackGetISRCData, + CallbackGetSyncData, &ident, this); + /* From here on the library may own a live background worker thread; + * UnloadSharedLibrary must never dlclose it again. */ + spice_initialized_ = true; + std::cerr << "HostSim: libngspice loaded; experimental ngspice plant " + "backend active\n"; + } else { + sharedspice_loaded_ = false; + UnloadSharedLibrary(); + } +} + +NgspicePlant::~NgspicePlant() { UnloadSharedLibrary(); } + +bool NgspicePlant::LoadSharedLibrary() { +#if defined(_WIN32) + lib_handle_ = static_cast(LoadLibraryA("ngspice.dll")); +#else + // The runtime package on most Linux distros ships only the versioned + // soname, so try the linker name first, then the soname. + static const char* const kCandidates[] = {"libngspice.so", "libngspice.so.0"}; + for (const char* name : kCandidates) { + lib_handle_ = dlopen(name, RTLD_NOW | RTLD_LOCAL); + if (lib_handle_) break; + } +#endif + return lib_handle_ != nullptr; +} + +void NgspicePlant::UnloadSharedLibrary() { + if (!lib_handle_) return; + if (spice_initialized_) { + /* ngSpice_Init has no shutdown counterpart and the library may still + * own a live background worker; dlclose would unmap code that thread + * executes (crash during static teardown of g_runtime). Deliberate + * one-time leak: the OS reclaims the mapping at process exit. */ + lib_handle_ = nullptr; + return; + } +#if defined(_WIN32) + FreeLibrary(static_cast(lib_handle_)); +#else + dlclose(lib_handle_); +#endif + lib_handle_ = nullptr; +} + +void NgspicePlant::Command(const char* cmd) { + if (!fn_ngSpice_Command_ || !cmd) return; + std::string buffer(cmd); + fn_ngSpice_Command_(buffer.data()); +} + +bool NgspicePlant::BindSymbols() { + if (!lib_handle_) return false; + +#define BIND(name) \ + do { \ + fn_##name##_ = reinterpret_cast( \ + GetProcAddress(static_cast(lib_handle_), #name)); \ + if (!fn_##name##_) { \ + std::cerr << "HostSim: failed to resolve symbol " #name "\n"; \ + return false; \ + } \ + } while (0) + +#if !defined(_WIN32) +#undef BIND +#define BIND(name) \ + do { \ + fn_##name##_ = reinterpret_cast(dlsym(lib_handle_, #name)); \ + if (!fn_##name##_) { \ + std::cerr << "HostSim: failed to resolve symbol " #name "\n"; \ + return false; \ + } \ + } while (0) +#endif + + BIND(ngSpice_Init); + BIND(ngSpice_Init_Sync); + BIND(ngSpice_Command); + BIND(ngSpice_Circ); + BIND(ngSpice_running); + BIND(ngSpice_CurPlot); + BIND(ngSpice_AllPlots); + BIND(ngSpice_AllVecs); + BIND(ngSpice_SetBkpt); + BIND(ngGet_Vec_Info); + +#undef BIND + return true; +} + +void NgspicePlant::SetParams(const MotorParams& params) { params_ = params; } + +void NgspicePlant::Reset() { + state_ = MotorState{}; + current_sim_time_ = 0.0; + first_step_ = true; + analysis_failed_ = false; + sync_target_time_.store(0.0); + sync_redo_block_.store(false); + + if (!sharedspice_loaded_) return; + + if (!circuit_loaded_) { + LoadNetlist(); + } + + ApplyParams(); + + if (circuit_loaded_) { + // Drop any debug stop that survived a previous run before restarting + // the analysis; ngspice complains ("no debugs in effect") if the + // delete is issued with none active. + if (stop_active_) { + Command("delete all"); + stop_active_ = false; + } + Command("reset"); + } +} + +float NgspicePlant::ThetaElectricalDeg() const { + return state_.theta_e_rad * 180.0f / kPi; +} + +bool NgspicePlant::DetectBackEmfSources( + const std::vector& lines) { + static const char* const kNames[3] = {"veu", "vev", "vew"}; + bool found[3] = {false, false, false}; + // ngspice lowercases netlist names internally, so match + // case-insensitively. + for (const auto& raw : lines) { + std::string line = Trim(raw); + if (line.empty() || line[0] == '*') continue; + for (auto& c : line) { + c = static_cast(std::tolower(static_cast(c))); + } + if (line.find("external") == std::string::npos) continue; + std::istringstream iss(line); + std::string name; + iss >> name; + for (int k = 0; k < 3; ++k) { + if (name == kNames[k]) found[k] = true; + } + } + return found[0] && found[1] && found[2]; +} + +bool NgspicePlant::DetectDcdcSenseSources( + const std::vector& lines) { + static const char* const kNames[3] = {"vsen1", "vsen2", "vsen3"}; + bool found[3] = {false, false, false}; + // Same scanning idiom as DetectBackEmfSources: first-token element names, + // case-insensitive, comments/blank lines skipped. + for (const auto& raw : lines) { + std::string line = Trim(raw); + if (line.empty() || line[0] == '*') continue; + for (auto& c : line) { + c = static_cast(std::tolower(static_cast(c))); + } + std::istringstream iss(line); + std::string name; + iss >> name; + for (int k = 0; k < 3; ++k) { + if (name == kNames[k]) found[k] = true; + } + } + return found[0] && found[1] && found[2]; +} + +bool NgspicePlant::DetectMotorVoltageSources( + const std::vector& lines) { + static const char* const kNames[3] = {"vu", "vv", "vw"}; + bool found[3] = {false, false, false}; + // Same scanning idiom as DetectBackEmfSources: first-token element names, + // case-insensitive, comments/blank lines skipped, "external" required. + for (const auto& raw : lines) { + std::string line = Trim(raw); + if (line.empty() || line[0] == '*') continue; + for (auto& c : line) { + c = static_cast(std::tolower(static_cast(c))); + } + if (line.find("external") == std::string::npos) continue; + std::istringstream iss(line); + std::string name; + iss >> name; + for (int k = 0; k < 3; ++k) { + if (name == kNames[k]) found[k] = true; + } + } + return found[0] && found[1] && found[2]; +} + +/* Parse the first .tran card's TSTOP and, when the planned scenario/live run + * reaches past it, rewrite the card in place before ngSpice_Circ sees it. + * Rationale: a completed analysis looks like a pause to the host, then a + * resume that never answers — the run froze with a 10 s stall per step. + * Auto-raising keeps user netlists safe without a dance of manual edits; + * the runtime pre-/post-checks in AdvanceSpiceTo cover the unparseable case. */ +void NgspicePlant::RaiseTranTstopForRun(std::vector* lines) { + if (!lines || (!live_mode_ && planned_duration_s_ <= 0.0)) return; + const double needed = + live_mode_ ? kLiveTstopS : planned_duration_s_ + 1.0e-3; + for (auto& raw : *lines) { + const std::string trimmed = Trim(raw); + if (trimmed.empty() || trimmed[0] == '*') continue; + std::istringstream iss(trimmed); + std::vector toks; + for (std::string t; iss >> t;) toks.push_back(t); + if (toks.size() < 3) continue; + std::string card = toks[0]; + for (auto& c : card) { + c = static_cast(std::tolower(static_cast(c))); + } + if (card != ".tran") continue; + + double tstop_s = 0.0; + if (!ParseSpiceValue(toks[2], &tstop_s) || tstop_s <= 0.0) { + /* Leave the line alone: AdvanceSpiceTo still catches an early + * completion via the reached-time check. */ + std::cerr << "HostSim: WARNING: cannot parse .tran TSTOP token \"" + << toks[2] << "\" in " << netlist_path_ + << "; TSTOP auto-raise skipped\n"; + return; + } + netlist_tstop_s_ = tstop_s; + if (needed > tstop_s) { + std::ostringstream nv; + nv << std::setprecision(12) << needed; + std::ostringstream joined; + for (size_t i = 0; i < toks.size(); ++i) { + joined << (i > 0 ? " " : "") << (i == 2 ? nv.str() : toks[i]); + } + std::cerr << "HostSim: netlist " << netlist_path_ + << " .tran TSTOP " << tstop_s + << " s is shorter than the planned run (" << needed + << " s); raising TSTOP so the analysis cannot complete " + "mid-run\n"; + raw = joined.str(); + netlist_tstop_s_ = needed; + } + return; + } +} + +void NgspicePlant::LoadNetlist() { + if (!fn_ngSpice_Circ_) return; + if (netlist_path_.empty()) { + std::cerr << "HostSim: ERROR: ngspice backend selected but no " + "plant.netlist given\n"; + return; + } + + std::ifstream in(netlist_path_); + if (!in) { + std::cerr << "HostSim: cannot open netlist " << netlist_path_ << '\n'; + return; + } + + std::vector storage; + std::string line; + while (std::getline(in, line)) { + if (Trim(line).empty()) continue; + storage.push_back(line); + } + + /* .tran TSTOP must cover the planned run; raise it in the text before + * ngSpice_Circ ever sees the deck (finding: completed analyses looked + * like a breakpoint pause, then froze the run). */ + netlist_tstop_s_ = -1.0; + RaiseTranTstopForRun(&storage); + + has_bemf_sources_ = DetectBackEmfSources(storage); + if (has_bemf_sources_) { + std::cerr << "HostSim: netlist exposes Veu/Vev/Vew back-EMF sources; " + "back-EMF is driven in-circuit\n"; + } + + has_motor_vsources_ = DetectMotorVoltageSources(storage); + netlist_is_dcdc_ = DetectDcdcSenseSources(storage); + // Mode/netlist consistency — never run silently on a mismatched pairing; + // the runtime replaces the plant after Reset() when this fires. + if (mode_ == NgspicePlantMode::Dcdc && !netlist_is_dcdc_) { + std::cerr << "HostSim: ERROR: plant.mode \"dcdc\" but netlist " + << netlist_path_ + << " lacks the dcdc contract (Vsen1/Vsen2/Vsen3 sense " + "sources, bus1..3 nodes — see plants/dcdc_buck.cir); " + "refusing to interpret a motor netlist as a converter\n"; + } else if (mode_ == NgspicePlantMode::Motor && netlist_is_dcdc_) { + std::cerr << "HostSim: ERROR: netlist " << netlist_path_ + << " is a dcdc converter netlist (Vsen1/Vsen2/Vsen3 present) " + "but plant.mode is \"motor\"; refusing to run it with " + "motor semantics\n"; + } else if (mode_ == NgspicePlantMode::Motor && !has_motor_vsources_) { + /* Motor-mode contract: without Vu/Vv/Vw external sources the + * GetVSRCData callback never fires and the plant integrates silent + * zeros — refuse loudly the same way the dcdc mismatch does. */ + std::cerr << "HostSim: ERROR: netlist " << netlist_path_ + << " lacks the Vu/Vv/Vw external voltage sources required " + "for plant.mode \"motor\"; refusing to run it (the plant " + "would see 0 V on every phase)\n"; + } else if (mode_ == NgspicePlantMode::Dcdc) { + std::cerr << "HostSim: ngspice plant running in dcdc mode: leg " + "voltage = duty*VDC, currents from Vsen1..3, bus probes " + "v(bus1..3)\n"; + } + + std::vector lines; + lines.reserve(storage.size() + 1); + for (auto& s : storage) { + lines.push_back(s.data()); + } + lines.push_back(nullptr); + + if (fn_ngSpice_Circ_(lines.data()) == 0) { + circuit_loaded_ = true; + } else { + std::cerr << "HostSim: ngSpice_Circ failed to load netlist\n"; + circuit_loaded_ = false; + } +} + +void NgspicePlant::ApplyParams() { + if (!fn_ngSpice_Command_ || !circuit_loaded_) return; + + auto alter = [this](const char* name, double value) { + std::ostringstream oss; + oss << "alterparam " << name << "=" << value; + std::string cmd = oss.str(); + fn_ngSpice_Command_(cmd.data()); + }; + + alter("rs", params_.rs_ohm); + /* The netlists expose a single isotropic Ls; a salient machine is + * collapsed to its mean. Say so once — the ODE backend stays the + * saliency reference. */ + if (!saliency_note_printed_ && params_.ld_h != params_.lq_h) { + saliency_note_printed_ = true; + std::cerr << "HostSim: ngspice plant: Ld (" << params_.ld_h + << " H) != Lq (" << params_.lq_h + << " H); using the isotropic mean Ls=(Ld+Lq)/2 for the " + "netlist (ODE backend is the saliency reference)\n"; + } + alter("ls", 0.5 * (params_.ld_h + params_.lq_h)); + alter("vdc", params_.vdc_v); +} + +void NgspicePlant::UpdatePendingVoltages(float du_pct, float dv_pct, + float dw_pct) { + const float theta = state_.theta_e_rad; + const float omega = state_.omega_e_rad_s; + const float e_peak = params_.flux_wb * omega; + + float va = 0.0f; + float vb = 0.0f; + float vc = 0.0f; + DutiesToAbcVoltage(du_pct, dv_pct, dw_pct, params_.vdc_v, &va, &vb, &vc); + + const float ea = -e_peak * std::sin(theta); + const float eb = -e_peak * std::sin(theta - kPhase120Rad); + const float ec = -e_peak * std::sin(theta + kPhase120Rad); + + const float vn = (va + vb + vc) / 3.0f; + + if (has_bemf_sources_) { + // PMSM netlist: the back-EMF is an in-circuit external source, so the + // V-sources receive only the inverter terminal voltages and Veu/Vev/Vew + // receive the phase back-EMFs. + pending_vu_.store(static_cast(va - vn)); + pending_vv_.store(static_cast(vb - vn)); + pending_vw_.store(static_cast(vc - vn)); + pending_eu_.store(static_cast(ea)); + pending_ev_.store(static_cast(eb)); + pending_ew_.store(static_cast(ec)); + } else { + // RL netlist: the back-EMF has to be folded into the V-source value + // because the circuit contains no element for it. + pending_vu_.store(static_cast(va - vn - ea)); + pending_vv_.store(static_cast(vb - vn - eb)); + pending_vw_.store(static_cast(vc - vn - ec)); + } +} + +bool NgspicePlant::ReadVecLast(const char* vecname, double* out) const { + if (out) *out = 0.0; + if (!out || !fn_ngGet_Vec_Info_) return false; + pvector_info info = fn_ngGet_Vec_Info_(const_cast(vecname)); + if (!info || !info->v_realdata || info->v_length <= 0) return false; + *out = info->v_realdata[info->v_length - 1]; + return true; +} + +float NgspicePlant::ReadVecLastF(const char* vecname) const { + double v = 0.0; + ReadVecLast(vecname, &v); + return static_cast(v); +} + +void NgspicePlant::IntegrateMechanics(float dt_s) { + const float omega = state_.omega_e_rad_s; + const float p = static_cast(params_.pole_pairs); + const float torque = + 1.5f * p * + (params_.flux_wb * state_.iq_a + + (params_.ld_h - params_.lq_h) * state_.id_a * state_.iq_a); + const float friction = params_.friction_nm_per_rad_s * omega; + const float domega = (torque - friction) / params_.inertia_kg_m2; + + state_.omega_e_rad_s += domega * dt_s; + state_.theta_e_rad = WrapAngle(state_.theta_e_rad + omega * dt_s); +} + +void NgspicePlant::Step(float duty_u_pct, float duty_v_pct, float duty_w_pct, + float dt_s) { + if (!sharedspice_loaded_ || !circuit_loaded_ || analysis_failed_) return; + if (dt_s <= 0.0f) return; + + if (mode_ == NgspicePlantMode::Dcdc) { + StepDcdc(duty_u_pct, duty_v_pct, duty_w_pct, dt_s); + return; + } + + UpdatePendingVoltages(duty_u_pct, duty_v_pct, duty_w_pct); + + // Advance the SPICE analysis in substeps_ chunks of the control period; + // the phase voltages are held (zero-order hold) across the whole period. + const double sub_dt = static_cast(dt_s) / substeps_; + const double t0 = current_sim_time_; + for (int s = 1; s <= substeps_; ++s) { + if (!AdvanceSpiceTo(t0 + sub_dt * s)) { + if (!analysis_failed_) { + analysis_failed_ = true; + std::cerr << "HostSim: ngspice background analysis failed to " + "respond; plant state frozen\n"; + } + return; + } + } + current_sim_time_ = t0 + static_cast(dt_s); + + const float ia = ReadVecLastF("i(vu)"); + const float ib = ReadVecLastF("i(vv)"); + const float ic = ReadVecLastF("i(vw)"); + + state_.ia_a = ia; + state_.ib_a = ib; + state_.ic_a = ic; + + const float theta = state_.theta_e_rad; + const float cos_t = std::cos(theta); + const float sin_t = std::sin(theta); + + const float i_alpha = ia; + const float i_beta = (ia + 2.0f * ib) / kSqrt3; + + state_.id_a = i_alpha * cos_t + i_beta * sin_t; + state_.iq_a = -i_alpha * sin_t + i_beta * cos_t; + + IntegrateMechanics(dt_s); +} + +/* dcdc mode: each leg's switch-node source takes duty*VDC directly — no + * neutral-point subtraction, no back-EMF, no dq transform, no mechanics + * (theta/omega/id/iq stay 0). Leg currents come from the netlist's 0V sense + * sources (i(vsenN), + = leg -> bus, orientation fixed by the netlist) and + * bus voltages are probed from the bus1..3 nodes for the trace columns. */ +void NgspicePlant::StepDcdc(float duty_u_pct, float duty_v_pct, + float duty_w_pct, float dt_s) { + const float scale = params_.vdc_v / 100.0f; + pending_vu_.store(static_cast(ClampDuty(duty_u_pct) * scale)); + pending_vv_.store(static_cast(ClampDuty(duty_v_pct) * scale)); + pending_vw_.store(static_cast(ClampDuty(duty_w_pct) * scale)); + + // Same zero-order-hold substepping as the motor path: voltages held + // across the tick, SPICE advanced in substeps_ chunks. + const double sub_dt = static_cast(dt_s) / substeps_; + const double t0 = current_sim_time_; + for (int s = 1; s <= substeps_; ++s) { + if (!AdvanceSpiceTo(t0 + sub_dt * s)) { + if (!analysis_failed_) { + analysis_failed_ = true; + std::cerr << "HostSim: ngspice background analysis failed to " + "respond; plant state frozen\n"; + } + return; + } + } + current_sim_time_ = t0 + static_cast(dt_s); + + const float i1 = ReadVecLastF("i(vsen1)"); + const float i2 = ReadVecLastF("i(vsen2)"); + const float i3 = ReadVecLastF("i(vsen3)"); + probes_.i_leg[0] = i1; + probes_.i_leg[1] = i2; + probes_.i_leg[2] = i3; + probes_.v_bus[0] = ReadVecLastF("v(bus1)"); + probes_.v_bus[1] = ReadVecLastF("v(bus2)"); + probes_.v_bus[2] = ReadVecLastF("v(bus3)"); + + // Leg currents ride the phase-current channels so the ADC latch, the + // overcurrent fault injection and the existing trace/telemetry plumbing + // see them without knowing about dcdc mode. + state_.ia_a = i1; + state_.ib_a = i2; + state_.ic_a = i3; + state_.id_a = 0.0f; + state_.iq_a = 0.0f; +} + +bool NgspicePlant::AdvanceSpiceTo(double target_time) { + /* Never arm a breakpoint past the netlist's TSTOP: the analysis would + * COMPLETE instead of pausing — the completion fires one resume callback + * that looks like a pause, and every bg_resume after that never answers + * (the run froze one CV timeout per step). Fail loudly, freeze the plant. */ + if (netlist_tstop_s_ > 0.0 && target_time > netlist_tstop_s_) { + if (!analysis_failed_.exchange(true)) { + std::cerr << "HostSim: ERROR: ngspice .tran TSTOP of " + << netlist_path_ << " (" << netlist_tstop_s_ + << " s) is before the requested t=" << target_time + << " s — raise .tran TSTOP in the netlist or shorten " + "simulation.duration_s; plant state frozen\n"; + } + return false; + } + if (stop_active_) { + Command("delete all"); + stop_active_ = false; + } + { + std::ostringstream oss; + oss << std::setprecision(12) << "stop when time > " << target_time; + Command(oss.str().c_str()); + stop_active_ = true; + } + + uint64_t target_pauses; + { + std::lock_guard lk(bg_mutex_); + target_pauses = bg_pauses_ + 1; + } + + sync_target_time_.store(target_time); + sync_redo_block_.store(false); + + if (first_step_) { + Command("bg_run"); + first_step_ = false; + } else { + // Note: plain "resume" makes ngspice re-run the whole transient from + // t=0; "bg_resume" continues the paused background analysis. + Command("bg_resume"); + } + + if (!WaitForBgPause(target_pauses)) return false; + + /* A healthy `stop when time > target` pause lands strictly PAST the + * target. Landing short means the analysis completed on us instead (a + * TSTOP that dodged the auto-raise, e.g. an unparseable card token or a + * live session running past the loaded card): treat as analysis failure, + * not as a usable pause. */ + double reached = 0.0; + if (ReadVecLast("time", &reached) && + reached < target_time - 1e-9 * std::max(1.0, std::fabs(target_time))) { + if (!analysis_failed_.exchange(true)) { + std::cerr << "HostSim: ERROR: ngspice transient completed early " + "at t=" << reached + << " s before the requested t=" << target_time + << " s (.tran TSTOP too short for this run?); plant " + "state frozen\n"; + } + return false; + } + return true; +} + +bool NgspicePlant::WaitForBgPause(uint64_t target_pauses) { + std::unique_lock lk(bg_mutex_); + // The timeout is deliberately generous: a missed event freezes the plant + // (logged once) instead of hanging the whole simulator. + return bg_cv_.wait_for(lk, std::chrono::seconds(10), + [&] { return bg_pauses_ >= target_pauses; }); +} + +int NgspicePlant::CallbackSendChar(char* output, int /*ident*/, + void* /*userdata*/) { + if (!output) return 0; + // ngspice routes all of its stdout through this callback. The bulk of it + // is per-run/per-resume banner noise ("Doing analysis...", breakpoint + // chatter), which would flood std::cerr and dominate the step cost, so + // only genuine diagnostics are forwarded. + std::string chunk(output); + for (auto& c : chunk) { + c = static_cast(std::tolower(static_cast(c))); + } + if (chunk.find("error") != std::string::npos) { + std::cerr << "[ngspice] " << output; + } + return 0; +} + +int NgspicePlant::CallbackSendStat(char* /*output*/, int /*ident*/, + void* /*userdata*/) { + return 0; +} + +int NgspicePlant::CallbackControlledExit(int exitstatus, bool /*immediate*/, + bool /*quit*/, int /*ident*/, + void* userdata) { + /* Return NONZERO: 0 would permit the ngspice library to exit() the whole + * host process on an internal fatal. Keep the host alive and mark the + * analysis failed instead — Step() then freezes the plant loudly. */ + if (auto* self = static_cast(userdata)) { + self->analysis_failed_.store(true); + } + std::cerr << "HostSim: ngspice requested process exit (status " + << exitstatus << "); suppressed — analysis marked failed, plant " + "state frozen\n"; + return 1; +} + +int NgspicePlant::CallbackSendData(pvecvaluesall /*data*/, + int /*structcount*/, int /*ident*/, + void* /*userdata*/) { + return 0; +} + +int NgspicePlant::CallbackSendInitData(pvecinfoall /*data*/, int /*ident*/, + void* /*userdata*/) { + return 0; +} + +int NgspicePlant::CallbackBGThreadRunning(bool running, int /*ident*/, + void* userdata) { + auto* self = static_cast(userdata); + if (!self) return 0; + // Despite the parameter name, the sharedspice module delivers the + // internal "not running" flag here (verified against ngspice-42): + // true == background analysis paused/halted, false == started. + if (running) { + { + std::lock_guard lk(self->bg_mutex_); + self->bg_running_ = false; + ++self->bg_pauses_; + } + self->bg_cv_.notify_all(); + } else { + std::lock_guard lk(self->bg_mutex_); + self->bg_running_ = true; + } + return 0; +} + +/* Shared log-once for the external-source callbacks: an unrecognized source + * name means the netlist wants driving data we have no actor for; silently + * answering 0 hides exactly the wiring bugs the mode contracts exist to + * catch. Called from the ngspice analysis thread. */ +void NgspicePlant::LogUnknownSourceOnce(const char* node, bool is_voltage) { + if (!node) return; + std::string key = node; + for (auto& c : key) { + c = static_cast(std::tolower(static_cast(c))); + } + key += is_voltage ? " (V)" : " (I)"; + { + std::lock_guard lk(unknown_srcs_mu_); + if (!logged_unknown_srcs_.insert(key).second) return; + } + std::cerr << "HostSim: ngspice netlist requests " << (is_voltage ? "voltage" : "current") + << " data for unknown external source \"" << node + << "\"; answering 0 — expected source names: Vu/Vv/Vw" + << (has_bemf_sources_ ? ", Veu/Vev/Vew" : "") + << " (further repeats of this source not logged)\n"; +} + +int NgspicePlant::CallbackGetVSRCData(double* vval, double /*timeval*/, + char* node, int /*ident*/, + void* userdata) { + if (!vval || !node || !userdata) return 1; + auto* self = static_cast(userdata); + + if (CaseInsensitiveCompare(node, "u_node") == 0 || + CaseInsensitiveCompare(node, "vu") == 0) { + *vval = self->pending_vu_.load(); + } else if (CaseInsensitiveCompare(node, "v_node") == 0 || + CaseInsensitiveCompare(node, "vv") == 0) { + *vval = self->pending_vv_.load(); + } else if (CaseInsensitiveCompare(node, "w_node") == 0 || + CaseInsensitiveCompare(node, "vw") == 0) { + *vval = self->pending_vw_.load(); + } else if (CaseInsensitiveCompare(node, "u_e") == 0 || + CaseInsensitiveCompare(node, "veu") == 0) { + *vval = self->pending_eu_.load(); + } else if (CaseInsensitiveCompare(node, "v_e") == 0 || + CaseInsensitiveCompare(node, "vev") == 0) { + *vval = self->pending_ev_.load(); + } else if (CaseInsensitiveCompare(node, "w_e") == 0 || + CaseInsensitiveCompare(node, "vew") == 0) { + *vval = self->pending_ew_.load(); + } else { + *vval = 0.0; + self->LogUnknownSourceOnce(node, /*is_voltage=*/true); + } + return 0; +} + +int NgspicePlant::CallbackGetISRCData(double* ival, double /*timeval*/, + char* node, int /*ident*/, + void* userdata) { + /* No external current source is part of any supported contract; answer 0 + * A but name the source once so a mismatched netlist is not silent. */ + if (ival) *ival = 0.0; + if (auto* self = static_cast(userdata)) { + self->LogUnknownSourceOnce(node, /*is_voltage=*/false); + } + return 0; +} + +int NgspicePlant::CallbackGetSyncData(double actualtime, double* deltatime, + double /*olddelta*/, int redostep, + int /*ident*/, int /*location*/, + void* userdata) { + if (!deltatime || !userdata) return 0; + auto* self = static_cast(userdata); + if (!self->sync_override_ || !self->circuit_loaded_) return 0; + if (redostep != 0) { + // ngspice is redoing a step (non-convergence / truncation error): let + // its own reduced delta stand, and stop overriding for the rest of + // this substep so we can never fight its error control (no livelock). + self->sync_redo_block_.store(true); + return 0; + } + if (self->sync_redo_block_.load()) return 0; + // sharedspice's sharedsync() applies whatever the callback leaves in + // *deltatime as the next CKTdelta (clamped only to the final time), so we + // can replace the post-breakpoint re-ramp with a jump straight to the + // current stop target. ngspice's own breakpoint truncation happens before + // this callback, so assigning the remaining distance can neither overshoot + // the stop breakpoint nor skip a pause. + const double remaining = self->sync_target_time_.load() - actualtime; + if (remaining > *deltatime) *deltatime = remaining; + return 0; +} + +} // namespace hostsim diff --git a/Images/HostSim/src/plant/ngspice_plant.h b/Images/HostSim/src/plant/ngspice_plant.h new file mode 100644 index 00000000..56e7533c --- /dev/null +++ b/Images/HostSim/src/plant/ngspice_plant.h @@ -0,0 +1,234 @@ +#pragma once + +#include "plant_backend.h" +#include "sharedspice.h" + +#include +#include +#include +#include +#include +#include +#include + +namespace hostsim { + +/* How the plant interprets duties and read-back: + * Motor: 3-phase inverter semantics — neutral-point subtraction, back-EMF + * handling, i(vu)/i(vv)/i(vw) phase currents, dq transform + PMSM + * mechanics in C++. + * Dcdc: 3 independent legs — leg switch-node voltage is duty*VDC directly + * (no neutral subtraction, no back-EMF, no mechanics); leg currents + * read from the netlist's Vsen1..3 zero-volt sense sources, bus + * voltages probed from nodes bus1..3. */ +enum class NgspicePlantMode { Motor = 0, Dcdc }; + +class NgspicePlant : public IPlant { +public: + /* Per-step probes, meaningful in Dcdc mode only: bus voltages v(bus1..3) + * and leg currents i(vsen1..3) sampled at the end of the last Step(). */ + struct DcdcProbes { + float v_bus[3] = {0.0f, 0.0f, 0.0f}; + float i_leg[3] = {0.0f, 0.0f, 0.0f}; + }; + + NgspicePlant(); + ~NgspicePlant() override; + + void SetParams(const MotorParams& params) override; + void Reset() override; + void Step(float duty_u_pct, float duty_v_pct, float duty_w_pct, + float dt_s) override; + + const MotorState& State() const override { return state_; } + float ThetaElectricalDeg() const override; + float OmegaElectricalRadPerSec() const override { + return state_.omega_e_rad_s; + } + + void SetNetlistPath(const std::string& path) { netlist_path_ = path; } + void SetSubsteps(int substeps) { substeps_ = (substeps > 0) ? substeps : 1; } + void SetMode(NgspicePlantMode mode) { mode_ = mode; } + NgspicePlantMode GetMode() const { return mode_; } + /* Sim-time horizon the plant must cover, handed over before the first + * Reset() (i.e. before the netlist is parsed). LoadNetlist raises a + * .tran TSTOP shorter than this so the analysis cannot complete early; + * live mode is unbounded and gets a stand-in horizon. */ + void SetPlannedDuration(double duration_s, bool live) { + planned_duration_s_ = duration_s; + live_mode_ = live; + } + + /* Valid after the netlist has loaded (first Reset()). */ + bool NetlistIsDcdc() const { return netlist_is_dcdc_; } + bool CircuitLoaded() const { return circuit_loaded_; } + /* TSTOP parsed from the netlist's .tran card (post auto-raise), seconds; + * < 0 when unknown (no .tran card or an unparseable value). */ + double NetlistTstopSeconds() const { return netlist_tstop_s_; } + /* dcdc mode is only live when the netlist matches it; ModeMatchesNetlist + * is the runtime's cue to fall back to another backend loudly. Motor mode + * additionally requires the Vu/Vv/Vw external-source contract — without + * them GetVSRCData never fires and the plant would run on silent zeros. */ + bool ModeMatchesNetlist() const { + if (netlist_is_dcdc_ != (mode_ == NgspicePlantMode::Dcdc)) return false; + if (mode_ == NgspicePlantMode::Motor && !has_motor_vsources_) { + return false; + } + return true; + } + bool DcdcActive() const { + return mode_ == NgspicePlantMode::Dcdc && netlist_is_dcdc_; + } + /* Last Step()'s probes; false when dcdc mode is not live. */ + bool GetDcdcProbes(DcdcProbes* out) const { + if (!DcdcActive() || !out) return false; + *out = probes_; + return true; + } + + bool IsSharedspiceLoaded() const { return sharedspice_loaded_; } + +private: + MotorParams params_{}; + MotorState state_{}; + std::string netlist_path_{}; + int substeps_ = 4; + bool sharedspice_loaded_ = false; + /* ngSpice_Init has run: the library may own a live worker thread, so the + * shared library must never be dlclose'd again (deliberate one-time leak + * instead of a crash while g_runtime tears down statically). */ + bool spice_initialized_ = false; + bool circuit_loaded_ = false; + // True when the loaded netlist exposes Veu/Vev/Vew external sources, + // meaning the back-EMF is in-circuit and the V-sources take only the + // inverter terminal voltages. + bool has_bemf_sources_ = false; + // True when the loaded netlist exposes Vu/Vv/Vw external sources — the + // motor-mode drive contract (dcdc netlists expose them too). + bool has_motor_vsources_ = false; + // True when the loaded netlist exposes the Vsen1/Vsen2/Vsen3 sense-source + // trio — the dcdc netlist contract marker (see plants/dcdc_buck.cir). + bool netlist_is_dcdc_ = false; + NgspicePlantMode mode_ = NgspicePlantMode::Motor; + DcdcProbes probes_{}; + bool first_step_ = true; + double current_sim_time_ = 0.0; + // See SetPlannedDuration / NetlistTstopSeconds. + double planned_duration_s_ = 0.0; + bool live_mode_ = false; + double netlist_tstop_s_ = -1.0; + bool saliency_note_printed_ = false; + + // Read by ngspice's analysis thread via GetVSRCData; written by the host + // thread in Step(). Atomics keep that cross-thread handoff safe. + std::atomic pending_vu_{0.0}; + std::atomic pending_vv_{0.0}; + std::atomic pending_vw_{0.0}; + // Back-EMF values for netlists that expose Veu/Vev/Vew external sources + // (back-EMF in-circuit); unused otherwise. + std::atomic pending_eu_{0.0}; + std::atomic pending_ev_{0.0}; + std::atomic pending_ew_{0.0}; + + // Trace-time target of the in-flight bg_run/bg_resume. The GetSyncData + // callback reads it to override ngspice's post-breakpoint timestep cut + // with a single "whole remaining substep" step (skip the re-ramp). + std::atomic sync_target_time_{0.0}; + // Runtime opt-in (HOSTSIM_NGSPICE_SYNC_JUMP=1): GetSyncData overrides the + // post-breakpoint timestep cut and jumps straight to the stop target, + // skipping ngspice's per-resume delta re-ramp (~1.8x fewer internal + // steps, but only ~4% wall time on the RL/PMSM demos and slightly + // different trajectories). Default off: identical behavior to not + // having the override at all. + bool sync_override_ = false; + // Set by the sync callback whenever ngspice has to redo a step; cleared by + // AdvanceSpiceTo when a new stop target is armed. While set, the callback + // leaves the timestep to ngspice for the rest of that substep. + std::atomic sync_redo_block_{false}; + + void* lib_handle_ = nullptr; + + // BGThreadRunning reports each pause of the background analysis; the host + // thread blocks on this instead of spin-polling ngSpice_running(). + std::mutex bg_mutex_; + std::condition_variable bg_cv_; + bool bg_running_ = false; + uint64_t bg_pauses_ = 0; + bool stop_active_ = false; + /* Written by the ngspice analysis thread (CallbackControlledExit) and the + * host thread alike. */ + std::atomic analysis_failed_{false}; + + /* Log-once sets for external-source names the callbacks don't recognize + * (called from the analysis thread; host thread never touches them). */ + std::mutex unknown_srcs_mu_; + std::set logged_unknown_srcs_; + + using FN_ngSpice_Init = + int (*)(SendChar*, SendStat*, ControlledExit*, SendData*, + SendInitData*, BGThreadRunning*, void*); + using FN_ngSpice_Init_Sync = + int (*)(GetVSRCData*, GetISRCData*, GetSyncData*, int*, void*); + using FN_ngSpice_Command = int (*)(char*); + using FN_ngSpice_Circ = int (*)(char**); + using FN_ngSpice_running = bool (*)(void); + using FN_ngSpice_CurPlot = char* (*)(void); + using FN_ngSpice_AllPlots = char** (*)(void); + using FN_ngSpice_AllVecs = char** (*)(char*); + using FN_ngSpice_SetBkpt = bool (*)(double); + using FN_ngGet_Vec_Info = pvector_info (*)(char*); + + FN_ngSpice_Init fn_ngSpice_Init_ = nullptr; + FN_ngSpice_Init_Sync fn_ngSpice_Init_Sync_ = nullptr; + FN_ngSpice_Command fn_ngSpice_Command_ = nullptr; + FN_ngSpice_Circ fn_ngSpice_Circ_ = nullptr; + FN_ngSpice_running fn_ngSpice_running_ = nullptr; + FN_ngSpice_CurPlot fn_ngSpice_CurPlot_ = nullptr; + FN_ngSpice_AllPlots fn_ngSpice_AllPlots_ = nullptr; + FN_ngSpice_AllVecs fn_ngSpice_AllVecs_ = nullptr; + FN_ngSpice_SetBkpt fn_ngSpice_SetBkpt_ = nullptr; + FN_ngGet_Vec_Info fn_ngGet_Vec_Info_ = nullptr; + + static int CallbackSendChar(char* output, int ident, void* userdata); + static int CallbackSendStat(char* output, int ident, void* userdata); + static int CallbackControlledExit(int exitstatus, bool immediate, + bool quit, int ident, void* userdata); + static int CallbackSendData(pvecvaluesall data, int structcount, + int ident, void* userdata); + static int CallbackSendInitData(pvecinfoall data, int ident, + void* userdata); + static int CallbackBGThreadRunning(bool running, int ident, + void* userdata); + static int CallbackGetVSRCData(double* vval, double timeval, char* node, + int ident, void* userdata); + static int CallbackGetISRCData(double* ival, double timeval, char* node, + int ident, void* userdata); + static int CallbackGetSyncData(double actualtime, double* deltatime, + double olddelta, int redostep, int ident, + int location, void* userdata); + + bool LoadSharedLibrary(); + bool BindSymbols(); + void UnloadSharedLibrary(); + void Command(const char* cmd); + void LoadNetlist(); + static bool DetectBackEmfSources(const std::vector& lines); + static bool DetectDcdcSenseSources(const std::vector& lines); + static bool DetectMotorVoltageSources( + const std::vector& lines); + void RaiseTranTstopForRun(std::vector* lines); + void ApplyParams(); + void UpdatePendingVoltages(float du_pct, float dv_pct, float dw_pct); + bool AdvanceSpiceTo(double target_time); + bool WaitForBgPause(uint64_t target_pauses); + /* Last sample of a tran vector; false when the vector is unknown/empty — + * callers must not treat 0 as a reading in that case. */ + bool ReadVecLast(const char* vecname, double* out) const; + float ReadVecLastF(const char* vecname) const; + void LogUnknownSourceOnce(const char* node, bool is_voltage); + void IntegrateMechanics(float dt_s); + void StepDcdc(float duty_u_pct, float duty_v_pct, float duty_w_pct, + float dt_s); +}; + +} // namespace hostsim diff --git a/Images/HostSim/src/plant/ode_plant.h b/Images/HostSim/src/plant/ode_plant.h new file mode 100644 index 00000000..6ac94037 --- /dev/null +++ b/Images/HostSim/src/plant/ode_plant.h @@ -0,0 +1,29 @@ +#pragma once + +#include "plant_backend.h" + +namespace hostsim { + +class OdePlant : public IPlant { +public: + OdePlant() = default; + ~OdePlant() override = default; + + void SetParams(const MotorParams& params) override { motor_.SetParams(params); } + void Reset() override { motor_.Reset(); } + void Step(float duty_u_pct, float duty_v_pct, float duty_w_pct, float dt_s) override { + motor_.Step(duty_u_pct, duty_v_pct, duty_w_pct, dt_s); + } + + const MotorState& State() const override { return motor_.State(); } + float ThetaElectricalDeg() const override { return motor_.ThetaElectricalDeg(); } + float OmegaElectricalRadPerSec() const override { return motor_.OmegaElectricalRadPerSec(); } + + MotorModel& Model() { return motor_; } + const MotorModel& Model() const { return motor_; } + +private: + MotorModel motor_{}; +}; + +} // namespace hostsim diff --git a/Images/HostSim/src/plant/plant_backend.cpp b/Images/HostSim/src/plant/plant_backend.cpp new file mode 100644 index 00000000..cce6731f --- /dev/null +++ b/Images/HostSim/src/plant/plant_backend.cpp @@ -0,0 +1,38 @@ +#include "plant_backend.h" +#include "ode_plant.h" +#include "ngspice_plant.h" + +#include + +namespace hostsim { + +std::unique_ptr CreatePlantBackend(const std::string& type) { + return CreatePlantBackend(type, MachineType::Pmsm); +} + +std::unique_ptr CreatePlantBackend(const std::string& type, + MachineType machine) { + if (type == "ngspice" && machine == MachineType::Induction) { + std::cerr << "HostSim: backend \"ngspice\" cannot model " + "machine \"induction\" (the ngspice netlists are " + "electrical RL / PMSM-backEMF only) — refusing to run " + "an induction machine there. Falling back to the ODE " + "plant, which models the induction machine natively.\n"; + return std::make_unique(); + } + if (type == "ngspice") { + auto ng = std::make_unique(); + if (ng->IsSharedspiceLoaded()) { + return ng; + } + std::cerr << "HostSim: ngspice backend requested but libngspice.so " + "could not be loaded (or the experimental backend is not " + "yet functional). Falling back to OdePlant.\n"; + return std::make_unique(); + } + // Default and fallback: fast discrete PMSM ODE. This is the only + // fully-supported plant backend today. + return std::make_unique(); +} + +} // namespace hostsim diff --git a/Images/HostSim/src/plant/plant_backend.h b/Images/HostSim/src/plant/plant_backend.h new file mode 100644 index 00000000..7413a4be --- /dev/null +++ b/Images/HostSim/src/plant/plant_backend.h @@ -0,0 +1,30 @@ +#pragma once + +#include "../motor_model.h" + +#include +#include + +namespace hostsim { + +class IPlant { +public: + virtual ~IPlant() = default; + + virtual void SetParams(const MotorParams& params) = 0; + virtual void Reset() = 0; + virtual void Step(float duty_u_pct, float duty_v_pct, float duty_w_pct, float dt_s) = 0; + + virtual const MotorState& State() const = 0; + virtual float ThetaElectricalDeg() const = 0; + virtual float OmegaElectricalRadPerSec() const = 0; +}; + +std::unique_ptr CreatePlantBackend(const std::string& type); +/* Machine-aware form: the ngspice backend is electrical RL / PMSM-backEMF + * only, so machine=induction with backend=ngspice is refused loudly and + * falls back to the ODE plant. */ +std::unique_ptr CreatePlantBackend(const std::string& type, + MachineType machine); + +} // namespace hostsim diff --git a/Images/HostSim/src/platform_api.cpp b/Images/HostSim/src/platform_api.cpp new file mode 100644 index 00000000..cd4b09d8 --- /dev/null +++ b/Images/HostSim/src/platform_api.cpp @@ -0,0 +1,822 @@ +#include "platform_api.h" + +#include "can_bridge.h" +#include "current_observer.h" +#include "motor_model.h" +#include "pwm_scope.h" +#include "sim_context.h" +#include "telemetry_publisher.h" + +#include +#include +#include +#include +#if defined(_MSC_VER) +#include +#endif +#include +#include +#include +#include +#include +#include + +#include "plant/plant_backend.h" +#include "plant/ode_plant.h" + +namespace hostsim { + +IPlant* g_plant = nullptr; +/* OdePlant backing model (set exclusively by SimRuntime_RegisterPlant when + * the active plant is an OdePlant). Not a parallel plant path: every plant + * read goes through g_plant first; g_motor only supplies data the IPlant + * interface does not expose (pole pairs, per-phase terminal voltages recorded + * by MotorModel). */ +MotorModel* g_motor = nullptr; + +namespace { + +const MotorState* CurrentPlantState() { + if (g_plant) return &g_plant->State(); + if (g_motor) return &g_motor->State(); + return nullptr; +} + +int PlantPolePairs() { + if (g_motor) { + return g_motor->Params().pole_pairs > 0 ? g_motor->Params().pole_pairs + : 1; + } + /* Non-ODE backends: IPlant exposes no params, so SimRuntime stashes the + * scenario's pole_pairs in the SimContext at domain init (InitDomains). + * Clamped to >= 1: a division by zero here would poison the encoder. */ + const int pp = GetSimContext().pole_pairs; + return pp > 0 ? pp : 1; +} + +std::mutex g_cfg_mu; +std::unordered_map g_config; +std::string g_config_file; + +void PersistConfigLocked() { + if (g_config_file.empty()) return; + std::ofstream out(g_config_file, std::ios::out | std::ios::trunc); + if (!out) return; + std::vector keys; + keys.reserve(g_config.size()); + for (const auto& kv : g_config) keys.push_back(kv.first); + std::sort(keys.begin(), keys.end()); + for (const auto& k : keys) { + out << k << '=' << g_config[k] << '\n'; + } + out.flush(); +} + +std::recursive_mutex g_critical_mu; + +/* -------------------------------------------------------------------------- + * Phase-current ADC sensor model. + * + * Mirrors the Gen6FW PhaseCurrentADC signal chain (constants in RteParams.h), + * including the inverted sensor wiring documented for the hardware and + * modeled the same way in HostSIL (sil_phase_current_adc.cpp): + * sig_counts = ref_counts - i_measured * counts_per_amp, clamped to the ADC + * i_measured = i_true * gain_error + bias + gaussian noise + * current a graph recovers = (sig - ref) * lsb / (divider * sensitivity) + * minus the calibrated zero offset, i.e. -i_measured + bias + * + * Graphs fix the sign with their InvertPolarity parameter (or an explicit + * negation, e.g. Custom.PhaseCurrentsBurst) exactly as on hardware. + * + * Conversions are latch-based like the STM32 injected channels: the runtime + * calls SimAdcTriggerConversion() at each adc_isr tick; reads after that see a + * coherent sample set. Direct reads without a trigger convert on demand once + * per plant step (tracked via SimContext::plant_step_seq). + * + * The startup zero-offset calibration is not simulated separately: the + * "calibrated" offset reported by platform_adc_get_offset_*() is what a + * Gen6 calibration at standstill would measure, i.e. -(injected bias). + * -------------------------------------------------------------------------- */ +SimAdcConfig g_adc_cfg{}; +bool g_adc_valid = false; +uint64_t g_adc_plant_seq = ~0ull; +uint32_t g_adc_u_sig = 0; +uint32_t g_adc_v_sig = 0; +uint32_t g_adc_u_ref = 0; +uint32_t g_adc_v_ref = 0; +uint32_t g_adc_burst_time_us = 0; +std::mt19937 g_adc_rng{0xC0FFEEu}; +std::normal_distribution g_adc_noise{0.0f, 1.0f}; + +unsigned AdcMaxCounts() { return (1u << g_adc_cfg.bits) - 1u; } + +uint32_t AdcRefCounts() { + const unsigned max_counts = AdcMaxCounts(); + const float vref = g_adc_cfg.vref_v > 1e-6f ? g_adc_cfg.vref_v : 1e-6f; + long counts = std::lround(g_adc_cfg.ref_volts / vref * static_cast(max_counts)); + if (counts < 0) counts = 0; + if (counts > static_cast(max_counts)) counts = max_counts; + return static_cast(counts); +} + +uint32_t AdcCurrentToCounts(float i_true_a, float bias_a) { + const unsigned max_counts = AdcMaxCounts(); + const float vref = g_adc_cfg.vref_v > 1e-6f ? g_adc_cfg.vref_v : 1e-6f; + const float counts_per_amp = g_adc_cfg.divider * g_adc_cfg.sensitivity_v_per_a * + static_cast(max_counts) / vref; + float i_meas = i_true_a * g_adc_cfg.gain_error + bias_a; + if (g_adc_cfg.noise_std_a > 0.0f) { + i_meas += g_adc_noise(g_adc_rng) * g_adc_cfg.noise_std_a; + } + /* Inverted transducer wiring, as on the Gen6 hardware: sig counts + * decrease with positive phase current. */ + long counts = std::lround(static_cast(AdcRefCounts()) - i_meas * counts_per_amp); + if (counts < 0) counts = 0; /* saturate at the rails */ + if (counts > static_cast(max_counts)) counts = max_counts; + return static_cast(counts); +} + +/* Gen6 PhaseCurrentADC::countsToCurrent: differential counts to amps via the + * ADC lsb and the transducer chain (divider * sensitivity). */ +float AdcCountsToCurrent(uint32_t sig, uint32_t ref) { + const float vref = g_adc_cfg.vref_v > 1e-6f ? g_adc_cfg.vref_v : 1e-6f; + const float lsb = vref / static_cast(AdcMaxCounts()); + const float denom = g_adc_cfg.divider * g_adc_cfg.sensitivity_v_per_a; + const float scale = denom > 1e-12f ? lsb / denom : 0.0f; + return (static_cast(sig) - static_cast(ref)) * scale; +} + +void AdcConvert() { + float iu = 0.0f; + float iv = 0.0f; + if (const MotorState* st = CurrentPlantState()) { + iu = st->ia_a; + iv = st->ib_a; + } + g_adc_u_ref = AdcRefCounts(); + g_adc_v_ref = AdcRefCounts(); + g_adc_u_sig = AdcCurrentToCounts(iu, g_adc_cfg.offset_u_a); + g_adc_v_sig = AdcCurrentToCounts(iv, g_adc_cfg.offset_v_a); + g_adc_plant_seq = GetSimContext().plant_step_seq; + g_adc_burst_time_us = static_cast(GetSimContext().time_us); + g_adc_valid = true; +} + +void AdcEnsureFresh() { + if (!g_adc_valid || g_adc_plant_seq != GetSimContext().plant_step_seq) { + AdcConvert(); + } +} + +/* -------------------------------------------------------------------------- + * CAN: latest-frame loopback store, keyed by (bus, id), like the Gen6 + * rxLatest path. Sent frames are readable via platform_can_rx when loopback + * is enabled; scenario frames arrive via SimCanInjectFrame regardless. + * -------------------------------------------------------------------------- */ +struct CanRxFrame { + uint32_t id = 0; + bool ext = false; + uint8_t dlc = 0; + uint8_t data[8] = {0}; + uint32_t seq = 0; +}; + +std::mutex g_can_mu; +std::unordered_map g_can_rx; +std::unordered_map g_can_seq; +bool g_can_loopback = true; + +uint64_t CanKey(uint8_t bus, uint32_t id) { + return (static_cast(bus) << 32) | id; +} + +void CanStoreUnlocked(uint8_t bus, uint32_t id, bool ext, const uint8_t* data, + uint8_t dlc) { + CanRxFrame f{}; + f.id = id; + f.ext = ext; + f.dlc = dlc > 8 ? 8 : dlc; + for (uint8_t i = 0; i < f.dlc; ++i) f.data[i] = data ? data[i] : 0; + f.seq = ++g_can_seq[CanKey(bus, id)]; + g_can_rx[CanKey(bus, id)] = f; +} + +void CanStore(uint8_t bus, uint32_t id, bool ext, const uint8_t* data, + uint8_t dlc) { + std::lock_guard lock(g_can_mu); + CanStoreUnlocked(bus, id, ext, data, dlc); +} + +/* Digital IO: writes latch, reads see the latched level (1..N pins). */ +std::unordered_map g_dio; + +struct SpwmState { + float angle_rad = 0.0f; +}; + +SpwmState g_spwm; +constexpr float kTwoPi = 6.28318530718f; +constexpr float kPhase120Rad = 2.09439510239f; + +/* -------------------------------------------------------------------------- + * Encoder model (Gen6 EncoderADC semantics; same rendering as HostSIL's + * sil_encoder_adc.cpp). + * + * The analog sin/cos encoder measures the MECHANICAL rotor angle: one + * sinusoidal cycle per mechanical revolution, captured as 16-bit ADC counts. + * The plant integrates the electrical angle, so the mechanical angle is + * theta_e / pole_pairs. Counts are rendered as center 32768, amplitude 30000 + * (inside the driver's 427..65388 hard caps), rounded and rail-clamped. + * -------------------------------------------------------------------------- */ +constexpr uint32_t kEncoderFullScaleCounts = 65535u; +constexpr float kEncoderCenterCounts = 32768.0f; +constexpr float kEncoderAmplitudeCounts = 30000.0f; + +float PlantMechanicalDeg() { + float elec_deg = 0.0f; + if (g_plant) { + elec_deg = g_plant->ThetaElectricalDeg(); + } else if (g_motor) { + elec_deg = g_motor->ThetaElectricalDeg(); + } else { + return 0.0f; + } + const float pp = static_cast(PlantPolePairs()); + float mech_deg = elec_deg / pp; + mech_deg = std::fmod(mech_deg, 360.0f); + if (mech_deg < 0.0f) mech_deg += 360.0f; + return mech_deg; +} + +uint32_t EncoderCounts(float value) { + long counts = std::lround(value); + if (counts < 0) counts = 0; + if (counts > static_cast(kEncoderFullScaleCounts)) { + counts = static_cast(kEncoderFullScaleCounts); + } + return static_cast(counts); +} + +/* Gen6 TIM1 hardware configuration (Src/tim.c): 275 MHz timer clock, + * center-aligned, ARR 27500. */ +constexpr uint32_t kPwmTimerArr = 27500u; + +/* Gen6 platform_schedule_adaptive_sample: deadtime + switching settling + + * ADC burst = 6 us at the 275 MHz timer clock. */ +constexpr uint32_t kSampleMinGapTicks = 1650u; + +/* Store for the platform domain-dt pair (Gen6 storage semantics; the + * scheduler sets it before each generated domain step, see sim_runtime.cpp). */ +float g_current_domain_dt = 0.0f; + +/* -------------------------------------------------------------------------- + * Current-observer platform state. + * + * Mirrors the Gen6 platform_api.cpp observer block: a plain use_observer flag + * (set by generated code / a shell command on hardware; nothing inside the + * base image consumes it) plus the calibration snapshot used by + * platform_observer_init_from_calibration(). + * + * The sim has no FRAM-backed MotorCalibration; the scenario "motor" + * parameters are the calibration source. SimRuntime seeds them through + * SimObserverConfigure() at domain init — before generated constructors run — + * applying and resetting the observer once so it is plausible even when the + * graph never instantiates hw.current_observer. init_from_calibration() + * re-applies the snapshot and resets, matching the Gen6 generated-init path. + * -------------------------------------------------------------------------- */ +bool g_use_observer = false; + +struct ObserverCal { + float r_ohm = 0.0f; + float l_henry = 0.0f; + float flux_wb = 0.0f; + float pole_pairs = 0.0f; + bool valid = false; +}; + +ObserverCal g_observer_cal{}; + +void ApplyObserverCal(const ObserverCal& cal) { + GlobalCurrentObserver().setMotorParameters(cal.r_ohm, cal.l_henry, + cal.flux_wb, cal.pole_pairs); +} +} // namespace + +void SimObserverConfigure(float r_ohm, float l_henry, float flux_wb, + float pole_pairs) { + ObserverCal cal{r_ohm, l_henry, flux_wb, pole_pairs, true}; + g_observer_cal = cal; + ApplyObserverCal(cal); + GlobalCurrentObserver().reset(); +} + +SimContext g_sim_ctx{}; + +SimContext& GetSimContext() { return g_sim_ctx; } + +void SimNotifyEncoderSample() { g_sim_ctx.encoder_sample_new = true; } + +void SimRuntime_RegisterPlant(IPlant* plant) { + g_plant = plant; + auto* ode = dynamic_cast(plant); + g_motor = ode ? &ode->Model() : nullptr; +} + +void SimAdcConfigure(const SimAdcConfig& cfg) { + g_adc_cfg = cfg; + g_adc_valid = false; +} + +void SimAdcTriggerConversion() { AdcConvert(); } + +void SimCanSetLoopback(bool enabled) { + std::lock_guard lock(g_can_mu); + g_can_loopback = enabled; + g_can_rx.clear(); + g_can_seq.clear(); +} + +void SimCanInject(uint8_t bus, uint32_t id, bool ext, + const uint8_t* data, uint8_t dlc) { + CanStore(bus, id, ext, data, dlc); +} + +void SimConfigSetBackingFile(const char* path) { + std::lock_guard lock(g_cfg_mu); + g_config_file = path ? path : ""; + if (g_config_file.empty()) return; + /* Merge any persisted keys; "key=value" lines, '#' comments. */ + std::ifstream in(g_config_file); + std::string line; + while (std::getline(in, line)) { + const auto hash = line.find('#'); + if (hash != std::string::npos) line.erase(hash); + const auto eq = line.find('='); + if (eq == std::string::npos) continue; + const std::string key = line.substr(0, eq); + char* end = nullptr; + const float v = std::strtof(line.c_str() + eq + 1, &end); + if (end == line.c_str() + eq + 1 || key.empty()) continue; + g_config[key] = v; + } +} + +void SimConfigPersist() { + std::lock_guard lock(g_cfg_mu); + PersistConfigLocked(); +} + +} // namespace hostsim + +extern "C" { + +void platform_pwm_set(float du, float dv, float dw) { + auto& c = hostsim::GetSimContext(); + c.duty_u = du; + c.duty_v = dv; + c.duty_w = dw; + c.pwm_written = true; + hostsim::GlobalPwmScope().SetDuties(du, dv, dw); +} + +void platform_spwm_step(float modulation_index, float electrical_freq_hz, float dt_s, + float* duty_u, float* duty_v, float* duty_w) { + float m = modulation_index; + if (m < 0.0f) m = 0.0f; + if (m > 1.0f) m = 1.0f; + + hostsim::g_spwm.angle_rad += hostsim::kTwoPi * electrical_freq_hz * dt_s; + while (hostsim::g_spwm.angle_rad >= hostsim::kTwoPi) { + hostsim::g_spwm.angle_rad -= hostsim::kTwoPi; + } + + const float angle = hostsim::g_spwm.angle_rad; + const float u = m * std::sin(angle); + const float v = m * std::sin(angle - hostsim::kPhase120Rad); + const float w = m * std::sin(angle + hostsim::kPhase120Rad); + + float du = 50.0f + 50.0f * u; + float dv = 50.0f + 50.0f * v; + float dw = 50.0f + 50.0f * w; + du = std::max(0.0f, std::min(100.0f, du)); + dv = std::max(0.0f, std::min(100.0f, dv)); + dw = std::max(0.0f, std::min(100.0f, dw)); + + if (duty_u) *duty_u = du; + if (duty_v) *duty_v = dv; + if (duty_w) *duty_w = dw; +} + +float platform_spwm_get_angle_rad(void) { return hostsim::g_spwm.angle_rad; } + +float platform_spwm_get_angle_deg(void) { + return hostsim::g_spwm.angle_rad * 57.2957795131f; +} + +void platform_spwm_reset(void) { hostsim::g_spwm.angle_rad = 0.0f; } + +float platform_pwm_scope_get_gate_u(void) { + return hostsim::GlobalPwmScope().GateU(); +} +float platform_pwm_scope_get_gate_v(void) { + return hostsim::GlobalPwmScope().GateV(); +} +float platform_pwm_scope_get_gate_w(void) { + return hostsim::GlobalPwmScope().GateW(); +} +float platform_pwm_scope_get_v_u(void) { return hostsim::GlobalPwmScope().VoltageU(); } +float platform_pwm_scope_get_v_v(void) { return hostsim::GlobalPwmScope().VoltageV(); } +float platform_pwm_scope_get_v_w(void) { return hostsim::GlobalPwmScope().VoltageW(); } +float platform_pwm_scope_get_v_uv(void) { return hostsim::GlobalPwmScope().VoltageUV(); } +float platform_pwm_scope_get_v_vw(void) { return hostsim::GlobalPwmScope().VoltageVW(); } +float platform_pwm_scope_get_v_wu(void) { return hostsim::GlobalPwmScope().VoltageWU(); } + +void platform_pwm_set_voltage_vector(float valpha, float vbeta, float vdc) { + const float v_max = vdc / std::sqrt(3.0f); + const float mag = std::sqrt(valpha * valpha + vbeta * vbeta); + float scale = 1.0f; + if (mag > v_max && mag > 1e-6f) scale = v_max / mag; + + const float va = valpha * scale; + const float vb = -0.5f * valpha * scale + 0.8660254f * vbeta * scale; + const float vc = -0.5f * valpha * scale - 0.8660254f * vbeta * scale; + + const float du = std::max(0.0f, std::min(100.0f, 50.0f + 50.0f * va / vdc)); + const float dv = std::max(0.0f, std::min(100.0f, 50.0f + 50.0f * vb / vdc)); + const float dw = std::max(0.0f, std::min(100.0f, 50.0f + 50.0f * vc / vdc)); + platform_pwm_set(du, dv, dw); +} + +uint32_t platform_pwm_get_arr(void) { return hostsim::kPwmTimerArr; } + +uint32_t platform_schedule_adaptive_sample(float duty_u, float duty_v, + float duty_w, uint32_t arr) { + /* Port of Gen6FW PWM_FindSafeSamplePoint (Src/Inverter/Drivers/PWM/ + * pwm.cpp): center-aligned PWM with low-side shunts; the quiet windows + * are the all-low span 2*(arr - max_ccr) and the all-high span + * 2*min_ccr. Take the larger; below the minimum gap the firmware falls + * back to the legacy bottom trigger and reports 0. */ + const auto clamp_duty = [](float d) { + return std::max(0.0f, std::min(100.0f, d)); + }; + const uint32_t ccr_u = + static_cast(clamp_duty(duty_u) * static_cast(arr) / + 100.0f); + const uint32_t ccr_v = + static_cast(clamp_duty(duty_v) * static_cast(arr) / + 100.0f); + const uint32_t ccr_w = + static_cast(clamp_duty(duty_w) * static_cast(arr) / + 100.0f); + + const uint32_t min_ccr = std::min({ccr_u, ccr_v, ccr_w}); + const uint32_t max_ccr = std::max({ccr_u, ccr_v, ccr_w}); + const uint32_t gap_all_high = 2u * min_ccr; + const uint32_t gap_all_low = 2u * (arr - max_ccr); + const uint32_t best_gap = + gap_all_low >= gap_all_high ? gap_all_low : gap_all_high; + + if (best_gap < hostsim::kSampleMinGapTicks) return 0u; + return best_gap; +} + +bool platform_get_phase_currents(float* iu_a, float* iv_a, float* iw_a) { + /* Gen6 PhaseCurrentADC::sample(): sensor-model values (inverted wiring, + * latched at the last conversion trigger), zero-offset removed, W + * reconstructed from U+V — not a direct plant read. */ + if (!hostsim::CurrentPlantState()) return false; + hostsim::AdcEnsureFresh(); + const float iu = hostsim::AdcCountsToCurrent(hostsim::g_adc_u_sig, + hostsim::g_adc_u_ref) - + platform_adc_get_offset_u_a(); + const float iv = hostsim::AdcCountsToCurrent(hostsim::g_adc_v_sig, + hostsim::g_adc_v_ref) - + platform_adc_get_offset_v_a(); + if (iu_a) *iu_a = iu; + if (iv_a) *iv_a = iv; + if (iw_a) *iw_a = -(iu + iv); + return true; +} + +/* -------------------------------------------------------------------------- + * Current observer — thin wrappers over the ported CurrentObserver + * (src/current_observer.cpp), same call surfaces as the Gen6 platform_api.cpp + * observer block. Gating on use_observer is deliberately NOT done here: + * Gen6 keeps the observer free-running and lets the control path (native + * FOC or a graph gate node) select feedback. */ + +void platform_set_use_observer(bool enabled) { + hostsim::g_use_observer = enabled; +} + +bool platform_get_use_observer(void) { return hostsim::g_use_observer; } + +void platform_get_observer_currents(float* iu_a, float* iv_a, float* iw_a) { + if (!iu_a || !iv_a || !iw_a) return; + hostsim::GlobalCurrentObserver().getPhaseCurrents(*iu_a, *iv_a, *iw_a); +} + +void platform_observer_predict(float valpha_v, float vbeta_v, + float theta_elec_rad, float dt_s) { + hostsim::GlobalCurrentObserver().predict(valpha_v, vbeta_v, + theta_elec_rad, dt_s); +} + +void platform_observer_set_motor_params(float r_ohm, float l_henry, + float flux_linkage_wb, + float pole_pairs) { + hostsim::GlobalCurrentObserver().setMotorParameters(r_ohm, l_henry, + flux_linkage_wb, + pole_pairs); +} + +void platform_observer_init_from_calibration(void) { + /* Gen6 re-reads MotorCalibration here and resets. The sim's calibration + * is the scenario motor block, seeded via SimObserverConfigure() at + * domain init; without a seed (no scenario yet, e.g. a bare unit harness) + * the observer keeps its Gen6 default parameters. */ + if (hostsim::g_observer_cal.valid) { + hostsim::ApplyObserverCal(hostsim::g_observer_cal); + } + hostsim::GlobalCurrentObserver().reset(); +} + +void platform_observer_correct(float iu_meas_a, float iv_meas_a, + float diudt_a_per_s, float divdt_a_per_s, + uint32_t t_us) { + hostsim::GlobalCurrentObserver().correct(iu_meas_a, iv_meas_a, + diudt_a_per_s, divdt_a_per_s, + t_us); +} + +uint32_t platform_adc_get_injected_u_sig(void) { + hostsim::AdcEnsureFresh(); + return hostsim::g_adc_u_sig; +} +uint32_t platform_adc_get_injected_v_sig(void) { + hostsim::AdcEnsureFresh(); + return hostsim::g_adc_v_sig; +} +uint32_t platform_adc_get_injected_u_ref(void) { + hostsim::AdcEnsureFresh(); + return hostsim::g_adc_u_ref; +} +uint32_t platform_adc_get_injected_v_ref(void) { + hostsim::AdcEnsureFresh(); + return hostsim::g_adc_v_ref; +} +/* Gen6 lastOffsetU/V: what startup calibration measures at standstill — the + * recovered (inverted) amps of the injected bias, i.e. -(bias). */ +float platform_adc_get_offset_u_a(void) { return -hostsim::g_adc_cfg.offset_u_a; } +float platform_adc_get_offset_v_a(void) { return -hostsim::g_adc_cfg.offset_v_a; } + +bool platform_adc_get_burst_sample(float* iu0_a, float* iv0_a, + float* iu1_a, float* iv1_a, + uint32_t* time_us) { + if (!iu0_a || !iv0_a || !iu1_a || !iv1_a) return false; + if (!hostsim::CurrentPlantState()) return false; + hostsim::AdcEnsureFresh(); + const float iu = hostsim::AdcCountsToCurrent(hostsim::g_adc_u_sig, + hostsim::g_adc_u_ref) - + platform_adc_get_offset_u_a(); + const float iv = hostsim::AdcCountsToCurrent(hostsim::g_adc_v_sig, + hostsim::g_adc_v_ref) - + platform_adc_get_offset_v_a(); + /* Gen6 samples ranks 1/2 and 3/4 back-to-back (~0.46 us apart). The sim's + * conversion latch is zero-order-held across the burst, so both points + * read the same latched sample set. */ + *iu0_a = iu; + *iu1_a = iu; + *iv0_a = iv; + *iv1_a = iv; + if (time_us) *time_us = hostsim::g_adc_burst_time_us; + return true; +} + +bool platform_get_encoder_angle(float* angle_deg) { + if (!hostsim::g_plant && !hostsim::g_motor) return false; + if (angle_deg) *angle_deg = hostsim::PlantMechanicalDeg(); + auto& ctx = hostsim::GetSimContext(); + const bool had = ctx.encoder_sample_new; + ctx.encoder_sample_new = false; + return had; +} + +float platform_get_encoder_angle_latest(void) { + return hostsim::PlantMechanicalDeg(); +} + +float platform_get_motor_rpm(void) { + float omega_e = 0.0f; + if (hostsim::g_plant) { + omega_e = hostsim::g_plant->OmegaElectricalRadPerSec(); + } else if (hostsim::g_motor) { + omega_e = hostsim::g_motor->OmegaElectricalRadPerSec(); + } else { + return 0.0f; + } + return omega_e * 60.0f / + (hostsim::kTwoPi * static_cast(hostsim::PlantPolePairs())); +} + +float platform_get_rpm_mech(void) { return platform_get_motor_rpm(); } + +float platform_get_rpm_elec(void) { + /* Gen6: rpmMech * pole_pairs * MotorCalibration.encoder_sign. The + * simulated encoder counts in the positive rotation direction, so the + * sign is +1. */ + return platform_get_rpm_mech() * + static_cast(hostsim::PlantPolePairs()); +} + +uint32_t platform_get_encoder_raw_sin(void) { + const float theta_m_rad = + hostsim::PlantMechanicalDeg() * (hostsim::kTwoPi / 360.0f); + return hostsim::EncoderCounts(hostsim::kEncoderCenterCounts + + hostsim::kEncoderAmplitudeCounts * + std::sin(theta_m_rad)); +} + +uint32_t platform_get_encoder_raw_cos(void) { + const float theta_m_rad = + hostsim::PlantMechanicalDeg() * (hostsim::kTwoPi / 360.0f); + return hostsim::EncoderCounts(hostsim::kEncoderCenterCounts + + hostsim::kEncoderAmplitudeCounts * + std::cos(theta_m_rad)); +} + +float platform_get_dc_link_voltage(void) { + return hostsim::GetSimContext().vdc_v; +} + +/* Phase voltage readback: what the plant actually applied last step, not the + * duty request. For OdePlant the MotorModel records its clamped duty*vdc + * terminals; other backends fall back to applied duty * plant DC link. */ +float platform_phase_voltage_u(void) { + if (hostsim::g_motor) return hostsim::g_motor->State().va_v; + const auto& c = hostsim::GetSimContext(); + return c.duty_applied_u * c.plant_vdc_v / 100.0f; +} + +float platform_phase_voltage_v(void) { + if (hostsim::g_motor) return hostsim::g_motor->State().vb_v; + const auto& c = hostsim::GetSimContext(); + return c.duty_applied_v * c.plant_vdc_v / 100.0f; +} + +float platform_phase_voltage_w(void) { + if (hostsim::g_motor) return hostsim::g_motor->State().vc_v; + const auto& c = hostsim::GetSimContext(); + return c.duty_applied_w * c.plant_vdc_v / 100.0f; +} + +float platform_get_throttle_a(void) { + return hostsim::GetSimContext().throttle_a; +} + +float platform_get_throttle_b(void) { + return hostsim::GetSimContext().throttle_b; +} + +bool platform_get_throttle_valid(void) { + const float a = platform_get_throttle_a(); + const float b = platform_get_throttle_b(); + if (a < 0.0f || a > 1.0f || b < 0.0f || b > 1.0f) return false; + return std::fabs(a - b) < 0.1f; +} + +float platform_get_motor_temperature(void) { + return hostsim::GetSimContext().motor_temp_c; +} +float platform_get_inverter_temperature(uint8_t channel) { + (void)channel; + return hostsim::GetSimContext().inverter_temp_c; +} + +bool platform_digital_read(uint8_t pin) { + auto it = hostsim::g_dio.find(pin); + return it != hostsim::g_dio.end() && it->second; +} + +void platform_digital_write(uint8_t pin, bool value) { + hostsim::g_dio[pin] = value; +} + +bool platform_can_send(uint8_t bus, uint32_t id, bool ext, + const uint8_t* data, uint8_t dlc) { + /* Mirror every send onto the multi-instance CAN bridge (no-op until a + * --can-bridge-* flag configured it). Deliberately ahead of the bus + * validity check: bus 0 is not a local bus (Gen6 numbering is 1-based) + * but exists on the bridge as the selftest/diagnostic channel; it never + * enters the local store below. */ + hostsim::GlobalCanBridge().Publish(bus, id, ext, data, dlc); + if (bus < 1 || bus > 2) return false; + { + std::lock_guard lock(hostsim::g_can_mu); + if (hostsim::g_can_loopback) { + hostsim::CanStoreUnlocked(bus, id, ext, data, dlc); + } + } + /* The frame always "goes on the wire" from the sender's point of view; + * loopback only controls whether this node reads its own frames back. */ + return true; +} + +int platform_can_rx(uint8_t bus, uint32_t id, uint8_t* data, uint32_t* seq_out) { + if (bus < 1 || bus > 2) { + if (seq_out) *seq_out = 0; + return -1; + } + std::lock_guard lock(hostsim::g_can_mu); + const auto it = hostsim::g_can_rx.find(hostsim::CanKey(bus, id)); + if (it == hostsim::g_can_rx.end()) { + if (seq_out) *seq_out = 0; + return -1; + } + const hostsim::CanRxFrame& f = it->second; + if (data) { + for (uint8_t i = 0; i < f.dlc; ++i) data[i] = f.data[i]; + } + if (seq_out) *seq_out = f.seq; + return f.dlc; +} + +void platform_sample_application_sensors(void) { hostsim::SimAdcTriggerConversion(); } + +void platform_raise_fault(uint32_t source, uint8_t reason) { + (void)source; + (void)reason; + hostsim::GetSimContext().critical_fault = true; +} + +bool platform_has_critical_fault(void) { + return hostsim::GetSimContext().critical_fault; +} + +void platform_critical_enter(void) { hostsim::g_critical_mu.lock(); } +void platform_critical_exit(void) { hostsim::g_critical_mu.unlock(); } + +float platform_config_load(const char* key, float default_value) { + if (!key) return default_value; + std::lock_guard lock(hostsim::g_cfg_mu); + auto it = hostsim::g_config.find(key); + if (it != hostsim::g_config.end()) return it->second; + hostsim::g_config[key] = default_value; + hostsim::PersistConfigLocked(); + return default_value; +} + +void platform_config_set(const char* key, float value) { + if (!key) return; + std::lock_guard lock(hostsim::g_cfg_mu); + hostsim::g_config[key] = value; + hostsim::PersistConfigLocked(); +} + +float platform_config_get(const char* key) { + if (!key) return 0.0f; + std::lock_guard lock(hostsim::g_cfg_mu); + auto it = hostsim::g_config.find(key); + return it != hostsim::g_config.end() ? it->second : 0.0f; +} + +void platform_telemetry_log_f32(const char* key, float value) { + if (!key) return; + hostsim::GlobalTelemetryPublisher().LogF32(key, value); + static bool stderr_env_checked = false; + static bool stderr_enabled = false; + if (!stderr_env_checked) { + stderr_env_checked = true; +#if defined(_MSC_VER) + char* env_value = nullptr; + size_t len = 0; + if (_dupenv_s(&env_value, &len, "HOSTSIM_TELEM_STDERR") == 0 && env_value != nullptr) { + stderr_enabled = true; + free(env_value); + } +#else + stderr_enabled = std::getenv("HOSTSIM_TELEM_STDERR") != nullptr; +#endif + } + if (stderr_enabled) { + std::fprintf(stderr, "telemetry %s=%g\n", key, static_cast(value)); + } +} + +uint32_t platform_millis(void) { + return static_cast(hostsim::GetSimContext().time_us / 1000ULL); +} + +uint32_t platform_micros(void) { + return static_cast(hostsim::GetSimContext().time_us); +} + +void platform_set_current_domain_dt(float dt_s) { + hostsim::g_current_domain_dt = dt_s; +} + +float platform_get_current_domain_dt(void) { + return hostsim::g_current_domain_dt; +} + +} // extern "C" diff --git a/Images/HostSim/src/pwm_scope.cpp b/Images/HostSim/src/pwm_scope.cpp new file mode 100644 index 00000000..eecbb06c --- /dev/null +++ b/Images/HostSim/src/pwm_scope.cpp @@ -0,0 +1,63 @@ +#include "pwm_scope.h" + +#include +#include + +namespace hostsim { + +namespace { +PwmScope g_pwm_scope; +} // namespace + +PwmScope& GlobalPwmScope() { return g_pwm_scope; } + +void PwmScope::SetDuties(float duty_u_pct, float duty_v_pct, float duty_w_pct) { + duty_u_ = std::clamp(duty_u_pct, 0.0f, 100.0f); + duty_v_ = std::clamp(duty_v_pct, 0.0f, 100.0f); + duty_w_ = std::clamp(duty_w_pct, 0.0f, 100.0f); +} + +void PwmScope::AdvanceOnce(float dt_s) { + if (carrier_hz_ <= 0.0f || dt_s <= 0.0f) { + gate_u_ = gate_v_ = gate_w_ = 0.0f; + v_u_ = v_v_ = v_w_ = 0.0f; + v_uv_ = v_vw_ = v_wu_ = 0.0f; + return; + } + + phase_ += carrier_hz_ * dt_s; + phase_ -= std::floor(phase_); + + const float tri = 1.0f - std::fabs(2.0f * phase_ - 1.0f); + const float du = duty_u_ * 0.01f; + const float dv = duty_v_ * 0.01f; + const float dw = duty_w_ * 0.01f; + + gate_u_ = du > tri ? 1.0f : 0.0f; + gate_v_ = dv > tri ? 1.0f : 0.0f; + gate_w_ = dw > tri ? 1.0f : 0.0f; + + v_u_ = gate_u_ * vdc_; + v_v_ = gate_v_ * vdc_; + v_w_ = gate_w_ * vdc_; + v_uv_ = v_u_ - v_v_; + v_vw_ = v_v_ - v_w_; + v_wu_ = v_w_ - v_u_; +} + +void PwmScope::AdvanceInterval(float dt_s) { + if (carrier_hz_ <= 0.0f || dt_s <= 0.0f) { + AdvanceOnce(0.0f); + return; + } + + /* At least ~8 samples per PWM period so edges land in the right place. */ + const int steps = + std::max(1, static_cast(std::ceil(dt_s * carrier_hz_ * 8.0f))); + const float sub_dt = dt_s / static_cast(steps); + for (int i = 0; i < steps; ++i) { + AdvanceOnce(sub_dt); + } +} + +} // namespace hostsim diff --git a/Images/HostSim/src/pwm_scope.h b/Images/HostSim/src/pwm_scope.h new file mode 100644 index 00000000..821ebd5a --- /dev/null +++ b/Images/HostSim/src/pwm_scope.h @@ -0,0 +1,57 @@ +#pragma once + +namespace hostsim { + +/* Triangle-carrier PWM scope model: converts slow-updating duty commands into + * switched gate signals and phase voltages for oscilloscope-style comparison. + * Runs in parallel with the averaged-duty motor plant. */ +class PwmScope { +public: + void SetCarrierHz(float hz) { carrier_hz_ = hz > 0.0f ? hz : 0.0f; } + float CarrierHz() const { return carrier_hz_; } + + void SetVdc(float vdc) { vdc_ = vdc > 0.0f ? vdc : 0.0f; } + + void SetDuties(float duty_u_pct, float duty_v_pct, float duty_w_pct); + + /* Advance the carrier over dt_s (sub-steps internally for accuracy). */ + void AdvanceInterval(float dt_s); + + float GateU() const { return gate_u_; } + float GateV() const { return gate_v_; } + float GateW() const { return gate_w_; } + + /* Phase voltage to DC- (0 or Vdc with high-side switch model). */ + float VoltageU() const { return v_u_; } + float VoltageV() const { return v_v_; } + float VoltageW() const { return v_w_; } + + /* Line-line voltages (scope CH1-CH2 style). */ + float VoltageUV() const { return v_uv_; } + float VoltageVW() const { return v_vw_; } + float VoltageWU() const { return v_wu_; } + +private: + void AdvanceOnce(float dt_s); + + float carrier_hz_ = 2000.0f; + float vdc_ = 48.0f; + float duty_u_ = 0.0f; + float duty_v_ = 0.0f; + float duty_w_ = 0.0f; + + float phase_ = 0.0f; /* 0..1 within one PWM period */ + float gate_u_ = 0.0f; + float gate_v_ = 0.0f; + float gate_w_ = 0.0f; + float v_u_ = 0.0f; + float v_v_ = 0.0f; + float v_w_ = 0.0f; + float v_uv_ = 0.0f; + float v_vw_ = 0.0f; + float v_wu_ = 0.0f; +}; + +PwmScope& GlobalPwmScope(); + +} // namespace hostsim diff --git a/Images/HostSim/src/realtime_platform.cpp b/Images/HostSim/src/realtime_platform.cpp new file mode 100644 index 00000000..ae33b181 --- /dev/null +++ b/Images/HostSim/src/realtime_platform.cpp @@ -0,0 +1,58 @@ +#include "realtime_platform.h" + +#include +#include + +#ifdef _WIN32 +#ifndef WIN32_LEAN_AND_MEAN +#define WIN32_LEAN_AND_MEAN +#endif +#include +#include +#include +#pragma comment(lib, "winmm.lib") +#pragma comment(lib, "avrt.lib") +#endif + +namespace hostsim { + +RealtimeSession::RealtimeSession() { +#ifdef _WIN32 + if (timeBeginPeriod(1) == TIMERR_NOERROR) { + timer_period_ms_ = 1; + active_ = true; + } + + if (SetThreadPriority(GetCurrentThread(), THREAD_PRIORITY_HIGHEST)) { + active_ = true; + } + + DWORD mmcss_task_index = 0; + mmcss_handle_ = + AvSetMmThreadCharacteristicsW(L"Pro Audio", &mmcss_task_index); + if (mmcss_handle_) { + AvSetMmThreadPriority(mmcss_handle_, AVRT_PRIORITY_HIGH); + active_ = true; + std::printf("HostSim: Windows realtime session enabled (1 ms timer, elevated priority)\n"); + } else if (active_) { + std::printf("HostSim: Windows timer/priority boost enabled\n"); + } +#else + active_ = false; +#endif +} + +RealtimeSession::~RealtimeSession() { +#ifdef _WIN32 + if (mmcss_handle_) { + AvRevertMmThreadCharacteristics(mmcss_handle_); + mmcss_handle_ = nullptr; + } + if (timer_period_ms_ != 0) { + timeEndPeriod(timer_period_ms_); + timer_period_ms_ = 0; + } +#endif +} + +} // namespace hostsim diff --git a/Images/HostSim/src/realtime_platform.h b/Images/HostSim/src/realtime_platform.h new file mode 100644 index 00000000..4a9438c7 --- /dev/null +++ b/Images/HostSim/src/realtime_platform.h @@ -0,0 +1,25 @@ +#pragma once + +namespace hostsim { + +/* RAII helper: raises Windows timer resolution and thread priority for the + * live simulation loop. No-op on other platforms. */ +class RealtimeSession { +public: + RealtimeSession(); + ~RealtimeSession(); + + RealtimeSession(const RealtimeSession&) = delete; + RealtimeSession& operator=(const RealtimeSession&) = delete; + + bool Active() const { return active_; } + +private: + bool active_ = false; +#ifdef _WIN32 + unsigned int timer_period_ms_ = 0; + void* mmcss_handle_ = nullptr; +#endif +}; + +} // namespace hostsim diff --git a/Images/HostSim/src/sim_context.h b/Images/HostSim/src/sim_context.h new file mode 100644 index 00000000..1c168a79 --- /dev/null +++ b/Images/HostSim/src/sim_context.h @@ -0,0 +1,75 @@ +#pragma once + +#include + +#include "RteParams.h" + +namespace hostsim { + +/* Phase-current ADC sensor model configuration (see RteParams.h for what the + * fields physically mean). Defaults reproduce the ideal Gen6FW signal chain; + * scenario JSON "adc" keys override individual fields to inject errors. */ +struct SimAdcConfig { + unsigned bits = adc::kBits; /* "resolution_bits" */ + float vref_v = adc::kVrefV; /* "vref_v" */ + float ref_volts = adc::kRefVolts; /* "ref_v" */ + float divider = adc::kDivider; /* "divider" */ + float sensitivity_v_per_a = adc::kSensitivityVPerA; /* "sensitivity_v_per_a" */ + float gain_error = 1.0f; /* "gain_error" (multiplier) */ + float offset_u_a = 0.0f; /* "offset_u_a" bias, amps */ + float offset_v_a = 0.0f; /* "offset_v_a" bias, amps */ + float noise_std_a = 0.0f; /* "noise_std_a" 1-sigma, A */ +}; + +struct SimContext { + float duty_u = 0.0f; + float duty_v = 0.0f; + float duty_w = 0.0f; + /* Duties actually driven into the plant (post live-override); used by the + * phase-voltage readback for plant backends without terminal state. */ + float duty_applied_u = 0.0f; + float duty_applied_v = 0.0f; + float duty_applied_w = 0.0f; + float throttle_a = 0.0f; + float throttle_b = 0.0f; + float vdc_v = 48.0f; /* DC link as seen by the control code */ + float plant_vdc_v = 48.0f; /* DC link actually used by the plant */ + float motor_temp_c = 25.0f; + float inverter_temp_c = 25.0f; + bool critical_fault = false; + bool encoder_sample_new = false; + /* Set by platform_pwm_set; consumed by the scheduler each tim_isr tick to + * tell graph-driven duties apart from "nobody is driving the plant". */ + bool pwm_written = false; + /* Scenario pole-pair count, stashed by SimRuntime at domain init. IPlant + * does not expose motor params, so platform_api derives mechanical angle + * and rpm from this for plant backends other than OdePlant (whose + * MotorModel params are reachable directly). */ + int pole_pairs = 7; + uint64_t time_us = 0; + /* Incremented after every plant Step(); lets the ADC sample latch tell + * fresh conversions apart from leftovers of an older plant state. */ + uint64_t plant_step_seq = 0; +}; + +SimContext& GetSimContext(); +void SimNotifyEncoderSample(); + +class IPlant; +void SimRuntime_RegisterPlant(IPlant* plant); + +/* Base-image internal hooks (not part of the graph-facing platform_api.h). */ +void SimAdcConfigure(const SimAdcConfig& cfg); +void SimAdcTriggerConversion(); +void SimCanSetLoopback(bool enabled); +void SimCanInject(uint8_t bus, uint32_t id, bool ext, + const uint8_t* data, uint8_t dlc); +void SimConfigSetBackingFile(const char* path); +void SimConfigPersist(); +/* Seed the current observer's calibration from scenario motor parameters + * (Gen6 MotorCalibration equivalent). Applied by SimRuntime at domain init, + * before generated constructors run. */ +void SimObserverConfigure(float r_ohm, float l_henry, float flux_wb, + float pole_pairs); + +} // namespace hostsim diff --git a/Images/HostSim/src/sim_runtime.cpp b/Images/HostSim/src/sim_runtime.cpp new file mode 100644 index 00000000..3517d2ba --- /dev/null +++ b/Images/HostSim/src/sim_runtime.cpp @@ -0,0 +1,1119 @@ +#include "sim_runtime.h" + +#include "AppState.h" +#include "can_bridge.h" +#include "pwm_scope.h" +#include "sim_context.h" +#include "telemetry_publisher.h" +#include "plant/plant_backend.h" +#include "plant/ode_plant.h" +#include "plant/ngspice_plant.h" +#include "platform_api.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "realtime_platform.h" + +/* Graph Var registries exist only after RTECodeEmitter has generated the + * domain sources. The base image (and HostSIL, which reuses this file only + * in spirit) compiles without them; guard the same way AppState.h does. */ +#if defined(__has_include) +#if __has_include("../generated/domain_tim_isr_generated.h") && \ + __has_include("../generated/domain_app_loop_generated.h") && \ + __has_include("../generated/domain_adc_isr_generated.h") && \ + __has_include("../generated/domain_vsense_generated.h") +#include "../generated/domain_tim_isr_generated.h" +#include "../generated/domain_app_loop_generated.h" +#include "../generated/domain_adc_isr_generated.h" +#include "../generated/domain_vsense_generated.h" +#define HOSTSIM_HAS_GENERATED_DOMAINS 1 +#endif +#endif +#ifndef HOSTSIM_HAS_GENERATED_DOMAINS +#define HOSTSIM_HAS_GENERATED_DOMAINS 0 +#endif + +namespace hostsim { + +SimRuntime::SimRuntime() : plant_(std::make_unique()) {} +SimRuntime::~SimRuntime() = default; + +namespace { + +SimRuntime g_runtime; + +std::string ExtractString(const std::string& blob, const std::string& key) { + const std::string needle = "\"" + key + "\""; + const size_t pos = blob.find(needle); + if (pos == std::string::npos) return {}; + const size_t colon = blob.find(':', pos); + const size_t q1 = blob.find('"', colon); + const size_t q2 = blob.find('"', q1 + 1); + if (q1 == std::string::npos || q2 == std::string::npos) return {}; + return blob.substr(q1 + 1, q2 - q1 - 1); +} + +bool ExtractNumber(const std::string& blob, const std::string& key, float* out) { + const std::string needle = "\"" + key + "\""; + const size_t pos = blob.find(needle); + if (pos == std::string::npos) return false; + const size_t colon = blob.find(':', pos); + if (colon == std::string::npos) return false; + const char* start = blob.c_str() + colon + 1; + char* end = nullptr; + const float v = std::strtof(start, &end); + if (end == start) return false; + if (out) *out = v; + return true; +} + +/* Handles both JSON booleans and 0/1 numbers. Deliberately parses the token + * right after the colon so unquoted true/false don't scoop the next key. */ +bool ExtractBool(const std::string& blob, const std::string& key, bool* out) { + const std::string needle = "\"" + key + "\""; + const size_t pos = blob.find(needle); + if (pos == std::string::npos) return false; + const size_t colon = blob.find(':', pos); + if (colon == std::string::npos) return false; + size_t i = colon + 1; + while (i < blob.size() && std::isspace(static_cast(blob[i]))) ++i; + if (blob.compare(i, 4, "true") == 0) { + if (out) *out = true; + return true; + } + if (blob.compare(i, 5, "false") == 0) { + if (out) *out = false; + return true; + } + char* end = nullptr; + const float v = std::strtof(blob.c_str() + i, &end); + if (end == blob.c_str() + i) return false; + if (out) *out = (v != 0.0f); + return true; +} + +/* Unsigned integer with base auto-detect (supports "0x" hex CAN ids). */ +bool ExtractUint(const std::string& blob, const std::string& key, uint32_t* out) { + const std::string needle = "\"" + key + "\""; + const size_t pos = blob.find(needle); + if (pos == std::string::npos) return false; + const size_t colon = blob.find(':', pos); + if (colon == std::string::npos) return false; + const char* start = blob.c_str() + colon + 1; + char* end = nullptr; + const unsigned long v = std::strtoul(start, &end, 0); + if (end == start) return false; + if (out) *out = static_cast(v); + return true; +} + +std::string ExtractObject(const std::string& blob, const std::string& key) { + const std::string needle = "\"" + key + "\""; + const size_t pos = blob.find(needle); + if (pos == std::string::npos) return {}; + const size_t brace = blob.find('{', pos); + if (brace == std::string::npos) return {}; + int depth = 0; + for (size_t i = brace; i < blob.size(); ++i) { + if (blob[i] == '{') ++depth; + if (blob[i] == '}') { + --depth; + if (depth == 0) return blob.substr(brace, i - brace + 1); + } + } + return {}; +} + +/* Bracket-matched "key": [ ... ] extraction, inner content only. */ +std::string ExtractArray(const std::string& blob, const std::string& key) { + const std::string needle = "\"" + key + "\""; + const size_t pos = blob.find(needle); + if (pos == std::string::npos) return {}; + const size_t open = blob.find('[', pos); + if (open == std::string::npos) return {}; + int depth = 0; + for (size_t i = open; i < blob.size(); ++i) { + if (blob[i] == '[') ++depth; + if (blob[i] == ']') { + --depth; + if (depth == 0) return blob.substr(open + 1, i - open - 1); + } + } + return {}; +} + +/* Split an array body into its top-level {...} object bodies. */ +std::vector SplitArrayObjects(const std::string& array_body) { + std::vector out; + int depth = 0; + size_t start = std::string::npos; + for (size_t i = 0; i < array_body.size(); ++i) { + if (array_body[i] == '{') { + if (depth == 0) start = i; + ++depth; + } else if (array_body[i] == '}') { + --depth; + if (depth == 0 && start != std::string::npos) { + out.push_back(array_body.substr(start, i - start + 1)); + start = std::string::npos; + } + } + } + return out; +} + +/* Hex string payload → byte buffer, e.g. "DEADBEEF" -> {0xDE,0xAD,0xBE,0xEF}. + * Non-hex pairs are skipped; result capped at max_bytes. */ +uint8_t ParseHexPayload(const std::string& hex, uint8_t* out, uint8_t max_bytes) { + if (!out || max_bytes == 0) return 0; + std::string clean; + clean.reserve(hex.size()); + for (char c : hex) { + if (std::isxdigit(static_cast(c))) clean.push_back(c); + } + uint8_t n = 0; + for (size_t i = 0; i + 1 < clean.size() && n < max_bytes; i += 2) { + out[n++] = static_cast(std::strtoul(clean.substr(i, 2).c_str(), nullptr, 16)); + } + return n; +} + +/* Enumerate "key": number pairs in a flat object blob (for the scenario + * "vars" graph-var seed map). String values would otherwise alias the next + * pair's colon (a value in quotes is not a number): skip them instead. */ +void EnumerateKv(const std::string& blob, + std::vector>* out) { + if (!out) return; + size_t i = 0; + while (i < blob.size()) { + const size_t q1 = blob.find('"', i); + if (q1 == std::string::npos) break; + const size_t q2 = blob.find('"', q1 + 1); + if (q2 == std::string::npos) break; + const std::string key = blob.substr(q1 + 1, q2 - q1 - 1); + const size_t colon = blob.find(':', q2); + if (colon == std::string::npos) break; + size_t start = colon + 1; + while (start < blob.size() && + std::isspace(static_cast(blob[start]))) ++start; + if (start < blob.size() && blob[start] == '"') { + /* String value: skip to its closing quote so it cannot alias the + * next pair's colon. */ + const size_t vend = blob.find('"', start + 1); + i = (vend != std::string::npos) ? vend + 1 : blob.size(); + continue; + } + char* end = nullptr; + const float v = std::strtof(blob.c_str() + start, &end); + if (end != blob.c_str() + start) { + out->emplace_back(key, v); + } + i = colon + 1; + } +} + +StimulusType ParseStimulusType(const std::string& blob) { + const std::string t = ExtractString(blob, "type"); + if (t == "ramp") return StimulusType::Ramp; + if (t == "step") return StimulusType::Step; + return StimulusType::Constant; +} + +StimulusProfile ParseStimulus(const std::string& blob) { + StimulusProfile p{}; + p.type = ParseStimulusType(blob); + float v = 0.0f; + if (ExtractNumber(blob, "value", &v)) p.value = v; + if (ExtractNumber(blob, "start", &v)) p.start = v; + if (ExtractNumber(blob, "end", &v)) p.end = v; + if (ExtractNumber(blob, "start_s", &v)) p.start_s = v; + if (ExtractNumber(blob, "end_s", &v)) p.end_s = v; + if (ExtractNumber(blob, "step_time_s", &v)) p.step_time_s = v; + if (ExtractNumber(blob, "step_value", &v)) p.step_value = v; + return p; +} + +} // namespace + +SimRuntime& GlobalSimRuntime() { return g_runtime; } + +void SimRuntime::SetRealtimeFactor(float factor) { + config_.realtime_factor = factor; + GlobalTelemetryPublisher().LogF32( + "sim_speed", factor <= 0.0f ? -1.0f : factor); +} + +void SimRuntime::ResetWallClockAnchor() { + wall_anchor_ = std::chrono::steady_clock::now(); + sim_anchor_s_ = time_s_; +} + +float SimRuntime::EffectivePwmTelemHz() const { + if (!config_.pwm_scope_enabled) { + return 0.0f; + } + + float base = config_.pwm_telem_hz; + if (base <= 0.0f) { + base = std::clamp(config_.pwm_carrier_hz * 20.0f, 800.0f, 1500.0f); + } + + constexpr float kCap = 1500.0f; + if (config_.realtime_factor <= 0.0f) { + return kCap; + } + + const float speed = std::max(config_.realtime_factor, 0.05f); + return std::clamp(base / speed, 400.0f, kCap); +} + +void SimRuntime::PublishPwmScopeFrame() { + PublishPwmScopeTelemetry(); + GlobalTelemetryPublisher().PublishPrefixCycle(static_cast(TimeMicros()), + "pwm_"); +} + +float SimRuntime::EvaluateStimulus(const StimulusProfile& profile) const { + switch (profile.type) { + case StimulusType::Constant: + return profile.value; + case StimulusType::Ramp: + if (time_s_ <= profile.start_s) return profile.start; + if (time_s_ >= profile.end_s) return profile.end; + if (profile.end_s <= profile.start_s) return profile.end; + { + const double t = (time_s_ - static_cast(profile.start_s)) / + (static_cast(profile.end_s) - profile.start_s); + return profile.start + static_cast(t) * (profile.end - profile.start); + } + case StimulusType::Step: + return time_s_ >= static_cast(profile.step_time_s) + ? profile.step_value + : profile.value; + } + return 0.0f; +} + +bool SimRuntime::ParseScenario(const char* path) { + std::ifstream in(path); + if (!in) { + std::cerr << "HostSim: cannot open scenario " << path << '\n'; + return false; + } + std::ostringstream ss; + ss << in.rdbuf(); + const std::string blob = ss.str(); + + const std::string motor = ExtractObject(blob, "motor"); + const std::string sim = ExtractObject(blob, "simulation"); + float v = 0.0f; + if (ExtractNumber(motor, "rs_ohm", &v)) config_.motor.rs_ohm = v; + if (ExtractNumber(motor, "ld_h", &v)) config_.motor.ld_h = v; + if (ExtractNumber(motor, "lq_h", &v)) config_.motor.lq_h = v; + if (ExtractNumber(motor, "flux_wb", &v)) config_.motor.flux_wb = v; + if (ExtractNumber(motor, "pole_pairs", &v)) config_.motor.pole_pairs = static_cast(v); + if (ExtractNumber(motor, "inertia_kg_m2", &v)) config_.motor.inertia_kg_m2 = v; + if (ExtractNumber(motor, "friction_nm_per_rad_s", &v)) config_.motor.friction_nm_per_rad_s = v; + if (ExtractNumber(motor, "vdc_v", &v)) config_.motor.vdc_v = v; + /* Machine selection: "machine": "induction" swaps the ODE plant to the + * stationary alpha/beta squirrel-cage model (src/induction_model.h); + * default/absent stays PMSM. */ + { + const std::string machine = ExtractString(motor, "machine"); + if (machine == "induction") { + config_.motor.machine = MachineType::Induction; + } else if (machine == "pmsm") { + config_.motor.machine = MachineType::Pmsm; + } else if (!machine.empty()) { + std::cerr << "HostSim: unknown motor.machine \"" << machine + << "\" (want \"pmsm\" or \"induction\"); keeping pmsm\n"; + } + } + if (ExtractNumber(motor, "rr_ohm", &v)) config_.motor.rr_ohm = v; + if (ExtractNumber(motor, "lm_h", &v)) config_.motor.lm_h = v; + if (ExtractNumber(motor, "lls_h", &v)) config_.motor.lls_h = v; + if (ExtractNumber(motor, "llr_h", &v)) config_.motor.llr_h = v; + + if (ExtractNumber(sim, "duration_s", &v)) config_.duration_s = v; + if (ExtractNumber(sim, "tim_isr_hz", &v)) config_.tim_isr_hz = v; + if (ExtractNumber(sim, "adc_isr_hz", &v)) config_.adc_isr_hz = v; + if (ExtractNumber(sim, "app_loop_hz", &v)) config_.app_loop_hz = v; + if (ExtractNumber(sim, "telem_hz", &v)) config_.telem_hz = v; + if (ExtractNumber(sim, "realtime_factor", &v)) config_.realtime_factor = v; + { + const std::string pwm_scope = ExtractObject(blob, "pwm_scope"); + if (!pwm_scope.empty()) { + config_.pwm_scope_enabled = true; + float enabled = 1.0f; + if (ExtractNumber(pwm_scope, "enabled", &enabled)) { + config_.pwm_scope_enabled = enabled != 0.0f; + } + const std::string enabled_s = ExtractString(pwm_scope, "enabled"); + if (enabled_s == "false" || enabled_s == "0") { + config_.pwm_scope_enabled = false; + } + if (pwm_scope.find("\"enabled\": false") != std::string::npos || + pwm_scope.find("\"enabled\":false") != std::string::npos) { + config_.pwm_scope_enabled = false; + } + if (ExtractNumber(pwm_scope, "carrier_hz", &v)) { + config_.pwm_carrier_hz = v; + } + if (ExtractNumber(pwm_scope, "telem_hz", &v)) { + config_.pwm_telem_hz = v; + } + } + float carrier = 0.0f; + if (ExtractNumber(sim, "pwm_carrier_hz", &carrier)) { + config_.pwm_carrier_hz = carrier; + config_.pwm_scope_enabled = true; + } + } + { + float live = 0.0f; + if (ExtractNumber(sim, "live", &live)) config_.live = live != 0.0f; + const std::string live_s = ExtractString(sim, "live"); + if (live_s == "true" || live_s == "1") config_.live = true; + } + { + float port = 0.0f; + if (ExtractNumber(sim, "listen_port", &port)) { + config_.listen_port = static_cast(port); + } + const std::string host = ExtractString(sim, "listen_host"); + if (!host.empty()) config_.listen_host = host; + } + const std::string trace = ExtractString(sim, "trace_csv"); + if (!trace.empty()) config_.trace_csv = trace; + { + bool b = false; + if (ExtractBool(sim, "demo_fallback", &b)) config_.demo_fallback = b; + } + { + const std::string cfg = ExtractString(sim, "config_file"); + if (!cfg.empty()) config_.config_file = cfg; + } + + /* ADC sensor error model — absent keys keep the ideal defaults. */ + const std::string adc_obj = ExtractObject(blob, "adc"); + if (!adc_obj.empty()) { + if (ExtractNumber(adc_obj, "resolution_bits", &v)) { + if (v < 1.0f) v = 1.0f; + if (v > 24.0f) v = 24.0f; + config_.adc.bits = static_cast(v); + } + if (ExtractNumber(adc_obj, "vref_v", &v)) config_.adc.vref_v = v; + if (ExtractNumber(adc_obj, "ref_v", &v)) config_.adc.ref_volts = v; + if (ExtractNumber(adc_obj, "divider", &v)) config_.adc.divider = v; + if (ExtractNumber(adc_obj, "sensitivity_v_per_a", &v)) config_.adc.sensitivity_v_per_a = v; + if (ExtractNumber(adc_obj, "gain_error", &v)) config_.adc.gain_error = v; + if (ExtractNumber(adc_obj, "offset_u_a", &v)) config_.adc.offset_u_a = v; + if (ExtractNumber(adc_obj, "offset_v_a", &v)) config_.adc.offset_v_a = v; + if (ExtractNumber(adc_obj, "noise_std_a", &v)) config_.adc.noise_std_a = v; + } + + /* CAN: loopback toggle plus scheduled injected frames. */ + const std::string can_obj = ExtractObject(blob, "can"); + if (!can_obj.empty()) { + bool b = false; + if (ExtractBool(can_obj, "loopback", &b)) config_.can_loopback = b; + const std::string frames_arr = ExtractArray(can_obj, "frames"); + for (const std::string& f : SplitArrayObjects(frames_arr)) { + SimCanInjectFrame frame{}; + uint32_t id = 0; + if (!ExtractUint(f, "id", &id)) continue; + frame.id = id; + float num = 0.0f; + if (ExtractNumber(f, "bus", &num)) frame.bus = static_cast(num); + bool ext = false; + if (ExtractBool(f, "ext", &ext)) frame.ext = ext; + if (ExtractNumber(f, "start_s", &num)) frame.start_s = num; + if (ExtractNumber(f, "time_s", &num)) frame.start_s = num; + if (ExtractNumber(f, "period_s", &num)) frame.period_s = num; + frame.dlc = ParseHexPayload(ExtractString(f, "data"), frame.data, + sizeof(frame.data)); + frame.next_fire_s = frame.start_s; + config_.can_frames.push_back(frame); + } + } + + /* Environment temperatures surfaced by the platform temperature APIs. */ + const std::string env_obj = ExtractObject(blob, "environment"); + if (!env_obj.empty()) { + if (ExtractNumber(env_obj, "motor_temp_c", &v)) config_.motor_temp_c = v; + if (ExtractNumber(env_obj, "inverter_temp_c", &v)) config_.inverter_temp_c = v; + } + + /* Simple fault triggers: overcurrent threshold, undervoltage threshold, + * and a timed DC-link voltage drop. */ + const std::string faults_obj = ExtractObject(blob, "faults"); + if (!faults_obj.empty()) { + if (ExtractNumber(faults_obj, "overcurrent_a", &v)) config_.overcurrent_a = v; + if (ExtractNumber(faults_obj, "undervoltage_v", &v)) config_.undervoltage_v = v; + if (ExtractNumber(faults_obj, "vdc_glitch_time_s", &v)) config_.vdc_glitch_time_s = v; + if (ExtractNumber(faults_obj, "vdc_glitch_v", &v)) config_.vdc_glitch_v = v; + } + + const std::string plant_obj = ExtractObject(blob, "plant"); + if (!plant_obj.empty()) { + const std::string backend = ExtractString(plant_obj, "backend"); + if (!backend.empty()) config_.plant_backend = backend; + const std::string netlist = ExtractString(plant_obj, "netlist"); + if (!netlist.empty()) config_.ngspice_netlist = netlist; + const std::string mode = ExtractString(plant_obj, "mode"); + if (!mode.empty()) config_.plant_mode = mode; + float substeps = 0.0f; + if (ExtractNumber(plant_obj, "substeps", &substeps)) { + config_.ngspice_substeps = static_cast(substeps); + } + } + + /* dcdc mode default duties: applied each control step unless the graph + * wrote PWM that tick (see StepOnce). Only used with + * plant {backend:"ngspice", mode:"dcdc"}. + * NB: the lenient parser's key search would match the string VALUE + * "dcdc" (of plant.mode) as an object key, so the three duty keys are + * searched flat in the whole blob — the names are unique anyway. */ + if (ExtractNumber(blob, "duty_u_pct", &v)) config_.dcdc_duty_u_pct = v; + if (ExtractNumber(blob, "duty_v_pct", &v)) config_.dcdc_duty_v_pct = v; + if (ExtractNumber(blob, "duty_w_pct", &v)) config_.dcdc_duty_w_pct = v; + + /* Graph Var node seeds: {"vars": {"TargetHz": 40.0}}, applied after + * domain init (emitted builds only). */ + const std::string vars_obj = ExtractObject(blob, "vars"); + if (!vars_obj.empty()) { + EnumerateKv(vars_obj, &config_.graph_vars); + } + + config_.throttle_a = ParseStimulus(ExtractObject(blob, "throttle_a")); + config_.throttle_b = ParseStimulus(ExtractObject(blob, "throttle_b")); + return true; +} + +bool SimRuntime::LoadScenario(const char* path) { + if (!ParseScenario(path)) return false; + + /* Scenario validation: the PMSM plant divides by rs, Ld, Lq and J and the + * encoder model divides by pole_pairs — a zero/negative value would make + * the plant state NaN, and the fault checks (max comparisons) then never + * fire (all NaN comparisons are false), silently defeating protection. + * Reject at load instead. (The induction model clamps its derived terms + * in InductionMachine::Step; here the shared params are always checked + * and the dq-inductances only when the PMSM path would use them.) */ + { + const MotorParams& m = config_.motor; + const auto nonpos = [](float x) { return !std::isfinite(x) || x <= 0.0f; }; + std::string bad; + if (nonpos(m.rs_ohm)) bad = "rs_ohm"; + if (nonpos(m.inertia_kg_m2)) bad = "inertia_kg_m2"; + if (m.pole_pairs < 1) bad = "pole_pairs"; + if (!std::isfinite(m.friction_nm_per_rad_s) || + m.friction_nm_per_rad_s < 0.0f) bad = "friction_nm_per_rad_s"; + if (m.machine == MachineType::Pmsm) { + if (nonpos(m.ld_h)) bad = "ld_h"; + if (nonpos(m.lq_h)) bad = "lq_h"; + if (!std::isfinite(m.flux_wb) || m.flux_wb < 0.0f) bad = "flux_wb"; + } else { + if (nonpos(m.rr_ohm)) bad = "rr_ohm"; + if (nonpos(m.lm_h)) bad = "lm_h"; + if (nonpos(m.lls_h)) bad = "lls_h"; + if (nonpos(m.llr_h)) bad = "llr_h"; + } + if (!bad.empty()) { + std::cerr << "HostSim: ERROR: scenario " << path + << " has invalid motor parameter \"" << bad + << "\" (must be positive/finite); refusing to run a " + "simulation whose protection checks would be inert\n"; + return false; + } + } + + tim_dt_s_ = 1.0 / std::max(1.0, static_cast(config_.tim_isr_hz)); + adc_dt_s_ = 1.0 / std::max(1.0, static_cast(config_.adc_isr_hz)); + app_dt_s_ = 1.0 / std::max(1.0, static_cast(config_.app_loop_hz)); + + SimAdcConfigure(config_.adc); + SimCanSetLoopback(config_.can_loopback); + SimConfigSetBackingFile(config_.config_file.empty() + ? nullptr + : config_.config_file.c_str()); + demo_fallback_warned_ = false; + vdc_glitch_applied_ = false; + overcurrent_raised_ = false; + undervoltage_raised_ = false; + for (auto& frame : config_.can_frames) { + frame.next_fire_s = frame.start_s; + frame.done = false; + } + + /* plant.mode validation: only "motor"/"dcdc", only with ngspice backend. */ + if (config_.plant_mode != "motor" && config_.plant_mode != "dcdc") { + std::cerr << "HostSim: unknown plant.mode \"" << config_.plant_mode + << "\" (want \"motor\" or \"dcdc\"); keeping motor\n"; + config_.plant_mode = "motor"; + } + const bool want_dcdc = (config_.plant_mode == "dcdc"); + if (want_dcdc && config_.plant_backend != "ngspice") { + std::cerr << "HostSim: plant.mode \"dcdc\" requires plant.backend " + "\"ngspice\"; mode ignored\n"; + } + + plant_ = CreatePlantBackend(config_.plant_backend, config_.motor.machine); + if (auto* ng = dynamic_cast(plant_.get())) { + if (!config_.ngspice_netlist.empty()) { + /* Netlist paths are relative to the process CWD; as a fallback + * (so a scenario can be launched from any directory) probe the + * scenario file's directory first, then the parent's — the + * emitted layout keeps plants/ next to scenarios/, so a + * "plants/x.cir" reference resolves via the parent. */ + std::string netlist = config_.ngspice_netlist; + { + std::ifstream probe(netlist); + if (!probe) { + const size_t slash = std::string(path).find_last_of("/\\"); + if (slash != std::string::npos) { + const std::string dir = + std::string(path).substr(0, slash + 1); + const std::string candidates[2] = {dir + netlist, + dir + "../" + netlist}; + for (const std::string& alt : candidates) { + std::ifstream probe2(alt); + if (probe2) { + netlist = alt; + std::cerr << "HostSim: netlist resolved " + "relative to scenario: " + << netlist << '\n'; + break; + } + } + } + } + } + ng->SetNetlistPath(netlist); + } + ng->SetSubsteps(config_.ngspice_substeps); + /* Lets LoadNetlist raise a too-short .tran TSTOP to cover the run. */ + ng->SetPlannedDuration(config_.duration_s, config_.live); + ng->SetMode(want_dcdc && config_.plant_backend == "ngspice" + ? NgspicePlantMode::Dcdc + : NgspicePlantMode::Motor); + } + plant_->SetParams(config_.motor); + plant_->Reset(); + + /* Mode vs netlist class guard (the plant detected the mismatch while + * loading and already logged specifics): never keep running a mismatched + * pair — fall back to the ODE plant loudly. A netlist that failed to + * load gets the same treatment: without it Step() would silently no-op + * forever with a frozen all-zero state. */ + dcdc_mode_ = false; + if (auto* ng = dynamic_cast(plant_.get())) { + if (!ng->CircuitLoaded() || !ng->ModeMatchesNetlist()) { + if (!ng->CircuitLoaded()) { + std::cerr << "HostSim: ERROR: ngspice backend has no usable " + "circuit — falling back to OdePlant\n"; + } else { + std::cerr << "HostSim: ERROR: plant mode/netlist mismatch — " + "falling back to OdePlant\n"; + } + plant_ = CreatePlantBackend("ode", config_.motor.machine); + plant_->SetParams(config_.motor); + plant_->Reset(); + } else { + dcdc_mode_ = ng->DcdcActive(); + } + } + time_s_ = 0.0; + next_tim_s_ = 0.0; + next_adc_s_ = 0.0; + next_app_s_ = 0.0; + return true; +} + +void SimRuntime::OpenTrace() { + trace_.open(config_.trace_csv, std::ios::out | std::ios::trunc); + trace_ok_ = static_cast(trace_); + if (!trace_ok_) { + std::cerr << "HostSim: ERROR: cannot open trace " << config_.trace_csv + << " — batch results will NOT be recorded\n"; + return; + } + trace_ << std::setprecision(8); + /* dcdc runs extend the fixed motor schema with converter probes; the + * motor columns still lead (theta_e/omega_e stay 0 in dcdc mode). */ + trace_dcdc_ = false; + if (auto* ng = dynamic_cast(plant_.get())) { + trace_dcdc_ = ng->DcdcActive(); + } + trace_ << "time_us,throttle_a,throttle_b,duty_u,duty_v,duty_w," + "i_a,i_b,i_c,theta_e,omega_e"; + if (trace_dcdc_) { + trace_ << ",v_bus1,v_bus2,v_bus3,i_leg1,i_leg2,i_leg3"; + } + trace_ << '\n'; +} + +void SimRuntime::InitDomains() { + if (!config_.live) { + OpenTrace(); + } else if (config_.telem_hz < 1500.0f) { + /* Live plots need high sampling rate (~2000 Hz) for smooth waveforms. */ + config_.telem_hz = 2000.0f; + } + auto& pwm = GlobalPwmScope(); + pwm.SetCarrierHz(config_.pwm_carrier_hz); + pwm.SetVdc(config_.motor.vdc_v); + if (config_.pwm_scope_enabled && config_.live && config_.pwm_telem_hz <= 0.0f) { + config_.pwm_telem_hz = + std::clamp(config_.pwm_carrier_hz * 12.0f, 1000.0f, 4000.0f); + } + auto& ctx = GetSimContext(); + ctx.vdc_v = config_.motor.vdc_v; + ctx.plant_vdc_v = config_.motor.vdc_v; + ctx.motor_temp_c = config_.motor_temp_c; + ctx.inverter_temp_c = config_.inverter_temp_c; + ctx.pole_pairs = config_.motor.pole_pairs; + if (!plant_) { + plant_ = CreatePlantBackend(config_.plant_backend, config_.motor.machine); + plant_->SetParams(config_.motor); + plant_->Reset(); + } + SimRuntime_RegisterPlant(plant_.get()); + /* Seed the current observer from the scenario motor parameters (the sim's + * MotorCalibration equivalent) before generated constructors run; a + * hw.current_observer node's constructor re-applies the same snapshot via + * platform_observer_init_from_calibration(). */ + SimObserverConfigure(config_.motor.rs_ohm, config_.motor.ld_h, + config_.motor.flux_wb, + static_cast(config_.motor.pole_pairs)); + next_telem_s_ = 0.0f; + // RTE_EMIT: app_loop init + // RTE_EMIT: tim_isr init + // RTE_EMIT: adc_isr init + // RTE_EMIT: vsense init + ApplyGraphVars(); +} + +void SimRuntime::ApplyGraphVars() { + if (config_.graph_vars.empty()) return; +#if HOSTSIM_HAS_GENERATED_DOMAINS + struct DomainVars { + const RteParamDesc* vars; + size_t count; + void* state; + }; + const DomainVars domains[] = { + {app::g_tim_isr_vars, app::g_tim_isr_var_count, &appState.tim_isr}, + {app::g_app_loop_vars, app::g_app_loop_var_count, &appState.app_loop}, + {app::g_adc_isr_vars, app::g_adc_isr_var_count, &appState.adc_isr}, + {app::g_vsense_vars, app::g_vsense_var_count, &appState.vsense}, + }; + for (const auto& [name, value] : config_.graph_vars) { + bool applied = false; + for (const auto& domain : domains) { + for (size_t i = 0; i < domain.count; ++i) { + if (domain.vars[i].name && name == domain.vars[i].name) { + domain.vars[i].set(domain.state, value); + std::fprintf(stderr, "HostSim: scenario var %.*s = %g\n", + static_cast(name.size()), name.c_str(), + static_cast(value)); + applied = true; + } + } + } + if (!applied) { + std::fprintf(stderr, + "HostSim: WARNING: scenario var \"%s\" matches no " + "graph Var node; ignored\n", + name.c_str()); + } + } +#else + std::fprintf(stderr, + "HostSim: WARNING: scenario \"vars\" given but this binary " + "has no emitted graph domains; var seeds ignored\n"); +#endif +} + +void SimRuntime::WriteTraceRow() { + if (!trace_ || !plant_) return; + const auto& st = plant_->State(); + trace_ << TimeMicros() << ',' + << throttle_a_ << ',' << throttle_b_ << ',' + << duty_u_ << ',' << duty_v_ << ',' << duty_w_ << ',' + << st.ia_a << ',' << st.ib_a << ',' << st.ic_a << ',' + << plant_->ThetaElectricalDeg() << ',' + << plant_->OmegaElectricalRadPerSec(); + if (trace_dcdc_) { + NgspicePlant::DcdcProbes probes{}; + if (auto* ng = dynamic_cast(plant_.get())) { + ng->GetDcdcProbes(&probes); + } + trace_ << ',' << probes.v_bus[0] << ',' << probes.v_bus[1] << ',' + << probes.v_bus[2] << ',' << probes.i_leg[0] << ',' + << probes.i_leg[1] << ',' << probes.i_leg[2]; + } + trace_ << '\n'; +} + +bool SimRuntime::StepOnce() { + if (!config_.live && time_s_ > config_.duration_s) return false; + + throttle_a_ = EvaluateStimulus(config_.throttle_a); + throttle_b_ = EvaluateStimulus(config_.throttle_b); + + auto& pub = GlobalTelemetryPublisher(); + if (pub.HasThrottleOverrideA()) throttle_a_ = pub.ThrottleOverrideA(); + if (pub.HasThrottleOverrideB()) throttle_b_ = pub.ThrottleOverrideB(); + + auto& ctx = GetSimContext(); + ctx.throttle_a = throttle_a_; + ctx.throttle_b = throttle_b_; + ctx.time_us = TimeMicros(); + + /* Fault injection: timed DC-link voltage drop, seen by both the control + * code (ctx.vdc_v) and the plant (motor params). Applied once. */ + if (config_.vdc_glitch_time_s >= 0.0f && !vdc_glitch_applied_ && + time_s_ + 1e-9 >= config_.vdc_glitch_time_s) { + vdc_glitch_applied_ = true; + config_.motor.vdc_v = config_.vdc_glitch_v; + ctx.vdc_v = config_.vdc_glitch_v; + ctx.plant_vdc_v = config_.vdc_glitch_v; + if (plant_) plant_->SetParams(config_.motor); + std::fprintf(stderr, + "HostSim: DC link glitch at t=%.3f s -> vdc=%.2f V\n", + static_cast(time_s_), + static_cast(config_.vdc_glitch_v)); + } + + if (time_s_ + 1e-9 >= next_tim_s_) { + ctx.pwm_written = false; + /* Domain dt for generated code (Gen6 pwm.cpp TIM1 update ISR sets it + * before the generated step). */ + platform_set_current_domain_dt(static_cast(tim_dt_s_)); + // RTE_EMIT: tim_isr step + if (!ctx.pwm_written && (throttle_a_ > 0.0f || throttle_b_ > 0.0f)) { + if (config_.demo_fallback) { + /* Legacy bring-up behaviour: synthesize open-loop SPWM while no + * graph node drives the duties. Opt-in via "demo_fallback": + * true because it silently masks emitted graphs that never + * call platform_pwm_set. */ + const float freq_hz = throttle_b_ > 0.0f + ? (1.0f + 19.0f * throttle_b_) + : 10.0f; + platform_spwm_step(throttle_a_, freq_hz, + static_cast(tim_dt_s_), + &ctx.duty_u, &ctx.duty_v, &ctx.duty_w); + } else if (!demo_fallback_warned_ && !dcdc_mode_) { + /* Suppressed in dcdc mode: converter legs take their duties + * from the scenario "dcdc" keys below, so a silent zero duty + * there means the scenario asked for 0%, not a dead graph. */ + demo_fallback_warned_ = true; + std::fprintf(stderr, + "HostSim: throttle is non-zero but no graph node " + "is driving platform_pwm_set — all duties stay 0 " + "(the legacy SPWM fallback is off; enable with " + "\"demo_fallback\": true in the scenario).\n"); + } + } + /* dcdc duty defaults: only when nothing drove the PWM outputs this + * tick. Precedence (highest first): live duty override (applied + * below) > graph platform_pwm_set (ctx.pwm_written) > scenario + * "dcdc" duties (here) > legacy demo_fallback (written above, + * overwritten here). */ + if (dcdc_mode_ && !ctx.pwm_written) { + ctx.duty_u = config_.dcdc_duty_u_pct; + ctx.duty_v = config_.dcdc_duty_v_pct; + ctx.duty_w = config_.dcdc_duty_w_pct; + } + duty_u_ = ctx.duty_u; + duty_v_ = ctx.duty_v; + duty_w_ = ctx.duty_w; + if (pub.HasDutyOverrideU()) duty_u_ = pub.DutyOverrideU(); + if (pub.HasDutyOverrideV()) duty_v_ = pub.DutyOverrideV(); + if (pub.HasDutyOverrideW()) duty_w_ = pub.DutyOverrideW(); + ctx.duty_applied_u = duty_u_; + ctx.duty_applied_v = duty_v_; + ctx.duty_applied_w = duty_w_; + if (config_.pwm_scope_enabled) { + auto& pwm = GlobalPwmScope(); + pwm.SetVdc(ctx.vdc_v); + pwm.SetDuties(duty_u_, duty_v_, duty_w_); + pwm.AdvanceInterval(static_cast(tim_dt_s_)); + } + if (plant_) { + plant_->Step(duty_u_, duty_v_, duty_w_, + static_cast(tim_dt_s_)); + ++ctx.plant_step_seq; + + /* Fault injection: surface limits through platform_raise_fault so + * graph code sees them via platform_has_critical_fault. */ + if (config_.overcurrent_a > 0.0f && !overcurrent_raised_) { + const auto& st = plant_->State(); + const float peak = std::max( + {std::fabs(st.ia_a), std::fabs(st.ib_a), std::fabs(st.ic_a)}); + if (peak > config_.overcurrent_a) { + overcurrent_raised_ = true; + /* Gen6 FaultSource::PhaseOvercurrent / Reason:: + * PhaseOvercurrentSoftware numbering. */ + platform_raise_fault(128u, 4u); + std::fprintf(stderr, + "HostSim: overcurrent fault at t=%.3f s " + "(peak %.2f A > %.2f A)\n", + static_cast(time_s_), + static_cast(peak), + static_cast(config_.overcurrent_a)); + } + } + if (config_.undervoltage_v > 0.0f && !undervoltage_raised_ && + ctx.vdc_v < config_.undervoltage_v) { + undervoltage_raised_ = true; + /* Gen6 FaultSource::Max22530Uv / Reason::PvdTriggered. */ + platform_raise_fault(8u, 17u); + std::fprintf(stderr, + "HostSim: undervoltage fault at t=%.3f s " + "(vdc %.2f V < %.2f V)\n", + static_cast(time_s_), + static_cast(ctx.vdc_v), + static_cast(config_.undervoltage_v)); + } + } + SimNotifyEncoderSample(); + next_tim_s_ += tim_dt_s_; + } + + if (time_s_ + 1e-9 >= next_adc_s_) { + /* Conversion trigger: latch a coherent ADC sample set from the plant + * before the graph's adc_isr domain reads the injected channels. */ + SimAdcTriggerConversion(); + /* Domain dt for generated code (Gen6 PhaseCurrentADC's injected + * conversion-complete ISR sets it before the generated step). */ + platform_set_current_domain_dt(static_cast(adc_dt_s_)); + // RTE_EMIT: adc_isr step + next_adc_s_ += adc_dt_s_; + } + + if (time_s_ + 1e-9 >= next_app_s_) { + /* Domain dt for generated code (Gen6 InverterMain sets the app-loop + * dt before stepping the generated domain). */ + platform_set_current_domain_dt(static_cast(app_dt_s_)); + // RTE_EMIT: app_loop step + /* Voltage-sense domain (Gen6 InverterMain steps vsense at the same + * app-loop cadence, with its own 10 ms dt). */ + platform_set_current_domain_dt(0.01f); + // RTE_EMIT: vsense step + next_app_s_ += app_dt_s_; + /* CAN bridge: one non-blocking poll per app-loop tick — accept new + * spokes, drain reads, inject received frames, run the selftest + * emitter. Never blocks the sim. */ + GlobalCanBridge().Poll(static_cast(time_s_)); + } + + for (auto& frame : config_.can_frames) { + if (frame.done) continue; + if (time_s_ + 1e-9 >= frame.next_fire_s) { + SimCanInject(frame.bus, frame.id, frame.ext, frame.data, + frame.dlc); + if (frame.period_s > 0.0f) { + frame.next_fire_s += frame.period_s; + } else { + frame.done = true; + } + } + } + + if (time_s_ + 1e-9 >= next_telem_s_) { + PublishTelemetry(); + const double telem_dt = + 1.0 / std::max(1.0, static_cast(config_.telem_hz)); + next_telem_s_ += telem_dt; + } + + if (config_.pwm_scope_enabled && EffectivePwmTelemHz() > 0.0f && + time_s_ + 1e-9 >= next_pwm_telem_s_) { + PublishPwmScopeFrame(); + const double pwm_hz = static_cast(EffectivePwmTelemHz()); + next_pwm_telem_s_ += 1.0 / std::max(1.0, pwm_hz); + } + + if (!config_.live) { + WriteTraceRow(); + } + + time_s_ += tim_dt_s_; + if (config_.live) return true; + return time_s_ <= config_.duration_s; +} + +void SimRuntime::PublishPwmScopeTelemetry() { + auto& pub = GlobalTelemetryPublisher(); + if (!pub.IsListening() || !config_.pwm_scope_enabled) return; + const auto& pwm = GlobalPwmScope(); + pub.LogF32("pwm_gate_u", pwm.GateU()); + pub.LogF32("pwm_gate_v", pwm.GateV()); + pub.LogF32("pwm_gate_w", pwm.GateW()); + pub.LogF32("pwm_v_u", pwm.VoltageU()); + pub.LogF32("pwm_v_v", pwm.VoltageV()); + pub.LogF32("pwm_v_w", pwm.VoltageW()); + pub.LogF32("pwm_v_uv", pwm.VoltageUV()); + pub.LogF32("pwm_v_vw", pwm.VoltageVW()); + pub.LogF32("pwm_v_wu", pwm.VoltageWU()); +} + +void SimRuntime::PublishTelemetry() { + auto& pub = GlobalTelemetryPublisher(); + if (!pub.IsListening() || !plant_) return; + const auto& st = plant_->State(); + pub.SetBuiltin(throttle_a_, throttle_b_, duty_u_, duty_v_, duty_w_, st.ia_a, st.ib_a, + st.ic_a, plant_->ThetaElectricalDeg(), plant_->OmegaElectricalRadPerSec(), + GetSimContext().vdc_v); + pub.LogF32("sim_speed", + config_.realtime_factor <= 0.0f ? -1.0f : config_.realtime_factor); + if (dcdc_mode_) { + NgspicePlant::DcdcProbes probes{}; + if (auto* ng = dynamic_cast(plant_.get())) { + ng->GetDcdcProbes(&probes); + } + pub.LogF32("v_bus1", probes.v_bus[0]); + pub.LogF32("v_bus2", probes.v_bus[1]); + pub.LogF32("v_bus3", probes.v_bus[2]); + pub.LogF32("i_leg1", probes.i_leg[0]); + pub.LogF32("i_leg2", probes.i_leg[1]); + pub.LogF32("i_leg3", probes.i_leg[2]); + } + if (config_.pwm_scope_enabled) { + pub.LogF32("pwm_telem_hz", EffectivePwmTelemHz()); + } + if (!config_.pwm_scope_enabled || EffectivePwmTelemHz() <= 0.0f) { + PublishPwmScopeTelemetry(); + } + if (config_.pwm_scope_enabled) { + pub.PublishPlantCycle(static_cast(TimeMicros()), "pwm_"); + } else { + pub.PublishCycle(static_cast(TimeMicros())); + } +} + +void SimRuntime::PaceRealtimeWallClock() const { + if (config_.realtime_factor <= 0.0f) return; + + const double sim_delta_s = time_s_ - sim_anchor_s_; + const auto target = + wall_anchor_ + std::chrono::duration_cast( + std::chrono::duration(sim_delta_s / + static_cast( + config_.realtime_factor))); + auto now = std::chrono::steady_clock::now(); + if (now >= target) return; + + const auto remaining = target - now; + constexpr auto kSpinThreshold = std::chrono::milliseconds(2); + if (remaining > kSpinThreshold) { + std::this_thread::sleep_for(remaining - kSpinThreshold); + } + while (std::chrono::steady_clock::now() < target) { + std::this_thread::yield(); + } +} + +int SimRuntime::Run() { + InitDomains(); + GlobalCanBridge().Start(); + + if (config_.live) { + auto& pub = GlobalTelemetryPublisher(); + if (!pub.Start(config_.listen_host, config_.listen_port)) { + std::cerr << "HostSim: failed to listen on " << config_.listen_host << ':' + << config_.listen_port << '\n'; + return 1; + } + std::printf("HostSim live: realtime_factor=%.2f telem_hz=%.0f\n", + static_cast(config_.realtime_factor), + static_cast(config_.telem_hz)); + if (config_.pwm_scope_enabled) { + std::printf("HostSim live: PWM scope carrier=%.0f Hz base_telem=%.0f Hz (scales with speed)\n", + static_cast(config_.pwm_carrier_hz), + static_cast(config_.pwm_telem_hz)); + } + std::printf("HostSim live: commands via NodeGUI console: throttle a 0.5 | duty u 60 | pause | clear | quit\n"); + std::fflush(stdout); + + RealtimeSession realtime_session; + /* CLI --live reaches here after LoadScenario already loaded the + * netlist, so the TSTOP auto-raise saw live=false; warn loudly that + * the analysis will still stop (loudly) at the card's TSTOP. */ + if (auto* ng = dynamic_cast(plant_.get())) { + const double tstop = ng->NetlistTstopSeconds(); + if (tstop > 0.0 && tstop < 1.0e8) { + std::fprintf(stderr, + "HostSim: WARNING: live mode with ngspice netlist " + ".tran TSTOP=%.6g s — the analysis halts loudly " + "and the plant freezes once sim time passes that " + "mark; raise .tran TSTOP for long sessions\n", + tstop); + } + } + ResetWallClockAnchor(); + double last_pace_sim_s = 0.0; + constexpr double kPaceIntervalSimS = 0.001; + bool was_paused = false; + while (true) { + if (!pub.PollCommands()) break; + + if (pub.IsPaused()) { + if (!was_paused) { + PublishTelemetry(); + was_paused = true; + } + std::this_thread::sleep_for(std::chrono::milliseconds(10)); + continue; + } + was_paused = false; + + if (!StepOnce()) break; + + if (config_.realtime_factor > 0.0f && + (time_s_ - last_pace_sim_s) >= kPaceIntervalSimS) { + PaceRealtimeWallClock(); + last_pace_sim_s = time_s_; + } + } + pub.Stop(); + Shutdown(); + std::printf("HostSim live: stopped at t=%.3f s\n", static_cast(time_s_)); + return 0; + } + + while (StepOnce()) { + } + Shutdown(); + if (!trace_ok_) { + std::fprintf(stderr, + "HostSim: ERROR: trace %s was not written (open failed " + "earlier); exiting nonzero\n", + config_.trace_csv.c_str()); + return 1; + } + std::printf("HostSim: wrote %s\n", config_.trace_csv.c_str()); + return 0; +} + +void SimRuntime::Shutdown() { + GlobalCanBridge().Shutdown(); + if (trace_.is_open()) trace_.close(); + SimConfigPersist(); +} + +} // namespace hostsim diff --git a/Images/HostSim/src/sim_runtime.h b/Images/HostSim/src/sim_runtime.h new file mode 100644 index 00000000..b4aaf18a --- /dev/null +++ b/Images/HostSim/src/sim_runtime.h @@ -0,0 +1,185 @@ +#pragma once + +#include "motor_model.h" +#include "plant/plant_backend.h" +#include "sim_context.h" + +#include +#include +#include +#include +#include +#include + +namespace hostsim { + +enum class StimulusType { Constant, Ramp, Step }; + +struct StimulusProfile { + StimulusType type = StimulusType::Constant; + float value = 0.0f; + float start = 0.0f; + float end = 0.0f; + float start_s = 0.0f; + float end_s = 0.0f; + float step_time_s = 0.0f; + float step_value = 0.0f; +}; + +/* Scenario-driven CAN frame injector. period_s > 0 repeats from start_s, + * otherwise a single frame at start_s. next_fire_s is a sim-time schedule + * anchor, kept in double for the same reason as SimRuntime's anchors. */ +struct SimCanInjectFrame { + uint8_t bus = 1; + uint32_t id = 0; + bool ext = false; + uint8_t dlc = 0; + uint8_t data[8] = {0}; + float start_s = 0.0f; + float period_s = 0.0f; + double next_fire_s = 0.0; + bool done = false; +}; + +struct SimConfig { + float duration_s = 1.0f; + float tim_isr_hz = 10000.0f; + float adc_isr_hz = 10000.0f; + float app_loop_hz = 1000.0f; + float telem_hz = 500.0f; + float pwm_telem_hz = 0.0f; /* 0 = auto from carrier when pwm scope live */ + float realtime_factor = 1.0f; + bool pwm_scope_enabled = false; + float pwm_carrier_hz = 800.0f; + bool live = false; + /* Legacy scheduler-synthesized SPWM when no graph node drives the duties. + * Hidden fallback — must be explicitly requested with "demo_fallback". */ + bool demo_fallback = false; + std::string listen_host = "127.0.0.1"; + int listen_port = 14608; + std::string trace_csv = "trace.csv"; + std::string config_file; /* "" = in-memory config store only */ + std::string plant_backend = "ode"; + /* ngspice backend interpretation: "motor" (3-phase inverter semantics, + * back-EMF, mechanics) or "dcdc" (per-leg duty*VDC into a converter + * netlist; leg currents/bus voltages instead of motor state). Only + * meaningful with backend "ngspice". */ + std::string plant_mode = "motor"; + /* dcdc-mode default duties [%], applied every control step unless the + * graph actually wrote PWM in that tick (ctx.pwm_written). Live duty + * overrides still take precedence over both. */ + float dcdc_duty_u_pct = 0.0f; + float dcdc_duty_v_pct = 0.0f; + float dcdc_duty_w_pct = 0.0f; + std::string ngspice_netlist = ""; + int ngspice_substeps = 4; + MotorParams motor{}; + /* Graph Var node seeds ("vars": {"NodeId": value}) applied to the emitted + * var registries after domain init — batch-mode equivalent of the live + * firmware's `var set` (e.g. TargetHz in induction_vhz). */ + std::vector> graph_vars{}; + StimulusProfile throttle_a{}; + StimulusProfile throttle_b{}; + SimAdcConfig adc{}; + bool can_loopback = true; + std::vector can_frames{}; + float motor_temp_c = 25.0f; + float inverter_temp_c = 25.0f; + /* Fault injection: 0/absent = disabled. */ + float overcurrent_a = 0.0f; /* trip when any |i_phase| exceeds */ + float undervoltage_v = 0.0f; /* trip when DC link below */ + float vdc_glitch_time_s = -1.0f; /* at t, drop DC link to ... */ + float vdc_glitch_v = 0.0f; +}; + +class SimRuntime { +public: + SimRuntime(); + ~SimRuntime(); + + bool LoadScenario(const char* path); + void InitDomains(); + bool StepOnce(); + void Shutdown(); + + /* Batch: run until duration_s. Live: run until quit / Ctrl-C with TCP telemetry. */ + int Run(); + + void SetLive(bool live) { config_.live = live; } + void SetListen(const std::string& host, int port) { + config_.listen_host = host; + config_.listen_port = port; + } + void SetRealtimeFactor(float factor); + void SetTelemetryHz(float hz) { config_.telem_hz = hz; } + void ResetWallClockAnchor(); + + const SimConfig& Config() const { return config_; } + IPlant& Plant() { return *plant_; } + const IPlant& Plant() const { return *plant_; } + + /* Sim time is tracked in double internally: at tim_isr_hz = 10 kHz the + * 1e-4 s step equals the float ulp at t ≈ 2048 s, so float anchors would + * freeze time_s_ and the batch loop would never terminate. Floats are + * exported only at API boundaries (float return values below). */ + float TimeSeconds() const { return static_cast(time_s_); } + uint64_t TimeMicros() const { + return static_cast(time_s_ * 1.0e6); + } + + float EvaluateStimulus(const StimulusProfile& profile) const; + + /* PWM scope publish rate scaled by 1/speed so slow motion keeps sample density. */ + float EffectivePwmTelemHz() const; + + void PublishPwmScopeFrame(); + +private: + SimConfig config_{}; + std::unique_ptr plant_{}; + std::ofstream trace_{}; + /* false when the trace stream failed to open: batch runs then report the + * failure at exit instead of claiming they wrote the CSV. */ + bool trace_ok_ = false; + + double time_s_ = 0.0; + double next_tim_s_ = 0.0; + double next_adc_s_ = 0.0; + double next_app_s_ = 0.0; + double tim_dt_s_ = 1.0e-4; + double adc_dt_s_ = 1.0e-4; + double app_dt_s_ = 1.0e-3; + + float throttle_a_ = 0.0f; + float throttle_b_ = 0.0f; + float duty_u_ = 0.0f; + float duty_v_ = 0.0f; + float duty_w_ = 0.0f; + double next_telem_s_ = 0.0; + double next_pwm_telem_s_ = 0.0; + + bool demo_fallback_warned_ = false; + bool vdc_glitch_applied_ = false; + bool overcurrent_raised_ = false; + bool undervoltage_raised_ = false; + /* Resolved dcdc mode: scenario asked for it, backend is ngspice, and the + * plant still is an NgspicePlant whose netlist matched (no fallback). */ + bool dcdc_mode_ = false; + /* Trace schema extension: dcdc runs append v_bus1..3,i_leg1..3 columns. */ + bool trace_dcdc_ = false; + + bool ParseScenario(const char* path); + void ApplyGraphVars(); + void OpenTrace(); + void WriteTraceRow(); + void PublishTelemetry(); + void PublishPwmScopeTelemetry(); + void PaceRealtimeWallClock() const; + + std::chrono::steady_clock::time_point wall_anchor_{}; + double sim_anchor_s_ = 0.0; +}; + +SimRuntime& GlobalSimRuntime(); + +} // namespace hostsim diff --git a/Images/HostSim/src/telemetry_publisher.cpp b/Images/HostSim/src/telemetry_publisher.cpp new file mode 100644 index 00000000..42ec819a --- /dev/null +++ b/Images/HostSim/src/telemetry_publisher.cpp @@ -0,0 +1,597 @@ +#include "telemetry_publisher.h" + +#include "sim_runtime.h" + +#include "inverter_protocol/packet_builder.h" +#include "inverter_protocol/protocol.h" + +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef _WIN32 +#ifndef WIN32_LEAN_AND_MEAN +#define WIN32_LEAN_AND_MEAN +#endif +#include +#include +#pragma comment(lib, "ws2_32.lib") +#else +#include +#include +#include +#include +#include +#include +#endif + +namespace hostsim { +namespace { + +#ifdef _WIN32 +using Socket = SOCKET; +constexpr Socket kInvalid = INVALID_SOCKET; +inline void CloseSock(Socket s) { + if (s != kInvalid) closesocket(s); +} +inline bool WouldBlock() { + const int e = WSAGetLastError(); + return e == WSAEWOULDBLOCK || e == WSAEINTR; +} +struct WinsockInit { + WinsockInit() { + WSADATA wsa{}; + WSAStartup(MAKEWORD(2, 2), &wsa); + } +}; +inline void EnsureWinsock() { + static WinsockInit init; + (void)init; +} +#else +using Socket = int; +constexpr Socket kInvalid = -1; +inline void CloseSock(Socket s) { + if (s != kInvalid) ::close(s); +} +inline bool WouldBlock() { + return errno == EAGAIN || errno == EWOULDBLOCK || errno == EINTR; +} +inline void EnsureWinsock() {} +#endif + +bool SetNonBlocking(Socket s) { +#ifdef _WIN32 + u_long mode = 1; + return ioctlsocket(s, FIONBIO, &mode) == 0; +#else + const int flags = fcntl(s, F_GETFL, 0); + if (flags < 0) return false; + return fcntl(s, F_SETFL, flags | O_NONBLOCK) == 0; +#endif +} + +bool WriteAll(Socket fd, const uint8_t* data, int n) { + int total = 0; + while (total < n) { +#ifdef _WIN32 + const int wrote = + ::send(fd, reinterpret_cast(data + total), n - total, 0); + if (wrote == SOCKET_ERROR) { + if (WouldBlock()) continue; + return false; + } +#else + const int wrote = + static_cast(::send(fd, data + total, static_cast(n - total), 0)); + if (wrote < 0) { + if (WouldBlock()) continue; + return false; + } +#endif + if (wrote == 0) return false; + total += wrote; + } + return true; +} + +} // namespace + +struct TelemetryPublisher::Client { + Socket fd = kInvalid; + std::string rx; + /* Store define_seq_ value this client was last fully DEFINE'd against; + * 0 never matches once any key exists, so new clients always define. */ + uint32_t define_seq_seen = 0; +}; + +TelemetryPublisher::TelemetryPublisher() = default; + +TelemetryPublisher::~TelemetryPublisher() { Stop(); } + +TelemetryPublisher& GlobalTelemetryPublisher() { + static TelemetryPublisher pub; + return pub; +} + +bool TelemetryPublisher::IsListening() const { return listen_fd_ != -1; } + +bool TelemetryPublisher::HasClient() const { return !clients_.empty(); } + +bool TelemetryPublisher::Start(const std::string& host, int port) { + EnsureWinsock(); + Stop(); + host_ = host; + port_ = port; + + Socket fd = ::socket(AF_INET, SOCK_STREAM, IPPROTO_TCP); + if (fd == kInvalid) return false; + + int yes = 1; +#ifdef _WIN32 + setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, reinterpret_cast(&yes), sizeof(yes)); +#else + setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, &yes, sizeof(yes)); +#endif + + sockaddr_in addr{}; + addr.sin_family = AF_INET; + addr.sin_port = htons(static_cast(port)); + if (inet_pton(AF_INET, host.c_str(), &addr.sin_addr) != 1) { + CloseSock(fd); + return false; + } + + if (::bind(fd, reinterpret_cast(&addr), sizeof(addr)) != 0) { + CloseSock(fd); + return false; + } + if (::listen(fd, 4) != 0) { + CloseSock(fd); + return false; + } + if (!SetNonBlocking(fd)) { + CloseSock(fd); + return false; + } + + listen_fd_ = static_cast(fd); + EnsureBuiltinIds(); + quit_requested_ = false; + std::printf("HostSim live: listening on %s:%d (NodeGUI: --tcp %s:%d --protocol ivp)\n", + host.c_str(), port, host.c_str(), port); + std::fflush(stdout); + return true; +} + +void TelemetryPublisher::Stop() { + for (auto& c : clients_) CloseSock(c.fd); + clients_.clear(); + if (listen_fd_ != -1) { + CloseSock(static_cast(listen_fd_)); + listen_fd_ = -1; + } +} + +void TelemetryPublisher::EnsureBuiltinIds() { + std::lock_guard lock(mu_); + const char* keys[] = { + "throttle_a", "throttle_b", "duty_u", "duty_v", "duty_w", + "i_a", "i_b", "i_c", "theta_e", "omega_e", "vdc_v", "sim_speed", + "pwm_gate_u", "pwm_gate_v", "pwm_gate_w", + "pwm_v_u", "pwm_v_v", "pwm_v_w", + "pwm_v_uv", "pwm_v_vw", "pwm_v_wu", "pwm_telem_hz", + }; + for (const char* k : keys) { + auto& s = signals_[k]; + if (s.id == 0) { + s.id = next_id_++; + define_seq_.fetch_add(1, std::memory_order_relaxed); + } + } +} + +void TelemetryPublisher::LogF32(const char* key, float value) { + if (!key || !*key) return; + std::lock_guard lock(mu_); + auto& s = signals_[key]; + if (s.id == 0) { + s.id = next_id_++; + define_seq_.fetch_add(1, std::memory_order_relaxed); + } + s.value = value; +} + +void TelemetryPublisher::SetBuiltin(float throttle_a, float throttle_b, float duty_u, + float duty_v, float duty_w, float i_a, float i_b, + float i_c, float theta_e, float omega_e, float vdc) { + LogF32("throttle_a", throttle_a); + LogF32("throttle_b", throttle_b); + LogF32("duty_u", duty_u); + LogF32("duty_v", duty_v); + LogF32("duty_w", duty_w); + LogF32("i_a", i_a); + LogF32("i_b", i_b); + LogF32("i_c", i_c); + LogF32("theta_e", theta_e); + LogF32("omega_e", omega_e); + LogF32("vdc_v", vdc); +} + +bool TelemetryPublisher::AcceptPending() { + if (listen_fd_ == -1) return false; + sockaddr_in peer{}; +#ifdef _WIN32 + int plen = sizeof(peer); +#else + socklen_t plen = sizeof(peer); +#endif + Socket cfd = ::accept(static_cast(listen_fd_), + reinterpret_cast(&peer), &plen); + if (cfd == kInvalid) return false; + SetNonBlocking(cfd); + Client c; + c.fd = cfd; + clients_.push_back(std::move(c)); + std::printf("HostSim live: client connected (%zu total)\n", clients_.size()); + return true; +} + +void TelemetryPublisher::DropClient(size_t index) { + if (index >= clients_.size()) return; + CloseSock(clients_[index].fd); + clients_.erase(clients_.begin() + static_cast(index)); + std::printf("HostSim live: client disconnected (%zu remaining)\n", clients_.size()); +} + +bool TelemetryPublisher::SendFramed(Client& c, const uint8_t* packet, size_t len) { + const size_t enc_cap = len + (len / 254) + 2; + std::vector encoded(enc_cap); + const size_t enc_len = ivp_cobs_encode(packet, len, encoded.data(), enc_cap); + if (enc_len == 0) return false; + encoded[enc_len] = 0; + return WriteAll(c.fd, encoded.data(), static_cast(enc_len + 1)); +} + +bool TelemetryPublisher::SendDefine(Client& c, uint32_t time_us) { + // Snapshot the key set so the frames below can be built without holding + // the lock across socket writes. Keys registered mid-send bump + // define_seq_ and are caught on the next cycle's comparison. + std::vector> entries; + const uint32_t seq_at_snapshot = define_seq_.load(std::memory_order_relaxed); + { + std::lock_guard lock(mu_); + entries.reserve(signals_.size()); + for (auto& kv : signals_) { + entries.emplace_back(kv.second.id, kv.first); + } + } + + // A full signal set does not fit in one 240-byte DEFINE payload, so page + // through it. Stopping at the first frame would leave the tail keys + // permanently unknown to the client, which then silently drops their DATA + // items and shows them as zero forever. + std::size_t index = 0; + while (index < entries.size()) { + uint8_t payload[IVP_DEFINE_PAYLOAD_MAX]; + ivp_define_builder_t b; + if (ivp_telemetry_define_begin(&b, payload, sizeof(payload)) != IVP_OK) return false; + + const std::size_t frame_start = index; + for (; index < entries.size(); ++index) { + const std::string& key = entries[index].second; + const auto key_len = + static_cast(std::min(key.size(), IVP_KEY_MAX_LEN)); + if (ivp_telemetry_define_add_f32(&b, entries[index].first, key.c_str(), key_len) != + IVP_OK) { + break; + } + } + if (index == frame_start) return false; // one key too large to ever fit + + uint8_t packet[IVP_HEADER_SIZE + IVP_DEFINE_PAYLOAD_MAX + 2]; + size_t packet_len = 0; + if (ivp_packet_encode(IVP_MSG_TELEMETRY_DEFINE, seq_++, time_us, payload, + static_cast(b.len), packet, sizeof(packet), + &packet_len) != IVP_OK) { + return false; + } + if (!SendFramed(c, packet, packet_len)) return false; + } + + c.define_seq_seen = seq_at_snapshot; + return true; +} + +bool TelemetryPublisher::SendDataFiltered(Client& c, uint32_t time_us, + const char* include_prefix, + const char* exclude_prefix) { + // Snapshot the matching signals so socket writes happen without mu_ held + // and large key sets can be paged across multiple DATA frames below. + const std::string inc = include_prefix ? include_prefix : ""; + const std::string exc = exclude_prefix ? exclude_prefix : ""; + std::vector> items; + { + std::lock_guard lock(mu_); + items.reserve(signals_.size()); + for (const auto& kv : signals_) { + if (include_prefix && kv.first.compare(0, inc.size(), inc) != 0) continue; + if (exclude_prefix && kv.first.compare(0, exc.size(), exc) == 0) continue; + items.emplace_back(kv.second.id, kv.second.value); + } + } + + // Nothing selected: send no DATA frame at all (an empty frame still costs + // bandwidth every cycle). + if (items.empty()) return true; + + // One 600-byte DATA payload holds ~85 f32 items. Page like SendDefine + // does: a key set larger than the cap must still reach the client every + // cycle, not silently drop its tail forever. + std::size_t index = 0; + while (index < items.size()) { + uint8_t payload[IVP_DATA_PAYLOAD_MAX]; + ivp_data_builder_t b; + if (ivp_telemetry_data_begin(&b, payload, sizeof(payload)) != IVP_OK) return false; + + const std::size_t frame_start = index; + for (; index < items.size(); ++index) { + if (ivp_telemetry_data_add_f32(&b, items[index].first, items[index].second) != + IVP_OK) { + break; + } + } + if (index == frame_start) return false; // one item too large to ever fit + + uint8_t packet[IVP_HEADER_SIZE + IVP_DATA_PAYLOAD_MAX + 2]; + size_t packet_len = 0; + if (ivp_packet_encode(IVP_MSG_TELEMETRY_DATA, seq_++, time_us, payload, + static_cast(b.len), packet, sizeof(packet), + &packet_len) != IVP_OK) { + return false; + } + if (!SendFramed(c, packet, packet_len)) return false; + } + return true; +} + +void TelemetryPublisher::PublishPlantCycle(uint32_t time_us, const char* exclude_prefix) { + while (AcceptPending()) { + } + if (clients_.empty()) return; + + const uint32_t define_seq = define_seq_.load(std::memory_order_relaxed); + for (size_t i = 0; i < clients_.size();) { + Client& c = clients_[i]; + bool ok = true; + if (c.define_seq_seen != define_seq) { + ok = SendDefine(c, time_us); + } + if (ok) ok = SendDataFiltered(c, time_us, nullptr, exclude_prefix); + if (!ok) { + DropClient(i); + continue; + } + ++i; + } +} + +void TelemetryPublisher::PublishPrefixCycle(uint32_t time_us, const char* key_prefix) { + while (AcceptPending()) { + } + if (clients_.empty()) return; + if (!key_prefix) return; + + const uint32_t define_seq = define_seq_.load(std::memory_order_relaxed); + for (size_t i = 0; i < clients_.size();) { + Client& c = clients_[i]; + bool ok = true; + if (c.define_seq_seen != define_seq) { + ok = SendDefine(c, time_us); + } + if (ok) ok = SendDataFiltered(c, time_us, key_prefix, nullptr); + if (!ok) { + DropClient(i); + continue; + } + ++i; + } +} + +void TelemetryPublisher::PublishCycle(uint32_t time_us) { + while (AcceptPending()) { + } + if (clients_.empty()) return; + + const uint32_t define_seq = define_seq_.load(std::memory_order_relaxed); + for (size_t i = 0; i < clients_.size();) { + Client& c = clients_[i]; + bool ok = true; + if (c.define_seq_seen != define_seq) { + ok = SendDefine(c, time_us); + } + if (ok) ok = SendDataFiltered(c, time_us, nullptr, nullptr); + if (!ok) { + DropClient(i); + continue; + } + ++i; + } +} + +void TelemetryPublisher::HandleLine(const std::string& raw) { + std::string line = raw; + while (!line.empty() && (line.back() == '\r' || line.back() == '\n' || line.back() == ' ')) { + line.pop_back(); + } + if (line.empty()) return; + + std::istringstream iss(line); + std::string cmd; + iss >> cmd; + if (cmd == "help") { + std::printf("HostSim commands: throttle a|b <0..1>, duty u|v|w <0..100>, speed |turbo, pause, resume, clear, help, quit\n"); + std::printf(" speed examples: speed 0.25 | speed 0.5 | speed 1 | speed 2 | speed turbo\n"); + return; + } + if (cmd == "speed" || cmd == "realtime") { + std::string token; + iss >> token; + float factor = 1.0f; + if (token == "turbo" || token == "max") { + factor = 0.0f; + } else { + factor = std::strtof(token.c_str(), nullptr); + } + if (factor < 0.0f) factor = 0.0f; + auto& runtime = GlobalSimRuntime(); + runtime.SetRealtimeFactor(factor); + runtime.ResetWallClockAnchor(); + if (factor <= 0.0f) { + std::printf("HostSim: speed = turbo (no wall-clock limit)\n"); + } else { + std::printf("HostSim: speed = %.3fx\n", static_cast(factor)); + } + return; + } + if (cmd == "pause") { + paused_ = true; + std::printf("HostSim: simulation paused\n"); + return; + } + if (cmd == "resume" || cmd == "unpause") { + paused_ = false; + std::printf("HostSim: simulation resumed\n"); + return; + } + if (cmd == "quit" || cmd == "exit" || cmd == "stop") { + quit_requested_ = true; + return; + } + if (cmd == "clear") { + ClearThrottleOverrides(); + ClearDutyOverrides(); + std::printf("HostSim: overrides cleared\n"); + return; + } + if (cmd == "throttle") { + std::string which; + float v = 0.0f; + iss >> which >> v; + if (which == "a") { + throttle_a_override_ = true; + throttle_a_ = std::clamp(v, 0.0f, 1.0f); + std::printf("HostSim: throttle_a = %.3f\n", static_cast(throttle_a_)); + } else if (which == "b") { + throttle_b_override_ = true; + throttle_b_ = std::clamp(v, 0.0f, 1.0f); + std::printf("HostSim: throttle_b = %.3f\n", static_cast(throttle_b_)); + } else { + std::printf("HostSim: usage: throttle a|b \n"); + } + return; + } + if (cmd == "duty") { + std::string which; + iss >> which; + if (which == "clear") { + ClearDutyOverrides(); + std::printf("HostSim: duty overrides cleared\n"); + return; + } + + float v = 0.0f; + iss >> v; + const float clamped = std::clamp(v, 0.0f, 100.0f); + if (which == "u") { + duty_u_override_ = true; + duty_u_ = clamped; + std::printf("HostSim: duty_u = %.3f\n", static_cast(duty_u_)); + } else if (which == "v") { + duty_v_override_ = true; + duty_v_ = clamped; + std::printf("HostSim: duty_v = %.3f\n", static_cast(duty_v_)); + } else if (which == "w") { + duty_w_override_ = true; + duty_w_ = clamped; + std::printf("HostSim: duty_w = %.3f\n", static_cast(duty_w_)); + } else { + std::printf("HostSim: usage: duty u|v|w | duty clear\n"); + } + return; + } + std::printf("HostSim: unknown command '%s' (try help)\n", cmd.c_str()); +} + +bool TelemetryPublisher::PollCommands() { + while (AcceptPending()) { + } + + for (size_t i = 0; i < clients_.size();) { + Client& c = clients_[i]; + char buf[256]; +#ifdef _WIN32 + const int n = ::recv(c.fd, buf, sizeof(buf), 0); + if (n == SOCKET_ERROR) { + if (WouldBlock()) { + ++i; + continue; + } + DropClient(i); + continue; + } +#else + const int n = static_cast(::recv(c.fd, buf, sizeof(buf), 0)); + if (n < 0) { + if (WouldBlock()) { + ++i; + continue; + } + DropClient(i); + continue; + } +#endif + if (n == 0) { + DropClient(i); + continue; + } + c.rx.append(buf, buf + n); + size_t pos; + while ((pos = c.rx.find('\n')) != std::string::npos) { + std::string line = c.rx.substr(0, pos); + c.rx.erase(0, pos + 1); + HandleLine(line); + } + ++i; + } + return !quit_requested_; +} + +bool TelemetryPublisher::HasThrottleOverrideA() const { return throttle_a_override_; } +bool TelemetryPublisher::HasThrottleOverrideB() const { return throttle_b_override_; } +float TelemetryPublisher::ThrottleOverrideA() const { return throttle_a_; } +float TelemetryPublisher::ThrottleOverrideB() const { return throttle_b_; } +bool TelemetryPublisher::HasDutyOverrideU() const { return duty_u_override_; } +bool TelemetryPublisher::HasDutyOverrideV() const { return duty_v_override_; } +bool TelemetryPublisher::HasDutyOverrideW() const { return duty_w_override_; } +float TelemetryPublisher::DutyOverrideU() const { return duty_u_; } +float TelemetryPublisher::DutyOverrideV() const { return duty_v_; } +float TelemetryPublisher::DutyOverrideW() const { return duty_w_; } + +void TelemetryPublisher::ClearThrottleOverrides() { + throttle_a_override_ = false; + throttle_b_override_ = false; +} + +void TelemetryPublisher::ClearDutyOverrides() { + duty_u_override_ = false; + duty_v_override_ = false; + duty_w_override_ = false; +} + +} // namespace hostsim diff --git a/Images/HostSim/src/telemetry_publisher.h b/Images/HostSim/src/telemetry_publisher.h new file mode 100644 index 00000000..64d5bcee --- /dev/null +++ b/Images/HostSim/src/telemetry_publisher.h @@ -0,0 +1,121 @@ +#pragma once + +#include +#include +#include +#include +#include +#include + +namespace hostsim { + +/* TCP server that publishes InverterProtocol COBS frames for NodeGUI. + * Accepts text shell lines (throttle / help / quit) from the same socket. */ +class TelemetryPublisher { +public: + static constexpr int kDefaultPort = 14608; + + TelemetryPublisher(); + ~TelemetryPublisher(); + + TelemetryPublisher(const TelemetryPublisher&) = delete; + TelemetryPublisher& operator=(const TelemetryPublisher&) = delete; + + bool Start(const std::string& host, int port); + void Stop(); + bool IsListening() const; + bool HasClient() const; + + /* Register / update a float telemetry key (DEFINE sent on next flush). */ + void LogF32(const char* key, float value); + + /* Built-in plant signals published every PublishCycle. */ + void SetBuiltin(float throttle_a, float throttle_b, + float duty_u, float duty_v, float duty_w, + float i_a, float i_b, float i_c, + float theta_e, float omega_e, float vdc); + + /* Send DEFINE (if dirty) + DATA to connected clients. */ + void PublishCycle(uint32_t time_us); + + /* DATA packet with only keys starting with prefix (for high-rate PWM scope). */ + void PublishPrefixCycle(uint32_t time_us, const char* key_prefix); + + /* DATA packet excluding keys with prefix (plant signals only). */ + void PublishPlantCycle(uint32_t time_us, const char* exclude_prefix); + + /* Non-blocking: read and process text commands from clients. + * Returns true if the live loop should continue. */ + bool PollCommands(); + + /* Optional overrides from console commands. */ + bool HasThrottleOverrideA() const; + bool HasThrottleOverrideB() const; + float ThrottleOverrideA() const; + float ThrottleOverrideB() const; + bool HasDutyOverrideU() const; + bool HasDutyOverrideV() const; + bool HasDutyOverrideW() const; + float DutyOverrideU() const; + float DutyOverrideV() const; + float DutyOverrideW() const; + void ClearThrottleOverrides(); + void ClearDutyOverrides(); + + bool IsPaused() const { return paused_; } + void SetPaused(bool paused) { paused_ = paused; } + + bool QuitRequested() const { return quit_requested_; } + +private: + struct Client; + + bool AcceptPending(); + void DropClient(size_t index); + bool SendFramed(Client& c, const uint8_t* packet, size_t len); + bool SendDefine(Client& c, uint32_t time_us); + /* Snapshot the matching signals, then send them to the client as one or + * more DATA frames (paged at the payload cap). include_prefix selects + * only matching keys, exclude_prefix drops matching keys; both null means + * everything. Empty selections send nothing and succeed. */ + bool SendDataFiltered(Client& c, uint32_t time_us, + const char* include_prefix, const char* exclude_prefix); + void HandleLine(const std::string& line); + void EnsureBuiltinIds(); + + struct Signal { + uint16_t id = 0; + float value = 0.0f; + }; + + std::string host_ = "127.0.0.1"; + int port_ = kDefaultPort; + int listen_fd_ = -1; + std::vector clients_; + + mutable std::mutex mu_; + std::unordered_map signals_; + uint16_t next_id_ = 1; + /* Bumped (under mu_) whenever a new key registers. Each client tracks the + * sequence it was last DEFINE'd against, so a mid-session registration is + * announced to every connected client, not just the first to publish. */ + std::atomic define_seq_{0}; + uint32_t seq_ = 0; + + bool throttle_a_override_ = false; + bool throttle_b_override_ = false; + float throttle_a_ = 0.0f; + float throttle_b_ = 0.0f; + bool duty_u_override_ = false; + bool duty_v_override_ = false; + bool duty_w_override_ = false; + float duty_u_ = 0.0f; + float duty_v_ = 0.0f; + float duty_w_ = 0.0f; + bool quit_requested_ = false; + bool paused_ = false; +}; + +TelemetryPublisher& GlobalTelemetryPublisher(); + +} // namespace hostsim diff --git a/Images/HostSim/trace.csv b/Images/HostSim/trace.csv deleted file mode 100644 index 4cd6a0a5..00000000 --- a/Images/HostSim/trace.csv +++ /dev/null @@ -1,5002 +0,0 @@ -time_us,throttle_a,throttle_b,duty_u,duty_v,duty_w,i_a,i_b,i_c,theta_e,omega_e -0,0,0,0,0,0,0,0,-0,0,0 -99,0,0,0,0,0,0,0,-0,0,0 -199,0,0,0,0,0,0,0,-0,0,0 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-499970,0.75,0,50,49.999973,50.000027,7.9472748e-06,-7.1011564e-06,-8.4611861e-07,0,-0.0016115664 diff --git a/Lib/InverterCodegen/README.md b/Lib/InverterCodegen/README.md index 43c5d006..82f4c64e 100644 --- a/Lib/InverterCodegen/README.md +++ b/Lib/InverterCodegen/README.md @@ -110,7 +110,7 @@ Example: InverterCodegen/generated ``` -Before generating, the tool runs `NodeAPI::Timing::Validator` on the graph. It fails if nodes are missing domains, connections cross domains, or the graph contains a cycle. +Before generating, the tool runs `NodeAPI::Timing::Validator` on the graph. It fails if nodes are missing domains, connections cross domains, or the graph contains an algebraic (connection-only) cycle — a cycle broken by a cross-domain bridge is legal unit-delay feedback. ## Project layout diff --git a/Lib/InverterCodegen/src/CodeGenerator.cpp b/Lib/InverterCodegen/src/CodeGenerator.cpp index ee147920..075f493a 100644 --- a/Lib/InverterCodegen/src/CodeGenerator.cpp +++ b/Lib/InverterCodegen/src/CodeGenerator.cpp @@ -2,8 +2,10 @@ #include #include +#include #include #include +#include #include #include #include @@ -45,6 +47,22 @@ bool IsValidIdentifier(std::string_view id) { return true; } +/* Bridge ids are spliced into C++ symbol names via Capitalize() ("Bridge" + + * Capitalize(id)), so they may only contain characters that either survive in + * an identifier (alnum, '_') or act as Capitalize() word separators + * ('-', ' '). Anything else (e.g. '.') would silently leak into the emitted + * symbol and produce uncompilable code. */ +bool IsValidBridgeId(std::string_view id) { + if (id.empty()) return false; + for (char c : id) { + if (!std::isalnum(static_cast(c)) && c != '_' && + c != '-' && c != ' ') { + return false; + } + } + return true; +} + std::string Capitalize(std::string_view s) { if (s.empty()) return ""; std::string out; @@ -215,33 +233,92 @@ std::string WireTypeToCpp(const NodeAPI::WireType& type) { return "float"; } -std::string ParameterValueToCpp(const NodeAPI::WireType& type, const std::string& value) { +/* Graph parameter values are plain strings and are spliced verbatim into + * generated C++. Parse them as decimal floats and re-emit a canonical + * literal so that e.g. "0x10" cannot compile as hex 16, "nan" is not emitted + * as a bare (undefined) identifier, and "10" gets a decimal point so the + * appended 'f' suffix is legal ("10f" is not a C++ literal). + * + * The non-finite spellings inf/infinity/nan (case-insensitive, optional sign + * for inf) are accepted explicitly and emitted as the INFINITY / NAN macros; + * the generated sources include . */ +std::optional CanonicalFloatLiteral(const std::string& value) { + const size_t begin = value.find_first_not_of(" \t\r\n"); + if (begin == std::string::npos) return std::nullopt; + const size_t end = value.find_last_not_of(" \t\r\n"); + std::string s = value.substr(begin, end - begin + 1); + + std::string lower; + lower.reserve(s.size()); + for (char c : s) lower += static_cast(std::tolower(static_cast(c))); + + std::string_view body(lower); + bool negative = false; + if (body.starts_with('-')) { + negative = true; + body.remove_prefix(1); + } else if (body.starts_with('+')) { + body.remove_prefix(1); + } + if (body == "inf" || body == "infinity") return negative ? "(-INFINITY)" : "INFINITY"; + if (body == "nan" && !negative) return "NAN"; + /* Everything else that strtof would misread is rejected here: hex floats + * ("0x10" parses as 16), nan(...) payloads, and the inf/nan spellings not + * handled above. */ + if (body.starts_with("0x") || body.starts_with("nan") || body.starts_with("inf")) { + return std::nullopt; + } + + char* parseEnd = nullptr; + std::strtof(s.c_str(), &parseEnd); + if (parseEnd != s.c_str() + s.size()) return std::nullopt; // partial or no parse + + if (s.find_first_of(".eE") == std::string::npos) s += ".0"; + return s + "f"; +} + +std::optional ParameterValueToCpp(const NodeAPI::WireType& type, + const std::string& value) { // Emit a C++ expression that constructs the right unit-wrapped value from a - // plain numeric literal. Framed parameter types are not supported. + // plain numeric literal. Framed parameter types get the bare literal. + if (type.quantity == NodeAPI::Quantity::String) { + // String params are stored unquoted in the graph JSON; quote them + // for C++ emission. + return "\"" + value + "\""; + } + const auto literal = CanonicalFloatLiteral(value); + if (!literal) return std::nullopt; switch (type.quantity) { case NodeAPI::Quantity::Voltage: if (type.frame != NodeAPI::Frame::Scalar) break; - return "rte::Volts(" + value + "f)"; + return "rte::Volts(" + *literal + ")"; case NodeAPI::Quantity::Current: if (type.frame != NodeAPI::Frame::Scalar) break; - return "rte::Amperes(" + value + "f)"; + return "rte::Amperes(" + *literal + ")"; case NodeAPI::Quantity::AngularVelocity: - return "rte::RadiansPerSecond(" + value + "f)"; + return "rte::RadiansPerSecond(" + *literal + ")"; case NodeAPI::Quantity::Torque: - return "rte::NewtonMeters(" + value + "f)"; + return "rte::NewtonMeters(" + *literal + ")"; case NodeAPI::Quantity::Temperature: - return "rte::Celsius(" + value + "f)"; + return "rte::Celsius(" + *literal + ")"; case NodeAPI::Quantity::Dimensionless: case NodeAPI::Quantity::Boolean: - return value + "f"; + return *literal; case NodeAPI::Quantity::String: - // String params are stored unquoted in the graph JSON; quote them - // for C++ emission. - return "\"" + value + "\""; + break; // handled above } // Unknown / framed: fall back to a plain float so existing templates keep // working, but this loses unit safety for those parameters. - return value + "f"; + return *literal; +} + +/* Parameter expression for emission: typed parameters go through + * ParameterValueToCpp; parameters the type does not declare are still emitted + * (as dimensionless state members) and therefore need the same validation. */ +std::optional ParameterExpr(const std::optional& paramType, + const std::string& value) { + if (paramType) return ParameterValueToCpp(*paramType, value); + return CanonicalFloatLiteral(value); } // Config nodes (type id "config.*") expose a FRAM-backed value by a user-chosen @@ -477,9 +554,50 @@ bool CodeGenerator::Generate(const std::string& outputDir, std::string& error) c } } + // Validate bridge ids: each one is spliced into a C++ symbol + // ("Bridge" + Capitalize(id)), so reject characters that would leak into + // the symbol ("weird.id") and reject id pairs whose Capitalize()d forms + // collide ("my-bridge" and "my_bridge" both emit "BridgeMyBridge"). + std::map bridgeSymbols; + for (const auto& bridge : graph_.GetBridges()) { + if (!IsValidBridgeId(bridge.id)) { + error = "Bridge id is not usable in a C++ symbol: '" + bridge.id + + "' (allowed: letters, digits, '_', '-', ' ')"; + return false; + } + const std::string symbol = Capitalize(bridge.id); + const auto [existing, inserted] = bridgeSymbols.emplace(symbol, bridge.id); + if (!inserted) { + error = "Bridge ids '" + existing->second + "' and '" + bridge.id + + "' both generate the symbol 'Bridge" + symbol + "'"; + return false; + } + } + auto domains = GroupNodesByDomain(graph_); - for (const auto& [domain, nodes] : domains) { + // Emit domains in sorted order so outputs do not depend on unordered_map + // iteration order. + std::vector domainNames; + for (const auto& entry : domains) domainNames.push_back(entry.first); + std::sort(domainNames.begin(), domainNames.end()); + + /* Class-based node types are hoisted into one shared header/source pair + * (node_types_generated.h/.cpp) emitted once per run, instead of being + * repeated in every domain file: a class-based type used by nodes in + * several domains would otherwise produce duplicate class and member + * function definitions. Sorted set for deterministic emission. */ + std::set classTypeIds; + for (const auto& node : graph_.GetNodes()) { + const auto nodeType = graph_.FindNodeType(node.type); + if (!nodeType) continue; + if (!nodeType->classHeader.empty() || !nodeType->classDefinition.empty()) { + classTypeIds.insert(node.type); + } + } + + for (const auto& domain : domainNames) { + const auto& nodes = domains[domain]; if (domain.empty()) { error = "Domain name is empty for one or more nodes"; return false; @@ -495,12 +613,6 @@ bool CodeGenerator::Generate(const std::string& outputDir, std::string& error) c return false; } - // Collect node types used in this domain. - std::unordered_set typeIdsUsed; - for (const auto& node : nodes) { - typeIdsUsed.insert(node.type); - } - std::string stateStruct = BuildStateStruct(domainTitle, order, graph_, error); if (!error.empty()) return false; @@ -510,20 +622,14 @@ bool CodeGenerator::Generate(const std::string& outputDir, std::string& error) c header << "// Generated by InverterCodegen. Do not edit by hand.\n\n"; header << "#include \n"; header << "#include \"InverterCodegen/RteQuantity.h\"\n"; + if (!classTypeIds.empty()) { + header << "#include \"node_types_generated.h\"\n"; + } if (!graph_.GetBridges().empty()) { header << "#include \"bridges_generated.h\"\n"; } header << "\n"; - for (const auto& typeId : typeIdsUsed) { - const auto nodeType = graph_.FindNodeType(typeId); - if (!nodeType) continue; - if (!nodeType->classHeader.empty()) { - header << "// From node type: " << typeId << "\n"; - header << nodeType->classHeader << "\n\n"; - } - } - header << "namespace app {\n\n"; header << stateStruct << "\n\n"; header << "void " << domainTitle << "Init(" << domainTitle << "State& state);\n"; @@ -543,16 +649,8 @@ bool CodeGenerator::Generate(const std::string& outputDir, std::string& error) c std::ostringstream source; source << "// Generated by InverterCodegen. Do not edit by hand.\n\n"; source << "#include \"domain_" << domainCpp << "_generated.h\"\n"; - source << "#include \"platform_api.h\"\n\n"; - - for (const auto& typeId : typeIdsUsed) { - const auto nodeType = graph_.FindNodeType(typeId); - if (!nodeType) continue; - if (!nodeType->classDefinition.empty()) { - source << "// From node type: " << typeId << "\n"; - source << nodeType->classDefinition << "\n\n"; - } - } + source << "#include \"platform_api.h\"\n"; + source << "#include \n\n"; source << "namespace app {\n\n"; @@ -575,21 +673,31 @@ bool CodeGenerator::Generate(const std::string& outputDir, std::string& error) c for (const auto& [key, value] : node->parameters) { if (used.count(key)) { auto paramType = nodeType->FindParameterType(key); + auto expr = ParameterExpr(paramType, value); + if (!expr) { + error = "Node '" + node->id + "' parameter '" + key + + "' has invalid numeric value '" + value + + "' (expected a decimal float)"; + return false; + } source << " const " << (paramType ? WireTypeToCpp(*paramType) : "rte::Dimensionless") - << " " << key << " = " - << (paramType ? ParameterValueToCpp(*paramType, value) - : value + "f") - << ";\n"; + << " " << key << " = " << *expr << ";\n"; } } } else { for (const auto& [key, value] : node->parameters) { if (IsParameterInput(*node, key)) continue; auto paramType = nodeType->FindParameterType(key); + auto expr = ParameterExpr(paramType, value); + if (!expr) { + error = "Node '" + node->id + "' parameter '" + key + + "' has invalid numeric value '" + value + + "' (expected a decimal float)"; + return false; + } source << " state." << node->id << "." << key << " = " - << (paramType ? ParameterValueToCpp(*paramType, value) : value + "f") - << ";\n"; + << *expr << ";\n"; } /* Bind local refs for parameters used by constructorCode. */ if (!nodeType->constructorCode.empty()) { @@ -706,12 +814,16 @@ bool CodeGenerator::Generate(const std::string& outputDir, std::string& error) c for (const auto& [key, value] : node->parameters) { if (used.count(key)) { auto paramType = nodeType->FindParameterType(key); + auto expr = ParameterExpr(paramType, value); + if (!expr) { + error = "Node '" + node->id + "' parameter '" + key + + "' has invalid numeric value '" + value + + "' (expected a decimal float)"; + return false; + } source << " const " << (paramType ? WireTypeToCpp(*paramType) : "rte::Dimensionless") - << " " << key << " = " - << (paramType ? ParameterValueToCpp(*paramType, value) - : value + "f") - << ";\n"; + << " " << key << " = " << *expr << ";\n"; } } } else { @@ -783,9 +895,15 @@ bool CodeGenerator::Generate(const std::string& outputDir, std::string& error) c for (const auto& [key, value] : node->parameters) { if (IsParameterInput(*node, key)) continue; auto paramType = nodeType->FindParameterType(key); + auto expr = ParameterExpr(paramType, value); + if (!expr) { + error = "Node '" + node->id + "' parameter '" + key + + "' has invalid numeric value '" + value + + "' (expected a decimal float)"; + return false; + } source << " state." << node->id << "." << key << " = " - << (paramType ? ParameterValueToCpp(*paramType, value) : value + "f") - << ";\n"; + << *expr << ";\n"; } source << " }\n"; } @@ -928,6 +1046,43 @@ bool CodeGenerator::Generate(const std::string& outputDir, std::string& error) c if (!WriteFile(cppPath, source.str(), error)) return false; } + /* Class-based node types: emit the class declarations/definitions exactly + * once, shared by every domain (each domain header includes this header). */ + if (!classTypeIds.empty()) { + std::ostringstream classHeader; + classHeader << "#pragma once\n\n"; + classHeader << "// Generated by InverterCodegen. Do not edit by hand.\n\n"; + classHeader << "#include \"InverterCodegen/RteQuantity.h\"\n\n"; + for (const auto& typeId : classTypeIds) { + const auto nodeType = graph_.FindNodeType(typeId); + if (!nodeType) continue; + if (!nodeType->classHeader.empty()) { + classHeader << "// From node type: " << typeId << "\n"; + classHeader << nodeType->classHeader << "\n\n"; + } + } + + std::ostringstream classSource; + classSource << "// Generated by InverterCodegen. Do not edit by hand.\n\n"; + classSource << "#include \"node_types_generated.h\"\n"; + classSource << "#include \"platform_api.h\"\n\n"; + for (const auto& typeId : classTypeIds) { + const auto nodeType = graph_.FindNodeType(typeId); + if (!nodeType) continue; + if (!nodeType->classDefinition.empty()) { + classSource << "// From node type: " << typeId << "\n"; + classSource << nodeType->classDefinition << "\n\n"; + } + } + + if (!WriteFile(outPath / "node_types_generated.h", classHeader.str(), error)) { + return false; + } + if (!WriteFile(outPath / "node_types_generated.cpp", classSource.str(), error)) { + return false; + } + } + // Generate cross-domain bridge globals if any bridges exist. if (!graph_.GetBridges().empty()) { std::ostringstream bridgeHeader; diff --git a/Lib/InverterProtocol/include/inverter_protocol/host/host_client.h b/Lib/InverterProtocol/include/inverter_protocol/host/host_client.h index 3a4249ea..de8a6aa5 100644 --- a/Lib/InverterProtocol/include/inverter_protocol/host/host_client.h +++ b/Lib/InverterProtocol/include/inverter_protocol/host/host_client.h @@ -1,5 +1,6 @@ #pragma once +#include "inverter_protocol/host/str_reassembly.h" #include "inverter_protocol/host/uart_transport.h" #include @@ -86,6 +87,9 @@ class InverterClient { mutable std::mutex reg_mtx_; std::unordered_map registry_; + /* STR_FRAG message reassembly (worker thread only). */ + StringFragmentReassembler str_reasm_; + mutable std::mutex stats_mtx_; ClientStats stats_; diff --git a/Lib/InverterProtocol/include/inverter_protocol/host/str_reassembly.h b/Lib/InverterProtocol/include/inverter_protocol/host/str_reassembly.h new file mode 100644 index 00000000..e4cb5700 --- /dev/null +++ b/Lib/InverterProtocol/include/inverter_protocol/host/str_reassembly.h @@ -0,0 +1,75 @@ +#pragma once + +#include "inverter_protocol/packet_parser.h" + +#include +#include +#include +#include + +namespace ivp { + +/* Reassembles fragmented string telemetry (IVP_VT_STR_FRAG) into complete + * messages, mirroring Source/NodeGUI IvpStreamDecoder semantics: + * - IVP_SF_START clears any partial buffer collected for the key, + * - fragments append in arrival order, + * - IVP_SF_END delivers the assembled message, + * - a plain IVP_VT_STR supersedes and discards any partial buffer, + * - partials with no new fragment for > kStaleUs of device time are dropped + * via expireStale(). + * + * Fragments that arrive without a prior START still collect (an END then + * delivers what was seen); a new START mid-message discards the old partial. + */ +class StringFragmentReassembler { +public: + static constexpr uint32_t kStaleUs = 2000000u; + + /* Feed one STR/STR_FRAG DATA item. Returns true when `out` holds a + * complete message to deliver (plain STR, or an END-terminated + * fragment sequence). Other value types always return false. */ + bool handle(const std::string& key, const ivp_data_item_t& item, + uint32_t time_us, std::string& out) { + if (item.type == IVP_VT_STR) { + partials_.erase(key); + out.assign(item.v.str.data, item.v.str.len); + return true; + } + if (item.type != IVP_VT_STR_FRAG) return false; + + auto& part = partials_[key]; + if (item.v.frag.frag & IVP_SF_START) part.buf.clear(); + part.buf.append(item.v.frag.data, item.v.frag.len); + part.last_time_us = time_us; + if (item.v.frag.frag & IVP_SF_END) { + out = std::move(part.buf); + partials_.erase(key); + return true; + } + return false; + } + + /* Drop partials idle for more than kStaleUs of device time. Unsigned + * subtraction tolerates time_us wraparound. Call once per DATA frame. */ + void expireStale(uint32_t time_us) { + for (auto it = partials_.begin(); it != partials_.end();) { + if (time_us - it->second.last_time_us > kStaleUs) { + it = partials_.erase(it); + } else { + ++it; + } + } + } + + /* Number of keys with an in-flight fragment sequence (test hook). */ + size_t partialCount() const { return partials_.size(); } + +private: + struct Partial { + std::string buf; + uint32_t last_time_us = 0; + }; + std::unordered_map partials_; +}; + +} // namespace ivp diff --git a/Lib/InverterProtocol/include/inverter_protocol/host/uart_transport.h b/Lib/InverterProtocol/include/inverter_protocol/host/uart_transport.h index 70f565ec..673a6f24 100644 --- a/Lib/InverterProtocol/include/inverter_protocol/host/uart_transport.h +++ b/Lib/InverterProtocol/include/inverter_protocol/host/uart_transport.h @@ -19,7 +19,8 @@ class SerialPort { void close(); bool isOpen() const; - /* Read up to `cap` bytes. Returns bytes read (>=0). */ + /* Read up to `cap` bytes. Returns bytes read (>=0), or -1 on a real I/O + * error (EAGAIN/EINTR style "no data" still returns 0). */ int read(uint8_t* buf, int cap); /* Write exactly `n` bytes. Returns true on full success. */ @@ -37,7 +38,8 @@ class SerialPort { * * Encapsulates COBS framing with 0x00 delimiters around ivp_packet_encode * output. The receive side accumulates raw bytes and emits complete, - * CRC-verified packets. + * COBS-decoded packets; header/CRC validation is the caller's job + * (ivp_packet_parse), not this layer's. */ class UartTransport { public: @@ -60,8 +62,9 @@ class UartTransport { /* Try to receive one complete packet into `out`. * Returns packet length on success, 0 if no complete packet is available, - * or -1 on a framing/CRC error (caller should resync). Bytes past the - * first complete frame stay buffered for the next call. */ + * or -1 on a transport/framing error (caller should resync); the CRC is + * checked later by ivp_packet_parse. Bytes past the first complete frame + * stay buffered for the next call. */ int receivePacket(uint8_t* out, size_t cap); /* Send a text command line followed by \n. Used by the text shell. */ diff --git a/Lib/InverterProtocol/include/inverter_protocol/packet_builder.h b/Lib/InverterProtocol/include/inverter_protocol/packet_builder.h index bbdd5bbb..52584fe3 100644 --- a/Lib/InverterProtocol/include/inverter_protocol/packet_builder.h +++ b/Lib/InverterProtocol/include/inverter_protocol/packet_builder.h @@ -14,6 +14,13 @@ extern "C" { * * All builders write into caller-provided buffers and return IVP_OK on * success. They intentionally avoid dynamic allocation. + * + * Error contract: + * - IVP_ERR_BUF_TOO_SMALL the payload buffer is full. + * - IVP_ERR_OVERSIZE the item is structurally too large ever to fit: + * keys longer than IVP_KEY_MAX_LEN, strings longer + * than IVP_STR_MAX_LEN, or more than 255 items in a + * single payload (callers must page instead). * ======================================================================== */ /* ---------- Telemetry DEFINE payload ---------- */ diff --git a/Lib/InverterProtocol/include/inverter_protocol/protocol.h b/Lib/InverterProtocol/include/inverter_protocol/protocol.h index 8c221e09..3afb1bb5 100644 --- a/Lib/InverterProtocol/include/inverter_protocol/protocol.h +++ b/Lib/InverterProtocol/include/inverter_protocol/protocol.h @@ -102,8 +102,14 @@ typedef struct IVP_PACKED { #endif #undef IVP_PACKED -/* Compile-time size check (usable from C and C++). */ +/* Compile-time size check (usable from C and C++). This is the authoritative + * guard for the wire layout; image trees previously carried local copies. */ #define IVP_HEADER_SIZE 16u +#if defined(__cplusplus) +static_assert(sizeof(ivp_header_t) == IVP_HEADER_SIZE, "ivp_header_t must be 16 bytes"); +#else +_Static_assert(sizeof(ivp_header_t) == IVP_HEADER_SIZE, "ivp_header_t must be 16 bytes"); +#endif /* Result codes from parser and encoder functions. */ typedef enum { diff --git a/Lib/InverterProtocol/include/inverter_protocol/trace_protocol.h b/Lib/InverterProtocol/include/inverter_protocol/trace_protocol.h index b711feac..6c6dc2ae 100644 --- a/Lib/InverterProtocol/include/inverter_protocol/trace_protocol.h +++ b/Lib/InverterProtocol/include/inverter_protocol/trace_protocol.h @@ -38,6 +38,10 @@ typedef struct { uint8_t capture_id; uint8_t channel; /* 0..7 fast, 8..31 sparse event/snapshot */ float scale; + /* Channel name. Max 31 chars + NUL: the wire slot is 32 bytes and + * ivp_trace_decode_schema forces [31] = 0, so a full 32-byte + * unterminated name would lose its last character. Encoders must hold a + * NUL within the field (ivp_trace_encode_schema rejects otherwise). */ char name[IVP_TRACE_SCHEMA_NAME_SIZE]; } ivp_trace_schema_frame_t; @@ -64,6 +68,8 @@ bool ivp_trace_decode_data(const uint8_t payload[IVP_TRACE_PAYLOAD_SIZE], ivp_trace_data_frame_t* frame); bool ivp_trace_encode_schema(const ivp_trace_schema_frame_t* frame, uint8_t payload[IVP_TRACE_PAYLOAD_SIZE]); +/* Decodes `payload` into `frame`; `frame->name` is always NUL-terminated + * (a full 32-byte unterminated wire name is truncated to 31 chars). */ bool ivp_trace_decode_schema(const uint8_t payload[IVP_TRACE_PAYLOAD_SIZE], ivp_trace_schema_frame_t* frame); bool ivp_trace_encode_status(const ivp_trace_status_frame_t* frame, diff --git a/Lib/InverterProtocol/src/host/host_client.cpp b/Lib/InverterProtocol/src/host/host_client.cpp index 9747bb8e..e27d5fc5 100644 --- a/Lib/InverterProtocol/src/host/host_client.cpp +++ b/Lib/InverterProtocol/src/host/host_client.cpp @@ -132,7 +132,10 @@ void InverterClient::threadMain(const std::string& port, int baud) { } bytes_in_window += static_cast(n); - stats_.rx_bytes += static_cast(n); + { + std::lock_guard lk(stats_mtx_); + stats_.rx_bytes += static_cast(n); + } ivp_header_t h; const uint8_t* payload = nullptr; @@ -212,22 +215,21 @@ void InverterClient::handleTelemetryData(const uint8_t* payload, uint16_t payloa if (item.type == IVP_VT_F32 && cb_f32_) { cb_f32_(item.id, key, item.v.f32, time_us); - } else if (item.type == IVP_VT_STR && cb_str_) { - std::string value(item.v.str.data, item.v.str.len); - if (key == "print" && cb_console_) { - cb_console_(value); - } else { - cb_str_(item.id, key, value, time_us); - } - } else if (item.type == IVP_VT_STR_FRAG && cb_str_) { - std::string value(item.v.frag.data, item.v.frag.len); - if (key == "print" && cb_console_) { - cb_console_(value); - } else { - cb_str_(item.id, key, value, time_us); + } else if (item.type == IVP_VT_STR || item.type == IVP_VT_STR_FRAG) { + /* STR_FRAG pieces are reassembled per key; only the complete + * message is delivered (as the console line for "print"). */ + std::string message; + if (!str_reasm_.handle(key, item, time_us, message)) continue; + if (key == "print") { + if (cb_console_) cb_console_(message); + } else if (cb_str_) { + cb_str_(item.id, key, message, time_us); } } } + + /* Drop fragment sequences the device stopped mid-message. */ + str_reasm_.expireStale(time_us); } void InverterClient::handleCommandResponse(const uint8_t* payload, uint16_t payload_len) { diff --git a/Lib/InverterProtocol/src/host/uart_transport.cpp b/Lib/InverterProtocol/src/host/uart_transport.cpp index ceb33bf6..4d480fbe 100644 --- a/Lib/InverterProtocol/src/host/uart_transport.cpp +++ b/Lib/InverterProtocol/src/host/uart_transport.cpp @@ -134,11 +134,16 @@ int SerialPort::read(uint8_t* buf, int cap) { if (!isOpen() || !buf || cap <= 0) return 0; #ifdef _WIN32 DWORD got = 0; - if (!ReadFile(impl_->h, buf, static_cast(cap), &got, nullptr)) return 0; + if (!ReadFile(impl_->h, buf, static_cast(cap), &got, nullptr)) return -1; return static_cast(got); #else - int n = static_cast(::read(impl_->fd, buf, static_cast(cap))); - return n > 0 ? n : 0; + const int n = static_cast(::read(impl_->fd, buf, static_cast(cap))); + if (n < 0) { + /* No-data conditions of a non-blocking-ish fd are not errors. */ + if (errno == EAGAIN || errno == EWOULDBLOCK || errno == EINTR) return 0; + return -1; + } + return n; #endif } @@ -219,12 +224,25 @@ int UartTransport::receivePacket(uint8_t* out, size_t cap) { uint8_t raw[RX_RAW_CAP]; int n = port_.read(raw, static_cast(RX_RAW_CAP)); - if (n <= 0) return 0; + if (n < 0) return -1; + if (n == 0) return 0; if (rx_len_ + static_cast(n) > sizeof(rx_buf_)) { - // No delimiter within a whole buffer: garbage stream, resync. + // No delimiter within a whole buffer: garbage stream, resync. The new + // chunk can still hold the end of the garbage plus the start of a + // valid frame, so keep whatever follows its first 0x00 delimiter. rx_len_ = 0; - return -1; + for (int i = 0; i < n; ++i) { + if (raw[i] != 0x00) continue; + const size_t tail = static_cast(n - i - 1); + if (tail > 0) { + std::memcpy(rx_buf_, raw + i + 1, tail); + rx_len_ = tail; + } + break; + } + if (rx_len_ == 0) return -1; + return extractFrame(out, cap); } std::memcpy(rx_buf_ + rx_len_, raw, static_cast(n)); rx_len_ += static_cast(n); diff --git a/Lib/InverterProtocol/src/packet_builder.c b/Lib/InverterProtocol/src/packet_builder.c index dcd6476f..cf7019f3 100644 --- a/Lib/InverterProtocol/src/packet_builder.c +++ b/Lib/InverterProtocol/src/packet_builder.c @@ -25,10 +25,13 @@ ivp_result_t ivp_telemetry_define_begin(ivp_define_builder_t* b, uint8_t* buf, s static ivp_result_t ivp_define_add_common(ivp_define_builder_t* b, uint16_t id, uint8_t type, const char* key, uint8_t key_len) { if (!b) return IVP_ERR_MALFORMED; - if (key_len > IVP_KEY_MAX_LEN) key_len = IVP_KEY_MAX_LEN; + /* Reject rather than truncate: two distinct keys longer than + * IVP_KEY_MAX_LEN would alias to the same wire key. */ + if (key_len > IVP_KEY_MAX_LEN) return IVP_ERR_OVERSIZE; const size_t need = 2u + 1u + 1u + key_len; if (!check_space(b->len, b->cap, need)) return IVP_ERR_BUF_TOO_SMALL; + if (b->count == 0xFFu) return IVP_ERR_OVERSIZE; uint8_t* w = b->buf + b->len; ivp_write_u16le(w, id); w += 2; @@ -74,6 +77,7 @@ ivp_result_t ivp_telemetry_data_add_f32(ivp_data_builder_t* b, uint16_t id, floa if (!b) return IVP_ERR_MALFORMED; const size_t need = 2u + 1u + 4u; if (!check_space(b->len, b->cap, need)) return IVP_ERR_BUF_TOO_SMALL; + if (b->count == 0xFFu) return IVP_ERR_OVERSIZE; uint8_t* w = b->buf + b->len; ivp_write_u16le(w, id); w += 2; @@ -89,10 +93,13 @@ static ivp_result_t ivp_data_add_str_common(ivp_data_builder_t* b, uint16_t id, uint8_t type, uint8_t frag_flags, const char* value, uint8_t len) { if (!b) return IVP_ERR_MALFORMED; - if (len > IVP_STR_MAX_LEN) len = IVP_STR_MAX_LEN; + /* Reject rather than truncate: an unterminated tail would silently + * corrupt the logged string. */ + if (len > IVP_STR_MAX_LEN) return IVP_ERR_OVERSIZE; const size_t need = 2u + 1u + (type == IVP_VT_STR_FRAG ? 1u : 0u) + 1u + len; if (!check_space(b->len, b->cap, need)) return IVP_ERR_BUF_TOO_SMALL; + if (b->count == 0xFFu) return IVP_ERR_OVERSIZE; uint8_t* w = b->buf + b->len; ivp_write_u16le(w, id); w += 2; @@ -144,6 +151,7 @@ static ivp_result_t ivp_command_req_add_arg(ivp_command_req_builder_t* b, if (!b) return IVP_ERR_MALFORMED; const size_t need = 1u + len; if (!check_space(b->len, b->cap, need)) return IVP_ERR_BUF_TOO_SMALL; + if (b->count == 0xFFu) return IVP_ERR_OVERSIZE; uint8_t* w = b->buf + b->len; *w++ = type; @@ -178,10 +186,11 @@ ivp_result_t ivp_command_req_add_f32(ivp_command_req_builder_t* b, float v) { ivp_result_t ivp_command_req_add_str(ivp_command_req_builder_t* b, const char* s, uint8_t len) { if (!b) return IVP_ERR_MALFORMED; - if (len > IVP_STR_MAX_LEN) len = IVP_STR_MAX_LEN; + if (len > IVP_STR_MAX_LEN) return IVP_ERR_OVERSIZE; const size_t need = 1u + 1u + len; if (!check_space(b->len, b->cap, need)) return IVP_ERR_BUF_TOO_SMALL; + if (b->count == 0xFFu) return IVP_ERR_OVERSIZE; uint8_t* w = b->buf + b->len; *w++ = IVP_ARG_STR; @@ -216,6 +225,7 @@ static ivp_result_t ivp_command_rsp_add_result(ivp_command_rsp_builder_t* b, if (!b) return IVP_ERR_MALFORMED; const size_t need = 1u + len; if (!check_space(b->len, b->cap, need)) return IVP_ERR_BUF_TOO_SMALL; + if (b->count == 0xFFu) return IVP_ERR_OVERSIZE; uint8_t* w = b->buf + b->len; *w++ = type; @@ -250,10 +260,11 @@ ivp_result_t ivp_command_rsp_add_f32(ivp_command_rsp_builder_t* b, float v) { ivp_result_t ivp_command_rsp_add_str(ivp_command_rsp_builder_t* b, const char* s, uint8_t len) { if (!b) return IVP_ERR_MALFORMED; - if (len > IVP_STR_MAX_LEN) len = IVP_STR_MAX_LEN; + if (len > IVP_STR_MAX_LEN) return IVP_ERR_OVERSIZE; const size_t need = 1u + 1u + len; if (!check_space(b->len, b->cap, need)) return IVP_ERR_BUF_TOO_SMALL; + if (b->count == 0xFFu) return IVP_ERR_OVERSIZE; uint8_t* w = b->buf + b->len; *w++ = IVP_ARG_STR; @@ -272,21 +283,21 @@ ivp_result_t ivp_packet_encode(uint8_t msg_type, uint32_t seq, uint32_t time_us, const uint8_t* payload, uint16_t payload_len, uint8_t* out, size_t out_cap, size_t* out_len) { if (!out) return IVP_ERR_MALFORMED; + if (payload_len > 0 && !payload) return IVP_ERR_MALFORMED; const size_t need = ivp_packet_size(payload_len); if (out_cap < need) return IVP_ERR_BUF_TOO_SMALL; - ivp_header_t h; - h.magic = IVP_MAGIC; - h.version = IVP_VERSION; - h.msg_type = msg_type; - h.payload_len = payload_len; - h.seq = seq; - h.time_us = time_us; - + /* Serialize the header field-by-field with the LE helpers: a struct + * memcpy would bake in the host byte order. The static_assert in + * protocol.h pins the wire size. */ uint8_t* w = out; - memcpy(w, &h, IVP_HEADER_SIZE); - w += IVP_HEADER_SIZE; + ivp_write_u32le(w, IVP_MAGIC); w += 4; + *w++ = IVP_VERSION; + *w++ = msg_type; + ivp_write_u16le(w, payload_len); w += 2; + ivp_write_u32le(w, seq); w += 4; + ivp_write_u32le(w, time_us); w += 4; if (payload_len) { memcpy(w, payload, payload_len); diff --git a/Lib/InverterProtocol/src/packet_parser.c b/Lib/InverterProtocol/src/packet_parser.c index 2a21cd33..9e83537b 100644 --- a/Lib/InverterProtocol/src/packet_parser.c +++ b/Lib/InverterProtocol/src/packet_parser.c @@ -54,6 +54,10 @@ bool ivp_telemetry_define_iter_next(ivp_define_iter_t* it, *type = *it->pos++; *key_len = *it->pos++; + /* Reject types outside ivp_value_type_t, matching the DATA walker. */ + if (*type != IVP_VT_F32 && *type != IVP_VT_STR && *type != IVP_VT_STR_FRAG) + return false; + if ((size_t)(end - it->pos) < *key_len) return false; *key = (const char*)it->pos; it->pos += *key_len; diff --git a/Lib/InverterProtocol/src/trace_protocol.c b/Lib/InverterProtocol/src/trace_protocol.c index 2dfcd17b..c3ca1571 100644 --- a/Lib/InverterProtocol/src/trace_protocol.c +++ b/Lib/InverterProtocol/src/trace_protocol.c @@ -96,6 +96,10 @@ bool ivp_trace_decode_data(const uint8_t payload[IVP_TRACE_PAYLOAD_SIZE], ivp_tr bool ivp_trace_encode_schema(const ivp_trace_schema_frame_t* frame, uint8_t payload[IVP_TRACE_PAYLOAD_SIZE]) { if (frame == NULL || frame->channel >= IVP_TRACE_MAX_CHANNELS || !begin_encode(IVP_TRACE_FRAME_SCHEMA, payload)) return false; + /* The name field is 32 bytes on the wire and the decoder forces a NUL + * terminator, so names longer than 31 chars would lose their last byte. + * Refuse them at encode time instead of silently truncating. */ + if (memchr(frame->name, '\0', IVP_TRACE_SCHEMA_NAME_SIZE) == NULL) return false; payload[3] = frame->capture_id; payload[4] = frame->channel; put_f32(payload + 8, frame->scale); diff --git a/Lib/InverterProtocol/tests/test_protocol.cpp b/Lib/InverterProtocol/tests/test_protocol.cpp index bd1289d8..6f8e1ec1 100644 --- a/Lib/InverterProtocol/tests/test_protocol.cpp +++ b/Lib/InverterProtocol/tests/test_protocol.cpp @@ -466,6 +466,75 @@ TEST(UartTransport, SplitFrameCompletes) { EXPECT_EQ(std::memcmp(out, p1.data(), p1.size()), 0); } +// When rx_buf_ overflows on a chunk with no delimiter at all, the transport +// resyncs: -1 once, then the next valid frame comes through intact. +TEST(UartTransport, RxOverflowDropsDelimiterlessGarbage) { + Pty pty; + ASSERT_TRUE(OpenPty(pty)); + + ivp::UartTransport transport; + ASSERT_TRUE(transport.open(pty.slaveName)); + + uint8_t out[ivp::UartTransport::RX_FRAME_CAP]; + + // Fill the accumulation buffer (RX_FRAME_CAP * 2 = 8192) with + // delimiter-less garbage, one RX_RAW_CAP-sized chunk at a time. + const std::vector chunk(ivp::UartTransport::RX_RAW_CAP, 0xAA); + for (int i = 0; i < 16; ++i) { + WriteAll(pty.master, chunk); + EXPECT_EQ(transport.receivePacket(out, sizeof(out)), 0); + } + // Mop up in case a fill read came back short. + transport.receivePacket(out, sizeof(out)); + transport.receivePacket(out, sizeof(out)); + + // This chunk has no delimiter and overflows the buffer: resync. + WriteAll(pty.master, chunk); + EXPECT_EQ(transport.receivePacket(out, sizeof(out)), -1); + + // The link recovers on the next frame. + const auto p1 = MakePacket(21); + std::vector stream; + AppendFramed(stream, p1); + WriteAll(pty.master, stream); + const int n = transport.receivePacket(out, sizeof(out)); + ASSERT_EQ(n, static_cast(p1.size())); + EXPECT_EQ(std::memcmp(out, p1.data(), p1.size()), 0); +} + +// Overflow triggered by a chunk that contains a delimiter must keep the bytes +// after it: a valid frame starting inside the triggering chunk survives. +TEST(UartTransport, RxOverflowKeepsBytesAfterDelimiter) { + Pty pty; + ASSERT_TRUE(OpenPty(pty)); + + ivp::UartTransport transport; + ASSERT_TRUE(transport.open(pty.slaveName)); + + uint8_t out[ivp::UartTransport::RX_FRAME_CAP]; + + // Fill the buffer completely with delimiter-less garbage. + const std::vector chunk(ivp::UartTransport::RX_RAW_CAP, 0xAA); + for (int i = 0; i < 16; ++i) { + WriteAll(pty.master, chunk); + EXPECT_EQ(transport.receivePacket(out, sizeof(out)), 0); + } + transport.receivePacket(out, sizeof(out)); + transport.receivePacket(out, sizeof(out)); + + // This chunk overflows the buffer; its first 0x00 ends the garbage and the + // good frame begins right after it. + const auto p1 = MakePacket(22); + std::vector tail(100, 0xAA); + tail.push_back(0x00); + AppendFramed(tail, p1); + WriteAll(pty.master, tail); + + const int n = transport.receivePacket(out, sizeof(out)); + ASSERT_EQ(n, static_cast(p1.size())); + EXPECT_EQ(std::memcmp(out, p1.data(), p1.size()), 0); +} + #endif // _WIN32 /* ======================================================================== @@ -506,3 +575,261 @@ TEST(SessionMessages, OutOfRangeTypeRejected) { EXPECT_EQ(ivp_packet_parse(packet, len, &h, &payload, &payload_len), IVP_ERR_BAD_MSG_TYPE); } + +/* ======================================================================== + * Wire-header layout tests (field-by-field LE encode) + * ======================================================================== */ +TEST(PacketEncode, HeaderIsLittleEndianByField) { + const uint8_t payload[] = {0x01}; + uint8_t packet[64]; + size_t len = 0; + ASSERT_EQ(ivp_packet_encode(IVP_MSG_TELEMETRY_DEFINE, 0x0A0B0C0D, 0x01020304, + payload, sizeof(payload), + packet, sizeof(packet), &len), + IVP_OK); + ASSERT_EQ(len, IVP_HEADER_SIZE + sizeof(payload) + 2u); + + /* magic "TLM1" (0x544C4D31) little-endian first. */ + EXPECT_EQ(packet[0], 0x31); + EXPECT_EQ(packet[1], 0x4D); + EXPECT_EQ(packet[2], 0x4C); + EXPECT_EQ(packet[3], 0x54); + EXPECT_EQ(packet[4], IVP_VERSION); + EXPECT_EQ(packet[5], IVP_MSG_TELEMETRY_DEFINE); + EXPECT_EQ(packet[6], 0x01); /* payload_len lo */ + EXPECT_EQ(packet[7], 0x00); /* payload_len hi */ + EXPECT_EQ(packet[8], 0x0D); /* seq LE */ + EXPECT_EQ(packet[9], 0x0C); + EXPECT_EQ(packet[10], 0x0B); + EXPECT_EQ(packet[11], 0x0A); + EXPECT_EQ(packet[12], 0x04); /* time_us LE */ + EXPECT_EQ(packet[13], 0x03); + EXPECT_EQ(packet[14], 0x02); + EXPECT_EQ(packet[15], 0x01); +} + +/* ======================================================================== + * Builder limit tests: key/string oversize and 255-item count cap + * ======================================================================== */ +TEST(BuilderLimits, DefineRejectsOversizeKey) { + uint8_t payload[256]; + ivp_define_builder_t b; + ASSERT_EQ(ivp_telemetry_define_begin(&b, payload, sizeof(payload)), IVP_OK); + + /* Exactly at the cap still fits. */ + const std::string ok_key(IVP_KEY_MAX_LEN, 'k'); + EXPECT_EQ(ivp_telemetry_define_add_f32(&b, 1, ok_key.c_str(), IVP_KEY_MAX_LEN), IVP_OK); + + /* Longer keys are refused instead of truncated: two distinct over-long + * keys must never alias to the same wire key. */ + const std::string long_a(IVP_KEY_MAX_LEN + 1u, 'a'); + const std::string long_b(IVP_KEY_MAX_LEN + 1u, 'b'); + const auto over = static_cast(IVP_KEY_MAX_LEN + 1u); + EXPECT_EQ(ivp_telemetry_define_add_f32(&b, 2, long_a.c_str(), over), IVP_ERR_OVERSIZE); + EXPECT_EQ(ivp_telemetry_define_add_str(&b, 3, long_b.c_str(), over), IVP_ERR_OVERSIZE); + EXPECT_EQ(b.count, 1u); /* the failed adds left no partial entries */ +} + +TEST(BuilderLimits, DataRejectsOversizeString) { + uint8_t payload[256]; + ivp_data_builder_t b; + ASSERT_EQ(ivp_telemetry_data_begin(&b, payload, sizeof(payload)), IVP_OK); + + const std::string ok_str(IVP_STR_MAX_LEN, 's'); + EXPECT_EQ(ivp_telemetry_data_add_str(&b, 1, ok_str.c_str(), IVP_STR_MAX_LEN), IVP_OK); + + const std::string long_str(IVP_STR_MAX_LEN + 1u, 'x'); + const auto over = static_cast(IVP_STR_MAX_LEN + 1u); + EXPECT_EQ(ivp_telemetry_data_add_str(&b, 2, long_str.c_str(), over), IVP_ERR_OVERSIZE); + EXPECT_EQ(ivp_telemetry_data_add_str_frag(&b, 3, IVP_SF_COMPLETE, + long_str.c_str(), over), + IVP_ERR_OVERSIZE); + EXPECT_EQ(b.count, 1u); +} + +TEST(BuilderLimits, CommandRejectsOversizeString) { + uint8_t payload[128]; + ivp_command_req_builder_t req; + ASSERT_EQ(ivp_command_req_begin(&req, payload, sizeof(payload), 0x10, 0x01), IVP_OK); + EXPECT_EQ(ivp_command_req_add_str(&req, "x", IVP_STR_MAX_LEN), IVP_OK); + EXPECT_EQ(ivp_command_req_add_str(&req, "x", IVP_STR_MAX_LEN + 1u), IVP_ERR_OVERSIZE); + EXPECT_EQ(req.count, 1u); + + ivp_command_rsp_builder_t rsp; + ASSERT_EQ(ivp_command_rsp_begin(&rsp, payload, sizeof(payload), 0x01, 0x00), IVP_OK); + EXPECT_EQ(ivp_command_rsp_add_str(&rsp, "x", IVP_STR_MAX_LEN), IVP_OK); + EXPECT_EQ(ivp_command_rsp_add_str(&rsp, "x", IVP_STR_MAX_LEN + 1u), IVP_ERR_OVERSIZE); + EXPECT_EQ(rsp.count, 1u); +} + +TEST(BuilderLimits, DefineCountStopsAt255) { + /* Worst case per entry: id(2) type(1) len(1) + 1-char key. */ + std::vector payload(1u + 256u * 5u); + ivp_define_builder_t b; + ASSERT_EQ(ivp_telemetry_define_begin(&b, payload.data(), payload.size()), IVP_OK); + for (uint32_t i = 0; i < 255u; ++i) { + ASSERT_EQ(ivp_telemetry_define_add_f32(&b, static_cast(i + 1), "k", 1), + IVP_OK) << "i=" << i; + } + EXPECT_EQ(b.count, 255u); + EXPECT_EQ(payload[0], 255u); + /* The 256th item must fail cleanly, not wrap the count byte to 0. */ + EXPECT_EQ(ivp_telemetry_define_add_f32(&b, 256, "k", 1), IVP_ERR_OVERSIZE); + EXPECT_EQ(b.count, 255u); + EXPECT_EQ(payload[0], 255u); +} + +TEST(BuilderLimits, DataCountStopsAt255) { + std::vector payload(1u + 256u * 7u); + ivp_data_builder_t b; + ASSERT_EQ(ivp_telemetry_data_begin(&b, payload.data(), payload.size()), IVP_OK); + for (uint32_t i = 0; i < 255u; ++i) { + ASSERT_EQ(ivp_telemetry_data_add_f32(&b, static_cast(i + 1), 0.0f), + IVP_OK) << "i=" << i; + } + EXPECT_EQ(payload[0], 255u); + EXPECT_EQ(ivp_telemetry_data_add_f32(&b, 256, 0.0f), IVP_ERR_OVERSIZE); + EXPECT_EQ(payload[0], 255u); +} + +TEST(BuilderLimits, CommandCountStopsAt255) { + std::vector payload(3u + 256u * 2u); + ivp_command_req_builder_t req; + ASSERT_EQ(ivp_command_req_begin(&req, payload.data(), payload.size(), 0x10, 0x01), IVP_OK); + for (uint32_t i = 0; i < 255u; ++i) { + ASSERT_EQ(ivp_command_req_add_u8(&req, 0), IVP_OK) << "i=" << i; + } + EXPECT_EQ(payload[2], 255u); + EXPECT_EQ(ivp_command_req_add_u8(&req, 0), IVP_ERR_OVERSIZE); + EXPECT_EQ(payload[2], 255u); + + ivp_command_rsp_builder_t rsp; + ASSERT_EQ(ivp_command_rsp_begin(&rsp, payload.data(), payload.size(), 0x01, 0x00), IVP_OK); + for (uint32_t i = 0; i < 255u; ++i) { + ASSERT_EQ(ivp_command_rsp_add_u8(&rsp, 0), IVP_OK) << "i=" << i; + } + EXPECT_EQ(payload[2], 255u); + EXPECT_EQ(ivp_command_rsp_add_u8(&rsp, 0), IVP_ERR_OVERSIZE); + EXPECT_EQ(payload[2], 255u); +} + +/* ======================================================================== + * DEFINE payload walker: value-type validation (matches the DATA walker) + * ======================================================================== */ +TEST(DefinePayload, RejectsUnknownValueType) { + uint8_t payload[128]; + ivp_define_builder_t b; + ASSERT_EQ(ivp_telemetry_define_begin(&b, payload, sizeof(payload)), IVP_OK); + ASSERT_EQ(ivp_telemetry_define_add_f32(&b, 0x0001, "v_bus", 5), IVP_OK); + ASSERT_EQ(ivp_telemetry_define_add_f32(&b, 0x0002, "i_u", 3), IVP_OK); + payload[3] = 0x7F; /* corrupt first entry's type byte (non-enum) */ + + ivp_define_iter_t it; + ASSERT_EQ(ivp_telemetry_define_iter_init(payload, static_cast(b.len), &it), IVP_OK); + uint16_t id; + uint8_t type; + const char* key; + uint8_t key_len; + EXPECT_FALSE(ivp_telemetry_define_iter_next(&it, &id, &type, &key, &key_len)); +} + +TEST(DefinePayload, AcceptsAllDefinedValueTypes) { + uint8_t payload[128]; + ivp_define_builder_t b; + ASSERT_EQ(ivp_telemetry_define_begin(&b, payload, sizeof(payload)), IVP_OK); + ASSERT_EQ(ivp_telemetry_define_add_f32(&b, 1, "f", 1), IVP_OK); + ASSERT_EQ(ivp_telemetry_define_add_str(&b, 2, "s", 1), IVP_OK); + + ivp_define_iter_t it; + ASSERT_EQ(ivp_telemetry_define_iter_init(payload, static_cast(b.len), &it), IVP_OK); + uint16_t id; + uint8_t type; + const char* key; + uint8_t key_len; + ASSERT_TRUE(ivp_telemetry_define_iter_next(&it, &id, &type, &key, &key_len)); + EXPECT_EQ(type, IVP_VT_F32); + ASSERT_TRUE(ivp_telemetry_define_iter_next(&it, &id, &type, &key, &key_len)); + EXPECT_EQ(type, IVP_VT_STR); + EXPECT_FALSE(ivp_telemetry_define_iter_next(&it, &id, &type, &key, &key_len)); +} + +/* ======================================================================== + * StringFragmentReassembler tests (host-side STR_FRAG assembly) + * ======================================================================== */ +#include "inverter_protocol/host/str_reassembly.h" + +namespace { + +ivp_data_item_t MakeStrItem(const char* data, uint8_t len) { + ivp_data_item_t item{}; + item.id = 0x8001; + item.type = IVP_VT_STR; + item.v.str.data = data; + item.v.str.len = len; + return item; +} + +ivp_data_item_t MakeFragItem(uint8_t frag, const char* data, uint8_t len) { + ivp_data_item_t item{}; + item.id = 0x8001; + item.type = IVP_VT_STR_FRAG; + item.v.frag.frag = frag; + item.v.frag.data = data; + item.v.frag.len = len; + return item; +} + +} // namespace + +TEST(StringReassembly, StartEndDeliversCompleteMessage) { + ivp::StringFragmentReassembler r; + std::string out; + EXPECT_FALSE(r.handle("print", MakeFragItem(IVP_SF_START, "abc", 3), 1000, out)); + EXPECT_FALSE(r.handle("print", MakeFragItem(0, "def", 3), 2000, out)); + ASSERT_TRUE(r.handle("print", MakeFragItem(IVP_SF_END, "ghi", 3), 3000, out)); + EXPECT_EQ(out, "abcdefghi"); + EXPECT_EQ(r.partialCount(), 0u); +} + +TEST(StringReassembly, SingleFrameCompleteFragment) { + ivp::StringFragmentReassembler r; + std::string out; + ASSERT_TRUE(r.handle("print", MakeFragItem(IVP_SF_COMPLETE, "whole", 5), 1000, out)); + EXPECT_EQ(out, "whole"); + EXPECT_EQ(r.partialCount(), 0u); +} + +TEST(StringReassembly, NewStartDiscardsPreviousPartial) { + ivp::StringFragmentReassembler r; + std::string out; + EXPECT_FALSE(r.handle("print", MakeFragItem(IVP_SF_START, "old", 3), 1000, out)); + EXPECT_FALSE(r.handle("print", MakeFragItem(IVP_SF_START, "new", 3), 2000, out)); + ASSERT_TRUE(r.handle("print", MakeFragItem(IVP_SF_END, "!", 1), 3000, out)); + EXPECT_EQ(out, "new!"); +} + +TEST(StringReassembly, PlainStrSupersedesPartial) { + ivp::StringFragmentReassembler r; + std::string out; + EXPECT_FALSE(r.handle("print", MakeFragItem(IVP_SF_START, "part", 4), 1000, out)); + ASSERT_TRUE(r.handle("print", MakeStrItem("full", 4), 2000, out)); + EXPECT_EQ(out, "full"); + EXPECT_EQ(r.partialCount(), 0u); +} + +TEST(StringReassembly, StalePartialExpires) { + ivp::StringFragmentReassembler r; + std::string out; + EXPECT_FALSE(r.handle("print", MakeFragItem(IVP_SF_START, "abc", 3), 1000000, out)); + EXPECT_EQ(r.partialCount(), 1u); + + r.expireStale(1000000 + ivp::StringFragmentReassembler::kStaleUs); /* not yet stale */ + EXPECT_EQ(r.partialCount(), 1u); + + r.expireStale(1000000 + ivp::StringFragmentReassembler::kStaleUs + 1u); + EXPECT_EQ(r.partialCount(), 0u); + + /* After expiry an END delivers only what arrived since. */ + ASSERT_TRUE(r.handle("print", MakeFragItem(IVP_SF_END, "tail", 4), 4000000, out)); + EXPECT_EQ(out, "tail"); +} diff --git a/Lib/InverterProtocol/tests/test_trace_protocol.cpp b/Lib/InverterProtocol/tests/test_trace_protocol.cpp index 5a2420fd..84740ba3 100644 --- a/Lib/InverterProtocol/tests/test_trace_protocol.cpp +++ b/Lib/InverterProtocol/tests/test_trace_protocol.cpp @@ -63,3 +63,45 @@ TEST(TraceProtocol, RejectsWrongMagicVersionAndChannel) { schema.channel = IVP_TRACE_MAX_CHANNELS; EXPECT_FALSE(ivp_trace_encode_schema(&schema, payload)); } + +TEST(TraceProtocol, SchemaNameBoundaryAt31Chars) { + /* 31 chars + NUL fills the 32-byte wire slot exactly. */ + ivp_trace_schema_frame_t schema{}; + schema.capture_id = 1; + schema.channel = 2; + schema.scale = 1.0f; + const std::string max_name(IVP_TRACE_SCHEMA_NAME_SIZE - 1, 'n'); + std::strcpy(schema.name, max_name.c_str()); + + uint8_t payload[IVP_TRACE_PAYLOAD_SIZE]{}; + ASSERT_TRUE(ivp_trace_encode_schema(&schema, payload)); + ivp_trace_schema_frame_t decoded{}; + ASSERT_TRUE(ivp_trace_decode_schema(payload, &decoded)); + EXPECT_STREQ(decoded.name, max_name.c_str()); +} + +TEST(TraceProtocol, SchemaEncodeRejectsUnterminatedName) { + /* A name filling all 32 bytes with no NUL would lose its last character + * to the decoder's forced termination; the encoder refuses it. */ + ivp_trace_schema_frame_t schema{}; + schema.channel = 0; + std::memset(schema.name, 'x', IVP_TRACE_SCHEMA_NAME_SIZE); + + uint8_t payload[IVP_TRACE_PAYLOAD_SIZE]{}; + EXPECT_FALSE(ivp_trace_encode_schema(&schema, payload)); +} + +TEST(TraceProtocol, SchemaDecodeTruncatesFullUnterminatedName) { + /* Defense in depth: even a hand-crafted full 32-byte name on the wire + * decodes as 31 chars + NUL (documented truncation). */ + uint8_t payload[IVP_TRACE_PAYLOAD_SIZE]{}; + payload[0] = IVP_TRACE_MAGIC; + payload[1] = IVP_TRACE_VERSION; + payload[2] = IVP_TRACE_FRAME_SCHEMA; + std::memset(payload + 12, 'y', IVP_TRACE_SCHEMA_NAME_SIZE); + + ivp_trace_schema_frame_t decoded{}; + ASSERT_TRUE(ivp_trace_decode_schema(payload, &decoded)); + std::string expected(IVP_TRACE_SCHEMA_NAME_SIZE - 1, 'y'); + EXPECT_STREQ(decoded.name, expected.c_str()); +} diff --git a/Lib/NodeAPI/README.md b/Lib/NodeAPI/README.md index 92af01f0..98ce55f4 100644 --- a/Lib/NodeAPI/README.md +++ b/Lib/NodeAPI/README.md @@ -175,7 +175,7 @@ if (!result.ok) { for (const auto& error : result.errors) { // "node 'x' has no timing domain assigned" // "connection 'c1' connects domain 'adc_sample' to domain 'app_loop'; ..." - // "graph contains a directed cycle involving nodes: a b c" + // "graph contains an algebraic cycle of plain connections involving nodes: a b c; ..." } } ``` @@ -185,7 +185,7 @@ Rules: - Connections may only connect nodes in the same domain. - Bridges may only connect nodes in different domains (use a `Connection` for same-domain links). - Entry-point node types (`isEntryPoint = true`) may not have any incoming connections or bridges. -- The graph must be a DAG (no directed cycles); bridges participate in cycle detection. +- Plain connections must not form a cycle (an algebraic, within-step loop). A cycle that passes through a bridge is legal: a bridge is a unit delay — the producer's value is stored during its own domain's step and read by the consumer in a later step — so bridge-mediated cycles are the supported way to close a feedback loop across domains. `NodeType::maxInstances` limits how many instances of a type can be added to the graph (`0` = unlimited). diff --git a/Lib/NodeAPI/include/NodeAPI/Serialization.h b/Lib/NodeAPI/include/NodeAPI/Serialization.h index fdd9898c..263e8e32 100644 --- a/Lib/NodeAPI/include/NodeAPI/Serialization.h +++ b/Lib/NodeAPI/include/NodeAPI/Serialization.h @@ -38,7 +38,11 @@ std::string SaveToJson(const Graph& graph); Graph LoadFromJson(std::string_view jsonText); // Populate an existing Graph from JSON. Useful when templates have already been -// loaded into the graph before the instance graph is parsed. +// loaded into the graph before the instance graph is parsed (a node type whose +// id is already known keeps the pre-loaded definition). +// Throws std::runtime_error naming every JSON item that could not be added +// (unknown node types, bad wire endpoints/type mismatches, double-wired +// inputs, invalid bridges). void LoadIntoGraph(Graph& graph, std::string_view jsonText); // Parse a single NodeType from its JSON representation. Throws on invalid input. diff --git a/Lib/NodeAPI/include/NodeAPI/Timing.h b/Lib/NodeAPI/include/NodeAPI/Timing.h index e50c83fc..7c30f02b 100644 --- a/Lib/NodeAPI/include/NodeAPI/Timing.h +++ b/Lib/NodeAPI/include/NodeAPI/Timing.h @@ -21,7 +21,12 @@ struct ValidationResult { // // Every node carries a `domain` string (e.g. "isr_pwm", "adc_sample", // "app_loop"). This validator enforces three rules: -// 1. The graph is a DAG — cycles are reported as errors. +// 1. Plain connections must not form an algebraic (within-step) cycle. +// A bridge breaks a cycle legally: it is the model's unit-delay +// primitive for cross-domain dataflow — the producer's value is stored +// during its own domain's step and read by the consumer in a later +// step of the consumer's domain, so a loop closed through a bridge is +// sampled-time feedback, not an algebraic loop. // 2. Connections may only exist between nodes in the same timing domain. // 3. Bridges may only connect nodes in different timing domains. // diff --git a/Lib/NodeAPI/src/Graph.cpp b/Lib/NodeAPI/src/Graph.cpp index 20a72dc4..f95924c5 100644 --- a/Lib/NodeAPI/src/Graph.cpp +++ b/Lib/NodeAPI/src/Graph.cpp @@ -157,6 +157,10 @@ std::map Graph::ComputeExcludedNodes() const { } // Producer -> consumers adjacency across connections and bridges. + // Exclusion follows data provenance rather than schedule order, so it + // deliberately crosses bridges: a bridge consumer still reads the + // producer's value (one domain step later), unlike cycle detection where + // a bridge is a unit delay that breaks the dependency. std::unordered_map> children; for (const auto& connection : connections_) { children[connection.from.nodeId].push_back(connection.to.nodeId); @@ -193,6 +197,10 @@ bool Graph::Connect(Connection connection) { if (!EndpointExists(connection.from, PortDirection::Output)) return false; if (!EndpointExists(connection.to, PortDirection::Input)) return false; if (!TypeCheck(connection)) return false; + /* An input port accepts exactly one wire: the bridge check below covers + * the cross-domain case; without this check a second wire would be + * accepted here and codegen would silently bind only the first. */ + if (ConsumerHasConnection(connection.to)) return false; if (ConsumerHasBridge(connection.to)) return false; connections_.push_back(std::move(connection)); return true; diff --git a/Lib/NodeAPI/src/NodeTemplates.cpp b/Lib/NodeAPI/src/NodeTemplates.cpp index 04c7abdc..fab3e4f9 100644 --- a/Lib/NodeAPI/src/NodeTemplates.cpp +++ b/Lib/NodeAPI/src/NodeTemplates.cpp @@ -22,14 +22,31 @@ std::optional ReadFile(const std::filesystem::path& path) { return contents; } -// Read a code block file if it exists. Returns empty string on missing file. +// Read a code block file if it exists, normalizing CRLF/CR to LF so template +// code behaves identically on Windows checkouts. Returns "" on missing file. std::string ReadCodeBlock(const std::filesystem::path& dir, const std::string& filename) { const auto path = dir / filename; if (!std::filesystem::is_regular_file(path)) { return ""; } auto text = ReadFile(path); - return text ? *text : ""; + if (!text) { + return ""; + } + std::string normalized; + normalized.reserve(text->size()); + for (size_t i = 0; i < text->size(); ++i) { + const char c = (*text)[i]; + if (c == '\r') { + normalized += '\n'; + if (i + 1 < text->size() && (*text)[i + 1] == '\n') { + ++i; + } + } else { + normalized += c; + } + } + return normalized; } bool LoadFolderTemplate(Graph& graph, @@ -80,11 +97,18 @@ bool LoadFolderTemplate(Graph& graph, return false; } - // Load optional code block files from the same folder. - nodeType.classHeader = ReadCodeBlock(dir, "class_header.h"); - nodeType.classDefinition = ReadCodeBlock(dir, "class_definition.cpp"); - nodeType.constructorCode = ReadCodeBlock(dir, "constructor.cpp"); - nodeType.inlineCode = ReadCodeBlock(dir, "inline.cpp"); + // Load optional code block files from the same folder. A sibling file + // overrides the value embedded in node.json; when the file is missing the + // embedded value is kept (the file being absent must not erase it). + const auto overrideFromFile = [&dir](const char* filename, std::string& target) { + if (std::filesystem::is_regular_file(dir / filename)) { + target = ReadCodeBlock(dir, filename); + } + }; + overrideFromFile("class_header.h", nodeType.classHeader); + overrideFromFile("class_definition.cpp", nodeType.classDefinition); + overrideFromFile("constructor.cpp", nodeType.constructorCode); + overrideFromFile("inline.cpp", nodeType.inlineCode); if (!graph.AddNodeType(nodeType)) { result.ok = false; diff --git a/Lib/NodeAPI/src/Serialization.cpp b/Lib/NodeAPI/src/Serialization.cpp index 80ef8972..f2dd9b4c 100644 --- a/Lib/NodeAPI/src/Serialization.cpp +++ b/Lib/NodeAPI/src/Serialization.cpp @@ -2,6 +2,9 @@ #include +#include +#include + namespace NodeAPI { using json = nlohmann::json; @@ -301,19 +304,65 @@ void LoadIntoGraph(Graph& graph, std::string_view jsonText) { graph.SetName(j.value("name", graph.GetName())); + /* Every item that fails to attach to the graph is collected with its JSON + * id and reported in one loud error at the end. Silently dropping an + * invalid node, wire, or bridge here used to surface much later as a + * misleading codegen error (e.g. "input port not connected"). */ + std::vector errors; + for (const auto& item : j.at("nodeTypes")) { - graph.AddNodeType(NodeTypeFromJson(item)); + NodeType nodeType = NodeTypeFromJson(item); + /* Node types are commonly pre-loaded from a template directory before + * the graph JSON is parsed; an already-known id is an intentional + * overlay (the graph embeds its own copy), not an error. */ + if (graph.FindNodeType(nodeType.id).has_value()) continue; + const std::string id = nodeType.id; + if (!graph.AddNodeType(std::move(nodeType))) { + errors.push_back("node type '" + id + "' could not be added" + " (empty id?)"); + } } for (const auto& item : j.at("nodes")) { - graph.AddNode(NodeFromJson(item)); + Node node = NodeFromJson(item); + const std::string id = node.id; + const std::string type = node.type; + if (!graph.AddNode(std::move(node))) { + errors.push_back("node '" + id + "' could not be added" + " (duplicate id, unknown type '" + type + + "', or maxInstances reached)"); + } } for (const auto& item : j.at("connections")) { - graph.Connect(ConnectionFromJson(item)); + Connection connection = ConnectionFromJson(item); + if (!graph.Connect(connection)) { + errors.push_back("connection '" + connection.id + "' (" + + connection.from.nodeId + "." + connection.from.portName + + " -> " + connection.to.nodeId + "." + connection.to.portName + + ") is invalid: check that both endpoints exist with the right" + " direction, that the wire types match, and that the input" + " has no other wire or bridge"); + } } if (j.contains("bridges")) { for (const auto& item : j.at("bridges")) { - graph.AddBridge(BridgeFromJson(item)); + Bridge bridge = BridgeFromJson(item); + if (!graph.AddBridge(bridge)) { + errors.push_back("bridge '" + bridge.id + "' (" + + bridge.producer.nodeId + "." + bridge.producer.portName + + " -> " + bridge.consumer.nodeId + "." + bridge.consumer.portName + + ") is invalid: check that both endpoints exist with the right" + " direction, that the bridge type matches, and that the input" + " has no other wire or bridge"); + } + } + } + + if (!errors.empty()) { + std::string message = "graph load failed:"; + for (const auto& error : errors) { + message += "\n - " + error; } + throw std::runtime_error(message); } } diff --git a/Lib/NodeAPI/src/Timing.cpp b/Lib/NodeAPI/src/Timing.cpp index eefde0e8..b381971d 100644 --- a/Lib/NodeAPI/src/Timing.cpp +++ b/Lib/NodeAPI/src/Timing.cpp @@ -88,6 +88,10 @@ ValidationResult Validator::CheckEntryPoints(const Graph& graph) const { for (const auto& connection : graph.GetConnections()) { ++inDegree[connection.to.nodeId]; } + // Bridges count here even though CheckCycles excludes them: an entry + // point is the externally-triggered root of its domain and must have no + // inbound dataflow at all — immediate (connection) or one-step-delayed + // (bridge) alike. for (const auto& bridge : graph.GetBridges()) { ++inDegree[bridge.consumer.nodeId]; } @@ -98,7 +102,7 @@ ValidationResult Validator::CheckEntryPoints(const Graph& graph) const { if (nodeType->isEntryPoint && inDegree[node.id] > 0) { result.AddError("entry-point node '" + node.id + "' (type '" + node.type + - "') has incoming connections; entry points must be roots of their timing domain"); + "') has incoming connections or bridges; entry points must be roots of their timing domain"); } } @@ -115,14 +119,18 @@ ValidationResult Validator::CheckCycles(const Graph& graph) const { inDegree[node.id] = 0; } + // Build the ordering graph from plain connections only. Bridges are the + // model's unit-delay primitive for cross-domain dataflow: the producer's + // value is stored (under a critical section) during the producer domain's + // step and read by the consumer in a later step of its own domain, so a + // bridge never creates a within-step (algebraic) dependency. A directed + // cycle that passes through a bridge is therefore legal sampled-time + // feedback — which is also why codegen's per-domain topological sort + // builds its ordering graph from connections only. for (const auto& connection : graph.GetConnections()) { adjacency[connection.from.nodeId].push_back(connection.to.nodeId); ++inDegree[connection.to.nodeId]; } - for (const auto& bridge : graph.GetBridges()) { - adjacency[bridge.producer.nodeId].push_back(bridge.consumer.nodeId); - ++inDegree[bridge.consumer.nodeId]; - } std::queue queue; for (const auto& [id, degree] : inDegree) { @@ -150,8 +158,10 @@ ValidationResult Validator::CheckCycles(const Graph& graph) const { std::sort(cycleNodes.begin(), cycleNodes.end()); std::ostringstream message; - message << "graph contains a directed cycle involving nodes:"; + message << "graph contains an algebraic cycle of plain connections involving nodes:"; for (const auto& id : cycleNodes) message << " " << id; + message << "; if this is intended feedback, break the loop with a " + "cross-domain bridge (a unit delay)"; result.AddError(message.str()); } diff --git a/Lib/NodeAPI/tests/test_nodeapi.cpp b/Lib/NodeAPI/tests/test_nodeapi.cpp index ffa01b2f..d6ad1828 100644 --- a/Lib/NodeAPI/tests/test_nodeapi.cpp +++ b/Lib/NodeAPI/tests/test_nodeapi.cpp @@ -100,6 +100,23 @@ Graph MakeDemoGraph() { return graph; } +#ifdef NODEAPI_BUILD_TIMING +// Timing-validator fixtures: the Validator only exists when NodeAPI is built +// with NODEAPI_BUILD_TIMING (test_timing.cpp is likewise conditional), so +// keep the helper under the same guard to avoid an unused-function warning. +NodeType MakePassThroughType() { + const WireType scalar = WireType{.quantity = Quantity::Dimensionless, + .frame = Frame::Scalar, + .dtype = DType::F32}; + return NodeType{ + .id = "test.passthrough", + .displayName = "Pass", + .inputPorts = {Port{.name = "in", .direction = PortDirection::Input, .type = scalar}}, + .outputPorts = {Port{.name = "out", .direction = PortDirection::Output, .type = scalar}}, + }; +} +#endif + } // namespace TEST(WireType, UnitLabels) { @@ -376,11 +393,12 @@ TEST(Graph, RemoveNodeCleansConnections) { TEST(Graph, TypeCheckMatchingPorts) { Graph graph = MakeDemoGraph(); + graph.AddNode(Node{.id = "sink2", .type = "display.value", .domain = "app_loop"}); Connection c{ .id = "c2", .from = PortRef{.nodeId = "source", .portName = "out"}, - .to = PortRef{.nodeId = "sink", .portName = "in"}, + .to = PortRef{.nodeId = "sink2", .portName = "in"}, }; EXPECT_TRUE(graph.TypeCheck(c)); @@ -752,3 +770,279 @@ TEST(Serialization, BridgeRoundTrip) { EXPECT_EQ(bridge->consumer.nodeId, "sink"); EXPECT_EQ(bridge->type, scalar); } + +TEST(Graph, RejectSecondWireToSameInput) { + // An input port accepts exactly one wire; previously the second Connect + // silently succeeded and codegen bound only the first wire. + Graph graph; + graph.AddNodeType(MakeValueType()); + graph.AddNodeType(MakeDisplayType()); + graph.AddNode(Node{.id = "source_a", .type = "constant.value", .domain = "app_loop"}); + graph.AddNode(Node{.id = "source_b", .type = "constant.value", .domain = "app_loop"}); + graph.AddNode(Node{.id = "sink", .type = "display.value", .domain = "app_loop"}); + + EXPECT_TRUE(graph.Connect(Connection{ + .id = "c1", + .from = PortRef{.nodeId = "source_a", .portName = "out"}, + .to = PortRef{.nodeId = "sink", .portName = "in"}, + })); + EXPECT_FALSE(graph.Connect(Connection{ + .id = "c2", + .from = PortRef{.nodeId = "source_b", .portName = "out"}, + .to = PortRef{.nodeId = "sink", .portName = "in"}, + })); + EXPECT_EQ(graph.GetConnections().size(), 1u); + + // After disconnecting, a different source may take over the input. + EXPECT_TRUE(graph.Disconnect("c1")); + EXPECT_TRUE(graph.Connect(Connection{ + .id = "c2", + .from = PortRef{.nodeId = "source_b", .portName = "out"}, + .to = PortRef{.nodeId = "sink", .portName = "in"}, + })); +} + +TEST(Serialization, LoadKeepsPreloadedNodeTypes) { + // Templates loaded before the graph JSON keep their definition; the + // graph's embedded copy of the same type id is an intentional overlay + // (SaveToJson embeds all known types), not an error. + Graph graph; + ASSERT_TRUE(graph.AddNodeType(MakeValueType())); // inlineCode "return 0.5f;" + + const std::string json = R"({ + "nodeTypes": [ + {"id": "constant.value", "displayName": "Value", + "inputPorts": [], "outputPorts": [], "inlineCode": "return 1.0f;"} + ], + "nodes": [ + {"id": "n", "type": "constant.value", "domain": "app_loop", + "position": {"x": 0.0, "y": 0.0}} + ], + "connections": [] + })"; + EXPECT_NO_THROW(LoadIntoGraph(graph, json)); + const auto type = graph.FindNodeType("constant.value"); + ASSERT_TRUE(type.has_value()); + EXPECT_EQ(type->inlineCode, "return 0.5f;"); + EXPECT_TRUE(graph.FindNode("n").has_value()); +} + +TEST(Serialization, LoadFailsLoudlyOnInvalidItems) { + // Every invalid item is collected with its id and reported in one throw + // instead of vanishing silently (and confusing codegen later). + const std::string json = R"({ + "nodeTypes": [ + {"id": "constant.value", "displayName": "Value", + "inputPorts": [], + "outputPorts": [{"name": "out", "direction": "output", + "type": {"quantity": "dimensionless", "frame": "scalar", "dtype": "f32"}}]}, + {"id": "display.value", "displayName": "Display", + "inputPorts": [{"name": "in", "direction": "input", + "type": {"quantity": "dimensionless", "frame": "scalar", "dtype": "f32"}}], + "outputPorts": []} + ], + "nodes": [ + {"id": "a", "type": "constant.value", "domain": "app_loop", + "position": {"x": 0.0, "y": 0.0}}, + {"id": "b", "type": "constant.value", "domain": "app_loop", + "position": {"x": 0.0, "y": 0.0}}, + {"id": "sink", "type": "display.value", "domain": "app_loop", + "position": {"x": 0.0, "y": 0.0}}, + {"id": "ghost", "type": "missing.type", "domain": "app_loop", + "position": {"x": 0.0, "y": 0.0}} + ], + "connections": [ + {"id": "c1", "from": {"nodeId": "a", "portName": "out"}, + "to": {"nodeId": "sink", "portName": "in"}}, + {"id": "c2", "from": {"nodeId": "b", "portName": "out"}, + "to": {"nodeId": "sink", "portName": "in"}}, + {"id": "c3", "from": {"nodeId": "a", "portName": "nope"}, + "to": {"nodeId": "sink", "portName": "in"}} + ], + "bridges": [ + {"id": "b1", + "type": {"quantity": "dimensionless", "frame": "scalar", "dtype": "f32"}, + "producer": {"nodeId": "a", "portName": "out"}, + "consumer": {"nodeId": "sink", "portName": "missing_in"}} + ] + })"; + + Graph graph; + try { + LoadIntoGraph(graph, json); + FAIL() << "expected LoadIntoGraph to throw on invalid items"; + } catch (const std::runtime_error& e) { + const std::string message = e.what(); + EXPECT_NE(message.find("'ghost'"), std::string::npos) << message; // unknown type + EXPECT_NE(message.find("missing.type"), std::string::npos) << message; + EXPECT_NE(message.find("'c2'"), std::string::npos) << message; // double-wired input + EXPECT_NE(message.find("'c3'"), std::string::npos) << message; // missing output port + EXPECT_NE(message.find("'b1'"), std::string::npos) << message; // bad bridge endpoint + EXPECT_NE(message.find("missing_in"), std::string::npos) << message; + } + + // The valid items are still in place; nothing was silently discarded. + EXPECT_TRUE(graph.FindNode("sink").has_value()); + EXPECT_TRUE(graph.FindConnection("c1").has_value()); + EXPECT_FALSE(graph.FindConnection("c2").has_value()); +} + +#ifdef NODEAPI_BUILD_TIMING +TEST(Timing, PlainConnectionCycleFails) { + // A -> B -> A of pure same-domain connections is an algebraic cycle and + // must be rejected. + Graph graph; + graph.AddNodeType(MakePassThroughType()); + graph.AddNode(Node{.id = "a", .type = "test.passthrough", .domain = "app_loop"}); + graph.AddNode(Node{.id = "b", .type = "test.passthrough", .domain = "app_loop"}); + graph.Connect(Connection{ + .id = "c1", + .from = PortRef{.nodeId = "a", .portName = "out"}, + .to = PortRef{.nodeId = "b", .portName = "in"}, + }); + graph.Connect(Connection{ + .id = "c2", + .from = PortRef{.nodeId = "b", .portName = "out"}, + .to = PortRef{.nodeId = "a", .portName = "in"}, + }); + + Timing::Validator validator; + const auto result = validator.Validate(graph); + EXPECT_FALSE(result.ok); + EXPECT_EQ(result.errors.size(), 1u); + EXPECT_NE(result.errors[0].find("algebraic cycle of plain connections"), std::string::npos); + EXPECT_NE(result.errors[0].find(" a"), std::string::npos); + EXPECT_NE(result.errors[0].find(" b"), std::string::npos); +} + +TEST(Timing, BridgeMediatedFeedbackLoopPasses) { + // Closing a feedback loop through bridges is sampled-time legal: each + // bridge is a unit delay, so the loop carries no algebraic (within-step) + // constraint. The loop needs two bridges — connections must stay inside + // one domain while bridges must cross domains, so domain switches come + // in pairs: fast ->conn-> fast ->bridge-> slow ->conn-> slow ->bridge-> + // back to fast. + Graph graph; + graph.AddNodeType(MakePassThroughType()); + graph.AddNode(Node{.id = "ctl_a", .type = "test.passthrough", .domain = "fast"}); + graph.AddNode(Node{.id = "ctl_b", .type = "test.passthrough", .domain = "fast"}); + graph.AddNode(Node{.id = "plant_c", .type = "test.passthrough", .domain = "slow"}); + graph.AddNode(Node{.id = "plant_d", .type = "test.passthrough", .domain = "slow"}); + + graph.Connect(Connection{ + .id = "c1", + .from = PortRef{.nodeId = "ctl_a", .portName = "out"}, + .to = PortRef{.nodeId = "ctl_b", .portName = "in"}, + }); + graph.Connect(Connection{ + .id = "c2", + .from = PortRef{.nodeId = "plant_c", .portName = "out"}, + .to = PortRef{.nodeId = "plant_d", .portName = "in"}, + }); + + const WireType scalar = WireType{.quantity = Quantity::Dimensionless, + .frame = Frame::Scalar, + .dtype = DType::F32}; + graph.AddBridge(Bridge{ + .id = "loop_forward", + .type = scalar, + .producer = PortRef{.nodeId = "ctl_b", .portName = "out"}, + .consumer = PortRef{.nodeId = "plant_c", .portName = "in"}, + }); + // The return bridge closes the loop: plant_d (slow) feeds ctl_a (fast), + // read one domain step later. + graph.AddBridge(Bridge{ + .id = "loop_return", + .type = scalar, + .producer = PortRef{.nodeId = "plant_d", .portName = "out"}, + .consumer = PortRef{.nodeId = "ctl_a", .portName = "in"}, + }); + + Timing::Validator validator; + const auto result = validator.Validate(graph); + EXPECT_TRUE(result.ok); + EXPECT_TRUE(result.errors.empty()); +} + +TEST(Timing, BridgeDoesNotLaunderConnectionCycle) { + // Mixing an innocent cross-domain bridge into the graph must not launder + // a genuine connection-only cycle elsewhere: A <-> B stays illegal. + Graph graph; + graph.AddNodeType(MakePassThroughType()); + graph.AddNodeType(MakeDisplayType()); + graph.AddNode(Node{.id = "a", .type = "test.passthrough", .domain = "app_loop"}); + graph.AddNode(Node{.id = "b", .type = "test.passthrough", .domain = "app_loop"}); + graph.AddNode(Node{.id = "monitor", .type = "display.value", .domain = "host"}); + + // The connection-only cycle the other way: b -> a -> b. + graph.Connect(Connection{ + .id = "c1", + .from = PortRef{.nodeId = "b", .portName = "out"}, + .to = PortRef{.nodeId = "a", .portName = "in"}, + }); + graph.Connect(Connection{ + .id = "c2", + .from = PortRef{.nodeId = "a", .portName = "out"}, + .to = PortRef{.nodeId = "b", .portName = "in"}, + }); + + // A legal bridge hanging off the cycle: b (app_loop) -> monitor (host). + const WireType scalar = WireType{.quantity = Quantity::Dimensionless, + .frame = Frame::Scalar, + .dtype = DType::F32}; + graph.AddBridge(Bridge{ + .id = "telemetry", + .type = scalar, + .producer = PortRef{.nodeId = "b", .portName = "out"}, + .consumer = PortRef{.nodeId = "monitor", .portName = "in"}, + }); + + Timing::Validator validator; + const auto result = validator.Validate(graph); + EXPECT_FALSE(result.ok); + // Exactly one error — the cycle. The bridge itself is legal and adds none. + EXPECT_EQ(result.errors.size(), 1u); + EXPECT_NE(result.errors[0].find("algebraic cycle of plain connections"), std::string::npos); + EXPECT_NE(result.errors[0].find(" a"), std::string::npos); + EXPECT_NE(result.errors[0].find(" b"), std::string::npos); +} + +TEST(Timing, AcyclicMultiDomainGraphWithBridgePasses) { + // No regression for innocent graphs: two acyclic chains in separate + // domains, one feeding the other through a bridge, validate untouched. + Graph graph; + graph.AddNodeType(MakeValueType()); + graph.AddNodeType(MakePassThroughType()); + graph.AddNodeType(MakeDisplayType()); + graph.AddNode(Node{.id = "sense", .type = "constant.value", .domain = "adc_sample"}); + graph.AddNode(Node{.id = "scale", .type = "test.passthrough", .domain = "adc_sample"}); + graph.AddNode(Node{.id = "filter", .type = "test.passthrough", .domain = "app_loop"}); + graph.AddNode(Node{.id = "gauge", .type = "display.value", .domain = "app_loop"}); + + graph.Connect(Connection{ + .id = "c1", + .from = PortRef{.nodeId = "sense", .portName = "out"}, + .to = PortRef{.nodeId = "scale", .portName = "in"}, + }); + graph.Connect(Connection{ + .id = "c2", + .from = PortRef{.nodeId = "filter", .portName = "out"}, + .to = PortRef{.nodeId = "gauge", .portName = "in"}, + }); + + const WireType scalar = WireType{.quantity = Quantity::Dimensionless, + .frame = Frame::Scalar, + .dtype = DType::F32}; + graph.AddBridge(Bridge{ + .id = "sample_handoff", + .type = scalar, + .producer = PortRef{.nodeId = "scale", .portName = "out"}, + .consumer = PortRef{.nodeId = "filter", .portName = "in"}, + }); + + Timing::Validator validator; + const auto result = validator.Validate(graph); + EXPECT_TRUE(result.ok); + EXPECT_TRUE(result.errors.empty()); +} +#endif diff --git a/Lib/NodeAPI/tests/test_templates.cpp b/Lib/NodeAPI/tests/test_templates.cpp index 859faa84..ae078b0d 100644 --- a/Lib/NodeAPI/tests/test_templates.cpp +++ b/Lib/NodeAPI/tests/test_templates.cpp @@ -3,6 +3,7 @@ #include #include +#include using namespace NodeAPI; @@ -96,6 +97,65 @@ TEST(NodeTemplates, AllShippedMetadataHasDescriptions) { } } +TEST(NodeTemplates, MissingCodeFilesKeepCodeEmbeddedInNodeJson) { + /* A folder template may carry its code pieces inline in node.json. A + * missing sibling file (inline.cpp etc.) must not overwrite the embedded + * code with an empty string. */ + const auto root = + std::filesystem::temp_directory_path() / "nodeapi_embedded_code_test"; + std::filesystem::remove_all(root); + std::filesystem::create_directories(root / "test.embedded"); + { + std::ofstream file(root / "test.embedded" / "node.json"); + file << R"({ + "id": "test.embedded", + "displayName": "Embedded", + "inputPorts": [], + "outputPorts": [], + "inlineCode": "/* embedded inline */", + "constructorCode": "/* embedded ctor */" + })"; + } + + Graph graph; + const auto result = LoadNodeTypesFromDirectory(graph, root); + ASSERT_TRUE(result.ok); + const auto type = graph.FindNodeType("test.embedded"); + ASSERT_TRUE(type.has_value()); + EXPECT_EQ(type->inlineCode, "/* embedded inline */"); + EXPECT_EQ(type->constructorCode, "/* embedded ctor */"); + EXPECT_TRUE(type->classHeader.empty()); + EXPECT_TRUE(type->classDefinition.empty()); + std::filesystem::remove_all(root); +} + +TEST(NodeTemplates, ExistingCodeFileOverridesEmbeddedCode) { + const auto root = + std::filesystem::temp_directory_path() / "nodeapi_code_file_override_test"; + std::filesystem::remove_all(root); + std::filesystem::create_directories(root / "test.split"); + { + std::ofstream file(root / "test.split" / "node.json"); + file << R"({ + "id": "test.split", + "displayName": "Split", + "inputPorts": [], + "outputPorts": [], + "inlineCode": "/* embedded inline */" + })"; + std::ofstream code(root / "test.split" / "inline.cpp"); + code << "/* from file */\n"; + } + + Graph graph; + const auto result = LoadNodeTypesFromDirectory(graph, root); + ASSERT_TRUE(result.ok); + const auto type = graph.FindNodeType("test.split"); + ASSERT_TRUE(type.has_value()); + EXPECT_EQ(type->inlineCode, "/* from file */\n"); + std::filesystem::remove_all(root); +} + TEST(NodeTemplates, RejectsMissingDirectory) { Graph graph; const auto result = LoadNodeTypesFromDirectory(graph, "/does/not/exist"); diff --git a/Lib/NodeAPI/tests/test_timing.cpp b/Lib/NodeAPI/tests/test_timing.cpp index 806393b0..8f68f8f1 100644 --- a/Lib/NodeAPI/tests/test_timing.cpp +++ b/Lib/NodeAPI/tests/test_timing.cpp @@ -124,7 +124,7 @@ TEST(Timing, CycleFails) { const auto result = validator.Validate(graph); EXPECT_FALSE(result.ok); EXPECT_EQ(result.errors.size(), 1u); - EXPECT_NE(result.errors[0].find("directed cycle"), std::string::npos); + EXPECT_NE(result.errors[0].find("algebraic cycle of plain connections"), std::string::npos); } TEST(Timing, EntryPointCannotHaveIncomingConnection) { diff --git a/README.md b/README.md index 8938b156..c8071604 100644 --- a/README.md +++ b/README.md @@ -9,9 +9,15 @@ plus the small `platform_api` contract the generated code calls. This repo holds the STM32H723 base firmware image, the node-graph libraries, the RTE Studio editor, and the tools that turn a graph into a -flashable firmware binary. A plant/inverter simulator based on -[ngspice](https://ngspice.sourceforge.io/) is planned, so graphs can be -exercised in closed loop before touching hardware. +flashable firmware binary. Two host simulators exercise graphs in closed +loop before touching hardware: **HostSim** (`Images/HostSim/`) builds a +graph into a host executable — `rte sim --graph G [--scenario S] [--live]` +does emit, build, and run in one step — against a PMSM plant (discrete ODE +by default, with an experimental [ngspice](https://ngspice.sourceforge.io/) +backend), and publishes live telemetry over TCP that RTE Studio attaches +to. **HostSIL** (`Images/HostSIL/`) runs the unmodified Gen6FW application +code against the same plant (software-in-the-loop). See +[docs/simulation.md](docs/simulation.md). Hardware designs and safety documentation live in [OpenVVVF/Hardware](https://github.com/OpenVVVF/Hardware). @@ -26,7 +32,9 @@ RTE/ │ ├── Examples/ # Example NodeAPI graphs │ └── NodeTemplates/ # Reusable node types for GUI + codegen ├── Images/ -│ └── Gen6FW/ # STM32H7 base firmware image (HAL, startup, linker) +│ ├── Gen6FW/ # STM32H7 base firmware image (HAL, startup, linker) +│ ├── HostSim/ # Host simulator base image (graphs run on a PMSM plant) +│ └── HostSIL/ # SIL: unmodified Gen6FW app code vs the HostSim plant ├── Lib/ │ ├── NodeAPI/ # Graph/node serialization and timing validation │ ├── InverterCodegen/ # Graph -> C++ code generation engine @@ -41,7 +49,9 @@ RTE/ ``` - `Assets/` holds graphs and node-type templates shared by NodeGUI and codegen. -- `Images/` contains the base firmware image that the emitter copies and modifies. +- `Images/` contains the base images that the emitter copies and modifies: + the Gen6 firmware image, plus the HostSim/HostSIL host simulators + (see [docs/simulation.md](docs/simulation.md)). - `Lib/` contains reusable CMake libraries used by the host tools, GUI, and device firmware. - `Source/` contains end-user executables. @@ -84,7 +94,7 @@ cache, not to a nested directory in this checkout. ```bash cmake --build build --target RTEStudio -j8 -./build/bin/rte-studio Assets/Examples/foc_demo.json +./build/bin/RTEStudio Assets/Examples/foc_demo.json ``` On Windows, pass your Qt prefix to CMake (e.g. `-DCMAKE_PREFIX_PATH=C:/Qt/6.7.3/mingw_64`). @@ -157,7 +167,7 @@ manifest under the user cache (`~/.cache/rte/projects/...` on Linux, ## Tools -- `rte-studio` — lightweight editor and owner of live device/telemetry state. +- `RTEStudio` — lightweight editor and owner of live device/telemetry state. - `rte` — portable automation backend and MCP stdio server (`rte mcp`). - `InverterCodegen` — generates C++ domain files from a NodeAPI graph JSON. - `RTECodeEmitter` — takes a base firmware source tree and a graph, copies the @@ -264,6 +274,11 @@ KV bit rate (`Can.BitRate`, default 500 kbit/s). Done recently: +- Host simulators for closed-loop testing before hardware: **HostSim** + (`rte sim` emits, builds, and runs a graph against a PMSM plant; ODE + default, experimental ngspice backend; live telemetry over TCP for the + RTE Studio Runtime tab) and **HostSIL** (unmodified Gen6FW application + code vs the plant; see [docs/simulation.md](docs/simulation.md)) - Calibration suite restored (hierarchical `cal`, results in the `Motor.*` KV namespace; flux via LS fit with V_off; flying start) - Phase voltage sensing (`hw.phase_voltages`, `vsense` domain, snapshot reads) @@ -283,14 +298,29 @@ Done recently: rate telemetry (`hz_*`) - Bench builds default to Release — at `-O0` the CPU cannot service the control ISR load (`hz_app_loop` collapses to <100 Hz) +- DC-microgrid converters, first step: HostSim `dcdc` plant mode runs one + 3-phase power stage as three independent phase→DC-bus converters + (`scenarios/dcdc_3bus.json`) or with all legs paralleled into one shared + bus (`dcdc_parallel.json`), via averaged ngspice netlists behind the + `IPlant` seam. Still open: switched (non-averaged) netlists, a fast ODE + DC-bus plant for `--live` speed, and 2+1 split topologies +- Multi-converter simulation, first step: concurrent `host_sim` instances + exchange CAN frames over a shared simulated bus (localhost TCP bridge, + `--can-bridge-listen` / `--can-bridge-connect`), demonstrated by the + one-graph two-role `Assets/Examples/can_bus_demo.json`. Still open: coupled + multi-instance plants and Windows support for the bridge Next up, roughly in priority order: - Current-loop tuning from measured motor parameters: run the R/L calibrators, compute PI gains for a target bandwidth, slew-limit the current references (the `control.slew` node exists, unwired) -- ngspice-based plant/inverter simulator for closed-loop graph testing - before hardware +- ngspice plant backend beyond the experimental RL/PMSM/dcdc netlists: switched + device models, Gen6-oriented netlist templates +- Coupled multi-instance plants: several converters acting on one electrical + model — a 5-phase motor driven by two 3-phase inverters, or a microgrid + AFE -> DC/DC -> output chain; plus a Windows port of the CAN bridge +- 5-phase (and N-phase) machine model behind the same plant seam - Sensorless (observer-based) angle path for high-speed operation - Zip-based project format: a library that packages project assets (node templates as folders with `index.json` + separate `.cpp`/`.h` files, no diff --git a/Source/NodeGUI/CMakeLists.txt b/Source/NodeGUI/CMakeLists.txt index 2242ac67..2d7e872f 100644 --- a/Source/NodeGUI/CMakeLists.txt +++ b/Source/NodeGUI/CMakeLists.txt @@ -32,8 +32,13 @@ add_executable(RTEStudio src/FrameRateMonitor.h src/runtime/TelemetryStore.cpp src/runtime/TelemetryStore.h + src/runtime/PendingQueue.h src/runtime/LegacyTelemetryClient.cpp src/runtime/LegacyTelemetryClient.h + src/runtime/IvpStreamDecoder.cpp + src/runtime/IvpStreamDecoder.h + src/runtime/IvpTcpClient.cpp + src/runtime/IvpTcpClient.h src/runtime/RuntimeController.cpp src/runtime/RuntimeController.h src/runtime/RuntimeSessionExporter.cpp @@ -54,6 +59,12 @@ add_executable(RTEStudio src/runtime/FramKeysManager.h src/runtime/RuntimeTab.cpp src/runtime/RuntimeTab.h + src/simulation/SimRunner.cpp + src/simulation/SimRunner.h + src/simulation/ScenarioFile.cpp + src/simulation/ScenarioFile.h + src/simulation/ScenarioDialog.cpp + src/simulation/ScenarioDialog.h ) set_target_properties(RTEStudio PROPERTIES diff --git a/Source/NodeGUI/README.md b/Source/NodeGUI/README.md index ebe2219a..f6b0bca5 100644 --- a/Source/NodeGUI/README.md +++ b/Source/NodeGUI/README.md @@ -33,6 +33,49 @@ Open a graph from the command line: Or launch with no arguments and use `File → Open`. +## Live telemetry + +The Runtime screen can attach to a live InverterProtocol stream: + +```sh +rte-studio graph.json --tcp 127.0.0.1:14608 --protocol ivp +``` + +`--tcp host:port` connects over TCP (and implies `--protocol ivp`) — this is +the link host_sim publishes with `--live` (`Images/HostSim`, default +127.0.0.1:14608). The stream is COBS-framed `Lib/InverterProtocol` packets; +decoding uses the library's C core (`protocol.c`, `packet_parser.c`). The +client reconnects automatically after a disconnect, and the console panel's +command box sends HostSim text shell commands (`throttle a 0.5`, `duty u 60`, +`pause`, `resume`) back over the same socket. + +Other modes: `--simulate` feeds synthetic 100 Hz telemetry instead of a link, +and `--serial ` + `--protocol legacy|ivp` attach to a real device. + +## Build & Run Simulation + +`Simulation → Build & Run Simulation (Live)` (`F6`) is the graph-mode HostSim +loop: it saves the graph, asks for a scenario (default: automatic, mirroring +`rte sim`'s rule), then runs `rte sim --graph --live` as a child +process. Its emit/build/run output streams to Console → Simulation; once +host_sim announces its live endpoint, the Runtime tab attaches to it through +the same `--tcp` link described above (`127.0.0.1:14608` by default). The +`rte` executable is found next to RTE Studio, via `RTE_CLI`, or on `PATH`. +`Simulation → Stop Simulation` (`Shift+F6`) signals the whole simulator +process group; on exit the previous telemetry link is restored. + +The same dialog edits the common scenario keys (motor parameters, sim rates, +plant backend + ngspice netlist) with Save / Save As; saving rewrites only +those keys and preserves the rest of the file. `Simulation → Scenario +Editor…` opens it without running. A headless self-test of the whole path is +`rte-studio --sim-smoke [graph.json]` (prints `SIM_SMOKE PASS/FAIL`, exits +0/1; default graph is `Images/HostSim/graphs/spwm_demo_graph.json`). + +The Runtime tab has built-in SPWM and FOC plot-layout presets (also saved under +`runtime/presets/` so they can be tweaked); the SPWM/FOC buttons restore them, +and a matching layout auto-applies on first contact with a stream that +publishes `duty_u` or `cg_id_a`. + ## What it does today - Loads node-type templates from `RTE/Assets/NodeTemplates`. @@ -81,4 +124,4 @@ Or launch with no arguments and use `File → Open`. ## What it does not do yet -- No packaged project/archive format or closed-loop plant simulator. +- No packaged project/archive format. diff --git a/Source/NodeGUI/src/Main.cpp b/Source/NodeGUI/src/Main.cpp index 695fb795..29c44824 100644 --- a/Source/NodeGUI/src/Main.cpp +++ b/Source/NodeGUI/src/Main.cpp @@ -5,7 +5,9 @@ #include #include #include +#include +#include #include #include #include @@ -14,11 +16,42 @@ namespace { void PrintUsage(const char* exe) { std::cerr << "usage: " << exe - << " [graph.json] [--serial ] [--protocol legacy|ivp] [--simulate]\n" + << " [graph.json] [--serial ] [--tcp ] " + "[--protocol legacy|ivp] [--simulate] [--sim-smoke]\n" << " --serial override the saved telemetry serial port\n" + << " --tcp connect InverterProtocol over TCP " + "(implies --protocol ivp)\n" + << " e.g. --tcp 127.0.0.1:14608 for HostSim --live; " + "host is an\n" + << " IPv4 address or hostname (IPv6 literals are not " + "supported)\n" << " --protocol wire protocol: 'legacy' (current firmware, default)\n" << " or 'ivp' (new InverterProtocol stack)\n" - << " --simulate feed synthetic 100 Hz telemetry instead of the serial port\n"; + << " --simulate feed synthetic 100 Hz telemetry instead of the serial port\n" + << " --sim-smoke headless Build & Run Simulation self-test: run the\n" + << " graph (default: the HostSim SPWM demo) in the\n" + << " simulator, verify live TCP telemetry, print\n" + << " SIM_SMOKE PASS/FAIL and exit\n"; +} + +bool ParseHostPort(const std::string& spec, QString* host, int* port) { + const auto colon = spec.rfind(':'); + if (colon == std::string::npos || colon == 0 || colon + 1 >= spec.size()) { + return false; + } + const std::string portText = spec.substr(colon + 1); + std::size_t consumed = 0; + try { + *port = std::stoi(portText, &consumed); + } catch (...) { + return false; + } + // std::stoi stops at the first non-digit; reject "14608x"-style specs. + if (consumed != portText.size()) { + return false; + } + *host = QString::fromStdString(spec.substr(0, colon)); + return *port > 0 && *port < 65536; } } // namespace @@ -50,9 +83,13 @@ int main(int argc, char* argv[]) { QSurfaceFormat::setDefaultFormat(format); // Empty means use the persistent Device port preference. --serial always - // overrides it for this launch. + // overrides it for this launch. --tcp selects the HostSim --live link + // instead of any serial port. QString serialPort; + QString tcpHost; + int tcpPort = 0; bool simulate = false; + bool simSmoke = false; auto protocol = NodeGUI::runtime::Protocol::Legacy; std::string graphPath; @@ -64,6 +101,17 @@ int main(int argc, char* argv[]) { return 1; } serialPort = QString::fromStdString(argv[i]); + } else if (arg == "--tcp") { + if (++i >= argc) { + PrintUsage(argv[0]); + return 1; + } + if (!ParseHostPort(argv[i], &tcpHost, &tcpPort)) { + std::cerr << "invalid --tcp spec (expected host:port)\n"; + PrintUsage(argv[0]); + return 1; + } + protocol = NodeGUI::runtime::Protocol::Inverter; } else if (arg == "--protocol") { if (++i >= argc) { PrintUsage(argv[0]); @@ -81,6 +129,8 @@ int main(int argc, char* argv[]) { } } else if (arg == "--simulate") { simulate = true; + } else if (arg == "--sim-smoke") { + simSmoke = true; } else if (arg == "--help" || arg == "-h") { PrintUsage(argv[0]); return 0; @@ -92,8 +142,29 @@ int main(int argc, char* argv[]) { } } + if (simSmoke) { + // The smoke test runs against a graph on disk rather than the editor + // buffer; default to the HostSim SPWM demo shipped with the tree. + if (graphPath.empty()) { +#ifdef RTE_PROJECT_ROOT + graphPath = + std::string(RTE_PROJECT_ROOT) + "/Images/HostSim/graphs/spwm_demo_graph.json"; +#endif + } + std::error_code existsError; + if (graphPath.empty() + || !std::filesystem::is_regular_file(graphPath, existsError)) { + std::fprintf(stderr, "SIM_SMOKE FAIL: graph not found: %s\n", + graphPath.c_str()); + return 1; + } + // No serial scraping while attached to the simulator. + serialPort.clear(); + simulate = true; + } + NodeGUI::MainWindow window; - window.SetupRuntime(serialPort, simulate, protocol); + window.SetupRuntime(serialPort, simulate, protocol, tcpHost, tcpPort); window.showNormal(); if (!graphPath.empty()) { @@ -103,5 +174,13 @@ int main(int argc, char* argv[]) { } } + if (simSmoke) { + // Defer into the event loop: the QCoreApplication::exit() on the PASS + // path is a no-op before exec() starts. + QTimer::singleShot(0, &window, [&window, graphPath] { + window.StartSimSmoke(QString::fromStdString(graphPath)); + }); + } + return app.exec(); } diff --git a/Source/NodeGUI/src/MainWindow.cpp b/Source/NodeGUI/src/MainWindow.cpp index 71285fd6..827fbc2e 100644 --- a/Source/NodeGUI/src/MainWindow.cpp +++ b/Source/NodeGUI/src/MainWindow.cpp @@ -9,6 +9,9 @@ #include "runtime/RuntimeTab.h" #include "runtime/SignalTablePanel.h" +#include "simulation/ScenarioDialog.h" +#include "simulation/SimRunner.h" + #include #include @@ -51,6 +54,7 @@ #include #include +#include #include #include @@ -439,14 +443,33 @@ MainWindow::MainWindow(QWidget* parent) } } +MainWindow::~MainWindow() { + // Stack-destroyed (e.g. after --sim-smoke exits) without a closeEvent: + // make sure the sim child tree is dead before member teardown starts. + ShutdownSimRunner(); +} + +void MainWindow::ShutdownSimRunner() { + if (!simRunner_) { + return; + } + // Detach before stopping: the kill inside Shutdown() must not deliver + // finished()/output() into the lambdas above while members die. + disconnect(simRunner_, nullptr, this, nullptr); + simStopRequested_ = true; + simRunner_->Shutdown(); +} + void MainWindow::SetupRuntime(const QString& serialPort, bool simulate, - runtime::Protocol protocol) { + runtime::Protocol protocol, + const QString& tcpHost, + int tcpPort) { const QString effectiveSerialPort = serialPort.trimmed().isEmpty() ? preferences_.serialPort : serialPort.trimmed(); preferences_.serialPort = effectiveSerialPort; - runtimeController_ = - std::make_unique(effectiveSerialPort, simulate, protocol); + runtimeController_ = std::make_unique( + effectiveSerialPort, simulate, protocol, tcpHost, tcpPort); localSessionServer_ = std::make_unique( runtimeController_->Store(), this); @@ -522,10 +545,72 @@ void MainWindow::SetupRuntime(const QString& serialPort, logsLayout->addWidget(buildLogView_, 1); editorConsoleTabs_->addTab(logsPage, QStringLiteral("Logs")); + // Simulation page: streamed `rte sim` output for Build & Run Simulation. + auto* simPage = new QWidget(editorConsoleTabs_); + auto* simLayout = new QVBoxLayout(simPage); + simLayout->setContentsMargins(0, 0, 0, 0); + auto* clearSimLogButton = new QPushButton(QStringLiteral("Clear"), simPage); + connect(clearSimLogButton, &QPushButton::clicked, this, [this] { + if (simLogView_) { + simLogView_->clear(); + } + }); + simLayout->addWidget(clearSimLogButton, 0, Qt::AlignLeft); + simLogView_ = new QPlainTextEdit(simPage); + simLogView_->setReadOnly(true); + simLogView_->setMaximumBlockCount(preferences_.buildLogLineLimit); + simLayout->addWidget(simLogView_, 1); + editorConsoleTabs_->addTab(simPage, QStringLiteral("Simulation")); + editorConsoleDock_->setWidget(editorConsoleTabs_); addDockWidget(Qt::BottomDockWidgetArea, editorConsoleDock_); editorConsoleDock_->hide(); + // The Build & Run Simulation runner. Output streams to the Simulation + // page; the live-endpoint announcement re-points the attach and jumps to + // the Runtime tab. + simRunner_ = new simulation::SimRunner(this); + connect(simRunner_, &simulation::SimRunner::output, + this, [this](const QString& text) { AppendSimLog(text); }); + connect(simRunner_, &simulation::SimRunner::liveEndpoint, + this, [this](const QString& host, int port) { + AppendSimLog(QStringLiteral("[sim] live telemetry endpoint %1:%2\n") + .arg(host) + .arg(port)); + if (simAttached_ && runtimeController_) { + // A custom scenario can pick a non-default listen_port; + // re-attach to whatever host_sim actually announced. + // ConnectTcpOverride normalizes wildcard bind addresses + // and ignores an endpoint it is already attached to. + runtimeController_->ConnectTcpOverride(host, port); + } + // The simulator is up: switch from the build log to live plots. + if (appSwitcher_ && appSwitcher_->count() > 1) { + appSwitcher_->setCurrentIndex(1); + } + }); + connect(simRunner_, &simulation::SimRunner::finished, + this, [this](int exitCode, QProcess::ExitStatus status) { + OnSimFinished(exitCode, status == QProcess::CrashExit); + }); + connect(simRunner_, &simulation::SimRunner::attachTimeout, + this, [this](const QString& message) { + AppendSimLog(message + u'\n'); + statusBar()->showMessage( + QStringLiteral( + "Simulation live endpoint not announced after 60 s of " + "silence — see the Simulation log for likely causes; " + "attach keeps retrying in the background."), + 15000); + }); + + if (runSimAction_) { + runSimAction_->setEnabled(true); + } + if (scenarioEditorAction_) { + scenarioEditorAction_->setEnabled(true); + } + runtimeController_->Start(); // The View menu gains the new docks' toggle actions. @@ -805,6 +890,47 @@ void MainWindow::SetupMenu() { StartBuildCommand(BuildCommand::GenerateAndFlash); }); + // HostSim graph-mode simulation: emit + build + run --live via `rte sim`, + // then attach the Runtime tab to its TCP telemetry. + QMenu* simulationMenu = menuBar()->addMenu(QStringLiteral("&Simulation")); + + runSimAction_ = + simulationMenu->addAction(QStringLiteral("&Build && Run Simulation (Live)...")); + runSimAction_->setToolTip(QStringLiteral( + "Emit the graph into HostSim, build host_sim, run it live, and attach " + "the Runtime tab to its telemetry")); + RegisterShortcut(runSimAction_, + QStringLiteral("simulation.buildAndRun"), + QStringLiteral("Simulation"), + QStringLiteral("Build & Run Simulation (Live)"), + QKeySequence(Qt::Key_F6)); + connect(runSimAction_, &QAction::triggered, this, &MainWindow::OnRunSimulation); + + stopSimAction_ = simulationMenu->addAction(QStringLiteral("&Stop Simulation")); + RegisterShortcut(stopSimAction_, + QStringLiteral("simulation.stop"), + QStringLiteral("Simulation"), + QStringLiteral("Stop Simulation"), + QKeySequence(QStringLiteral("Shift+F6"))); + connect(stopSimAction_, &QAction::triggered, this, &MainWindow::OnStopSimulation); + + simulationMenu->addSeparator(); + + scenarioEditorAction_ = + simulationMenu->addAction(QStringLiteral("Scenario &Editor...")); + RegisterShortcut(scenarioEditorAction_, + QStringLiteral("simulation.scenarioEditor"), + QStringLiteral("Simulation"), + QStringLiteral("Scenario Editor"), + {}); + connect(scenarioEditorAction_, &QAction::triggered, this, + &MainWindow::OnScenarioEditor); + + // Enabled once SetupRuntime has created the runtime controller/panels. + runSimAction_->setEnabled(false); + stopSimAction_->setEnabled(false); + scenarioEditorAction_->setEnabled(false); + QMenu* viewMenu = menuBar()->addMenu(QStringLiteral("&View")); viewMenu_ = viewMenu; @@ -1014,6 +1140,226 @@ bool MainWindow::EnsureGraphSaved() { return DoSave(fileName.toStdString()); } +void MainWindow::ShowSimulationLog() { + if (!editorConsoleDock_ || !editorConsoleTabs_ || !simLogView_) { + return; + } + if (appSwitcher_->currentIndex() != 0) { + appSwitcher_->setCurrentIndex(0); + } + editorConsoleDock_->show(); + editorConsoleDock_->raise(); + // "Simulation" is the third page of the editor console (Console, Logs, + // Simulation). + editorConsoleTabs_->setCurrentIndex(2); +} + +void MainWindow::AppendSimLog(const QString& text) { + if (!simLogView_ || text.isEmpty()) { + return; + } + QTextCursor cursor = simLogView_->textCursor(); + cursor.movePosition(QTextCursor::End); + cursor.insertText(text); + simLogView_->setTextCursor(cursor); + simLogView_->verticalScrollBar()->setValue( + simLogView_->verticalScrollBar()->maximum()); +} + +void MainWindow::OnRunSimulation() { + if (!runtimeController_ || !simRunner_) { + ShowToast(QStringLiteral("Runtime is not initialized")); + return; + } + if (simRunner_->IsRunning()) { + ShowToast(QStringLiteral("A simulation is already running")); + return; + } + + // Same rule as the firmware path: the graph on disk is what gets run. + if (!EnsureGraphSaved()) { + return; + } + const QString graphPath = + QFileInfo(QString::fromStdString(currentPath_)).absoluteFilePath(); + + simulation::ScenarioDialog dialog(graphPath, /*editOnly=*/false, this); + if (dialog.exec() != QDialog::Accepted || !dialog.RunRequested()) { + return; + } + StartSimulation(graphPath, dialog.SelectedScenarioPath()); +} + +void MainWindow::OnScenarioEditor() { + if (currentPath_.empty()) { + ShowToast(QStringLiteral("Open or save a graph first")); + return; + } + const QString graphPath = + QFileInfo(QString::fromStdString(currentPath_)).absoluteFilePath(); + simulation::ScenarioDialog dialog(graphPath, /*editOnly=*/true, this); + dialog.exec(); +} + +void MainWindow::OnStopSimulation() { + if (simRunner_ && simRunner_->IsRunning()) { + simStopRequested_ = true; + simRunner_->Stop(); + } +} + +bool MainWindow::StartSimulation(const QString& graphPath, const QString& scenarioPath) { + QString error; + QString rteError; + const QString rtePath = simulation::SimRunner::FindRteExecutable(&rteError); + if (rtePath.isEmpty()) { + AppendSimLog(QStringLiteral("\n[error] %1\n").arg(rteError)); + ShowSimulationLog(); + ShowToast(rteError); + return false; + } + + simulation::SimRunRequest request; + // rte anchors relative paths to ITS working directory, which SimRunner + // sets to the graph's directory; normalize to absolute here. + request.graphPath = QFileInfo(graphPath).absoluteFilePath(); + request.scenarioPath = scenarioPath.isEmpty() + ? QString{} + : QFileInfo(scenarioPath).absoluteFilePath(); + AppendSimLog( + QStringLiteral("\n============================================================\n" + "Build & Run Simulation\n" + "Graph: %1\n" + "Scenario: %2\n" + "============================================================\n") + .arg(graphPath, + scenarioPath.isEmpty() ? QStringLiteral("(auto)") : scenarioPath)); + if (!simRunner_->Start(request, &error)) { + AppendSimLog(QStringLiteral("[error] %1\n").arg(error)); + ShowSimulationLog(); + return false; + } + + ShowSimulationLog(); + if (runSimAction_) runSimAction_->setEnabled(false); + if (stopSimAction_) stopSimAction_->setEnabled(true); + simStopRequested_ = false; + statusBar()->showMessage(QStringLiteral("Simulation starting (emit, build, live run)...")); + + // Attach immediately: the TCP client retries every 2 s, so it picks up + // host_sim as soon as the build finishes and it starts listening. The + // live-endpoint announcement re-attaches if the scenario uses a + // non-default port. + runtimeController_->ConnectTcpOverride( + QString::fromLatin1(simulation::kDefaultLiveHost), + simulation::kDefaultLivePort); + simAttached_ = true; + return true; +} + +void MainWindow::OnSimFinished(int exitCode, bool crashed) { + const bool userStop = simStopRequested_; + simStopRequested_ = false; + AppendSimLog(QStringLiteral("[sim] %1 (exit code %2)\n") + .arg(crashed ? QStringLiteral("crashed") + : userStop ? QStringLiteral("stopped by user") + : QStringLiteral("exited")) + .arg(exitCode)); + if (simAttached_ && runtimeController_) { + runtimeController_->ClearLinkOverride(); + simAttached_ = false; + } + if (runSimAction_) runSimAction_->setEnabled(true); + if (stopSimAction_) stopSimAction_->setEnabled(false); + statusBar()->showMessage(userStop || exitCode == 0 + ? QStringLiteral("Simulation stopped") + : QStringLiteral("Simulation failed (exit code %1)") + .arg(exitCode), + 5000); +} + +void MainWindow::StartSimSmoke(const QString& graphPath) { + if (!runtimeController_ || !simRunner_) { + std::printf("SIM_SMOKE FAIL: runtime/sim runner not initialized\n"); + QCoreApplication::exit(1); + return; + } + simSmokeActive_ = true; + + auto finish = [this](bool pass, const QString& detail) { + if (!simSmokeActive_) { + return; + } + simSmokeActive_ = false; + std::printf("SIM_SMOKE %s: %s\n", pass ? "PASS" : "FAIL", qPrintable(detail)); + if (!pass && simLogView_) { + // Context for CI failure diagnosis: the tail of the rte stream. + const QString log = simLogView_->toPlainText(); + const QString tail = log.mid(qMax(0, log.size() - 4000)); + std::printf("---- rte sim output tail ----\n%s\n------------------------------\n", + qPrintable(tail)); + } + std::fflush(stdout); + if (simRunner_->IsRunning()) { + simStopRequested_ = true; + simRunner_->Stop(); + // Quit once the process tree is gone; bail out anyway after 8 s. + connect(simRunner_, &simulation::SimRunner::finished, qApp, + [pass] { QCoreApplication::exit(pass ? 0 : 1); }); + QTimer::singleShot(8000, qApp, [pass] { QCoreApplication::exit(pass ? 0 : 1); }); + } else { + QCoreApplication::exit(pass ? 0 : 1); + } + }; + + // rte exiting before any telemetry means the emit/build/run phase failed. + connect(simRunner_, &simulation::SimRunner::finished, + this, [finish](int exitCode, QProcess::ExitStatus) { + finish(false, + QStringLiteral("rte sim exited before telemetry attach (exit %1)") + .arg(exitCode)); + }); + + // Overall watchdog: first-time emit+build dominates the budget, and a + // cold CI machine may build HostSim from scratch inside the smoke run. + auto* watchdog = new QTimer(this); + watchdog->setSingleShot(true); + watchdog->setInterval(600000); + connect(watchdog, &QTimer::timeout, this, + [finish] { finish(false, QStringLiteral("timeout waiting for telemetry")); }); + watchdog->start(); + + auto* poll = new QTimer(this); + poll->setInterval(200); + connect(poll, &QTimer::timeout, this, [this, finish] { + if (!runtimeController_) { + return; + } + if (!simSmokeAttached_) { + if (runtimeController_->IsTcpConnected()) { + simSmokeAttached_ = true; + simSmokeBaselineFrames_ = + runtimeController_->Store().GetStatsLine().goodFrames; + } + return; + } + const uint64_t good = runtimeController_->Store().GetStatsLine().goodFrames; + const auto signalNames = runtimeController_->Store().SignalNames(); + if (good > simSmokeBaselineFrames_ && !signalNames.empty()) { + finish(true, + QStringLiteral("tcp attached, %1 frames decoded, %2 signals (e.g. %3)") + .arg(good - simSmokeBaselineFrames_) + .arg(signalNames.size()) + .arg(QString::fromStdString(signalNames.front()))); + } + }); + poll->start(); + + if (!StartSimulation(graphPath, QString{})) { + finish(false, QStringLiteral("could not start rte sim (see Simulation log)")); + } +} + void MainWindow::ShowBuildLogs() { if (!editorConsoleDock_ || !editorConsoleTabs_ || !buildLogView_) { ShowToast(QStringLiteral("Build log panel is not available")); @@ -1325,6 +1671,10 @@ void MainWindow::resizeEvent(QResizeEvent* event) { } void MainWindow::closeEvent(QCloseEvent* event) { + // A staged (async) Stop() could still deliver finished() via the QTimer + // escalation or the SimRunner destructor while member teardown is under + // way; stop to completion (signal-free) before anything is destroyed. + ShutdownSimRunner(); if (runtimeTab_) { runtimeTab_->SaveAutosave(); } diff --git a/Source/NodeGUI/src/MainWindow.h b/Source/NodeGUI/src/MainWindow.h index 8fc5fe32..28e20a4f 100644 --- a/Source/NodeGUI/src/MainWindow.h +++ b/Source/NodeGUI/src/MainWindow.h @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -38,11 +39,16 @@ class FlashPanel; class RuntimeTab; } +namespace simulation { +class SimRunner; +} + class MainWindow : public QMainWindow { Q_OBJECT public: explicit MainWindow(QWidget* parent = nullptr); + ~MainWindow() override; // Open a graph file at startup. bool OpenGraph(const std::string& path); @@ -50,10 +56,20 @@ class MainWindow : public QMainWindow { GraphScene* Scene() const { return graphScene_.get(); } // Adds the top-level Runtime and Firmware Update tabs, then starts the - // telemetry client and authenticated local automation session. + // telemetry client and authenticated local automation session. A non-empty + // tcpHost selects the HostSim --live InverterProtocol-over-TCP link + // instead of the serial port. void SetupRuntime(const QString& serialPort, bool simulate, - runtime::Protocol protocol = runtime::Protocol::Legacy); + runtime::Protocol protocol = runtime::Protocol::Legacy, + const QString& tcpHost = {}, + int tcpPort = 0); + + // Headless self-test for the Build & Run Simulation path (the --sim-smoke + // flag): starts the sim runner on graphPath without any dialog, waits for + // TCP telemetry frames, prints "SIM_SMOKE PASS/FAIL ..." to stdout, and + // exits the application with code 0/1. + void StartSimSmoke(const QString& graphPath); private slots: void OnOpen(); @@ -99,6 +115,21 @@ private slots: void ShowBuildLogs(); void AppendBuildLog(const QString& text); void SetBuildActionsEnabled(bool enabled); + + // Simulation screen plumbing (SimRunner + the Simulation log page of the + // editor console dock). StartSimulation is shared by the menu action and + // the --sim-smoke self-test. + void OnRunSimulation(); + void OnStopSimulation(); + void OnScenarioEditor(); + bool StartSimulation(const QString& graphPath, const QString& scenarioPath); + void OnSimFinished(int exitCode, bool crashed); + // Blocks until the sim child tree is dead, with SimRunner detached from + // this window first; used by closeEvent and the destructor so no signal + // can arrive while members are being torn down. + void ShutdownSimRunner(); + void ShowSimulationLog(); + void AppendSimLog(const QString& text); void ConnectModelSignals(); void ResetHistory(); void RecordHistorySnapshot(); @@ -166,6 +197,21 @@ private slots: QAction* generateAction_ = nullptr; QAction* flashAction_ = nullptr; QAction* generateFlashAction_ = nullptr; + QAction* runSimAction_ = nullptr; + QAction* stopSimAction_ = nullptr; + QAction* scenarioEditorAction_ = nullptr; + // Owned SimRunner, created in SetupRuntime; streams to simLogView_. + simulation::SimRunner* simRunner_ = nullptr; + QPlainTextEdit* simLogView_ = nullptr; + // True while the runtime link is overridden onto the live sim TCP endpoint. + bool simAttached_ = false; + // Graceful Stop() was requested; OnSimFinished reports "stopped by user" + // rather than an error exit. + bool simStopRequested_ = false; + // --sim-smoke self-test bookkeeping. + bool simSmokeActive_ = false; + bool simSmokeAttached_ = false; + uint64_t simSmokeBaselineFrames_ = 0; QProcess* buildProcess_ = nullptr; CliStage cliStage_ = CliStage::None; BuildCommand activeBuildCommand_ = BuildCommand::Generate; diff --git a/Source/NodeGUI/src/runtime/IvpStreamDecoder.cpp b/Source/NodeGUI/src/runtime/IvpStreamDecoder.cpp new file mode 100644 index 00000000..e4dbdb82 --- /dev/null +++ b/Source/NodeGUI/src/runtime/IvpStreamDecoder.cpp @@ -0,0 +1,227 @@ +#include "IvpStreamDecoder.h" + +#include + +#include +#include + +namespace NodeGUI::runtime { + +void IvpStreamDecoder::FeedBytes(const uint8_t* data, size_t n) { + if (!data || n == 0) { + return; + } + + // Rolling-window byte count for the RX-rate stats; wire bytes, not + // decoded payload bytes, so the bandwidth estimate reflects the link. + bytesInWindow_ += static_cast(n); + stats_.rx_bytes += static_cast(n); + + for (size_t i = 0; i < n; ++i) { + const uint8_t b = data[i]; + if (skipUntilDelimiter_) { + // Discard the remainder of an oversize frame; the delimiter after + // it ends the frame instead of opening a parsed one. + if (b == 0x00) { + skipUntilDelimiter_ = false; + } + continue; + } + if (b != 0x00) { + if (frameLen_ < kMaxEncodedFrame) { + frameBuf_[frameLen_++] = b; + } else { + // Oversize frame: drop the buffered prefix and skip the rest. + frameLen_ = 0; + skipUntilDelimiter_ = true; + } + continue; + } + + if (frameLen_ == 0) { + // Back-to-back delimiters carry no frame. + continue; + } + HandleFrame(frameBuf_, frameLen_); + frameLen_ = 0; + } +} + +void IvpStreamDecoder::Reset() { + frameLen_ = 0; + skipUntilDelimiter_ = false; + framesInWindow_ = 0; + bytesInWindow_ = 0; + registry_.clear(); + partialStrings_.clear(); +} + +void IvpStreamDecoder::EmitStats(double dt_seconds) { + if (dt_seconds <= 0.0) { + return; + } + stats_.rx_hz = static_cast(framesInWindow_ / dt_seconds); + stats_.rx_bytes_per_sec = static_cast(bytesInWindow_ / dt_seconds); + framesInWindow_ = 0; + bytesInWindow_ = 0; + if (onStats) { + onStats(stats_); + } +} + +void IvpStreamDecoder::HandleFrame(const uint8_t* encoded, size_t len) { + uint8_t packet[kMaxEncodedFrame]; + const size_t packet_len = ivp_cobs_decode(encoded, len, packet, sizeof(packet)); + if (packet_len == 0 || packet_len < IVP_HEADER_SIZE + 2u) { + ++stats_.bad_frames; + ++stats_.reject_decode; + return; + } + + ivp_header_t header{}; + const uint8_t* payload = nullptr; + uint16_t payload_len = 0; + const ivp_result_t result = + ivp_packet_parse(packet, packet_len, &header, &payload, &payload_len); + if (result != IVP_OK) { + ++stats_.bad_frames; + switch (result) { + case IVP_ERR_BAD_CRC: + ++stats_.reject_crc; + break; + case IVP_ERR_BAD_MAGIC: + case IVP_ERR_BAD_VERSION: + case IVP_ERR_BAD_MSG_TYPE: + ++stats_.reject_hdr; + break; + case IVP_ERR_BAD_LENGTH: + ++stats_.reject_len; + break; + default: + ++stats_.reject_decode; + break; + } + return; + } + + ++stats_.good_frames; + stats_.last_seq = header.seq; + ++framesInWindow_; + + switch (header.msg_type) { + case IVP_MSG_TELEMETRY_DEFINE: + HandleDefine(payload, payload_len); + break; + case IVP_MSG_TELEMETRY_DATA: + HandleData(payload, payload_len, header.time_us); + break; + case IVP_MSG_COMMAND_RSP: + HandleCommandResponse(payload, payload_len); + break; + default: + break; + } +} + +void IvpStreamDecoder::HandleDefine(const uint8_t* payload, uint16_t payload_len) { + ivp_define_iter_t it; + if (ivp_telemetry_define_iter_init(payload, payload_len, &it) != IVP_OK) { + ++stats_.reject_decode; + return; + } + + uint16_t id = 0; + uint8_t type = 0; + const char* key = nullptr; + uint8_t key_len = 0; + while (ivp_telemetry_define_iter_next(&it, &id, &type, &key, &key_len)) { + KeyDef def; + def.type = type; + def.key.assign(key, key + key_len); + registry_[id] = std::move(def); + } +} + +void IvpStreamDecoder::HandleData(const uint8_t* payload, + uint16_t payload_len, + uint32_t time_us) { + ivp_data_iter_t it; + if (ivp_telemetry_data_iter_init(payload, payload_len, &it) != IVP_OK) { + ++stats_.reject_decode; + return; + } + + ivp_data_item_t item{}; + while (ivp_telemetry_data_iter_next(&it, &item)) { + const auto reg = registry_.find(item.id); + if (reg == registry_.end()) { + // DATA arrived before (or without) the matching DEFINE. + ++stats_.reject_decode; + continue; + } + const std::string& key = reg->second.key; + + if (item.type == IVP_VT_F32) { + if (onF32Value) { + onF32Value(item.id, key, item.v.f32, time_us); + } + } else if (item.type == IVP_VT_STR) { + const std::string value(item.v.str.data, item.v.str.len); + partialStrings_.erase(key); + IngestString(item.id, key, value, time_us); + } else if (item.type == IVP_VT_STR_FRAG) { + auto& part = partialStrings_[key]; + if (item.v.frag.frag & IVP_SF_START) { + part.buf.clear(); + } + part.buf.append(item.v.frag.data, item.v.frag.len); + part.lastTimeUs = time_us; + if (item.v.frag.frag & IVP_SF_END) { + IngestString(item.id, key, part.buf, time_us); + partialStrings_.erase(key); + } + } + } + + // Discard string fragments that stopped arriving mid-message (>2 s of + // device time without a new fragment). + for (auto pit = partialStrings_.begin(); pit != partialStrings_.end();) { + if (time_us - pit->second.lastTimeUs > 2000000u) { + pit = partialStrings_.erase(pit); + } else { + ++pit; + } + } +} + +void IvpStreamDecoder::HandleCommandResponse(const uint8_t* payload, uint16_t payload_len) { + uint8_t req_id = 0; + uint8_t status = 0; + ivp_arg_iter_t args; + if (ivp_command_rsp_parse(payload, payload_len, &req_id, &status, &args) != IVP_OK) { + ++stats_.reject_decode; + return; + } + if (onConsoleLine) { + char buf[64]; + std::snprintf(buf, sizeof(buf), "[rsp #%u status %u]", + static_cast(req_id), static_cast(status)); + onConsoleLine(buf); + } +} + +void IvpStreamDecoder::IngestString(uint16_t id, + const std::string& key, + const std::string& value, + uint32_t time_us) { + // Same convention as ivp::InverterClient: "print" is console text. + if (key == "print") { + if (onConsoleLine) { + onConsoleLine(value); + } + } else if (onStringValue) { + onStringValue(id, key, value, time_us); + } +} + +} // namespace NodeGUI::runtime diff --git a/Source/NodeGUI/src/runtime/IvpStreamDecoder.h b/Source/NodeGUI/src/runtime/IvpStreamDecoder.h new file mode 100644 index 00000000..6355a899 --- /dev/null +++ b/Source/NodeGUI/src/runtime/IvpStreamDecoder.h @@ -0,0 +1,86 @@ +#pragma once + +#include + +#include +#include +#include +#include + +namespace NodeGUI::runtime { + +// Transport-independent InverterProtocol stream decoder. FeedBytes() consumes +// a raw byte stream of COBS-encoded, 0x00-delimited IVP frames (exactly what +// HostSim --live publishes on TCP, or what a serial link carries) and fires +// the registered callbacks for each decoded telemetry value. No I/O, no Qt, +// no threads — callbacks fire synchronously from FeedBytes()/EmitStats() on +// the caller's thread. Kept std-only so it is directly unit-testable. +// +// The wiring mirrors ivp::InverterClient: keys come from DEFINE frames, the +// string key "print" is console text, other strings reach onStringValue, and +// EmitStats(delta_seconds) refreshes the rolling RX rate/byte counters. +class IvpStreamDecoder { +public: + // Same callback signatures as ivp::InverterClient so consumers can treat + // both transports identically. + using F32Callback = ivp::InverterClient::F32Callback; + using StringCallback = ivp::InverterClient::StringCallback; + using ConsoleCallback = ivp::InverterClient::ConsoleCallback; + using StatsCallback = ivp::InverterClient::StatsCallback; + + F32Callback onF32Value; + StringCallback onStringValue; + ConsoleCallback onConsoleLine; + StatsCallback onStats; + + // Consumes stream bytes. Safe to call with partial frames. + void FeedBytes(const uint8_t* data, size_t n); + + // Discards all stream state — the partially buffered frame, the + // id→key registry, and incomplete string fragments — for a (new) + // connection, whose peer re-sends its DEFINEs from scratch (HostSim sets + // needs_define on every accept). Cumulative stats survive; the rolling + // rate window restarts so the first EmitStats() after a reconnect only + // counts bytes received on the new connection. + void Reset(); + + // Call ~1 Hz with the elapsed seconds since the last call; updates + // rx_hz/rx_bytes_per_sec and fires onStats. Only depends on stats + // gathered by FeedBytes, so it keeps ticking when the link is quiet. + void EmitStats(double dt_seconds); + + const ivp::ClientStats& Stats() const { return stats_; } + +private: + static constexpr size_t kMaxEncodedFrame = 4096; + + struct KeyDef { + uint8_t type = 0; + std::string key; + }; + struct PartialString { + std::string buf; + uint32_t lastTimeUs = 0; + }; + + void HandleFrame(const uint8_t* encoded, size_t len); + void HandleDefine(const uint8_t* payload, uint16_t payload_len); + void HandleData(const uint8_t* payload, uint16_t payload_len, uint32_t time_us); + void HandleCommandResponse(const uint8_t* payload, uint16_t payload_len); + void IngestString(uint16_t id, const std::string& key, const std::string& value, + uint32_t time_us); + + uint8_t frameBuf_[kMaxEncodedFrame] = {}; + size_t frameLen_ = 0; + // True while discarding an oversize frame's remainder (till next 0x00). + bool skipUntilDelimiter_ = false; + + ivp::ClientStats stats_; + uint64_t framesInWindow_ = 0; + uint64_t bytesInWindow_ = 0; + + std::unordered_map registry_; + std::unordered_map partialStrings_; +}; + +} // namespace NodeGUI::runtime diff --git a/Source/NodeGUI/src/runtime/IvpTcpClient.cpp b/Source/NodeGUI/src/runtime/IvpTcpClient.cpp new file mode 100644 index 00000000..54f20aea --- /dev/null +++ b/Source/NodeGUI/src/runtime/IvpTcpClient.cpp @@ -0,0 +1,164 @@ +#include "IvpTcpClient.h" + +#include + +namespace NodeGUI::runtime { + +IvpTcpClient::IvpTcpClient(QObject* parent) + : QObject(parent) { + decoder_.onF32Value = [this](uint16_t id, const std::string& key, float value, uint32_t time_us) { + if (onF32Value) onF32Value(id, key, value, time_us); + }; + decoder_.onStringValue = [this](uint16_t id, const std::string& key, + const std::string& value, uint32_t time_us) { + if (onStringValue) onStringValue(id, key, value, time_us); + }; + decoder_.onConsoleLine = [this](const std::string& line) { + if (onConsoleLine) onConsoleLine(line); + }; + + reconnectTimer_.setSingleShot(true); + statsTimer_.setInterval(1000); // ~1 Hz, ticks even while the link is idle. + + connect(&socket_, &QTcpSocket::connected, this, &IvpTcpClient::OnConnected); + connect(&socket_, &QTcpSocket::readyRead, this, &IvpTcpClient::OnReadyRead); + connect(&socket_, &QTcpSocket::disconnected, this, &IvpTcpClient::OnDisconnected); + // Failed reconnect attempts (connection refused) do not re-emit + // disconnected, so schedule the next retry from errorOccurred too. + connect(&socket_, &QAbstractSocket::errorOccurred, this, + &IvpTcpClient::OnSocketError); + connect(&reconnectTimer_, &QTimer::timeout, this, &IvpTcpClient::ConnectNow); + connect(&statsTimer_, &QTimer::timeout, this, &IvpTcpClient::OnStatsTick); +} + +IvpTcpClient::~IvpTcpClient() { + Stop(); +} + +void IvpTcpClient::Start(const QString& host, int port) { + Stop(); + host_ = host; + port_ = port; + running_ = true; + announcedFirstFrame_ = false; + // A previous endpoint's buffered bytes and id→key registry must not leak + // into a fresh link; the peer re-announces its DEFINEs after accept. + decoder_.Reset(); + windowStart_ = std::chrono::steady_clock::now(); + std::fprintf(stderr, + "IvpTcpClient: connecting to %s:%d (COBS-framed InverterProtocol)\n", + qPrintable(host_), port_); + ConnectNow(); +} + +void IvpTcpClient::Stop() { + running_ = false; + reconnectTimer_.stop(); + statsTimer_.stop(); + if (socket_.state() != QAbstractSocket::UnconnectedState) { + // Prevent a reconnect triggered by our own teardown. + socket_.abort(); + } +} + +bool IvpTcpClient::SendLine(const std::string& line) { + if (line.empty() || !IsConnected()) { + return false; + } + std::string out = line; + if (out.back() != '\n' && out.back() != '\r') { + out.push_back('\n'); + } + const qint64 wrote = socket_.write(out.data(), static_cast(out.size())); + // A queued write is success: flush() reports false whenever the kernel + // buffer still holds bytes, which is normal back-pressure, not failure. + return wrote == static_cast(out.size()); +} + +bool IvpTcpClient::IsConnected() const { + return socket_.state() == QAbstractSocket::ConnectedState; +} + +QString IvpTcpClient::Endpoint() const { + return QStringLiteral("%1:%2").arg(host_).arg(port_); +} + +void IvpTcpClient::ConnectNow() { + if (!running_ || IsConnected()) { + return; + } + socket_.abort(); + socket_.connectToHost(host_, static_cast(port_)); +} + +void IvpTcpClient::OnConnected() { + connectionErrorLogged_ = false; + std::fprintf(stderr, "IvpTcpClient: connected to %s\n", qPrintable(Endpoint())); + // Same reset as Start(): a reconnect after a drop may have died mid-frame + // and the peer restarts its DEFINE announcements for this new connection. + decoder_.Reset(); + windowStart_ = std::chrono::steady_clock::now(); + statsTimer_.start(); +} + +void IvpTcpClient::OnReadyRead() { + while (socket_.bytesAvailable() > 0) { + const QByteArray chunk = socket_.read(kMaxReadChunk); + if (chunk.isEmpty()) { + break; + } + + const uint64_t goodBefore = decoder_.Stats().good_frames; + decoder_.FeedBytes(reinterpret_cast(chunk.constData()), + static_cast(chunk.size())); + + if (!announcedFirstFrame_ && decoder_.Stats().good_frames > goodBefore) { + announcedFirstFrame_ = true; + std::fprintf(stderr, + "IvpTcpClient: first telemetry frame decoded (good=%llu bad=%llu)\n", + static_cast(decoder_.Stats().good_frames), + static_cast(decoder_.Stats().bad_frames)); + } + } +} + +void IvpTcpClient::OnDisconnected() { + statsTimer_.stop(); + ScheduleReconnect(QStringLiteral("disconnected")); +} + +void IvpTcpClient::OnSocketError(QAbstractSocket::SocketError /*error*/) { + // errorOccurred hits again for every refused retry; complain once per + // outage (reset in OnConnected) and keep retrying regardless. + if (!connectionErrorLogged_) { + connectionErrorLogged_ = true; + std::fprintf(stderr, "IvpTcpClient: connect to %s failed (%s), retrying\n", + qPrintable(Endpoint()), qPrintable(socket_.errorString())); + } + ScheduleReconnect(); +} + +void IvpTcpClient::ScheduleReconnect(const QString& reason) { + if (!running_) { + return; + } + if (!reason.isEmpty()) { + std::fprintf(stderr, + "IvpTcpClient: %s (%s), retrying in %d ms\n", + qPrintable(reason), qPrintable(Endpoint()), kReconnectMs); + } + reconnectTimer_.start(kReconnectMs); +} + +void IvpTcpClient::OnStatsTick() { + const auto now = std::chrono::steady_clock::now(); + const double dt = std::chrono::duration(now - windowStart_).count(); + windowStart_ = now; + + decoder_.EmitStats(dt); // refreshes rolling rx_hz/rx_bytes_per_sec + if (onStats) { + onStats(decoder_.Stats()); + } +} + +} // namespace NodeGUI::runtime diff --git a/Source/NodeGUI/src/runtime/IvpTcpClient.h b/Source/NodeGUI/src/runtime/IvpTcpClient.h new file mode 100644 index 00000000..67dc3112 --- /dev/null +++ b/Source/NodeGUI/src/runtime/IvpTcpClient.h @@ -0,0 +1,72 @@ +#pragma once + +#include "IvpStreamDecoder.h" + +#include +#include +#include +#include + +#include +#include + +namespace NodeGUI::runtime { + +// Async TCP client for HostSim --live (COBS-framed InverterProtocol on +// 127.0.0.1:14608 by default). Runs entirely on the GUI thread: QTcpSocket +// signals feed an IvpStreamDecoder, whose callbacks are forwarded through the +// public std::function slots. While running, the client retries the +// connection 2 s after any disconnect or failed attempt. Text shell commands +// (e.g. HostSim's "throttle a 0.5", "duty u 60", "pause") go out with +// SendLine(). +class IvpTcpClient : public QObject { + Q_OBJECT + +public: + explicit IvpTcpClient(QObject* parent = nullptr); + ~IvpTcpClient() override; + + void Start(const QString& host, int port); + void Stop(); + + // Text shell command channel (appends '\n' when missing). Returns false + // when not connected or the write fails. + bool SendLine(const std::string& line); + + bool IsConnected() const; + QString Endpoint() const; + + // Same callback shapes as ivp::InverterClient; all fire on the GUI + // thread. Register before Start(). + IvpStreamDecoder::F32Callback onF32Value; + IvpStreamDecoder::StringCallback onStringValue; + IvpStreamDecoder::ConsoleCallback onConsoleLine; + IvpStreamDecoder::StatsCallback onStats; + +private slots: + void ConnectNow(); + void OnConnected(); + void OnReadyRead(); + void OnDisconnected(); + void OnSocketError(QAbstractSocket::SocketError error); + void OnStatsTick(); + +private: + static constexpr int kReconnectMs = 2000; + static constexpr int kMaxReadChunk = 64 * 1024; + + void ScheduleReconnect(const QString& reason = {}); + + QTcpSocket socket_; + QTimer reconnectTimer_; + QTimer statsTimer_; + QString host_; + int port_ = 0; + bool running_ = false; + bool announcedFirstFrame_ = false; + bool connectionErrorLogged_ = false; + IvpStreamDecoder decoder_; + std::chrono::steady_clock::time_point windowStart_; +}; + +} // namespace NodeGUI::runtime diff --git a/Source/NodeGUI/src/runtime/LocalSessionServer.cpp b/Source/NodeGUI/src/runtime/LocalSessionServer.cpp index a1041b87..609f92cf 100644 --- a/Source/NodeGUI/src/runtime/LocalSessionServer.cpp +++ b/Source/NodeGUI/src/runtime/LocalSessionServer.cpp @@ -40,17 +40,21 @@ bool ConstantTimeEqual(const std::string& left, const std::string& right) { return difference == 0; } -json ConsoleJson(const TelemetrySnapshot& snapshot, std::uint64_t since, - std::size_t maximum) { - json lines = json::array(); - const auto first = snapshot.console.size() > maximum - ? snapshot.console.size() - maximum : 0; - for (std::size_t index = first; index < snapshot.console.size(); ++index) { - const auto& line = snapshot.console[index]; - if (line.seq > since) lines.push_back({{"seq", line.seq}, {"text", line.text}}); +json ConsoleJson(std::vector lines, std::uint64_t latestSeq, + std::uint64_t sessionEpoch, std::size_t maximum) { + json out = json::array(); + // Keep the newest `maximum` matches, mirroring the previous behavior of + // clamping against the rolling console tail. + const auto first = lines.size() > maximum ? lines.size() - maximum : 0; + for (std::size_t index = first; index < lines.size(); ++index) { + out.push_back({{"seq", lines[index].seq}, {"text", lines[index].text}}); } - return {{"lines", std::move(lines)}, - {"latest_seq", snapshot.console.empty() ? 0 : snapshot.console.back().seq}}; + // session_epoch lets since-polling clients notice a ClearSession(): seq + // numbers are never reused within a GUI run, but the archive behind them + // is discarded, so a remembered `since` may straddle nothing. + return {{"lines", std::move(out)}, + {"latest_seq", latestSeq}, + {"session_epoch", sessionEpoch}}; } } // namespace @@ -144,21 +148,27 @@ std::string LocalSessionServer::HandleRequest(const std::string& line) const { } const std::string method = request.value("method", ""); const json params = request.value("params", json::object()); - const TelemetrySnapshot snapshot = store_.Snapshot(); + // No hoisted Snapshot(): each endpoint fetches only what it needs. + // Snapshot() deep-copies every rolling history (up to 12000 points + // per signal), which made these 30+ Hz polls absurdly expensive. json result; if (method == "device.status") { + const auto stats = store_.GetStatsLine(); result = {{"app", "RTE Studio"}, {"device_port", devicePort_}, - {"connected", !devicePort_.empty() && !snapshot.suspended}, - {"suspended", snapshot.suspended}, {"rx_hz", snapshot.rxHz}, + {"connected", !devicePort_.empty() && !stats.suspended}, + {"suspended", stats.suspended}, {"rx_hz", stats.rxHz}, {"external_writes_enabled", externalDeviceWritesEnabled_}}; } else if (method == "device.telemetry") { - result = {{"rx_hz", snapshot.rxHz}, {"suspended", snapshot.suspended}, - {"signals", snapshot.latest}, {"strings", snapshot.latestStr}}; + const auto view = store_.GetDeviceView(); + result = {{"rx_hz", view.stats.rxHz}, {"suspended", view.stats.suspended}, + {"signals", view.latest}, {"strings", view.latestStr}}; } else if (method == "device.console") { const std::uint64_t since = params.value("since", std::uint64_t{0}); const auto lines = std::clamp(params.value("lines", std::size_t{100}), std::size_t{1}, std::size_t{1000}); - result = ConsoleJson(snapshot, since, lines); + result = ConsoleJson(store_.ConsoleSince(since), + store_.LatestConsoleSeq(), + store_.SessionEpoch(), lines); } else if (method == "device.command") { if (!externalDeviceWritesEnabled_) { return json{{"ok", false}, @@ -168,7 +178,8 @@ std::string LocalSessionServer::HandleRequest(const std::string& line) const { if (command.empty()) { return json{{"ok", false}, {"error", "command is empty"}}.dump(); } - if (snapshot.suspended || !commandHandler_ || !commandHandler_(command)) { + if (store_.GetStatsLine().suspended || !commandHandler_ + || !commandHandler_(command)) { return json{{"ok", false}, {"error", "device command could not be sent"}}.dump(); } result = {{"sent", true}, {"command", command}}; diff --git a/Source/NodeGUI/src/runtime/PendingQueue.h b/Source/NodeGUI/src/runtime/PendingQueue.h new file mode 100644 index 00000000..5bf65d6b --- /dev/null +++ b/Source/NodeGUI/src/runtime/PendingQueue.h @@ -0,0 +1,125 @@ +#pragma once + +#include +#include +#include +#include +#include +#include +#include + +namespace NodeGUI::runtime { + +// Item types for the RuntimeController producer -> GUI handoff queue. They +// mirror the TelemetryStore mutation they cause once drained. +struct QueuedF32 { + std::string key; + float value; + float tsec; +}; +struct QueuedString { + std::string key; + std::string value; +}; +struct QueuedConsole { + std::string text; +}; +struct QueuedStats { + float rxHz; + float rxBytesPerSec; + uint64_t goodFrames; + uint64_t badFrames; + uint64_t rejectCrc; + uint64_t rejectHdr; + uint64_t rejectLen; + uint64_t rejectPayloadParse; + uint64_t rejectUnknownId; + uint32_t seq; +}; +using PendingItem = + std::variant; + +// Bounded handoff queue between the telemetry client callbacks (producer +// threads) and the GUI thread's drain timer. +// +// Policy: past kCoalesceThreshold (the GUI is stalled, e.g. behind a modal +// dialog) F32 and string items coalesce per key — newest value wins, writing +// into the key's pending slot — and past kHardCap new F32/string items are +// dropped. QueuedConsole and QueuedStats items always append: they are the +// operator-visible record of what the device said and did, and their volume +// is small next to telemetry. Dropped and coalesced counts are returned by +// Drain() so the consumer can surface them (throttled) in the console. +// +// All members are guarded internally; Push()/Drain() may race freely. +class PendingQueue { +public: + static constexpr std::size_t kCoalesceThreshold = 4096; + static constexpr std::size_t kHardCap = 65536; + + void Push(PendingItem item) { + std::lock_guard lock(mtx_); + if (queue_.size() >= kCoalesceThreshold) { + if (const auto* f32 = std::get_if(&item)) { + auto [it, inserted] = + f32Index_.try_emplace(f32->key, queue_.size()); + if (!inserted) { + // Newest value wins the existing slot (position kept). + queue_[it->second] = std::move(item); + ++coalesced_; + return; + } + if (queue_.size() >= kHardCap) { + f32Index_.erase(it); + ++dropped_; + return; + } + queue_.push_back(std::move(item)); + return; + } + if (const auto* str = std::get_if(&item)) { + auto [it, inserted] = + stringIndex_.try_emplace(str->key, queue_.size()); + if (!inserted) { + queue_[it->second] = std::move(item); + ++coalesced_; + return; + } + if (queue_.size() >= kHardCap) { + stringIndex_.erase(it); + ++dropped_; + return; + } + queue_.push_back(std::move(item)); + return; + } + // QueuedConsole / QueuedStats always append (see class comment). + } + queue_.push_back(std::move(item)); + } + + // Moves everything out and resets the coalescing state. Positions in the + // key maps become stale with the swap, so the maps never outlive a drain. + std::vector Drain(uint64_t& coalesced, uint64_t& dropped) { + std::lock_guard lock(mtx_); + coalesced = coalesced_; + dropped = dropped_; + coalesced_ = 0; + dropped_ = 0; + f32Index_.clear(); + stringIndex_.clear(); + std::vector out; + out.swap(queue_); + return out; + } + +private: + std::mutex mtx_; + std::vector queue_; + // key → pending queue slot, valid only while the queue holds the item. + std::unordered_map f32Index_; + std::unordered_map stringIndex_; + uint64_t dropped_ = 0; + uint64_t coalesced_ = 0; +}; + +} // namespace NodeGUI::runtime diff --git a/Source/NodeGUI/src/runtime/RuntimeController.cpp b/Source/NodeGUI/src/runtime/RuntimeController.cpp index 0bbac3de..14c088ce 100644 --- a/Source/NodeGUI/src/runtime/RuntimeController.cpp +++ b/Source/NodeGUI/src/runtime/RuntimeController.cpp @@ -36,21 +36,25 @@ constexpr SimWave kSimWaves[] = { RuntimeController::RuntimeController(QString port, bool simulate, Protocol protocol, + QString tcpHost, + int tcpPort, QObject* parent) : QObject(parent) , port_(std::move(port)) + , tcpHost_(std::move(tcpHost)) + , tcpPort_(tcpPort) , simulate_(simulate) , protocol_(protocol) , startTime_(std::chrono::steady_clock::now()) { legacyClient_.onF32 = [this](const std::string& key, float value, float tsec) { - Push(F32Item{key, value, tsec}); + Push(QueuedF32{key, value, tsec}); }; legacyClient_.onString = [this](const std::string& key, const std::string& value) { - Push(StringItem{key, value}); + Push(QueuedString{key, value}); }; - legacyClient_.onConsole = [this](const std::string& line) { Push(ConsoleItem{line}); }; + legacyClient_.onConsole = [this](const std::string& line) { Push(QueuedConsole{line}); }; legacyClient_.onStats = [this](const LegacyTelemetryClient::Stats& s) { - Push(StatsItem{s.rxHz, + Push(QueuedStats{s.rxHz, s.rxBytesPerSec, s.goodFrames, s.badFrames, @@ -63,13 +67,13 @@ RuntimeController::RuntimeController(QString port, }; ivpClient_.onF32Value([this](uint16_t, const std::string& key, float value, uint32_t) { - Push(F32Item{key, value, NowSec()}); + Push(QueuedF32{key, value, NowSec()}); }); ivpClient_.onStringValue([this](uint16_t, const std::string& key, const std::string& value, - uint32_t) { Push(StringItem{key, value}); }); - ivpClient_.onConsoleLine([this](const std::string& line) { Push(ConsoleItem{line}); }); + uint32_t) { Push(QueuedString{key, value}); }); + ivpClient_.onConsoleLine([this](const std::string& line) { Push(QueuedConsole{line}); }); ivpClient_.onStats([this](const ivp::ClientStats& s) { - Push(StatsItem{s.rx_hz, + Push(QueuedStats{s.rx_hz, s.rx_bytes_per_sec, s.good_frames, s.bad_frames, @@ -80,29 +84,110 @@ RuntimeController::RuntimeController(QString port, 0, s.last_seq}); }); + + tcpClient_.onF32Value = [this](uint16_t, const std::string& key, float value, uint32_t) { + Push(QueuedF32{key, value, NowSec()}); + }; + tcpClient_.onStringValue = [this](uint16_t, const std::string& key, const std::string& value, + uint32_t) { Push(QueuedString{key, value}); }; + tcpClient_.onConsoleLine = [this](const std::string& line) { Push(QueuedConsole{line}); }; + tcpClient_.onStats = [this](const ivp::ClientStats& s) { + Push(QueuedStats{s.rx_hz, + s.rx_bytes_per_sec, + s.good_frames, + s.bad_frames, + s.reject_crc, + s.reject_hdr, + s.reject_len, + s.reject_decode, + 0, + s.last_seq}); + }; } RuntimeController::~RuntimeController() { legacyClient_.stop(); ivpClient_.stop(); + tcpClient_.Stop(); } void RuntimeController::Start() { + StartActiveLink(); + + drainTimer_ = new QTimer(this); + drainTimer_->setInterval(33); // ~30 Hz GUI updates + connect(drainTimer_, &QTimer::timeout, this, &RuntimeController::DrainQueue); + drainTimer_->start(); +} + +void RuntimeController::StartActiveLink() { + if (linkOverride_) { + tcpClient_.Start(overrideHost_, overridePort_); + return; + } if (simulate_) { - simTimer_ = new QTimer(this); - simTimer_->setInterval(10); // 100 Hz - connect(simTimer_, &QTimer::timeout, this, &RuntimeController::TickSimulator); + if (!simTimer_) { + simTimer_ = new QTimer(this); + simTimer_->setInterval(10); // 100 Hz + connect(simTimer_, &QTimer::timeout, this, &RuntimeController::TickSimulator); + } simTimer_->start(); + return; + } + if (UsingTcp()) { + tcpClient_.Start(tcpHost_, tcpPort_); } else if (protocol_ == Protocol::Legacy) { legacyClient_.start(port_.toStdString()); } else { ivpClient_.start(port_.toStdString()); } +} - drainTimer_ = new QTimer(this); - drainTimer_->setInterval(33); // ~30 Hz GUI updates - connect(drainTimer_, &QTimer::timeout, this, &RuntimeController::DrainQueue); - drainTimer_->start(); +void RuntimeController::StopActiveLink() { + if (simTimer_) { + simTimer_->stop(); + } + legacyClient_.stop(); + ivpClient_.stop(); + tcpClient_.Stop(); +} + +void RuntimeController::ConnectTcpOverride(const QString& host, int port) { + QString normalized = host.trimmed(); + // A listener may announce a wildcard bind address; connect via loopback. + if (normalized == QStringLiteral("0.0.0.0")) { + normalized = QStringLiteral("127.0.0.1"); + } else if (normalized == QStringLiteral("::")) { + normalized = QStringLiteral("::1"); + } + if (linkOverride_ && overrideHost_ == normalized && overridePort_ == port) { + return; // already attached to exactly this endpoint + } + overrideHost_ = normalized; + overridePort_ = port; + linkOverride_ = true; + if (suspended_) { + return; + } + StopActiveLink(); + tcpClient_.Start(overrideHost_, overridePort_); +} + +void RuntimeController::ClearLinkOverride() { + if (!linkOverride_) { + return; + } + linkOverride_ = false; + StopActiveLink(); + overrideHost_.clear(); + overridePort_ = 0; + if (!suspended_) { + StartActiveLink(); + } +} + +bool RuntimeController::IsTcpConnected() const { + return tcpClient_.IsConnected(); } void RuntimeController::SetPort(const QString& port) { @@ -111,27 +196,25 @@ void RuntimeController::SetPort(const QString& port) { return; } - if (!simulate_) { - if (protocol_ == Protocol::Legacy) { - legacyClient_.stop(); - } else { - ivpClient_.stop(); - } + // Only the serial link is re-targeted here; a TCP override or the + // simulated feed keeps running untouched. + const bool restartSerial = !simulate_ && !linkOverride_ && !suspended_; + if (restartSerial) { + StopActiveLink(); } port_ = normalized; - if (!simulate_ && !suspended_) { - if (protocol_ == Protocol::Legacy) { - legacyClient_.start(port_.toStdString()); - } else { - ivpClient_.start(port_.toStdString()); - } + if (restartSerial) { + StartActiveLink(); } } bool RuntimeController::SendLine(const std::string& line) { - if (suspended_ || simulate_) { + if (suspended_ || (simulate_ && !linkOverride_)) { return false; } + if (linkOverride_ || UsingTcp()) { + return tcpClient_.SendLine(line); + } return protocol_ == Protocol::Legacy ? legacyClient_.sendLine(line) : ivpClient_.sendCommandLine(line); } @@ -173,10 +256,12 @@ void RuntimeController::SuspendForFlash() { } suspended_ = true; store_.SetSuspended(true); - if (simulate_) { + if (simulate_ && !linkOverride_) { return; } - if (protocol_ == Protocol::Legacy) { + if (linkOverride_ || UsingTcp()) { + tcpClient_.Stop(); + } else if (protocol_ == Protocol::Legacy) { legacyClient_.suspend(); } else { ivpClient_.stop(); @@ -187,41 +272,66 @@ void RuntimeController::ResumeAfterFlash() { if (!suspended_) { return; } - if (!simulate_) { - if (protocol_ == Protocol::Legacy) { - legacyClient_.resume(); - } else { - ivpClient_.start(port_.toStdString()); - } - } suspended_ = false; store_.SetSuspended(false); + if (simulate_ && !linkOverride_) { + // The simulated feed keeps running across a flash suspend, so there + // is normally nothing to restart. If it is down, a live-link override + // was cleared while suspended: start whatever link is current rather + // than leaving a dead feed. + if (!simTimer_ || !simTimer_->isActive()) { + StartActiveLink(); + } + return; + } + if (linkOverride_ || UsingTcp()) { + tcpClient_.Start(linkOverride_ ? overrideHost_ : tcpHost_, + linkOverride_ ? overridePort_ : tcpPort_); + } else if (protocol_ == Protocol::Legacy) { + legacyClient_.resume(); + } else { + ivpClient_.start(port_.toStdString()); + } } void RuntimeController::Push(PendingItem item) { - std::lock_guard lock(queueMtx_); - queue_.push_back(std::move(item)); + pending_.Push(std::move(item)); +} + +void RuntimeController::NoteQueueBacklog(uint64_t coalesced, uint64_t dropped) { + if (coalesced == 0 && dropped == 0) { + return; + } + const auto now = std::chrono::steady_clock::now(); + if (lastQueueNotice_.time_since_epoch() != std::chrono::steady_clock::duration::zero() + && now - lastQueueNotice_ < std::chrono::seconds(5)) { + return; + } + lastQueueNotice_ = now; + store_.AddConsoleLine( + "runtime: GUI was busy; queue backlog resolved by coalescing " + + std::to_string(coalesced) + " and dropping " + std::to_string(dropped) + + " telemetry value(s) (latest values always win; console and stats are never dropped)"); } void RuntimeController::DrainQueue() { - std::vector items; - { - std::lock_guard lock(queueMtx_); - if (queue_.empty()) { - return; - } - items.swap(queue_); + uint64_t coalesced = 0; + uint64_t dropped = 0; + const std::vector items = pending_.Drain(coalesced, dropped); + if (items.empty()) { + NoteQueueBacklog(coalesced, dropped); + return; } for (const auto& item : items) { std::visit( [this](const auto& v) { using T = std::decay_t; - if constexpr (std::is_same_v) { + if constexpr (std::is_same_v) { store_.AddF32(v.key, v.value, v.tsec); - } else if constexpr (std::is_same_v) { + } else if constexpr (std::is_same_v) { store_.AddString(v.key, v.value); - } else if constexpr (std::is_same_v) { + } else if constexpr (std::is_same_v) { store_.AddConsoleLine(v.text); store_.MarkLastCommandReceived(); } else { @@ -240,6 +350,7 @@ void RuntimeController::DrainQueue() { item); } + NoteQueueBacklog(coalesced, dropped); emit storeChanged(); } @@ -255,17 +366,17 @@ void RuntimeController::TickSimulator() { const double phase = 2.0 * M_PI * w.freq * t + i * 1.1; const float value = static_cast(w.offset + w.amplitude * std::sin(phase)) + noise(rng); - Push(F32Item{w.name, value, t}); + Push(QueuedF32{w.name, value, t}); } // Occasional console output so the console path is exercised. if (simTick_ % 100 == 0) { - Push(ConsoleItem{"sim: tick " + std::to_string(simTick_)}); + Push(QueuedConsole{"sim: tick " + std::to_string(simTick_)}); } // Stats every second. if (simTick_ % 100 == 0) { - Push(StatsItem{100.0f, + Push(QueuedStats{100.0f, 100.0f * 40.0f, simTick_ / 100 * 100, 0, @@ -283,4 +394,14 @@ float RuntimeController::NowSec() const { .count(); } +QString RuntimeController::Port() const { + if (linkOverride_) { + return QStringLiteral("sim %1:%2").arg(overrideHost_).arg(overridePort_); + } + if (!UsingTcp()) { + return port_; + } + return QStringLiteral("tcp %1:%2").arg(tcpHost_).arg(tcpPort_); +} + } // namespace NodeGUI::runtime diff --git a/Source/NodeGUI/src/runtime/RuntimeController.h b/Source/NodeGUI/src/runtime/RuntimeController.h index 5cd1717f..dd7436b6 100644 --- a/Source/NodeGUI/src/runtime/RuntimeController.h +++ b/Source/NodeGUI/src/runtime/RuntimeController.h @@ -1,6 +1,8 @@ #pragma once +#include "IvpTcpClient.h" #include "LegacyTelemetryClient.h" +#include "PendingQueue.h" #include "TelemetryStore.h" #include @@ -11,6 +13,8 @@ #include #include #include +#include +#include #include #include @@ -27,13 +31,16 @@ enum class Protocol { Inverter, }; -// Bridges the threaded telemetry client into the Qt world. Client callbacks -// fire on the client's worker thread; they only append to a pending queue. A -// ~33 ms QTimer on the GUI thread drains the queue into the TelemetryStore and -// emits storeChanged() once per batch. +// Bridges the telemetry client(s) into the Qt world. Client callbacks fire on +// the client's worker thread (Legacy/Inverter) or on the GUI thread (TCP); +// they only append to a pending queue. A ~33 ms QTimer on the GUI thread +// drains the queue into the TelemetryStore and emits storeChanged() once per +// batch. // -// With simulate=true no serial port is opened; synthetic 100 Hz signals are -// fed through the same path (used for UI verification without hardware). +// With simulate=true no link is opened; synthetic 100 Hz signals are fed +// through the same path (used for UI verification without hardware). When a +// TCP endpoint is given (--tcp host:port), the COBS-framed InverterProtocol +// stream from HostSim --live is used instead of the serial port. class RuntimeController : public QObject { Q_OBJECT @@ -41,6 +48,8 @@ class RuntimeController : public QObject { RuntimeController(QString port, bool simulate, Protocol protocol = Protocol::Legacy, + QString tcpHost = {}, + int tcpPort = 0, QObject* parent = nullptr); ~RuntimeController() override; @@ -66,11 +75,29 @@ class RuntimeController : public QObject { // a new session at the current time. void ClearSession(); - QString Port() const { return port_; } + QString Port() const; void SetPort(const QString& port); bool IsSimulating() const { return simulate_; } Protocol GetProtocol() const { return protocol_; } + // True when --tcp host:port was given; the TCP IVP link replaces the + // serial port for this run. + bool UsingTcp() const { return !tcpHost_.isEmpty() && tcpPort_ > 0; } + + // Temporarily switches the live link to a HostSim --live TCP endpoint + // (Build & Run Simulation attach) without changing the configured link; + // ClearLinkOverride() restores it. The TCP client reconnects on its own + // until host_sim is listening, so calling this before the simulator is up + // is safe. Wildcard bind hosts (0.0.0.0/::) are normalized to loopback, + // and re-attaching to the endpoint already in use is a no-op. + void ConnectTcpOverride(const QString& host, int port); + void ClearLinkOverride(); + bool HasLinkOverride() const { return linkOverride_; } + + // True while the TCP IVP client holds an open connection, on the + // configured --tcp link or an active override. + bool IsTcpConnected() const; + // Frees the serial port for the firmware updater and back. void SuspendForFlash(); void ResumeAfterFlash(); @@ -81,51 +108,42 @@ class RuntimeController : public QObject { void sessionCleared(); private: - struct F32Item { - std::string key; - float value; - float tsec; - }; - struct StringItem { - std::string key; - std::string value; - }; - struct ConsoleItem { - std::string text; - }; - struct StatsItem { - float rxHz; - float rxBytesPerSec; - uint64_t goodFrames; - uint64_t badFrames; - uint64_t rejectCrc; - uint64_t rejectHdr; - uint64_t rejectLen; - uint64_t rejectPayloadParse; - uint64_t rejectUnknownId; - uint32_t seq; - }; - using PendingItem = std::variant; - + // Client callbacks fire from arbitrary producer threads; Push() appends + // to pending_ and the ~33 ms GUI timer drains. See PendingQueue for the + // bounding policy when the GUI stalls (coalesce/drop, counters reported + // throttled into the console). void Push(PendingItem item); void DrainQueue(); + void NoteQueueBacklog(uint64_t coalesced, uint64_t dropped); void TickSimulator(); float NowSec() const; bool SendLine(const std::string& line); + // Starts/stops whichever link the current configuration selects + // (override TCP, simulated feed, configured TCP, or serial). + void StartActiveLink(); + void StopActiveLink(); QString port_; + QString tcpHost_; + int tcpPort_ = 0; bool simulate_ = false; Protocol protocol_; bool suspended_ = false; + bool linkOverride_ = false; + QString overrideHost_; + int overridePort_ = 0; - // Only the backend matching protocol_ is started. + // Only the backend matching the link selection (simulate / tcp / protocol) + // is started. LegacyTelemetryClient legacyClient_; ivp::InverterClient ivpClient_; + IvpTcpClient tcpClient_; TelemetryStore store_; QTimer* drainTimer_ = nullptr; - std::mutex queueMtx_; - std::vector queue_; + PendingQueue pending_; + // GUI thread only: throttles the console notice about queue drops. + std::chrono::steady_clock::time_point lastQueueNotice_{}; // Simulator state. QTimer* simTimer_ = nullptr; diff --git a/Source/NodeGUI/src/runtime/RuntimeTab.cpp b/Source/NodeGUI/src/runtime/RuntimeTab.cpp index a99caa59..e4b47e5c 100644 --- a/Source/NodeGUI/src/runtime/RuntimeTab.cpp +++ b/Source/NodeGUI/src/runtime/RuntimeTab.cpp @@ -18,6 +18,7 @@ #include #include #include +#include #include namespace NodeGUI::runtime { @@ -30,8 +31,109 @@ QSettings MakeSettings() { return QSettings(QStringLiteral("RTE"), QStringLiteral("RTEStudio")); } +bool LayoutIsEmpty(const std::array& sets) { + for (const QStringList& list : sets) { + if (!list.isEmpty()) { + return false; + } + } + return true; +} + } // namespace +std::array RuntimeTab::BuiltinSpwmLayout() { + return {{ + QStringList{QStringLiteral("pwm_gate_u"), + QStringLiteral("pwm_gate_v"), + QStringLiteral("pwm_gate_w")}, + QStringList{QStringLiteral("duty_u"), + QStringLiteral("duty_v"), + QStringLiteral("duty_w")}, + QStringList{QStringLiteral("i_a"), QStringLiteral("i_b"), QStringLiteral("i_c")}, + }}; +} + +std::array RuntimeTab::BuiltinFocLayout() { + return {{ + QStringList{QStringLiteral("cg_id_a"), QStringLiteral("cg_iq_a")}, + QStringList{QStringLiteral("cg_vd_v"), QStringLiteral("cg_vq_v")}, + QStringList{QStringLiteral("cg_iu_a"), + QStringLiteral("cg_iv_a"), + QStringLiteral("cg_iw_a")}, + }}; +} + +void RuntimeTab::EnsureBuiltinPresets() { + auto settings = MakeSettings(); + const bool hasSpwm = settings.contains(QStringLiteral("runtime/presets/SPWM")); + const bool hasFoc = settings.contains(QStringLiteral("runtime/presets/FOC")); + if (hasSpwm && hasFoc) { + return; + } + + if (!hasSpwm) { + const auto layout = BuiltinSpwmLayout(); + settings.beginGroup(QStringLiteral("runtime/presets/SPWM")); + for (int i = 0; i < 3; ++i) { + settings.setValue(QStringLiteral("graph%1").arg(i + 1), layout[i]); + } + settings.endGroup(); + } + + if (!hasFoc) { + const auto layout = BuiltinFocLayout(); + settings.beginGroup(QStringLiteral("runtime/presets/FOC")); + for (int i = 0; i < 3; ++i) { + settings.setValue(QStringLiteral("graph%1").arg(i + 1), layout[i]); + } + settings.endGroup(); + } + + QStringList recent = settings.value(QStringLiteral("runtime/recent")).toStringList(); + if (!hasSpwm && !recent.contains(QStringLiteral("SPWM"))) { + recent.prepend(QStringLiteral("SPWM")); + } + if (!hasFoc && !recent.contains(QStringLiteral("FOC"))) { + recent.prepend(QStringLiteral("FOC")); + } + while (recent.size() > kMaxRecentPresets) { + recent.removeLast(); + } + settings.setValue(QStringLiteral("runtime/recent"), recent); +} + +void RuntimeTab::ApplyLayoutIfEmpty(const std::array& layout) { + if (!LayoutIsEmpty(signalTablePanel_->GraphSignalSets())) { + return; + } + signalTablePanel_->SetGraphSignalSets(layout); + if (layout == BuiltinFocLayout()) { + ApplyFocViewWindows(); + presetStatus_->setText(QStringLiteral("applied FOC plot layout")); + } else { + ApplySpwmViewWindows(); + presetStatus_->setText(QStringLiteral("applied SPWM plot layout")); + } +} + +void RuntimeTab::ApplySpwmViewWindows() { + // G1 scope (~5 carrier periods @ 100 Hz), G2 duty slow, G3 current. + // The slider path only syncs the shared-window control; its + // viewSecondsChanged emission must not fire here, or it would stomp the + // per-plot windows with one uniform window. + const QSignalBlocker blockSignals(signalTablePanel_); + signalTablePanel_->SetViewSeconds(1.0); + telemetryPanel_->SetGraphViewSeconds({0.05, 1.0, 0.5}); +} + +void RuntimeTab::ApplyFocViewWindows() { + // G1 d/q current, G2 d/q voltage, G3 phase currents. + const QSignalBlocker blockSignals(signalTablePanel_); + signalTablePanel_->SetViewSeconds(0.5); + telemetryPanel_->SetGraphViewSeconds({0.5, 0.5, 0.5}); +} + RuntimeTab::RuntimeTab(RuntimeController* controller, QWidget* parent) : QWidget(parent) , controller_(controller) { @@ -79,6 +181,14 @@ RuntimeTab::RuntimeTab(RuntimeController* controller, QWidget* parent) auto* loadButton = new QPushButton(QStringLiteral("Load"), this); connect(loadButton, &QPushButton::clicked, this, &RuntimeTab::OnLoadPreset); presetRow->addWidget(loadButton); + auto* spwmButton = new QPushButton(QStringLiteral("SPWM"), this); + spwmButton->setToolTip(QStringLiteral("Apply the SPWM demo plot layout")); + connect(spwmButton, &QPushButton::clicked, this, &RuntimeTab::OnLoadBuiltinSpwm); + presetRow->addWidget(spwmButton); + auto* focButton = new QPushButton(QStringLiteral("FOC"), this); + focButton->setToolTip(QStringLiteral("Apply the FOC plot layout")); + connect(focButton, &QPushButton::clicked, this, &RuntimeTab::OnLoadBuiltinFoc); + presetRow->addWidget(focButton); presetStatus_ = new QLabel(this); presetRow->addWidget(presetStatus_); presetRow->addStretch(1); @@ -101,11 +211,26 @@ RuntimeTab::RuntimeTab(RuntimeController* controller, QWidget* parent) connect(controller_, &RuntimeController::storeChanged, this, &RuntimeTab::OnStoreChanged); + EnsureBuiltinPresets(); RefreshRecentCombo(); OnStoreChanged(); } void RuntimeTab::OnStoreChanged() { + if (!applied_builtin_layout_) { + // FOC graphs publish d/q currents; prefer the FOC layout when those + // are present. SPWM demo graphs do not, so duty_u triggers the SPWM + // layout. Only auto-applies while the layout is still untouched. + float probe = 0.0f; + if (controller_->Store().LatestValue("cg_id_a", probe)) { + ApplyLayoutIfEmpty(BuiltinFocLayout()); + applied_builtin_layout_ = true; + } else if (controller_->Store().LatestValue("duty_u", probe)) { + ApplyLayoutIfEmpty(BuiltinSpwmLayout()); + applied_builtin_layout_ = true; + } + } + // Cheap scalar read — the full Snapshot() copies every history and is far // too expensive for the ~30 Hz header refresh. const auto stats = controller_->Store().GetStatsLine(); @@ -161,6 +286,22 @@ void RuntimeTab::OnSavePreset() { recentCombo_->setCurrentText(name); } +void RuntimeTab::OnLoadBuiltinSpwm() { + signalTablePanel_->SetGraphSignalSets(BuiltinSpwmLayout()); + ApplySpwmViewWindows(); + recentCombo_->setCurrentText(QStringLiteral("SPWM")); + presetStatus_->setText(QStringLiteral("loaded SPWM layout")); + applied_builtin_layout_ = true; +} + +void RuntimeTab::OnLoadBuiltinFoc() { + signalTablePanel_->SetGraphSignalSets(BuiltinFocLayout()); + ApplyFocViewWindows(); + recentCombo_->setCurrentText(QStringLiteral("FOC")); + presetStatus_->setText(QStringLiteral("loaded FOC layout")); + applied_builtin_layout_ = true; +} + void RuntimeTab::OnLoadPreset() { const QString name = recentCombo_->currentText(); if (name.isEmpty()) { @@ -200,13 +341,21 @@ void RuntimeTab::OnExportSession() { RuntimeSessionMetadata metadata; metadata.port = controller_->Port(); - metadata.mode = controller_->IsSimulating() - ? QStringLiteral("simulation") - : QStringLiteral("device"); - metadata.protocol = - controller_->GetProtocol() == Protocol::Legacy - ? QStringLiteral("legacy") - : QStringLiteral("inverter"); + // Both TCP entry points (--tcp and a Build & Run attach override) speak + // InverterProtocol to HostSim, so the session is a simulation over ivp + // regardless of the configured serial protocol. + if (controller_->HasLinkOverride() || controller_->UsingTcp()) { + metadata.mode = QStringLiteral("simulation"); + metadata.protocol = QStringLiteral("inverter"); + } else { + metadata.mode = controller_->IsSimulating() + ? QStringLiteral("simulation") + : QStringLiteral("device"); + metadata.protocol = + controller_->GetProtocol() == Protocol::Legacy + ? QStringLiteral("legacy") + : QStringLiteral("inverter"); + } exportStatus_->setText(QStringLiteral("exporting\u2026")); const RuntimeSessionSnapshot session = controller_->CaptureSession(); diff --git a/Source/NodeGUI/src/runtime/RuntimeTab.h b/Source/NodeGUI/src/runtime/RuntimeTab.h index 09825886..86609b02 100644 --- a/Source/NodeGUI/src/runtime/RuntimeTab.h +++ b/Source/NodeGUI/src/runtime/RuntimeTab.h @@ -2,6 +2,9 @@ #include +#include +#include + class QComboBox; class QLabel; class QLineEdit; @@ -42,14 +45,26 @@ private slots: void OnStoreChanged(); void OnSavePreset(); void OnLoadPreset(); + void OnLoadBuiltinSpwm(); + void OnLoadBuiltinFoc(); void OnExportSession(); void OnClearSession(); private: + // Built-in demo layouts; also installed as persisted presets so they can + // be tweaked by the user. + static std::array BuiltinSpwmLayout(); + static std::array BuiltinFocLayout(); + void EnsureBuiltinPresets(); + void ApplyLayoutIfEmpty(const std::array& layout); + void ApplySpwmViewWindows(); + void ApplyFocViewWindows(); + void RefreshRecentCombo(); RuntimeController* controller_; FramKeysManager* framKeysManager_ = nullptr; + bool applied_builtin_layout_ = false; QLabel* headerLabel_ = nullptr; QLabel* exportStatus_ = nullptr; diff --git a/Source/NodeGUI/src/runtime/SignalPlotWidget.cpp b/Source/NodeGUI/src/runtime/SignalPlotWidget.cpp index 28553042..4f452fd0 100644 --- a/Source/NodeGUI/src/runtime/SignalPlotWidget.cpp +++ b/Source/NodeGUI/src/runtime/SignalPlotWidget.cpp @@ -95,7 +95,7 @@ void SignalPlotWidget::SetSignals(const QStringList& names) void SignalPlotWidget::SetViewSeconds(double seconds) { - viewSeconds_ = std::clamp(seconds, 0.5, 60.0); + viewSeconds_ = std::clamp(seconds, 0.05, 60.0); update(); } @@ -120,7 +120,12 @@ void SignalPlotWidget::Refresh() } if (store_) { for (Series& s : series_) { - store_->CopyHistoryInto(s.name.toStdString(), s.t, s.y); + // Clear on failure: after Clear Session the signal may be unknown + // until it streams again, and the old trace must not linger. + if (!store_->CopyHistoryInto(s.name.toStdString(), s.t, s.y)) { + s.t.clear(); + s.y.clear(); + } } } update(); diff --git a/Source/NodeGUI/src/runtime/SignalPlotWidget.h b/Source/NodeGUI/src/runtime/SignalPlotWidget.h index 493cb434..2c3e5b11 100644 --- a/Source/NodeGUI/src/runtime/SignalPlotWidget.h +++ b/Source/NodeGUI/src/runtime/SignalPlotWidget.h @@ -33,7 +33,7 @@ class SignalPlotWidget : public QOpenGLWidget, protected QOpenGLFunctions { void SetStore(const TelemetryStore* store); // call once void SetSignals(const QStringList& names); // signals assigned to this plot QStringList Signals() const { return signals_; } - void SetViewSeconds(double seconds); // sliding X window, 0.5..60 + void SetViewSeconds(double seconds); // sliding X window, 0.05..60 double ViewSeconds() const { return viewSeconds_; } public slots: diff --git a/Source/NodeGUI/src/runtime/SignalTablePanel.cpp b/Source/NodeGUI/src/runtime/SignalTablePanel.cpp index 2f535ff7..ddfa823e 100644 --- a/Source/NodeGUI/src/runtime/SignalTablePanel.cpp +++ b/Source/NodeGUI/src/runtime/SignalTablePanel.cpp @@ -22,8 +22,8 @@ SignalTablePanel::SignalTablePanel(RuntimeController* controller, QWidget* paren auto* controlsRow = new QHBoxLayout; controlsRow->addWidget(new QLabel(QStringLiteral("Plot view (sec)"), this)); viewSlider_ = new QSlider(Qt::Horizontal, this); - viewSlider_->setRange(5, 600); // 0.5 .. 60.0 s in 0.1 s steps - viewSlider_->setValue(50); + viewSlider_->setRange(1, 1200); // 0.05 .. 60.0 s in 0.05 s steps + viewSlider_->setValue(100); connect(viewSlider_, &QSlider::valueChanged, this, &SignalTablePanel::OnViewSecondsChanged); controlsRow->addWidget(viewSlider_, 1); filterEdit_ = new QLineEdit(this); @@ -63,6 +63,18 @@ void SignalTablePanel::SetGraphSignalSets(const std::array& sets emit graphSignalsChanged(graphSignals_); } +void SignalTablePanel::SetViewSeconds(double seconds) { + // Slider is in twentieths of a second. + const int pos = qBound(viewSlider_->minimum(), + static_cast(seconds * 20.0 + 0.5), + viewSlider_->maximum()); + if (viewSlider_->value() != pos) { + viewSlider_->setValue(pos); // fires OnViewSecondsChanged -> viewSecondsChanged + } else { + emit viewSecondsChanged(seconds); + } +} + void SignalTablePanel::OnStoreChanged() { RebuildSignalTable(); @@ -81,7 +93,7 @@ void SignalTablePanel::OnFilterChanged(const QString& /*text*/) { } void SignalTablePanel::OnViewSecondsChanged(int value) { - emit viewSecondsChanged(value / 10.0); + emit viewSecondsChanged(value / 20.0); } void SignalTablePanel::RebuildSignalTable() { diff --git a/Source/NodeGUI/src/runtime/SignalTablePanel.h b/Source/NodeGUI/src/runtime/SignalTablePanel.h index 2a03cd6e..8709a1f1 100644 --- a/Source/NodeGUI/src/runtime/SignalTablePanel.h +++ b/Source/NodeGUI/src/runtime/SignalTablePanel.h @@ -26,6 +26,10 @@ class SignalTablePanel : public QWidget { std::array GraphSignalSets() const; void SetGraphSignalSets(const std::array& sets); + // Programmatically set the shared plot-view window (seconds). Emits + // viewSecondsChanged just as a manual slider drag would. + void SetViewSeconds(double seconds); + signals: void graphSignalsChanged(const std::array& sets); void viewSecondsChanged(double seconds); diff --git a/Source/NodeGUI/src/runtime/TelemetryPanel.cpp b/Source/NodeGUI/src/runtime/TelemetryPanel.cpp index 9d6d8367..95b5acc2 100644 --- a/Source/NodeGUI/src/runtime/TelemetryPanel.cpp +++ b/Source/NodeGUI/src/runtime/TelemetryPanel.cpp @@ -39,6 +39,12 @@ void TelemetryPanel::SetViewSeconds(double seconds) { } } +void TelemetryPanel::SetGraphViewSeconds(const std::array& seconds) { + for (int i = 0; i < 3; ++i) { + plots_[i]->SetViewSeconds(seconds[i]); + } +} + void TelemetryPanel::OnStoreChanged() { for (auto* plot : plots_) { plot->Refresh(); diff --git a/Source/NodeGUI/src/runtime/TelemetryPanel.h b/Source/NodeGUI/src/runtime/TelemetryPanel.h index 1a985bb7..22fd2c6f 100644 --- a/Source/NodeGUI/src/runtime/TelemetryPanel.h +++ b/Source/NodeGUI/src/runtime/TelemetryPanel.h @@ -20,7 +20,10 @@ class TelemetryPanel : public QWidget { public slots: void SetGraphSignals(const std::array& sets); + // Applies one rolling window to all three plots (shared slider path). void SetViewSeconds(double seconds); + // Applies per-plot rolling windows (built-in SPWM/FOC layout presets). + void SetGraphViewSeconds(const std::array& seconds); private slots: void OnStoreChanged(); diff --git a/Source/NodeGUI/src/runtime/TelemetryStore.cpp b/Source/NodeGUI/src/runtime/TelemetryStore.cpp index b989984a..7620e407 100644 --- a/Source/NodeGUI/src/runtime/TelemetryStore.cpp +++ b/Source/NodeGUI/src/runtime/TelemetryStore.cpp @@ -21,16 +21,22 @@ void TelemetryStore::AddF32(const std::string& key, float value, float tsec) { const float sessionTsec = static_cast( sessionTelemetryElapsedOrigin_ + static_cast(tsec - sessionTelemetrySourceOrigin_)); - auto& sessionHistory = sessionFloatSignals_[key]; - sessionHistory.t.push_back(sessionTsec); - sessionHistory.y.push_back(value); + AppendSessionF32Locked(sessionFloatSignals_[key], sessionTsec, value); } void TelemetryStore::AddString(const std::string& key, const std::string& value) { std::lock_guard lock(mtx_); snap_.latestStr[key] = value; - sessionStringSignals_[key].push_back( - SessionStringSample{SessionElapsedSeconds(), value}); + auto& samples = sessionStringSignals_[key]; + samples.push_back(SessionStringSample{SessionElapsedSeconds(), value}); + if (samples.size() > kSessionStringSamples) { + // Drop the oldest half in one batch so steady-state pushes stay + // allocation-free; a sparse string signal older than half the cap + // ago is of little export value. + samples.erase(samples.begin(), + samples.begin() + + static_cast(kSessionStringSamples / 2)); + } } void TelemetryStore::AddConsoleLine(const std::string& text) { @@ -39,6 +45,12 @@ void TelemetryStore::AddConsoleLine(const std::string& text) { snap_.console.push_back(ConsoleLine{seq, text}); sessionConsole_.push_back( SessionConsoleLine{seq, SessionElapsedSeconds(), text}); + if (sessionConsole_.size() > kSessionConsoleCapLines) { + sessionConsole_.erase( + sessionConsole_.begin(), + sessionConsole_.begin() + + static_cast(kSessionConsoleCapLines / 2)); + } while (snap_.console.size() > kConsoleCapLines) { snap_.console.pop_front(); } @@ -54,17 +66,52 @@ void TelemetryStore::AddCommand(const std::string& text, source, text, sent}); + ++unmarkedCommands_; + unmarkedIndex_ = sessionCommands_.size() - 1; + if (sessionCommands_.size() > kSessionCommandCap) { + const std::size_t removed = kSessionCommandCap / 2; + for (std::size_t i = 0; i < removed; ++i) { + if (std::isnan(sessionCommands_[i].receivedTsec)) { + --unmarkedCommands_; + } + } + sessionCommands_.erase( + sessionCommands_.begin(), + sessionCommands_.begin() + static_cast(removed)); + // Indices shifted by `removed`; if the cached scan start fell into + // the erased range the true newest-unmarked position is unknown, so + // restart from the back once (a rare path — caps are generous). + unmarkedIndex_ = unmarkedIndex_ >= removed + ? unmarkedIndex_ - removed + : (sessionCommands_.empty() + ? kNoUnmarkedCommand + : sessionCommands_.size() - 1); + } } void TelemetryStore::MarkLastCommandReceived() { std::lock_guard lock(mtx_); - for (auto it = sessionCommands_.rbegin(); it != sessionCommands_.rend(); - ++it) { - if (std::isnan(it->receivedTsec)) { - it->receivedTsec = SessionElapsedSeconds(); + // Fast path: most calls happen when no command is pending (every console + // line arrives here), so the count check avoids touching the vector. + if (unmarkedCommands_ == 0 || sessionCommands_.empty()) { + return; + } + std::size_t i = std::min(unmarkedIndex_, sessionCommands_.size() - 1); + for (;;) { + if (std::isnan(sessionCommands_[i].receivedTsec)) { + sessionCommands_[i].receivedTsec = SessionElapsedSeconds(); + --unmarkedCommands_; + break; + } + if (i == 0) { + // Bookkeeping slipped; resync so the next call is cheap again. + unmarkedCommands_ = 0; + unmarkedIndex_ = kNoUnmarkedCommand; return; } + --i; } + unmarkedIndex_ = i; } void TelemetryStore::ClearConsole() { @@ -83,10 +130,14 @@ void TelemetryStore::ClearSession() { sessionStringSignals_.clear(); sessionConsole_.clear(); sessionCommands_.clear(); + unmarkedCommands_ = 0; + unmarkedIndex_ = kNoUnmarkedCommand; sessionTelemetryClockInitialized_ = false; sessionTelemetrySourceOrigin_ = 0.0f; sessionTelemetryElapsedOrigin_ = 0.0; - nextConsoleSeq_ = 1; + // nextConsoleSeq_ deliberately keeps counting: since-polling clients + // would silently miss renumbered lines. sessionEpoch_ marks the reset. + ++sessionEpoch_; sessionStartSteady_ = std::chrono::steady_clock::now(); sessionStartWall_ = std::chrono::system_clock::now(); } @@ -136,6 +187,25 @@ TelemetryStore::StatsLine TelemetryStore::GetStatsLine() const { return line; } +TelemetryStore::DeviceView TelemetryStore::GetDeviceView() const { + std::lock_guard lock(mtx_); + DeviceView view; + view.stats.rxHz = snap_.rxHz; + view.stats.rxBytesPerSec = snap_.rxBytesPerSec; + view.stats.goodFrames = snap_.goodFrames; + view.stats.badFrames = snap_.badFrames; + view.stats.rejectCrc = snap_.rejectCrc; + view.stats.rejectHdr = snap_.rejectHdr; + view.stats.rejectLen = snap_.rejectLen; + view.stats.rejectPayloadParse = snap_.rejectPayloadParse; + view.stats.rejectUnknownId = snap_.rejectUnknownId; + view.stats.lastSeq = snap_.lastSeq; + view.stats.suspended = snap_.suspended; + view.latest = snap_.latest; + view.latestStr = snap_.latestStr; + return view; +} + TelemetrySnapshot TelemetryStore::Snapshot() const { std::lock_guard lock(mtx_); return snap_; @@ -149,7 +219,22 @@ RuntimeSessionSnapshot TelemetryStore::SessionSnapshot() const { sessionStartWall_.time_since_epoch()) .count(); result.durationSeconds = SessionElapsedSeconds(); - result.floatSignals = sessionFloatSignals_; + // Export layout: decimated older samples first, then the full-rate + // recent block — monotonic in time, matching the pre-cap format. + for (const auto& [key, store] : sessionFloatSignals_) { + SessionSignalHistory history; + history.t.reserve(store.archiveT.size() + store.recentT.size()); + history.y.reserve(store.archiveY.size() + store.recentY.size()); + history.t.insert(history.t.end(), + store.archiveT.begin(), store.archiveT.end()); + history.t.insert(history.t.end(), + store.recentT.begin(), store.recentT.end()); + history.y.insert(history.y.end(), + store.archiveY.begin(), store.archiveY.end()); + history.y.insert(history.y.end(), + store.recentY.begin(), store.recentY.end()); + result.floatSignals.emplace(key, std::move(history)); + } result.stringSignals = sessionStringSignals_; result.console = sessionConsole_; result.commands = sessionCommands_; @@ -231,6 +316,64 @@ uint64_t TelemetryStore::LatestConsoleSeq() const { return snap_.console.empty() ? 0 : snap_.console.back().seq; } +uint64_t TelemetryStore::SessionEpoch() const { + std::lock_guard lock(mtx_); + return sessionEpoch_; +} + +void TelemetryStore::AppendSessionF32Locked(SessionSignalStore& store, + float t, + float y) { + if (store.recentT.capacity() < kSessionRecentSamples + 1) { + store.recentT.reserve(kSessionRecentSamples + 1); + store.recentY.reserve(kSessionRecentSamples + 1); + } + store.recentT.push_back(t); + store.recentY.push_back(y); + if (store.recentT.size() <= kSessionRecentSamples) { + return; + } + // Fold the oldest half of the recent block into the decimated archive. + const std::size_t fold = kSessionRecentSamples / 2; + for (std::size_t i = 0; i < fold; ++i) { + AppendSessionArchiveLocked(store, store.recentT[i], store.recentY[i]); + } + store.recentT.erase(store.recentT.begin(), + store.recentT.begin() + static_cast(fold)); + store.recentY.erase(store.recentY.begin(), + store.recentY.begin() + static_cast(fold)); +} + +void TelemetryStore::AppendSessionArchiveLocked(SessionSignalStore& store, + float t, + float y) { + // Counter-based decimation: keep one sample per `stride` arrivals. + if (++store.phase < store.stride) { + return; + } + store.phase = 0; + if (store.archiveT.capacity() < kSessionArchiveSamples + 1) { + store.archiveT.reserve(kSessionArchiveSamples + 1); + store.archiveY.reserve(kSessionArchiveSamples + 1); + } + store.archiveT.push_back(t); + store.archiveY.push_back(y); + if (store.archiveT.size() > kSessionArchiveSamples) { + // Progressive halving (oscilloscope-style): keep every second + // sample and double the stride, so archive density decays with age + // while recent samples retain the finest current resolution. + std::size_t w = 0; + for (std::size_t r = 1; r < store.archiveT.size(); r += 2) { + store.archiveT[w] = store.archiveT[r]; + store.archiveY[w] = store.archiveY[r]; + ++w; + } + store.archiveT.resize(w); + store.archiveY.resize(w); + store.stride *= 2; + } +} + void TelemetryStore::TrimHistoryLocked(SignalHistory& hist) const { while (hist.t.size() > kMaxSamples) { hist.t.pop_front(); diff --git a/Source/NodeGUI/src/runtime/TelemetryStore.h b/Source/NodeGUI/src/runtime/TelemetryStore.h index 91a79d8b..2a11b3cc 100644 --- a/Source/NodeGUI/src/runtime/TelemetryStore.h +++ b/Source/NodeGUI/src/runtime/TelemetryStore.h @@ -60,9 +60,17 @@ struct SessionCommand { bool sent = false; }; -// Full, non-rolling capture used by "Export Session". Plot histories below -// remain bounded for rendering performance, while this archive lasts for the -// lifetime of the RuntimeController. +// Bounded session capture used by "Export Session". Without a bound a long +// run would grow without limit (30 min at 3.5 kHz ≈ 6.3M samples per signal). +// +// Per-signal float policy (see TelemetryStore below): the newest +// kSessionRecentSamples samples are kept at full rate; older samples live in +// a progressively decimated archive whose resolution halves each time the +// archive overflows (stride 1, 2, 4, ... starting from the fold). So the +// archive covers the whole session at roughly logarithmic temporal density +// while a full-rate window of the most recent samples is always retained. +// Strings, console, and commands are capped outright (oldest half dropped +// when the cap is reached). struct RuntimeSessionSnapshot { int64_t startedAtUnixMs = 0; double durationSeconds = 0.0; @@ -76,7 +84,7 @@ struct RuntimeSessionSnapshot { // Point-in-time copy of everything the runtime knows. Mirrors the old ImGui // client's TelemetryState so the local automation session can expose it. // NOTE: expensive to produce (full history copies) — use GetStatsLine() for -// high-frequency polling. +// scalar polling and GetDeviceView() / ConsoleSince() for the HTTP endpoints. struct TelemetrySnapshot { std::deque console; std::unordered_map latest; @@ -102,13 +110,25 @@ struct TelemetrySnapshot { // thread (from RuntimeController's drain timer) and read by the GUI and the // local session endpoint. // -// Retention matches the old client: 30 seconds or 12000 samples per signal, -// 6000 console lines. +// Retention: +// Live path (plots/console views) matches the old client: 30 seconds or +// 12000 samples per float signal, 6000 console lines. +// Session archive (export): bounded as documented on RuntimeSessionSnapshot +// — per float signal at most kSessionArchiveSamples decimated samples plus +// kSessionRecentSamples full-rate recent samples; strings capped per key, +// console and commands capped overall. All trimming happens on the writer +// side in small amortized batches so no large reallocation or drop happens +// while mtx_ is held. class TelemetryStore { public: static constexpr float kRetainSeconds = 30.0f; static constexpr std::size_t kMaxSamples = 12000; static constexpr std::size_t kConsoleCapLines = 6000; + static constexpr std::size_t kSessionArchiveSamples = 12000; + static constexpr std::size_t kSessionRecentSamples = 12000; + static constexpr std::size_t kSessionStringSamples = 12000; + static constexpr std::size_t kSessionConsoleCapLines = 50000; + static constexpr std::size_t kSessionCommandCap = 10000; void AddF32(const std::string& key, float value, float tsec); void AddString(const std::string& key, const std::string& value); @@ -137,10 +157,22 @@ class TelemetryStore { void SetSuspended(bool suspended); // Lightweight scalar stats (no histories) — cheap enough for ~30 Hz UI - // header updates, unlike Snapshot(). + // header updates and HTTP status polling, unlike Snapshot(). using StatsLine = TelemetryStats; StatsLine GetStatsLine() const; + // Cheap view for the device.telemetry HTTP endpoint: scalar stats plus + // the latest-value maps (one entry per signal). Unlike Snapshot() this + // does not copy any history. + struct DeviceView { + TelemetryStats stats; + std::unordered_map latest; + std::unordered_map latestStr; + }; + DeviceView GetDeviceView() const; + + // Full deep copy including every history — expensive; only for rare, + // user-triggered consumers (FRAM key export). TelemetrySnapshot Snapshot() const; RuntimeSessionSnapshot SessionSnapshot() const; @@ -165,20 +197,52 @@ class TelemetryStore { std::vector ConsoleSince(uint64_t sinceSeq) const; // Seq of the most recent console line, 0 when the console is empty. Used - // by console views to detect a ClearConsole() (seq goes backwards). + // by console views to detect a ClearConsole() (seq goes backwards). Note + // that seq values themselves are never reused within a run: ClearSession() + // does not restart numbering (see SessionEpoch). uint64_t LatestConsoleSeq() const; + // Generation counter, incremented by every ClearSession() call. Console + // seq numbers are never reset within a GUI run, so the HTTP response + // carries this counter to let long-lived pollers detect that the archive + // they track was discarded. + uint64_t SessionEpoch() const; + private: + // Per-signal session capture state: a decimated archive (oldest data, + // written one sample per `stride` arrivals) followed by a full-rate + // block of the most recent samples. Both vectors stay below their + // respective caps; when the recent block overflows, its oldest half is + // folded into the archive in one batch. + struct SessionSignalStore { + std::vector archiveT; + std::vector archiveY; + std::vector recentT; + std::vector recentY; + uint32_t stride = 1; + uint32_t phase = 0; // arrivals since the last archive write + }; + void TrimHistoryLocked(SignalHistory& hist) const; + void AppendSessionF32Locked(SessionSignalStore& store, float t, float y); + void AppendSessionArchiveLocked(SessionSignalStore& store, float t, float y); double SessionElapsedSeconds() const; + static constexpr std::size_t kNoUnmarkedCommand = + std::numeric_limits::max(); + mutable std::mutex mtx_; TelemetrySnapshot snap_; - std::unordered_map sessionFloatSignals_; + std::unordered_map sessionFloatSignals_; std::unordered_map> sessionStringSignals_; std::vector sessionConsole_; std::vector sessionCommands_; + // MarkLastCommandReceived() bookkeeping: the rolling console calls it on + // every line, so the interesting case is the cheap early-out; while a + // command is pending, unmarkedIndex_ bounds the backward scan start. + std::size_t unmarkedCommands_ = 0; + std::size_t unmarkedIndex_ = kNoUnmarkedCommand; bool sessionTelemetryClockInitialized_ = false; float sessionTelemetrySourceOrigin_ = 0.0f; double sessionTelemetryElapsedOrigin_ = 0.0; @@ -187,8 +251,11 @@ class TelemetryStore { std::chrono::system_clock::time_point sessionStartWall_ = std::chrono::system_clock::now(); // Starts at 1: the HTTP console API filters `seq > since` with a default - // `since` of 0, so seq 0 would never be delivered. + // `since` of 0, so seq 0 would never be delivered. Never reset within a + // run so `since`-polling clients do not silently lose lines across a + // ClearSession(); sessionEpoch_ marks those resets instead. uint64_t nextConsoleSeq_ = 1; + uint64_t sessionEpoch_ = 1; }; } // namespace NodeGUI::runtime diff --git a/Source/NodeGUI/src/simulation/ScenarioDialog.cpp b/Source/NodeGUI/src/simulation/ScenarioDialog.cpp new file mode 100644 index 00000000..853b2f94 --- /dev/null +++ b/Source/NodeGUI/src/simulation/ScenarioDialog.cpp @@ -0,0 +1,329 @@ +#include "ScenarioDialog.h" + +#include "SimRunner.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +namespace NodeGUI::simulation { + +namespace { + +constexpr char kLastScenarioKey[] = "simulation/lastScenario"; + +QDoubleSpinBox* MakeDoubleSpin(double min, double max, int decimals, double step, + const QString& suffix, QWidget* parent) { + auto* spin = new QDoubleSpinBox(parent); + spin->setRange(min, max); + spin->setDecimals(decimals); + spin->setSingleStep(step); + if (!suffix.isEmpty()) { + spin->setSuffix(QStringLiteral(" ") + suffix); + } + return spin; +} + +} // namespace + +ScenarioDialog::ScenarioDialog(const QString& graphPath, bool editOnly, QWidget* parent) + : QDialog(parent) + , graphPath_(graphPath) { + setWindowTitle(editOnly ? QStringLiteral("Simulation Scenario Editor") + : QStringLiteral("Build & Run Simulation")); + setMinimumWidth(460); + + auto* layout = new QVBoxLayout(this); + + auto* pickerRow = new QHBoxLayout(); + pickerRow->addWidget(new QLabel(QStringLiteral("Scenario:"), this)); + scenarioCombo_ = new QComboBox(this); + scenarioCombo_->setSizeAdjustPolicy(QComboBox::AdjustToContents); + pickerRow->addWidget(scenarioCombo_, 1); + layout->addLayout(pickerRow); + + selectionNote_ = new QLabel(this); + selectionNote_->setWordWrap(true); + layout->addWidget(selectionNote_); + + auto* form = new QFormLayout(); + rsOhm_ = MakeDoubleSpin(0.0, 1e3, 6, 0.01, QStringLiteral("ohm"), this); + form->addRow(QStringLiteral("Winding resistance rs"), rsOhm_); + ldH_ = MakeDoubleSpin(0.0, 10.0, 8, 1e-4, QStringLiteral("H"), this); + form->addRow(QStringLiteral("d-axis inductance ld"), ldH_); + lqH_ = MakeDoubleSpin(0.0, 10.0, 8, 1e-4, QStringLiteral("H"), this); + form->addRow(QStringLiteral("q-axis inductance lq"), lqH_); + fluxWb_ = MakeDoubleSpin(0.0, 10.0, 6, 1e-3, QStringLiteral("Wb"), this); + form->addRow(QStringLiteral("PM flux linkage"), fluxWb_); + polePairs_ = new QSpinBox(this); + polePairs_->setRange(1, 64); + form->addRow(QStringLiteral("Pole pairs"), polePairs_); + vdcV_ = MakeDoubleSpin(0.0, 2000.0, 2, 1.0, QStringLiteral("V"), this); + form->addRow(QStringLiteral("DC bus voltage"), vdcV_); + inertia_ = MakeDoubleSpin(0.0, 100.0, 8, 1e-5, QStringLiteral("kg m^2"), this); + form->addRow(QStringLiteral("Rotor inertia"), inertia_); + friction_ = MakeDoubleSpin(0.0, 100.0, 8, 1e-4, QStringLiteral("N m s"), this); + form->addRow(QStringLiteral("Viscous friction"), friction_); + + duration_ = MakeDoubleSpin(0.0, 1e9, 3, 0.1, QStringLiteral("s"), this); + form->addRow(QStringLiteral("Sim duration"), duration_); + timIsrHz_ = MakeDoubleSpin(100.0, 1e6, 0, 1000.0, QStringLiteral("Hz"), this); + form->addRow(QStringLiteral("PWM ISR rate"), timIsrHz_); + appLoopHz_ = MakeDoubleSpin(10.0, 1e5, 0, 100.0, QStringLiteral("Hz"), this); + form->addRow(QStringLiteral("App loop rate"), appLoopHz_); + + backend_ = new QComboBox(this); + backend_->addItem(QStringLiteral("ode"), QStringLiteral("ode")); + backend_->addItem(QStringLiteral("ngspice"), QStringLiteral("ngspice")); + form->addRow(QStringLiteral("Plant backend"), backend_); + netlist_ = new QLineEdit(this); + netlist_->setPlaceholderText(QStringLiteral("plants/inverter_rl.cir")); + form->addRow(QStringLiteral("ngspice netlist"), netlist_); + layout->addLayout(form); + + auto* savingNote = new QLabel( + QStringLiteral("Saving rewrites only the fields above inside the scenario file; " + "all other keys are preserved, but key order and comments are not."), + this); + savingNote->setWordWrap(true); + layout->addWidget(savingNote); + + auto* buttons = new QHBoxLayout(); + saveButton_ = new QPushButton(QStringLiteral("Save"), this); + buttons->addWidget(saveButton_); + saveAsButton_ = new QPushButton(QStringLiteral("Save As..."), this); + buttons->addWidget(saveAsButton_); + buttons->addStretch(1); + runButton_ = new QPushButton(QStringLiteral("Run"), this); + runButton_->setDefault(true); + buttons->addWidget(runButton_); + if (editOnly) { + runButton_->hide(); + } + auto* closeButton = + new QPushButton(editOnly ? QStringLiteral("Close") : QStringLiteral("Cancel"), this); + buttons->addWidget(closeButton); + layout->addLayout(buttons); + + connect(scenarioCombo_, &QComboBox::currentIndexChanged, + this, [this](int) { LoadSelection(); }); + connect(backend_, &QComboBox::currentIndexChanged, + this, [this](int) { OnBackendChanged(); }); + connect(saveButton_, &QPushButton::clicked, this, [this] { + if (loadedPath_.isEmpty()) { + saveAsButton_->click(); + return; + } + SaveTo(loadedPath_); + }); + connect(saveAsButton_, &QPushButton::clicked, this, [this] { + const QStringList dirs = SimRunner::ScenarioDirsForGraph(graphPath_); + const QString startDir = !dirs.isEmpty() + ? dirs.first() + : QFileInfo(graphPath_).absolutePath(); + const QString path = QFileDialog::getSaveFileName( + this, QStringLiteral("Save Scenario As"), startDir, + QStringLiteral("JSON (*.json)")); + if (path.isEmpty()) { + return; + } + if (SaveTo(path)) { + SelectPath(path); + } + }); + connect(runButton_, &QPushButton::clicked, this, [this] { + if (backend_->currentData().toString() == QStringLiteral("ngspice") + && netlist_->text().trimmed().isEmpty()) { + selectionNote_->setText( + QStringLiteral("The ngspice backend needs a netlist path (or pick ode).")); + return; + } + // rte reads the scenario file from disk: persist unsaved edits so the + // run uses exactly what the form shows. Without a loaded file there + // is nowhere to save (auto selection with no resolvable file). + if (dirty_ && !loadedPath_.isEmpty() && !SaveTo(loadedPath_)) { + return; // note already reports the failure; keep the dialog open + } + runRequested_ = true; + accept(); + }); + connect(closeButton, &QPushButton::clicked, this, &QDialog::reject); + + // Track user edits to the form so Run can persist them before starting. + for (QDoubleSpinBox* spin : {rsOhm_, ldH_, lqH_, fluxWb_, vdcV_, inertia_, + friction_, duration_, timIsrHz_, appLoopHz_}) { + connect(spin, qOverload(&QDoubleSpinBox::valueChanged), + this, [this](double) { MarkDirty(); }); + } + connect(polePairs_, qOverload(&QSpinBox::valueChanged), + this, [this](int) { MarkDirty(); }); + connect(backend_, qOverload(&QComboBox::currentIndexChanged), + this, [this](int) { MarkDirty(); }); + connect(netlist_, &QLineEdit::textChanged, + this, [this](const QString&) { MarkDirty(); }); + + // Save the side the previous run used. + PopulateScenarios(); + const QString last = + QSettings(QStringLiteral("RTE"), QStringLiteral("RTEStudio")) + .value(QString::fromLatin1(kLastScenarioKey)) + .toString(); + for (int i = 0; i < scenarioCombo_->count(); ++i) { + if (scenarioCombo_->itemData(i).toString() == last) { + scenarioCombo_->setCurrentIndex(i); + break; + } + } + LoadSelection(); +} + +QString ScenarioDialog::SelectedScenarioPath() const { + return scenarioCombo_->currentData().toString(); +} + +void ScenarioDialog::done(int result) { + // Remember the pick regardless of how the dialog closes so the next run + // starts from it. + if (scenarioCombo_) { + QSettings(QStringLiteral("RTE"), QStringLiteral("RTEStudio")) + .setValue(QString::fromLatin1(kLastScenarioKey), SelectedScenarioPath()); + } + QDialog::done(result); +} + +void ScenarioDialog::PopulateScenarios() { + scenarioCombo_->blockSignals(true); + scenarioCombo_->clear(); + scenarioCombo_->addItem(QStringLiteral("default (auto)"), QString{}); + const QStringList scenarios = SimRunner::FindScenariosForGraph(graphPath_); + const QString autoPath = SimRunner::AutoScenarioForGraph(graphPath_); + for (const QString& path : scenarios) { + const QFileInfo info(path); + QString label = info.fileName(); + if (path == autoPath) { + label += QStringLiteral(" (auto for this graph)"); + } + scenarioCombo_->addItem(label, path); + scenarioCombo_->setItemData(scenarioCombo_->count() - 1, + info.absoluteFilePath(), Qt::ToolTipRole); + } + scenarioCombo_->blockSignals(false); +} + +void ScenarioDialog::SelectPath(const QString& path) { + for (int i = 0; i < scenarioCombo_->count(); ++i) { + if (scenarioCombo_->itemData(i).toString() == path) { + scenarioCombo_->setCurrentIndex(i); + return; + } + } + PopulateScenarios(); + for (int i = 0; i < scenarioCombo_->count(); ++i) { + if (scenarioCombo_->itemData(i).toString() == path) { + scenarioCombo_->setCurrentIndex(i); + return; + } + } +} + +void ScenarioDialog::LoadSelection() { + const QString selection = scenarioCombo_->currentData().toString(); + QString path = selection; + if (path.isEmpty()) { + // Mirror what rte would pick so the form previews something real. + path = SimRunner::AutoScenarioForGraph(graphPath_); + } + loadedPath_ = path; + + QString loadError; + if (!path.isEmpty() && file_.LoadFromFile(path, &loadError)) { + selectionNote_->setText(selection.isEmpty() + ? QStringLiteral("(auto) rte resolves this run to %1").arg(path) + : path); + } else { + file_ = ScenarioFile{}; + if (path.isEmpty()) { + loadedPath_.clear(); + selectionNote_->setText(QStringLiteral( + "(auto) no scenario file found next to HostSim; rte will report an error. " + "Editing shows defaults.")); + } else { + selectionNote_->setText(QStringLiteral("%1\nCould not load: %2 (editing defaults)") + .arg(path, loadError)); + } + } + Fill(file_.Values()); + OnBackendChanged(); + dirty_ = false; +} + +void ScenarioDialog::Fill(const ScenarioValues& values) { + fillingForm_ = true; + rsOhm_->setValue(values.rsOhm); + ldH_->setValue(values.ldH); + lqH_->setValue(values.lqH); + fluxWb_->setValue(values.fluxWb); + polePairs_->setValue(values.polePairs); + vdcV_->setValue(values.vdcV); + inertia_->setValue(values.inertiaKgM2); + friction_->setValue(values.frictionNmPerRadS); + duration_->setValue(values.durationS); + timIsrHz_->setValue(values.timIsrHz); + appLoopHz_->setValue(values.appLoopHz); + const int backendIndex = backend_->findData(values.backend); + backend_->setCurrentIndex(backendIndex >= 0 ? backendIndex : 0); + netlist_->setText(values.netlist); + fillingForm_ = false; +} + +ScenarioValues ScenarioDialog::Gather() const { + ScenarioValues values; + values.rsOhm = rsOhm_->value(); + values.ldH = ldH_->value(); + values.lqH = lqH_->value(); + values.fluxWb = fluxWb_->value(); + values.polePairs = polePairs_->value(); + values.vdcV = vdcV_->value(); + values.inertiaKgM2 = inertia_->value(); + values.frictionNmPerRadS = friction_->value(); + values.durationS = duration_->value(); + values.timIsrHz = timIsrHz_->value(); + values.appLoopHz = appLoopHz_->value(); + values.backend = backend_->currentData().toString(); + values.netlist = netlist_->text().trimmed(); + return values; +} + +bool ScenarioDialog::SaveTo(const QString& path) { + file_.Apply(Gather()); + QString error; + if (!file_.SaveToFile(path, &error)) { + selectionNote_->setText(QStringLiteral("Save failed: %1").arg(error)); + return false; + } + loadedPath_ = path; + dirty_ = false; + selectionNote_->setText(QStringLiteral("Saved %1").arg(path)); + return true; +} + +void ScenarioDialog::OnBackendChanged() { + netlist_->setEnabled(backend_->currentData().toString() == QStringLiteral("ngspice")); +} + +void ScenarioDialog::MarkDirty() { + if (!fillingForm_) { + dirty_ = true; + } +} + +} // namespace NodeGUI::simulation diff --git a/Source/NodeGUI/src/simulation/ScenarioDialog.h b/Source/NodeGUI/src/simulation/ScenarioDialog.h new file mode 100644 index 00000000..7e0bba14 --- /dev/null +++ b/Source/NodeGUI/src/simulation/ScenarioDialog.h @@ -0,0 +1,80 @@ +#pragma once + +#include "ScenarioFile.h" + +#include +#include + +class QComboBox; +class QDoubleSpinBox; +class QLabel; +class QLineEdit; +class QPushButton; +class QSpinBox; + +namespace NodeGUI::simulation { + +// Scenario picker + small form editor for "Build & Run Simulation". Lists the +// scenarios found by SimRunner::FindScenariosForGraph plus a "default (auto)" +// entry that defers to rte's automatic selection. The form edits the common +// motor/simulation/plant keys of the selected file; Save / Save As write the +// file through ScenarioFile, which preserves unknown keys but not key order +// or comments. Run accepts with the current selection; because rte reads the +// scenario file from disk, unsaved form edits are saved back to the loaded +// file first (when the dialog has a file to write to). +class ScenarioDialog : public QDialog { + Q_OBJECT + +public: + // editOnly hides the Run button (plain "Scenario Editor" usage). + ScenarioDialog(const QString& graphPath, bool editOnly, QWidget* parent = nullptr); + + // The scenario to pass on the command line; empty = default (auto). + QString SelectedScenarioPath() const; + bool RunRequested() const { return runRequested_; } + +protected: + void done(int result) override; + +private: + void PopulateScenarios(); + void LoadSelection(); + void Fill(const ScenarioValues& values); + ScenarioValues Gather() const; + bool SaveTo(const QString& path); + void OnBackendChanged(); + void SelectPath(const QString& path); + // Flags user edits to the form fields; Fill() is guarded so loading a + // scenario does not mark the form dirty. + void MarkDirty(); + + QString graphPath_; + bool runRequested_ = false; + ScenarioFile file_; + // Where Save writes for the current selection; "" means the current + // selection has no file yet (Save falls through to Save As). + QString loadedPath_; + bool dirty_ = false; + bool fillingForm_ = false; + + QComboBox* scenarioCombo_ = nullptr; + QLabel* selectionNote_ = nullptr; + QDoubleSpinBox* rsOhm_ = nullptr; + QDoubleSpinBox* ldH_ = nullptr; + QDoubleSpinBox* lqH_ = nullptr; + QDoubleSpinBox* fluxWb_ = nullptr; + QSpinBox* polePairs_ = nullptr; + QDoubleSpinBox* vdcV_ = nullptr; + QDoubleSpinBox* inertia_ = nullptr; + QDoubleSpinBox* friction_ = nullptr; + QDoubleSpinBox* duration_ = nullptr; + QDoubleSpinBox* timIsrHz_ = nullptr; + QDoubleSpinBox* appLoopHz_ = nullptr; + QComboBox* backend_ = nullptr; + QLineEdit* netlist_ = nullptr; + QPushButton* saveButton_ = nullptr; + QPushButton* saveAsButton_ = nullptr; + QPushButton* runButton_ = nullptr; +}; + +} // namespace NodeGUI::simulation diff --git a/Source/NodeGUI/src/simulation/ScenarioFile.cpp b/Source/NodeGUI/src/simulation/ScenarioFile.cpp new file mode 100644 index 00000000..d813a960 --- /dev/null +++ b/Source/NodeGUI/src/simulation/ScenarioFile.cpp @@ -0,0 +1,121 @@ +#include "ScenarioFile.h" + +#include +#include +#include + +namespace NodeGUI::simulation { + +namespace { + +// Reads [key] as a double when it is a JSON number, else *fallback. +double ReadDouble(const QJsonObject& object, const QString& key, double fallback) { + const QJsonValue value = object.value(key); + return value.isDouble() ? value.toDouble() : fallback; +} + +} // namespace + +bool ScenarioFile::LoadFromFile(const QString& path, QString* error) { + QFile file(path); + if (!file.open(QIODevice::ReadOnly)) { + if (error) { + *error = QStringLiteral("cannot open %1: %2").arg(path, file.errorString()); + } + return false; + } + QJsonParseError parseError; + const QJsonDocument document = QJsonDocument::fromJson(file.readAll(), &parseError); + if (parseError.error != QJsonParseError::NoError || !document.isObject()) { + if (error) { + *error = QStringLiteral("cannot parse %1: %2") + .arg(path, parseError.errorString()); + } + return false; + } + path_ = path; + root_ = document.object(); + return true; +} + +bool ScenarioFile::SaveToFile(const QString& path, QString* error) const { + QSaveFile file(path); + if (!file.open(QIODevice::WriteOnly)) { + if (error) { + *error = QStringLiteral("cannot write %1: %2").arg(path, file.errorString()); + } + return false; + } + file.write(QJsonDocument(root_).toJson(QJsonDocument::Indented)); + if (!file.commit()) { + if (error) { + *error = QStringLiteral("cannot write %1: %2").arg(path, file.errorString()); + } + return false; + } + return true; +} + +ScenarioValues ScenarioFile::Values() const { + ScenarioValues values; + const QJsonObject motor = root_.value(QStringLiteral("motor")).toObject(); + values.rsOhm = ReadDouble(motor, QStringLiteral("rs_ohm"), values.rsOhm); + values.ldH = ReadDouble(motor, QStringLiteral("ld_h"), values.ldH); + values.lqH = ReadDouble(motor, QStringLiteral("lq_h"), values.lqH); + values.fluxWb = ReadDouble(motor, QStringLiteral("flux_wb"), values.fluxWb); + values.vdcV = ReadDouble(motor, QStringLiteral("vdc_v"), values.vdcV); + values.inertiaKgM2 = + ReadDouble(motor, QStringLiteral("inertia_kg_m2"), values.inertiaKgM2); + values.frictionNmPerRadS = + ReadDouble(motor, QStringLiteral("friction_nm_per_rad_s"), values.frictionNmPerRadS); + const QJsonValue polePairs = motor.value(QStringLiteral("pole_pairs")); + if (polePairs.isDouble() && polePairs.toDouble() > 0.0) { + values.polePairs = static_cast(polePairs.toDouble()); + } + + const QJsonObject sim = root_.value(QStringLiteral("simulation")).toObject(); + values.durationS = ReadDouble(sim, QStringLiteral("duration_s"), values.durationS); + values.timIsrHz = ReadDouble(sim, QStringLiteral("tim_isr_hz"), values.timIsrHz); + values.appLoopHz = ReadDouble(sim, QStringLiteral("app_loop_hz"), values.appLoopHz); + + const QJsonObject plant = sim.value(QStringLiteral("plant")).toObject(); + const QString backend = plant.value(QStringLiteral("backend")).toString(); + if (!backend.isEmpty()) { + values.backend = backend; + } + values.netlist = plant.value(QStringLiteral("netlist")).toString(); + return values; +} + +void ScenarioFile::Apply(const ScenarioValues& values) { + QJsonObject motor = root_.value(QStringLiteral("motor")).toObject(); + motor[QStringLiteral("rs_ohm")] = values.rsOhm; + motor[QStringLiteral("ld_h")] = values.ldH; + motor[QStringLiteral("lq_h")] = values.lqH; + motor[QStringLiteral("flux_wb")] = values.fluxWb; + motor[QStringLiteral("pole_pairs")] = values.polePairs; + motor[QStringLiteral("vdc_v")] = values.vdcV; + motor[QStringLiteral("inertia_kg_m2")] = values.inertiaKgM2; + motor[QStringLiteral("friction_nm_per_rad_s")] = values.frictionNmPerRadS; + root_[QStringLiteral("motor")] = motor; + + QJsonObject sim = root_.value(QStringLiteral("simulation")).toObject(); + sim[QStringLiteral("duration_s")] = values.durationS; + sim[QStringLiteral("tim_isr_hz")] = values.timIsrHz; + sim[QStringLiteral("app_loop_hz")] = values.appLoopHz; + + const bool ngspice = values.backend == QStringLiteral("ngspice"); + QJsonObject plant = sim.value(QStringLiteral("plant")).toObject(); + if (ngspice || !plant.isEmpty()) { + // Only create the plant object when ngspice needs it; an existing one + // is updated in place and keeps its other keys (e.g. substeps). + plant[QStringLiteral("backend")] = values.backend; + if (ngspice) { + plant[QStringLiteral("netlist")] = values.netlist; + } + sim[QStringLiteral("plant")] = plant; + } + root_[QStringLiteral("simulation")] = sim; +} + +} // namespace NodeGUI::simulation diff --git a/Source/NodeGUI/src/simulation/ScenarioFile.h b/Source/NodeGUI/src/simulation/ScenarioFile.h new file mode 100644 index 00000000..08acb065 --- /dev/null +++ b/Source/NodeGUI/src/simulation/ScenarioFile.h @@ -0,0 +1,46 @@ +#pragma once + +#include +#include + +namespace NodeGUI::simulation { + +// Values the GUI form edits in a HostSim scenario file. Defaults mirror +// Images/HostSim/scenarios/default_motor.json. +struct ScenarioValues { + double rsOhm = 0.08; + double ldH = 1.2e-4; + double lqH = 1.2e-4; + double fluxWb = 8.5e-3; + int polePairs = 7; + double vdcV = 48.0; + double inertiaKgM2 = 1.2e-5; + double frictionNmPerRadS = 2.0e-4; + double durationS = 0.5; + double timIsrHz = 10000.0; + double appLoopHz = 1000.0; + QString backend = QStringLiteral("ode"); // "ode" or "ngspice" + QString netlist; // ngspice only, e.g. plants/inverter_rl.cir +}; + +// Typed view over the known keys of a HostSim scenario JSON document. Load +// keeps the whole object; Apply rewrites only the known keys (creating the +// motor/simulation objects when absent), so unknown keys survive a save +// round-trip. Key order and comments are NOT preserved — the file is +// rewritten from QJsonDocument. +class ScenarioFile { +public: + bool LoadFromFile(const QString& path, QString* error); + bool SaveToFile(const QString& path, QString* error) const; + + ScenarioValues Values() const; + void Apply(const ScenarioValues& values); + + QString Path() const { return path_; } + +private: + QString path_; + QJsonObject root_; +}; + +} // namespace NodeGUI::simulation diff --git a/Source/NodeGUI/src/simulation/SimRunner.cpp b/Source/NodeGUI/src/simulation/SimRunner.cpp new file mode 100644 index 00000000..e14328cc --- /dev/null +++ b/Source/NodeGUI/src/simulation/SimRunner.cpp @@ -0,0 +1,403 @@ +#include "SimRunner.h" + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +#ifdef Q_OS_UNIX +#include +#include +#endif + +namespace NodeGUI::simulation { + +namespace { + +constexpr int kGracefulStopMs = 3000; + +// How long the child may go without any output before Start() is presumed to +// have missed the "HostSim live" announcement. Any output chunk (build +// progress lines stream continually while cmake runs) re-arms the timer, so +// this fires only on a genuinely quiet, unannounced run. +constexpr int kAttachWatchdogMs = 60000; + +// rte's stdout (and host_sim's, relayed through it) is fully buffered when the +// parent is a pipe, so the console would only update in 4 KiB chunks. Wrapping +// the process in GNU stdbuf forces line buffering; the preload propagates to +// the host_sim grandchild. Linux/BSD only; elsewhere we accept the buffering. +QStringList WrapLineBuffered(const QString& program, const QStringList& args, + QString* programOut) { + static const QString stdbuf = QStandardPaths::findExecutable(QStringLiteral("stdbuf")); + if (stdbuf.isEmpty()) { + *programOut = program; + return args; + } + *programOut = stdbuf; + return QStringList{QStringLiteral("-oL"), QStringLiteral("-eL"), program} + args; +} + +} // namespace + +SimRunner::SimRunner(QObject* parent) + : QObject(parent) { + process_ = new QProcess(this); + process_->setProcessChannelMode(QProcess::MergedChannels); + connect(process_, &QProcess::readyReadStandardOutput, + this, &SimRunner::HandleReadyRead); + connect(process_, qOverload(&QProcess::finished), + this, [this](int exitCode, QProcess::ExitStatus status) { + HandleReadyRead(); + attachWatchdog_->stop(); + emit finished(exitCode, status); + }); + + attachWatchdog_ = new QTimer(this); + attachWatchdog_->setSingleShot(true); + attachWatchdog_->setInterval(kAttachWatchdogMs); + connect(attachWatchdog_, &QTimer::timeout, this, [this] { + if (announcedEndpoint_ || !IsRunning()) { + return; + } + emit attachTimeout(QStringLiteral( + "[sim] no live telemetry endpoint announced yet (no output for %1 " + "s); still retrying the default %2:%3.\n" + "Likely causes: an older or stale emitted host_sim build that " + "never prints the \"HostSim live: listening on\" line (rebuild the " + "emitted tree), a failed emit/build step (see the log above), or a " + "scenario whose listen_port is bound elsewhere — possibly by a " + "leftover host_sim instance occupying the port.") + .arg(kAttachWatchdogMs / 1000) + .arg(QLatin1String(kDefaultLiveHost)) + .arg(kDefaultLivePort)); + }); +} + +SimRunner::~SimRunner() { + if (process_->state() == QProcess::NotRunning) { + return; + } +#ifdef Q_OS_UNIX + const qint64 pid = process_->processId(); + if (pid > 0) { + ::kill(static_cast(-pid), SIGKILL); + } +#endif + process_->kill(); + process_->waitForFinished(3000); +} + +bool SimRunner::IsRunning() const { + return process_->state() != QProcess::NotRunning; +} + +QString SimRunner::FindRteExecutable(QString* error) { + const QByteArray envOverride = qgetenv("RTE_CLI"); + if (!envOverride.isEmpty()) { + const QString overridePath = QString::fromLocal8Bit(envOverride); + if (QFileInfo(overridePath).isFile()) { + return QFileInfo(overridePath).absoluteFilePath(); + } + if (error) { + *error = QStringLiteral("RTE_CLI points at a missing file: %1").arg(overridePath); + } + return {}; + } + + const std::filesystem::path sibling = + std::filesystem::path(QCoreApplication::applicationDirPath().toStdString()) + / RTEAutomation::ExecutableName("rte"); + std::error_code ec; + if (std::filesystem::is_regular_file(sibling, ec)) { + return QString::fromStdString(sibling.lexically_normal().string()); + } + +#ifdef RTE_CLI_DEVELOPMENT_PATH + if (std::filesystem::is_regular_file(RTE_CLI_DEVELOPMENT_PATH, ec)) { + return QString::fromUtf8(RTE_CLI_DEVELOPMENT_PATH); + } +#endif + + const QString onPath = QStandardPaths::findExecutable(QStringLiteral("rte")); + if (!onPath.isEmpty()) { + return onPath; + } + + if (error) { + *error = QStringLiteral( + "The rte CLI was not found next to RTE Studio, on PATH, or via RTE_CLI. " + "Build it (target 'rte' lands in build/bin) or set the RTE_CLI environment " + "variable to its full path."); + } + return {}; +} + +QString SimRunner::HostSimBaseSourceForGraph(const QString& graphPath) { + std::error_code ec; + auto hostSimAt = [&ec](std::filesystem::path dir) -> std::filesystem::path { + for (int level = 0; level < 8 && !dir.empty(); ++level) { + const std::filesystem::path candidate = dir / "Images" / "HostSim"; + if (std::filesystem::is_directory(candidate, ec)) { + return candidate.lexically_normal(); + } + dir = dir.parent_path(); + } + return {}; + }; + + if (!graphPath.isEmpty()) { + const std::filesystem::path dir = + std::filesystem::path(graphPath.toStdString()).parent_path(); + if (const auto found = hostSimAt(dir); !found.empty()) { + return QString::fromStdString(found.string()); + } + } + + // Installed layout: /share/rte/Images/HostSim. + std::filesystem::path dir(QCoreApplication::applicationDirPath().toStdString()); + for (int level = 0; level < 6 && !dir.empty(); ++level) { + const std::filesystem::path candidate = + dir / "share" / "rte" / "Images" / "HostSim"; + if (std::filesystem::is_directory(candidate, ec)) { + return QString::fromStdString(candidate.lexically_normal().string()); + } + dir = dir.parent_path(); + } + +#ifdef RTE_PROJECT_ROOT + const std::filesystem::path candidate = + std::filesystem::path(RTE_PROJECT_ROOT) / "Images" / "HostSim"; + if (std::filesystem::is_directory(candidate, ec)) { + return QString::fromStdString(candidate.lexically_normal().string()); + } +#endif + return {}; +} + +QStringList SimRunner::ScenarioDirsForGraph(const QString& graphPath) { + QStringList dirs; + const QString base = HostSimBaseSourceForGraph(graphPath); + if (!base.isEmpty()) { + const QString scenarios = base + QStringLiteral("/scenarios"); + if (QDir(scenarios).exists()) { + dirs << scenarios; + } + } + // The emitted tree for this graph's stem may carry its own scenario + // copies (rte places it next to the executable's build root). + if (!graphPath.isEmpty()) { + const QString stem = QFileInfo(graphPath).completeBaseName(); + std::filesystem::path appDir(QCoreApplication::applicationDirPath().toStdString()); + std::error_code ec; + const std::filesystem::path buildRoot = + appDir.filename() == "bin" ? appDir.parent_path() : appDir; + const std::filesystem::path emitted = + buildRoot / ("hostsim_" + stem.toStdString() + "_emitted") / "scenarios"; + if (std::filesystem::is_directory(emitted, ec)) { + const QString path = QString::fromStdString(emitted.lexically_normal().string()); + if (!dirs.contains(path)) { + dirs << path; + } + } + } + return dirs; +} + +QStringList SimRunner::FindScenariosForGraph(const QString& graphPath) { + QStringList files; + for (const QString& dirPath : ScenarioDirsForGraph(graphPath)) { + const QDir dir(dirPath); + const QStringList names = + dir.entryList({QStringLiteral("*.json")}, QDir::Files, QDir::Name); + for (const QString& name : names) { + const QString absolute = dir.absoluteFilePath(name); + if (!files.contains(absolute)) { + files << absolute; + } + } + } + return files; +} + +QString SimRunner::AutoScenarioForGraph(const QString& graphPath) { + const QString base = HostSimBaseSourceForGraph(graphPath); + if (base.isEmpty()) { + return {}; + } + QString stem = QFileInfo(graphPath).completeBaseName(); + constexpr char suffix[] = "_graph"; + if (stem.endsWith(QLatin1String(suffix))) { + stem.chop(static_cast(sizeof(suffix)) - 1); + } + const QString candidate = + QStringLiteral("%1/scenarios/%2.json").arg(base, stem); + if (QFileInfo(candidate).isFile()) { + return candidate; + } + const QString fallback = base + QStringLiteral("/scenarios/default_motor.json"); + return QFileInfo(fallback).isFile() ? fallback : QString{}; +} + +bool SimRunner::Start(const SimRunRequest& request, QString* error) { + if (IsRunning()) { + if (error) { + *error = QStringLiteral("a simulation is already running"); + } + return false; + } + + QString rteError; + const QString rte = FindRteExecutable(&rteError); + if (rte.isEmpty()) { + if (error) { + *error = rteError; + } + return false; + } + + QStringList arguments{ + QStringLiteral("sim"), + QStringLiteral("--graph"), request.graphPath, + QStringLiteral("--live"), + }; + if (!request.scenarioPath.isEmpty()) { + arguments << QStringLiteral("--scenario") << request.scenarioPath; + } + + QString program; + const QStringList wrapped = WrapLineBuffered(rte, arguments, &program); + + announcedEndpoint_ = false; + lineBuffer_.clear(); + process_->setWorkingDirectory(QFileInfo(request.graphPath).absolutePath()); +#ifdef Q_OS_UNIX + // Own session: rte forks host_sim without a group of its own, so the + // group anchored at rte's PID covers both. Stop() signals that group. + process_->setChildProcessModifier([] { ::setsid(); }); +#endif + emit output(QStringLiteral("$ %1 %2\n").arg(program, wrapped.join(u' '))); + process_->start(program, wrapped); + if (!process_->waitForStarted(5000)) { + if (error) { + *error = QStringLiteral("could not start %1: %2") + .arg(program, process_->errorString()); + } + return false; + } + attachWatchdog_->start(); + return true; +} + +void SimRunner::Stop() { + if (process_->state() == QProcess::NotRunning) { + return; + } + attachWatchdog_->stop(); + emit output(QStringLiteral("[sim] stopping (SIGINT to the process group)...\n")); +#ifdef Q_OS_UNIX + // Start() runs rte in its own session, so signalling its process group + // reaches the host_sim grandchild too. + const qint64 pid = process_->processId(); + if (pid > 0) { + ::kill(static_cast(-pid), SIGINT); + } + QTimer::singleShot(kGracefulStopMs, this, [this, pid] { + // A new run may have started inside the grace period after the old + // process exited; only escalate against the process Stop() targeted. + if (process_->state() == QProcess::NotRunning || process_->processId() != pid) { + return; + } + emit output(QStringLiteral("[sim] still running after SIGINT; killing\n")); + if (pid > 0) { + ::kill(static_cast(-pid), SIGKILL); + } + process_->kill(); + }); +#else + process_->kill(); +#endif +} + +void SimRunner::Shutdown() { + attachWatchdog_->stop(); + // No signals from this path: receivers of output()/finished() may already + // be mid-destruction when the application exits. + process_->disconnect(this); + if (process_->state() == QProcess::NotRunning) { + return; + } +#ifdef Q_OS_UNIX + const qint64 pid = process_->processId(); + if (pid > 0) { + ::kill(static_cast(-pid), SIGINT); + } + if (!process_->waitForFinished(kGracefulStopMs)) { + if (pid > 0 && process_->processId() == pid) { + ::kill(static_cast(-pid), SIGKILL); + } + process_->kill(); + process_->waitForFinished(kGracefulStopMs); + } +#else + process_->kill(); + process_->waitForFinished(kGracefulStopMs); +#endif +} + +void SimRunner::HandleReadyRead() { + const QByteArray chunk = process_->readAllStandardOutput(); + if (chunk.isEmpty()) { + return; + } + const QString text = QString::fromLocal8Bit(chunk); + if (!announcedEndpoint_) { + // Any output is progress (cmake build lines, device chatter): keep the + // watchdog re-armed while the child is demonstrably alive. + attachWatchdog_->start(); + // Scan complete lines only and hold back the unterminated tail, so a + // listening announcement split across two chunks is still matched. + lineBuffer_ += text; + qsizetype start = 0; + for (;;) { + const qsizetype newline = lineBuffer_.indexOf(u'\n', start); + if (newline < 0) { + break; + } + AttachLiveEndpoint(lineBuffer_.mid(start, newline - start)); + start = newline + 1; + } + lineBuffer_.remove(0, start); + if (announcedEndpoint_) { + lineBuffer_.clear(); + } else if (lineBuffer_.size() > 4096) { + // A pathological line with no newline cannot be the announcement; + // do not let it grow the buffer without bound. + lineBuffer_.clear(); + } + } + emit output(text); +} + +void SimRunner::AttachLiveEndpoint(const QString& line) { + if (announcedEndpoint_) { + return; + } + static const QRegularExpression pattern( + QStringLiteral("HostSim live: listening on ([\\w.\\-]+):(\\d+)")); + const QRegularExpressionMatch match = pattern.match(line); + if (!match.hasMatch()) { + return; + } + announcedEndpoint_ = true; + attachWatchdog_->stop(); + emit liveEndpoint(match.captured(1), match.captured(2).toInt()); +} + +} // namespace NodeGUI::simulation diff --git a/Source/NodeGUI/src/simulation/SimRunner.h b/Source/NodeGUI/src/simulation/SimRunner.h new file mode 100644 index 00000000..df5d218f --- /dev/null +++ b/Source/NodeGUI/src/simulation/SimRunner.h @@ -0,0 +1,98 @@ +#pragma once + +#include +#include +#include +#include + +class QTimer; + +namespace NodeGUI::simulation { + +// Default IVP telemetry endpoint of HostSim --live (matches run_spwm_live.sh +// and rte's sim backend). +inline constexpr char kDefaultLiveHost[] = "127.0.0.1"; +inline constexpr int kDefaultLivePort = 14608; + +struct SimRunRequest { + QString graphPath; // absolute path to the saved .json node graph + QString scenarioPath; // empty = rte's automatic scenario selection +}; + +// Owns the `rte sim` child process for "Build & Run Simulation": emits the +// graph into the HostSim image, builds host_sim, and runs it in --live +// (foreground) mode. Non-UI: output is streamed line-buffered through the +// output() signal. +// +// The actual simulator (host_sim) is a grandchild process forked by rte; on +// Unix the child is placed in its own session so Stop() can signal the whole +// process group (rte AND host_sim) instead of orphaning the simulator. +class SimRunner : public QObject { + Q_OBJECT + +public: + explicit SimRunner(QObject* parent = nullptr); + ~SimRunner() override; + + bool IsRunning() const; + + // Resolves the rte CLI: $RTE_CLI, then the sibling of the running app + // (build/bin layout), then the build-time development path, then PATH. + // Returns an empty string and fills *error when nothing usable is found. + static QString FindRteExecutable(QString* error); + + // The HostSim base image (contains scenarios/) for a graph file: walks up + // from the graph, then from the application directory (installed layouts + // use /share/rte/Images/HostSim), then the compile-time project + // root. Empty when not found. + static QString HostSimBaseSourceForGraph(const QString& graphPath); + + // Directories scanned for scenarios: /scenarios plus the emitted + // tree for this graph's stem (build/hostsim__emitted/scenarios). + static QStringList ScenarioDirsForGraph(const QString& graphPath); + static QStringList FindScenariosForGraph(const QString& graphPath); + + // Mirrors rte's rule: graph stem (minus a trailing _graph) + .json under + // /scenarios, else /scenarios/default_motor.json. + static QString AutoScenarioForGraph(const QString& graphPath); + + // Starts `rte sim --graph [--scenario ] --live`. On error + // returns false and fills *error. Streams combined stdout/stderr via + // output() once started. + bool Start(const SimRunRequest& request, QString* error); + + // Graceful stop: SIGINT to the child's process group (Ctrl+C semantics), + // escalating to SIGKILL after a grace period. finished() still fires. + void Stop(); + + // Blocking teardown for application shutdown: SIGINT, then SIGKILL after + // the grace period, waiting for the process each time. Emits no signals + // (the process is disconnected first), so it is safe to call while the + // owning window is being destroyed. + void Shutdown(); + +signals: + void output(const QString& text); + // Parsed from host_sim's "HostSim live: listening on :" line. + void liveEndpoint(const QString& host, int port); + // Fires when the process produced no output for the watchdog window while + // no endpoint has been announced yet — the attach keeps retrying either + // way, this is purely an operator hint. The message names likely causes. + void attachTimeout(const QString& message); + void finished(int exitCode, QProcess::ExitStatus status); + +private: + void HandleReadyRead(); + void AttachLiveEndpoint(const QString& line); + + QProcess* process_ = nullptr; + bool announcedEndpoint_ = false; + // Unterminated output tail kept between chunks so a "listening on" line + // split across reads is still matched. + QString lineBuffer_; + // Single-shot; re-armed while output streams and disarmed at the first + // announced endpoint or when the process ends. + QTimer* attachWatchdog_ = nullptr; +}; + +} // namespace NodeGUI::simulation diff --git a/Source/RTEAutomation/include/RTEAutomation/ProcessRunner.h b/Source/RTEAutomation/include/RTEAutomation/ProcessRunner.h index 66ea1ae3..123f20e0 100644 --- a/Source/RTEAutomation/include/RTEAutomation/ProcessRunner.h +++ b/Source/RTEAutomation/include/RTEAutomation/ProcessRunner.h @@ -13,6 +13,12 @@ struct ProcessSpec { std::vector arguments; std::filesystem::path workingDirectory; std::map environment; + // POSIX only: while RunProcess is blocked on this child, a SIGINT/SIGTERM/ + // SIGHUP delivered to this process is forwarded to the child before the + // default disposition runs, so the child is terminated instead of + // orphaned. Default off; no-op on Windows (a CREATE_NO_WINDOW child cannot + // receive Ctrl+C). + bool terminateWithParent = false; }; struct ProcessResult { diff --git a/Source/RTEAutomation/src/ProcessRunner.cpp b/Source/RTEAutomation/src/ProcessRunner.cpp index 7a184df3..1a0495c6 100644 --- a/Source/RTEAutomation/src/ProcessRunner.cpp +++ b/Source/RTEAutomation/src/ProcessRunner.cpp @@ -10,6 +10,7 @@ #ifdef _WIN32 #include #else +#include #include #include #endif @@ -70,6 +71,22 @@ std::wstring WindowsQuote(const std::wstring& value) { out.append(slashes * 2, L'\\'); return out + L"\""; } +#else +/* Child pid a caught signal should be forwarded to (-1 = none). Set/reset by + * RunProcess around the wait only for callers that opt in via + * ProcessSpec::terminateWithParent. Process launches are serialized by this + * runner's callers, so a single slot is sufficient. */ +volatile sig_atomic_t g_forwardPid = -1; + +void ForwardToChild(int sig) { + if (g_forwardPid > 0) ::kill(g_forwardPid, sig); + struct sigaction restore{}; + restore.sa_handler = SIG_DFL; + sigemptyset(&restore.sa_mask); + sigaction(sig, &restore, nullptr); + ::raise(sig); + _exit(128 + sig); +} #endif } // namespace @@ -203,6 +220,28 @@ ProcessResult RunProcess(const ProcessSpec& spec, ProcessOutput output) { } result.started = true; close(pipes[1]); + + struct sigaction prevTerm{}; + struct sigaction prevInt{}; + struct sigaction prevHup{}; + bool forwarding = false; + if (spec.terminateWithParent) { + g_forwardPid = pid; + struct sigaction forward{}; + forward.sa_handler = &ForwardToChild; + sigemptyset(&forward.sa_mask); + const bool okTerm = sigaction(SIGTERM, &forward, &prevTerm) == 0; + const bool okInt = sigaction(SIGINT, &forward, &prevInt) == 0; + const bool okHup = sigaction(SIGHUP, &forward, &prevHup) == 0; + forwarding = okTerm && okInt && okHup; + if (!forwarding) { + g_forwardPid = -1; + if (okTerm) sigaction(SIGTERM, &prevTerm, nullptr); + if (okInt) sigaction(SIGINT, &prevInt, nullptr); + if (okHup) sigaction(SIGHUP, &prevHup, nullptr); + } + } + std::array buffer{}; std::string pending; ssize_t count = 0; @@ -213,6 +252,13 @@ ProcessResult RunProcess(const ProcessSpec& spec, ProcessOutput output) { if (!pending.empty() && output) output(pending); int status = 0; while (waitpid(pid, &status, 0) < 0 && errno == EINTR) {} + + if (forwarding) { + g_forwardPid = -1; + sigaction(SIGTERM, &prevTerm, nullptr); + sigaction(SIGINT, &prevInt, nullptr); + sigaction(SIGHUP, &prevHup, nullptr); + } if (WIFEXITED(status)) result.exitCode = WEXITSTATUS(status); else if (WIFSIGNALED(status)) result.exitCode = 128 + WTERMSIG(status); #endif diff --git a/Source/RTECLI/src/Main.cpp b/Source/RTECLI/src/Main.cpp index cea7630f..c2f0c3e1 100644 --- a/Source/RTECLI/src/Main.cpp +++ b/Source/RTECLI/src/Main.cpp @@ -15,13 +15,17 @@ #include #include +#include +#include #include #include +#include #include #include #include #include #include +#include #include using json = nlohmann::json; @@ -31,6 +35,7 @@ namespace { enum class Format { Text, Json, JsonLines }; std::vector jsonEvents; +std::optional commandFormatOverride; struct Parsed { std::string command; @@ -48,6 +53,8 @@ void Usage() { << " flash --firmware FILE [--serial PORT | --session FILE] [--manual-boot]\n" << " mcp2221 enter|exit|release\n" << " device status|telemetry|console|command [--session FILE]\n" + << " sim --graph FILE [--scenario FILE] [--base-source DIR] [--name NAME]\n" + << " [--live] [--realtime F] [--no-build] [--output-format text|json|jsonl]\n" << " trace record --interface can0 --output FILE [--seconds N] [--id-base ID]\n" << " trace export --input FILE --output CSV\n" << " mcp [--workspace PATH] [--session FILE]\n"; @@ -593,6 +600,8 @@ int Mcp(const std::vector& args) { return 0; } +int Sim(const std::vector& args, Format format); + int Dispatch(const Parsed& parsed) { if (parsed.command == "version") { Emit(parsed.format, {{"event","version"},{"version","0.1.0"}}); @@ -613,19 +622,423 @@ int Dispatch(const Parsed& parsed) { } if (parsed.command == "device") return Device(parsed.args, parsed.format); if (parsed.command == "mcp2221") return Mcp2221(parsed.args, parsed.format); + if (parsed.command == "sim") return Sim(parsed.args, parsed.format); if (parsed.command == "trace") return RunTraceCommand(parsed.args); if (parsed.command == "mcp") return Mcp(parsed.args); Usage(); return 2; } +struct SimOptions { + std::optional graph; + std::optional scenario; + std::optional baseSource; + std::string name; + bool live = false; + bool noBuild = false; + bool help = false; + double realtime = 0.0; + bool realtimeSet = false; +}; + +void SimUsage() { + std::cerr + << "usage: rte sim --graph FILE [--scenario FILE] [--base-source DIR]\n" + << " [--name NAME] [--live] [--realtime F] [--no-build]\n" + << " [--output-format text|json|jsonl]\n"; +} + +bool ParseSimOptions(const std::vector& args, SimOptions& options, + Format& format, std::string& error) { + for (std::size_t i = 0; i < args.size(); ++i) { + const std::string& arg = args[i]; + auto nextPath = [&](const char* name, std::optional& target) { + if (i + 1 >= args.size()) { error = std::string("missing value for ") + name; return false; } + target = fs::path(args[++i]); + return true; + }; + auto nextString = [&](const char* name, std::string& target) { + if (i + 1 >= args.size()) { error = std::string("missing value for ") + name; return false; } + target = args[++i]; + return true; + }; + if (arg == "--graph") { if (!nextPath("--graph", options.graph)) return false; } + else if (arg == "--scenario") { if (!nextPath("--scenario", options.scenario)) return false; } + else if (arg == "--base-source") { if (!nextPath("--base-source", options.baseSource)) return false; } + else if (arg == "--name") { if (!nextString("--name", options.name)) return false; } + else if (arg == "--realtime") { + std::string value; + if (!nextString("--realtime", value)) return false; + char* end = nullptr; + const double parsed = std::strtod(value.c_str(), &end); + if (end != value.c_str() + value.size() || !std::isfinite(parsed) || parsed < 0.0) { + error = "invalid --realtime value: " + value; + return false; + } + options.realtime = parsed; + options.realtimeSet = true; + } + else if (arg == "--live") options.live = true; + else if (arg == "--no-build") options.noBuild = true; + else if (arg == "--output-format") { + std::string value; + if (!nextString("--output-format", value)) return false; + if (value == "text") format = Format::Text; + else if (value == "json") format = Format::Json; + else if (value == "jsonl") format = Format::JsonLines; + else { error = "invalid --output-format value: " + value; return false; } + commandFormatOverride = format; + } + else if (arg == "--help" || arg == "-h") options.help = true; + else { error = "unknown option: " + arg; return false; } + } + + /* Like ParseOptions(): anchor relative paths to the starting cwd so a + * foreign working directory cannot reinterpret them. */ + auto normalize = [](std::optional& p) { + if (!p || p->is_absolute()) return; + std::error_code ec; + fs::path abs = fs::weakly_canonical(fs::absolute(*p, ec), ec); + if (ec || abs.empty()) abs = fs::absolute(*p); + p = std::move(abs); + }; + normalize(options.graph); + normalize(options.scenario); + normalize(options.baseSource); + return true; +} + +/* Locates the checkout root by walking up from a known repo-local path and + * looking for the HostSim image. Returns an empty path when rte runs outside + * a source checkout (e.g. installed). */ +fs::path FindRepoRoot(fs::path start) { + std::error_code ec; + while (!start.empty() && start != start.parent_path()) { + if (fs::is_directory(start / "Images" / "HostSim", ec)) return start; + start = start.parent_path(); + } + return {}; +} + +fs::path FindSimEmitter(const fs::path& exeDir, std::string* ignoredEnv) { + std::error_code ec; + if (const char* env = std::getenv("RTE_EMITTER"); env && *env) { + if (fs::is_regular_file(fs::path(env), ec)) return fs::path(env); + if (ignoredEnv) *ignoredEnv = env; + } + const fs::path sibling = exeDir / RTEAutomation::ExecutableName("RTECodeEmitter"); + if (fs::is_regular_file(sibling, ec)) return sibling; + if (const auto onPath = RTEAutomation::FindExecutableOnPath("RTECodeEmitter")) return *onPath; + return {}; +} + +/* The sim name composes build directory names that are wiped with + * fs::remove_all, so keep it inside a strict charset and refuse any + * '.'/'..' path segment (separators are already excluded by the charset, + * which reduces the segment check to rejecting exactly "." and ".."). */ +bool IsValidSimName(const std::string& name) { + if (name.empty()) return false; + for (const char c : name) { + const bool ok = (c >= 'A' && c <= 'Z') || (c >= 'a' && c <= 'z') + || (c >= '0' && c <= '9') || c == '_' || c == '.' + || c == '-'; + if (!ok) return false; + } + return name != "." && name != ".."; +} + +/* Plain-text scans mirroring HostSim's lenient scenario parser: first + * "key": match, then the value after the colon. */ +std::string ScanJsonString(const std::string& blob, const std::string& key) { + const std::string needle = "\"" + key + "\""; + const std::size_t pos = blob.find(needle); + if (pos == std::string::npos) return {}; + const std::size_t colon = blob.find(':', pos); + const std::size_t q1 = blob.find('"', colon); + const std::size_t q2 = q1 == std::string::npos ? q1 : blob.find('"', q1 + 1); + if (q1 == std::string::npos || q2 == std::string::npos) return {}; + return blob.substr(q1 + 1, q2 - q1 - 1); +} + +std::optional ScanJsonInt(const std::string& blob, const std::string& key) { + const std::string needle = "\"" + key + "\""; + const std::size_t pos = blob.find(needle); + if (pos == std::string::npos) return std::nullopt; + const std::size_t colon = blob.find(':', pos); + if (colon == std::string::npos) return std::nullopt; + const char* start = blob.c_str() + colon + 1; + char* end = nullptr; + const long value = std::strtol(start, &end, 10); + if (end == start) return std::nullopt; + return static_cast(value); +} + +/* Runs a child process, streaming merged stdout/stderr. Text mode relays + * lines to stdout; structured formats keep stdout clean for the result. + * On POSIX the child is terminated if rte itself receives SIGINT/SIGTERM/ + * SIGHUP, so an interrupted run never orphans host_sim/emitter/cmake (no-op + * on Windows — a CREATE_NO_WINDOW child cannot receive Ctrl+C, and Ctrl+C + * semantics there are left to the console/kill tools). */ +bool RunSimStep(const RTEAutomation::ProcessSpec& spec, Format format, + const std::function& onLine, + std::string& error) { + RTEAutomation::ProcessSpec guarded = spec; + guarded.terminateWithParent = true; + const auto result = RTEAutomation::RunProcess(guarded, [&](const std::string& line) { + if (onLine) onLine(line); + if (format == Format::Text) std::cout << line << '\n'; + else std::cerr << line << '\n'; + }); + if (!result.started) { + error = result.error.empty() + ? "failed to start " + spec.executable.filename().string() : result.error; + return false; + } + if (result.exitCode != 0) { + error = spec.executable.filename().string() + " " + result.error; + return false; + } + return true; +} + +int Sim(const std::vector& args, Format format) { + SimOptions options; + std::string error; + if (!ParseSimOptions(args, options, format, error)) { + Emit(format, {{"event","error"},{"message",error}}); + SimUsage(); + return 2; + } + if (options.help) { SimUsage(); return 0; } + if (!options.graph) { + Emit(format, {{"event","error"},{"message","--graph is required"}}); + SimUsage(); + return 2; + } + std::error_code ec; + if (!fs::is_regular_file(*options.graph, ec)) { + Emit(format, {{"event","error"},{"message","graph not found: " + options.graph->string()}}); + return 3; + } + + const fs::path exeDir = RTEAutomation::ExecutablePath().parent_path(); + const fs::path repoRoot = FindRepoRoot(exeDir); + if (!options.baseSource) { + if (repoRoot.empty()) { + Emit(format, {{"event","error"}, + {"message","could not locate the repository root; pass --base-source"}}); + return 2; + } + options.baseSource = repoRoot / "Images" / "HostSim"; + } + if (!fs::is_directory(*options.baseSource, ec)) { + Emit(format, {{"event","error"}, + {"message","base source not found: " + options.baseSource->string()}}); + return 3; + } + + /* rte lives in build/bin in a source checkout; the emitted simulator and + * its build tree sit next to it under the same build root. With no + * checkout in sight (installed binary), use the user cache instead of the + * install prefix's parent, which may be a system directory. */ + fs::path buildRoot; + if (!repoRoot.empty()) + buildRoot = exeDir.filename() == "bin" ? exeDir.parent_path() : repoRoot / "build"; + else + buildRoot = RTEAutomation::DefaultCacheRoot() / "sim"; + + const std::string name = options.name.empty() + ? options.graph->stem().string() : options.name; + if (!IsValidSimName(name)) { + Emit(format, {{"event","error"}, + {"message","invalid sim name \"" + name + + "\" (allowed: A-Z a-z 0-9 _ . - ; not \".\" or \"..\")" + + (options.name.empty() ? "; pass --name" : "")}}); + return 2; + } + const fs::path emittedDir = buildRoot / ("hostsim_" + name + "_emitted"); + const fs::path simBuildDir(fs::path(emittedDir).string() + "_build"); + const fs::path runDir = simBuildDir / "run"; + const fs::path simExe = simBuildDir / RTEAutomation::ExecutableName("host_sim"); + + fs::path scenario; + if (options.scenario) { + scenario = *options.scenario; + } else { + /* Same rule as Images/HostSim/scripts/run_spwm_live.sh: scenario + * named after the graph (minus any trailing _graph), else the + * generic motor scenario. */ + std::string base = name; + constexpr std::string_view suffix = "_graph"; + if (base.size() > suffix.size() + && base.compare(base.size() - suffix.size(), suffix.size(), suffix) == 0) { + base.resize(base.size() - suffix.size()); + } + const fs::path candidate = *options.baseSource / "scenarios" / (base + ".json"); + scenario = fs::is_regular_file(candidate, ec) + ? candidate : *options.baseSource / "scenarios" / "default_motor.json"; + } + if (!fs::is_regular_file(scenario, ec)) { + Emit(format, {{"event","error"},{"message","scenario not found: " + scenario.string()}}); + return 3; + } + + if (!options.noBuild) { + std::string ignoredEnv; + const fs::path emitter = FindSimEmitter(exeDir, &ignoredEnv); + if (emitter.empty()) { + std::string message = "RTECodeEmitter not found; build it or set RTE_EMITTER"; + if (!ignoredEnv.empty()) + message += " (RTE_EMITTER points to \"" + ignoredEnv + + "\", not an existing file)"; + Emit(format, {{"event","error"},{"message",message}}); + return 3; + } + Emit(format, {{"event","progress"},{"phase","sim-emit"},{"percent",10}, + {"message","Emitting simulation sources"}, + {"output",emittedDir.string()}}); + fs::remove_all(emittedDir, ec); + if (ec) { + Emit(format, {{"event","error"}, + {"message","could not clear previous emit directory " + + emittedDir.string() + ": " + ec.message()}}); + return 4; + } + RTEAutomation::ProcessSpec emit; + emit.executable = emitter; + emit.arguments = {"--base-src", options.baseSource->string(), + "--graph", options.graph->string(), + "--output", emittedDir.string(), + "--verbosity", format == Format::Text ? "info" : "warning"}; + if (!RunSimStep(emit, format, {}, error)) { + Emit(format, {{"event","error"},{"message","simulation source generation failed: " + error}}); + return 4; + } + + Emit(format, {{"event","progress"},{"phase","sim-build"},{"percent",40}, + {"message","Building host_sim"}, + {"build",simBuildDir.string()}}); + const unsigned jobs = std::max(1u, std::thread::hardware_concurrency()); + RTEAutomation::ProcessSpec configure; + configure.executable = "cmake"; + configure.arguments = {"-S", emittedDir.string(), "-B", simBuildDir.string()}; + if (!RunSimStep(configure, format, {}, error)) { + Emit(format, {{"event","error"},{"message","simulation configure failed: " + error}}); + return 4; + } + RTEAutomation::ProcessSpec build; + build.executable = "cmake"; + build.arguments = {"--build", simBuildDir.string(), "-j", std::to_string(jobs)}; + if (!RunSimStep(build, format, {}, error)) { + Emit(format, {{"event","error"},{"message","simulation build failed: " + error}}); + return 4; + } + } + if (!fs::is_regular_file(simExe, ec)) { + Emit(format, {{"event","error"}, + {"message","host_sim not found at " + simExe.string() + + (options.noBuild ? " (--no-build, nothing built)" : "")}}); + return 4; + } + Emit(format, {{"event","artifact"},{"kind","sim-binary"},{"path",simExe.string()}}); + + /* Batch defaults to as-fast execution; live defaults to wall-clock so the + * TCP telemetry stream behaves like hardware (same as run_spwm_live.sh). */ + const double realtime = options.realtimeSet ? options.realtime + : (options.live ? 1.0 : 0.0); + std::ostringstream realtimeText; + realtimeText << realtime; + + /* The endpoint host_sim binds: its built-in default, overridden by the + * effective scenario's simulation.listen_host / listen_port. rte passes + * it to host_sim as --listen because with bare --live host_sim would + * otherwise pin its CLI defaults over the scenario values. */ + std::string liveHost = "127.0.0.1"; + int livePort = 14608; + std::ifstream scenarioFile(scenario); + std::ostringstream scenarioText; + scenarioText << scenarioFile.rdbuf(); + const std::string scenarioBlob = scenarioText.str(); + if (const std::string host = ScanJsonString(scenarioBlob, "listen_host"); !host.empty()) + liveHost = host; + if (const auto port = ScanJsonInt(scenarioBlob, "listen_port"); + port && *port > 0 && *port <= 65535) + livePort = *port; + const std::string liveEndpoint = liveHost + ":" + std::to_string(livePort); + + if (options.live) { + Emit(format, {{"event","progress"},{"phase","sim-run"},{"percent",90}, + {"message","host_sim running in the foreground; press Ctrl+C to stop; " + "live telemetry on " + liveEndpoint + " (IVP)"}, + {"live",true},{"endpoint",liveEndpoint},{"protocol","ivp"}}); + } else { + Emit(format, {{"event","progress"},{"phase","sim-run"},{"percent",90}, + {"message","Running scenario"},{"live",false}}); + } + + fs::create_directories(runDir, ec); + if (ec) { + Emit(format, {{"event","error"}, + {"message","could not create run directory " + runDir.string() + + ": " + ec.message()}}); + return 4; + } + + std::string traceName; + RTEAutomation::ProcessSpec run; + run.executable = simExe; + run.arguments = {scenario.string(), "--realtime", realtimeText.str()}; + if (options.live) run.arguments.insert(run.arguments.end(), {"--live", "--listen", liveEndpoint}); + run.workingDirectory = runDir; + run.terminateWithParent = true; + const auto result = RTEAutomation::RunProcess(run, [&](const std::string& line) { + constexpr std::string_view wrote = "HostSim: wrote "; + if (line.compare(0, wrote.size(), wrote) == 0) traceName = line.substr(wrote.size()); + if (format == Format::Text) std::cout << line << '\n'; + else std::cerr << line << '\n'; + }); + if (!result.started) { + Emit(format, {{"event","error"}, + {"message",result.error.empty() ? "failed to start host_sim" + : result.error}}); + return 4; + } + if (result.exitCode != 0) { + Emit(format, {{"event","error"},{"message","host_sim " + result.error}}); + return 4; + } + + json trace; + if (!traceName.empty()) { + fs::path tracePath(traceName); + if (tracePath.is_relative()) tracePath = fs::absolute(runDir / tracePath, ec); + if (!fs::is_regular_file(tracePath, ec)) { + Emit(format, {{"event","error"}, + {"message","host_sim did not produce trace " + tracePath.string()}}); + return 4; + } + Emit(format, {{"event","artifact"},{"kind","sim-trace"}, + {"path",tracePath.string()}}); + trace = tracePath.string(); + } + + Emit(format, {{"event","complete"},{"success",true}, + {"graph",options.graph->string()}, + {"scenario",scenario.string()}, + {"sim_binary",simExe.string()}, + {"live",options.live}, + {"realtime",realtime}, + {"trace",trace}}); + return 0; +} + } // namespace int main(int argc, char* argv[]) { const auto parsed = ParseTopLevel(argc, argv); if (!parsed) { Usage(); return 2; } const int exitCode = Dispatch(*parsed); - if (parsed->format == Format::Json) { + if (commandFormatOverride.value_or(parsed->format) == Format::Json) { std::cout << json{{"success", exitCode == 0}, {"exit_code", exitCode}, {"events", jsonEvents}}.dump(2) << '\n'; diff --git a/Source/RTECodeEmitter/CMakeLists.txt b/Source/RTECodeEmitter/CMakeLists.txt index 2ba97522..ec0a53cc 100644 --- a/Source/RTECodeEmitter/CMakeLists.txt +++ b/Source/RTECodeEmitter/CMakeLists.txt @@ -7,6 +7,7 @@ target_link_libraries(RTECodeEmitter add_executable(RTECodeEmitter_tests tests/test_marker_parser.cpp tests/test_emitter.cpp + tests/test_codegen.cpp ) target_link_libraries(RTECodeEmitter_tests diff --git a/Source/RTECodeEmitter/README.md b/Source/RTECodeEmitter/README.md index 4f46776e..6f1dfa00 100644 --- a/Source/RTECodeEmitter/README.md +++ b/Source/RTECodeEmitter/README.md @@ -118,24 +118,33 @@ Direct node connections must stay inside a single timing domain. To pass data be } ``` -The codegen emits a global `std::atomic` for each bridge: +The codegen emits one `Bridge` object per bridge in `bridges_generated.h` / +`bridges_generated.cpp`. A bridge is not a plain atomic: the carried wire type +may be a multi-field struct that is not atomically loadable, so each bridge is +a small struct whose `store()` / `load()` copy the value under a critical +section (`platform_critical_enter()` / `platform_critical_exit()`): ```cpp namespace app { -extern std::atomic bridge_throttle_cmd; +struct BridgeThrottleCmdType { + rte::Dimensionless data; + void store(const rte::Dimensionless& value); + rte::Dimensionless load() const; +}; +extern BridgeThrottleCmdType BridgeThrottleCmd; } // namespace app ``` The producer domain writes to it after computing its output: ```cpp -bridge_throttle_cmd.store(out, std::memory_order_relaxed); +BridgeThrottleCmd.store(out); ``` The consumer domain reads it as its input: ```cpp -const float in = bridge_throttle_cmd.load(std::memory_order_relaxed); +const rte::Dimensionless in = BridgeThrottleCmd.load(); ``` Bridges are type-checked by NodeAPI against the producer and consumer port types. @@ -147,7 +156,8 @@ Bridges are type-checked by NodeAPI against the producer and consumer port types 3. Run `NodeAPI::Timing::Validator`; fail fast on timing errors. 4. Recursively copy `--base-src` to `--output`, skipping `.git`, `build`, etc. 5. Generate domain files into `output//` via `InverterCodegenLib`. -6. If the graph has bridges, generate `bridges_generated.h` / `.cpp` with global atomic variables. +6. If the graph has bridges, generate `bridges_generated.h` / `.cpp` with the + critical-section-protected `Bridge` objects described above. 7. Scan the copied source tree for `// RTE_EMIT:` markers. 8. For each marker: - Replace the marker line with the matching snippet. diff --git a/Source/RTECodeEmitter/src/Emitter.cpp b/Source/RTECodeEmitter/src/Emitter.cpp index 16f853ca..f8e49a2a 100644 --- a/Source/RTECodeEmitter/src/Emitter.cpp +++ b/Source/RTECodeEmitter/src/Emitter.cpp @@ -106,9 +106,9 @@ std::vector SplitLines(const std::string& text) { std::string JoinLines(const std::vector& lines) { std::string out; - for (const auto& line : lines) { - out += line; - out += '\n'; + for (size_t i = 0; i < lines.size(); ++i) { + if (i > 0) out += '\n'; + out += lines[i]; } return out; } @@ -406,10 +406,35 @@ bool Emitter::Run(const EmitterOptions& options) const { std::vector>> fileMarkers; bool anyError = false; - for (const auto& entry : - std::filesystem::recursive_directory_iterator( - options.outputDir, - std::filesystem::directory_options::skip_permission_denied)) { + // In a dry run the output tree is never populated; iterating a missing + // directory would throw std::filesystem_error. Report it cleanly instead. + if (!std::filesystem::exists(options.outputDir)) { + logger_.Error("Output directory does not exist: " + options.outputDir.string() + + (options.dryRun ? " (dry run: the base source copy is skipped, so the" + " output tree must already exist to be scanned)" + : "")); + return false; + } + + std::error_code scanEc; + std::filesystem::recursive_directory_iterator scanIt( + options.outputDir, + std::filesystem::directory_options::skip_permission_denied, + scanEc); + const std::filesystem::recursive_directory_iterator scanEnd; + if (scanEc) { + logger_.Error("Could not scan output directory " + options.outputDir.string() + + ": " + scanEc.message()); + return false; + } + for (; scanIt != scanEnd; scanIt.increment(scanEc)) { + if (scanEc) { + logger_.Warning("Skipping unreadable entry during marker scan: " + + scanEc.message()); + scanEc.clear(); + continue; + } + const auto& entry = *scanIt; if (!entry.is_regular_file()) continue; if (!IsSourceFile(entry.path())) continue; @@ -490,6 +515,17 @@ bool Emitter::Run(const EmitterOptions& options) const { return false; } + // Warn loudly about the opposite mismatch: a graph domain that the base + // image has no marker for. The generated files are then compiled + // but never constructed/init'd/stepped — a silent drop (vsense was this). + for (const auto& domain : generatedDomains) { + if (markerDomains.count(domain) == 0) { + logger_.Warning("Domain '" + domain + + "' has graph content but no RTE_EMIT markers in the " + "base image; its generated code will not run"); + } + } + // The effective set of domains is the union of graph domains and marker-only // stub domains. std::unordered_set allDomains = generatedDomains; @@ -562,42 +598,57 @@ bool Emitter::Run(const EmitterOptions& options) const { const auto fileDir = filePath.parent_path(); const auto relGeneratedDir = RelativePath(fileDir, generatedDir); - // Build include lines to add. + // Build include lines to add. Sorted so the emitted text does not + // depend on unordered_set iteration order. std::vector includesToAdd; - for (const auto& header : requiredHeaders) { - // C/C++ include paths use forward slashes on every platform. - const std::string includePath = - (relGeneratedDir / header).generic_string(); - if (existingHeaders.count(includePath) == 0 && - existingHeaders.count(header) == 0) { - includesToAdd.push_back("#include \"" + includePath + "\""); - logger_.Debug("Adding include '" + includePath + "' to " + filePath.string()); + { + std::vector sortedHeaders(requiredHeaders.begin(), + requiredHeaders.end()); + std::sort(sortedHeaders.begin(), sortedHeaders.end()); + for (const auto& header : sortedHeaders) { + // C/C++ include paths use forward slashes on every platform. + const std::string includePath = + (relGeneratedDir / header).generic_string(); + if (existingHeaders.count(includePath) == 0 && + existingHeaders.count(header) == 0) { + includesToAdd.push_back("#include \"" + includePath + "\""); + logger_.Debug("Adding include '" + includePath + "' to " + filePath.string()); + } } } if (!options.dryRun) { + /* Preserve the file's line-ending style: SplitLines keeps a + * trailing '\r' on every line of a CRLF file, so inserted lines + * and replaced marker lines must carry it too. */ + const bool crlf = text.find("\r\n") != std::string::npos; + const std::string eol = crlf ? "\r" : ""; + const std::string newline = crlf ? "\r\n" : "\n"; + // Insert includes. + const size_t insertAt = includeInsertLine; // original coordinates size_t linesAdded = 0; if (!includesToAdd.empty()) { // Ensure a blank line after #pragma once if needed. if (hasPragmaOnce && includeInsertLine < lines.size() && !lines[includeInsertLine].empty() && !lines[includeInsertLine].starts_with("#include")) { - lines.insert(lines.begin() + static_cast(includeInsertLine), ""); + lines.insert(lines.begin() + static_cast(includeInsertLine), eol); ++includeInsertLine; ++linesAdded; } for (const auto& includeLine : includesToAdd) { lines.insert(lines.begin() + static_cast(includeInsertLine), - includeLine); + includeLine + eol); ++includeInsertLine; ++linesAdded; } } - // Replace markers. All markers shift by the number of lines added above, - // because includes are inserted before every marker. + /* Replace markers. Each marker shifts only by the number of lines + * inserted above it: insertions happen before the original + * `insertAt` line, so markers above that point do not move. */ for (const auto& marker : markers) { const std::string domainTitle = DomainTitle(marker.domain); const std::string stateAccess = options.stateVariable + "." + marker.domain; @@ -613,30 +664,38 @@ bool Emitter::Run(const EmitterOptions& options) const { snippet = "app::" + domainTitle + "Stop(" + stateAccess + ");"; } - const size_t adjustedLine = marker.lineNumber + linesAdded; - if (adjustedLine < lines.size()) { - // Preserve the indentation of the original marker line. - const std::string& originalLine = lines[adjustedLine]; - std::string indent; - for (char c : originalLine) { - if (std::isspace(static_cast(c))) { - indent += c; - } else { - break; - } - } + const size_t shift = + (linesAdded > 0 && marker.lineNumber >= insertAt) ? linesAdded : 0; + const size_t adjustedLine = marker.lineNumber + shift; + if (adjustedLine >= lines.size()) { + logger_.Warning("Marker at line " + std::to_string(marker.lineNumber + 1) + + " in " + filePath.string() + + " shifted out of range; left unreplaced"); + continue; + } - // Multi-line snippets need indentation on continuation lines. - if (marker.section == "state") { - snippet = "namespace app {\n" + indent + " struct " + domainTitle + - "State;\n" + indent + "}"; + // Preserve the indentation of the original marker line. + const std::string& originalLine = lines[adjustedLine]; + std::string indent; + for (char c : originalLine) { + if (std::isspace(static_cast(c))) { + indent += c; + } else { + break; } + } - lines[adjustedLine] = indent + snippet; - logger_.Debug("Replaced marker at line " + - std::to_string(marker.lineNumber + 1) + " in " + - filePath.string()); + // Multi-line snippets need indentation and the file's line + // terminator on continuation lines. + if (marker.section == "state") { + snippet = "namespace app {" + newline + indent + " struct " + domainTitle + + "State;" + newline + indent + "}"; } + + lines[adjustedLine] = indent + snippet + eol; + logger_.Debug("Replaced marker at line " + + std::to_string(marker.lineNumber + 1) + " in " + + filePath.string()); } std::string writeError; diff --git a/Source/RTECodeEmitter/tests/test_codegen.cpp b/Source/RTECodeEmitter/tests/test_codegen.cpp new file mode 100644 index 00000000..6044f7e3 --- /dev/null +++ b/Source/RTECodeEmitter/tests/test_codegen.cpp @@ -0,0 +1,296 @@ +#include +#include + +#include + +#include +#include +#include + +namespace { + +using NodeAPI::Bridge; +using NodeAPI::DType; +using NodeAPI::Frame; +using NodeAPI::Graph; +using NodeAPI::Node; +using NodeAPI::NodeType; +using NodeAPI::Port; +using NodeAPI::PortDirection; +using NodeAPI::PortRef; +using NodeAPI::Quantity; +using NodeAPI::WireType; + +const WireType kScalarDimensionless{.quantity = Quantity::Dimensionless, + .frame = Frame::Scalar, + .dtype = DType::F32}; + +NodeType ConstantType() { + return NodeType{ + .id = "test.constant", + .displayName = "Constant", + .outputPorts = {Port{.name = "out", + .direction = PortDirection::Output, + .type = kScalarDimensionless}}, + .inlineCode = "out = 1.0f;", + }; +} + +NodeType GainType() { + return NodeType{ + .id = "test.gain", + .displayName = "Gain", + .inputPorts = {Port{.name = "in", + .direction = PortDirection::Input, + .type = kScalarDimensionless}}, + .outputPorts = {Port{.name = "out", + .direction = PortDirection::Output, + .type = kScalarDimensionless}}, + .parameterTypes = {{"gain", kScalarDimensionless}}, + .inlineCode = "out = gain * in;", + }; +} + +/* Graph with one producer node in "app_loop" and one consumer node in + * "tim_isr"; bridges added by the individual tests. */ +Graph MakeBridgeGraph() { + Graph graph; + graph.AddNodeType(ConstantType()); + graph.AddNodeType(GainType()); + graph.AddNode(Node{.id = "src", .type = "test.constant", .domain = "app_loop"}); + graph.AddNode(Node{.id = "dst", + .type = "test.gain", + .domain = "tim_isr", + .parameters = {{"gain", "1.0"}}}); + return graph; +} + +Bridge MakeBridge(std::string id) { + return Bridge{ + .id = std::move(id), + .type = kScalarDimensionless, + .producer = PortRef{.nodeId = "src", .portName = "out"}, + .consumer = PortRef{.nodeId = "dst", .portName = "in"}, + }; +} + +std::string ReadFileText(const std::filesystem::path& path) { + std::ifstream file(path); + return std::string((std::istreambuf_iterator(file)), + std::istreambuf_iterator()); +} + +size_t CountOccurrences(const std::string& haystack, const std::string& needle) { + size_t count = 0; + size_t pos = 0; + while ((pos = haystack.find(needle, pos)) != std::string::npos) { + ++count; + pos += needle.size(); + } + return count; +} + +} // namespace + +TEST(CodeGenerator, RejectsUnusableBridgeId) { + // "weird.id" would leak a '.' through Capitalize() into the C++ symbol. + Graph graph = MakeBridgeGraph(); + ASSERT_TRUE(graph.AddBridge(MakeBridge("weird.id"))); + + const auto outDir = std::filesystem::temp_directory_path() / "rte_codegen_bad_bridge_id"; + std::filesystem::remove_all(outDir); + std::string error; + InverterCodegen::CodeGenerator generator(graph); + EXPECT_FALSE(generator.Generate(outDir.string(), error)); + EXPECT_NE(error.find("weird.id"), std::string::npos) << error; + std::filesystem::remove_all(outDir); +} + +TEST(CodeGenerator, RejectsCollidingBridgeIds) { + // "my-bridge" and "my_bridge" both capitalize to "BridgeMyBridge". + Graph graph = MakeBridgeGraph(); + graph.AddNode(Node{.id = "src2", .type = "test.constant", .domain = "app_loop"}); + graph.AddNode(Node{.id = "dst2", + .type = "test.gain", + .domain = "tim_isr", + .parameters = {{"gain", "1.0"}}}); + ASSERT_TRUE(graph.AddBridge(MakeBridge("my-bridge"))); + ASSERT_TRUE(graph.AddBridge(Bridge{ + .id = "my_bridge", + .type = kScalarDimensionless, + .producer = PortRef{.nodeId = "src2", .portName = "out"}, + .consumer = PortRef{.nodeId = "dst2", .portName = "in"}, + })); + + const auto outDir = std::filesystem::temp_directory_path() / "rte_codegen_bridge_collision"; + std::filesystem::remove_all(outDir); + std::string error; + InverterCodegen::CodeGenerator generator(graph); + EXPECT_FALSE(generator.Generate(outDir.string(), error)); + EXPECT_NE(error.find("my-bridge"), std::string::npos) << error; + EXPECT_NE(error.find("my_bridge"), std::string::npos) << error; + std::filesystem::remove_all(outDir); +} + +TEST(CodeGenerator, AcceptsBridgeIdWithWordSeparators) { + Graph graph = MakeBridgeGraph(); + ASSERT_TRUE(graph.AddBridge(MakeBridge("throttle-cmd"))); + + const auto outDir = std::filesystem::temp_directory_path() / "rte_codegen_bridge_ok"; + std::filesystem::remove_all(outDir); + std::string error; + InverterCodegen::CodeGenerator generator(graph); + ASSERT_TRUE(generator.Generate(outDir.string(), error)) << error; + const std::string header = ReadFileText(outDir / "bridges_generated.h"); + EXPECT_NE(header.find("BridgeThrottleCmd"), std::string::npos); + std::filesystem::remove_all(outDir); +} + +TEST(CodeGenerator, RejectsHexParameterLiteral) { + // "0x10" must not splice as a hex literal (0x10f compiled as 271 before). + Graph graph; + graph.AddNodeType(ConstantType()); + graph.AddNodeType(NodeType{ + .id = "test.sink", + .displayName = "Sink", + .parameterTypes = {{"level", kScalarDimensionless}}, + .inlineCode = "(void)level;", + }); + graph.AddNode(Node{.id = "n", + .type = "test.sink", + .domain = "app_loop", + .parameters = {{"level", "0x10"}}}); + + const auto outDir = std::filesystem::temp_directory_path() / "rte_codegen_hex_param"; + std::filesystem::remove_all(outDir); + std::string error; + InverterCodegen::CodeGenerator generator(graph); + EXPECT_FALSE(generator.Generate(outDir.string(), error)); + EXPECT_NE(error.find("0x10"), std::string::npos) << error; + std::filesystem::remove_all(outDir); +} + +TEST(CodeGenerator, RejectsNonNumericParameterLiteral) { + Graph graph; + graph.AddNodeType(ConstantType()); + graph.AddNodeType(NodeType{ + .id = "test.sink", + .displayName = "Sink", + .parameterTypes = {{"level", kScalarDimensionless}}, + .inlineCode = "(void)level;", + }); + graph.AddNode(Node{.id = "n", + .type = "test.sink", + .domain = "app_loop", + .parameters = {{"level", "banana"}}}); + + const auto outDir = std::filesystem::temp_directory_path() / "rte_codegen_bad_param"; + std::filesystem::remove_all(outDir); + std::string error; + InverterCodegen::CodeGenerator generator(graph); + EXPECT_FALSE(generator.Generate(outDir.string(), error)); + EXPECT_NE(error.find("banana"), std::string::npos) << error; + std::filesystem::remove_all(outDir); +} + +TEST(CodeGenerator, CanonicalizesParameterLiterals) { + // Integer spellings get a decimal point ("10f" would not compile); + // explicit inf/nan spellings map to the INFINITY/NAN macros. + Graph graph; + graph.AddNodeType(ConstantType()); + graph.AddNodeType(NodeType{ + .id = "test.sink", + .displayName = "Sink", + .parameterTypes = {{"int_like", kScalarDimensionless}, + {"plain", kScalarDimensionless}, + {"sci", kScalarDimensionless}, + {"inf_pos", kScalarDimensionless}, + {"inf_neg", kScalarDimensionless}, + {"not_a_number", kScalarDimensionless}}, + .inlineCode = "(void)int_like; (void)plain; (void)sci;" + "(void)inf_pos; (void)inf_neg; (void)not_a_number;", + }); + graph.AddNode(Node{.id = "n", + .type = "test.sink", + .domain = "app_loop", + .parameters = {{"int_like", "10"}, + {"plain", "0.5"}, + {"sci", "1.5e-3"}, + {"inf_pos", "inf"}, + {"inf_neg", "-INFINITY"}, + {"not_a_number", "nan"}}}); + + const auto outDir = std::filesystem::temp_directory_path() / "rte_codegen_canonical_params"; + std::filesystem::remove_all(outDir); + std::string error; + InverterCodegen::CodeGenerator generator(graph); + ASSERT_TRUE(generator.Generate(outDir.string(), error)) << error; + + const std::string source = ReadFileText(outDir / "domain_app_loop_generated.cpp"); + EXPECT_NE(source.find("state.n.int_like = 10.0f;"), std::string::npos) << source; + EXPECT_NE(source.find("state.n.plain = 0.5f;"), std::string::npos) << source; + EXPECT_NE(source.find("state.n.sci = 1.5e-3f;"), std::string::npos) << source; + EXPECT_NE(source.find("state.n.inf_pos = INFINITY;"), std::string::npos) << source; + EXPECT_NE(source.find("state.n.inf_neg = (-INFINITY);"), std::string::npos) << source; + EXPECT_NE(source.find("state.n.not_a_number = NAN;"), std::string::npos) << source; + // The generated source provides the macros. + EXPECT_NE(source.find("#include "), std::string::npos) << source; + std::filesystem::remove_all(outDir); +} + +TEST(CodeGenerator, HoistsClassBasedTypesAcrossDomains) { + // A class-based node type used in two timing domains must emit its class + // declaration and definition exactly once, not once per domain. + Graph graph; + graph.AddNodeType(ConstantType()); + graph.AddNodeType(NodeType{ + .id = "test.helper", + .displayName = "Helper", + .inputPorts = {Port{.name = "in", + .direction = PortDirection::Input, + .type = kScalarDimensionless}}, + .inlineCode = "(void)in; (void)instance;", + .constructorCode = "(void)instance;", + .classHeader = "class Helper {\npublic:\n float Step(float x);\n};", + .classDefinition = "float Helper::Step(float x) { return x * 2.0f; }", + }); + graph.AddNode(Node{.id = "src_a", .type = "test.constant", .domain = "app_loop"}); + graph.AddNode(Node{.id = "src_b", .type = "test.constant", .domain = "tim_isr"}); + graph.AddNode(Node{.id = "n_a", .type = "test.helper", .domain = "app_loop"}); + graph.AddNode(Node{.id = "n_b", .type = "test.helper", .domain = "tim_isr"}); + ASSERT_TRUE(graph.Connect(NodeAPI::Connection{ + .id = "c1", + .from = PortRef{.nodeId = "src_a", .portName = "out"}, + .to = PortRef{.nodeId = "n_a", .portName = "in"}, + })); + ASSERT_TRUE(graph.Connect(NodeAPI::Connection{ + .id = "c2", + .from = PortRef{.nodeId = "src_b", .portName = "out"}, + .to = PortRef{.nodeId = "n_b", .portName = "in"}, + })); + + const auto outDir = std::filesystem::temp_directory_path() / "rte_codegen_class_hoist"; + std::filesystem::remove_all(outDir); + std::string error; + InverterCodegen::CodeGenerator generator(graph); + ASSERT_TRUE(generator.Generate(outDir.string(), error)) << error; + + // Shared files exist and carry the class exactly once. + const std::string classHeader = ReadFileText(outDir / "node_types_generated.h"); + const std::string classSource = ReadFileText(outDir / "node_types_generated.cpp"); + EXPECT_EQ(CountOccurrences(classHeader, "class Helper"), 1u); + EXPECT_EQ(CountOccurrences(classSource, "Helper::Step"), 1u); + + // Domain headers reference the shared declaration but do not re-emit it. + for (const auto* domain : {"app_loop", "tim_isr"}) { + const std::string text = + ReadFileText(outDir / ("domain_" + std::string(domain) + "_generated.h")); + EXPECT_NE(text.find("#include \"node_types_generated.h\""), std::string::npos) + << domain; + EXPECT_EQ(text.find("class Helper"), std::string::npos) << domain; + const std::string source = + ReadFileText(outDir / ("domain_" + std::string(domain) + "_generated.cpp")); + EXPECT_EQ(source.find("Helper::Step"), std::string::npos) << domain; + } + std::filesystem::remove_all(outDir); +} diff --git a/Source/RTECodeEmitter/tests/test_emitter.cpp b/Source/RTECodeEmitter/tests/test_emitter.cpp index f0e77c98..384739f5 100644 --- a/Source/RTECodeEmitter/tests/test_emitter.cpp +++ b/Source/RTECodeEmitter/tests/test_emitter.cpp @@ -325,6 +325,163 @@ TEST(Emitter, EmitsAuTypesForPhysicalPorts) { std::filesystem::remove_all(tempRoot); } +TEST(Emitter, DryRunWithMissingOutputDirFailsCleanly) { + /* Regression: with --dry-run the base copy is skipped, so the output + * directory may not exist; scanning it used to throw + * std::filesystem_error (SIGABRT). The emitter must fail cleanly. */ + const auto tempRoot = std::filesystem::temp_directory_path() / "rte_emitter_dryrun_test"; + std::filesystem::remove_all(tempRoot); + + const auto baseSrc = tempRoot / "base"; + const auto graphPath = tempRoot / "graph.json"; + + WriteFile(baseSrc / "main.cpp", + "void loop() {\n" + " // RTE_EMIT: app_loop step\n" + "}\n"); + WriteFile(graphPath, + "{\n" + " \"name\": \"dry_run\",\n" + " \"nodeTypes\": [],\n" + " \"nodes\": [],\n" + " \"connections\": []\n" + "}\n"); + + RTECodeEmitter::Logger logger(RTECodeEmitter::LogLevel::Error); + RTECodeEmitter::Emitter emitter(logger); + + RTECodeEmitter::EmitterOptions options; + options.baseSrc = baseSrc; + options.graphPath = graphPath; + options.outputDir = tempRoot / "output_does_not_exist"; + options.dryRun = true; + options.verbosity = RTECodeEmitter::LogLevel::Error; + + EXPECT_FALSE(emitter.Run(options)); // clean failure, not a crash + EXPECT_FALSE(std::filesystem::exists(options.outputDir)); + + std::filesystem::remove_all(tempRoot); +} + +TEST(Emitter, MarkerAboveIncludeBlockIsNotShifted) { + /* The old splice logic shifted every marker by the number of inserted + * include lines, assuming includes always land above all markers. A + * marker ABOVE the include insertion point must not move. */ + const auto tempRoot = std::filesystem::temp_directory_path() / "rte_marker_shift_test"; + std::filesystem::remove_all(tempRoot); + + const auto baseSrc = tempRoot / "base"; + const auto graphPath = tempRoot / "graph.json"; + const auto outputDir = tempRoot / "out"; + + // The state marker sits above the include block. + WriteFile(baseSrc / "state.h", + "// RTE_EMIT: app_loop state\n" + "#pragma once\n" + "\n" + "#include \n"); + WriteFile(baseSrc / "main.cpp", + "#include \"state.h\"\n" + "void loop() {\n" + " // RTE_EMIT: app_loop step\n" + "}\n"); + WriteFile(graphPath, + "{\n" + " \"name\": \"shift_test\",\n" + " \"nodeTypes\": [],\n" + " \"nodes\": [],\n" + " \"connections\": []\n" + "}\n"); + + RTECodeEmitter::Logger logger(RTECodeEmitter::LogLevel::Error); + RTECodeEmitter::Emitter emitter(logger); + + RTECodeEmitter::EmitterOptions options; + options.baseSrc = baseSrc; + options.graphPath = graphPath; + options.outputDir = outputDir; + options.verbosity = RTECodeEmitter::LogLevel::Error; + + ASSERT_TRUE(emitter.Run(options)); + + const std::string stateText = ReadFile(outputDir / "state.h"); + // The marker line itself was replaced... + EXPECT_NE(stateText.find("namespace app {\n struct AppLoopState;\n}"), + std::string::npos); + // ...and the include block below survived intact. + EXPECT_NE(stateText.find("#pragma once"), std::string::npos); + EXPECT_NE(stateText.find("#include "), std::string::npos); + EXPECT_NE(stateText.find("#include \"generated/domain_app_loop_generated.h\""), + std::string::npos); + + const std::string mainText = ReadFile(outputDir / "main.cpp"); + EXPECT_NE(mainText.find("app::AppLoopStep(appState.app_loop);"), std::string::npos); + + std::filesystem::remove_all(tempRoot); +} + +TEST(Emitter, PreservesCrlfLineEndings) { + const auto tempRoot = std::filesystem::temp_directory_path() / "rte_crlf_test"; + std::filesystem::remove_all(tempRoot); + + const auto baseSrc = tempRoot / "base"; + const auto graphPath = tempRoot / "graph.json"; + const auto outputDir = tempRoot / "out"; + + WriteFile(baseSrc / "state.h", + "#pragma once\r\n" + "// RTE_EMIT: app_loop state\r\n" + "struct AppState {\r\n" + " app::AppLoopState app_loop;\r\n" + "};\r\n"); + WriteFile(baseSrc / "main.cpp", + "#include \"state.h\"\r\n" + "AppState appState;\r\n" + "void loop() {\r\n" + " // RTE_EMIT: app_loop step\r\n" + "}\r\n"); + WriteFile(graphPath, + "{\n" + " \"name\": \"crlf_test\",\n" + " \"nodeTypes\": [],\n" + " \"nodes\": [],\n" + " \"connections\": []\n" + "}\n"); + + RTECodeEmitter::Logger logger(RTECodeEmitter::LogLevel::Error); + RTECodeEmitter::Emitter emitter(logger); + + RTECodeEmitter::EmitterOptions options; + options.baseSrc = baseSrc; + options.graphPath = graphPath; + options.outputDir = outputDir; + options.verbosity = RTECodeEmitter::LogLevel::Error; + + ASSERT_TRUE(emitter.Run(options)); + + for (const auto& name : {"state.h", "main.cpp"}) { + const std::string text = ReadFile(outputDir / name); + // Strip all CRLF pairs; no bare '\n' or '\r' may remain. + std::string stripped; + for (size_t i = 0; i < text.size(); ++i) { + if (text[i] == '\r' && i + 1 < text.size() && text[i + 1] == '\n') { + ++i; + } else { + stripped += text[i]; + } + } + EXPECT_EQ(stripped.find('\n'), std::string::npos) << name; + EXPECT_EQ(stripped.find('\r'), std::string::npos) << name; + } + + const std::string mainText = ReadFile(outputDir / "main.cpp"); + EXPECT_NE(mainText.find(" app::AppLoopStep(appState.app_loop);\r\n"), std::string::npos); + EXPECT_NE(mainText.find("#include \"generated/domain_app_loop_generated.h\"\r\n"), + std::string::npos); + + std::filesystem::remove_all(tempRoot); +} + TEST(Emitter, LoadsTemplatesFromDirectory) { const auto tempRoot = std::filesystem::temp_directory_path() / "rte_templates_test"; std::filesystem::remove_all(tempRoot); diff --git a/TODO.txt b/TODO.txt index 5e64cba8..93008c78 100644 --- a/TODO.txt +++ b/TODO.txt @@ -16,3 +16,14 @@ validate by emitting and compiling full existing firmware without any changes or - tools for flashing over usb without breaking - like current rte - graphs and stuff - etc. + +simulator future (keep in mind, not urgent): +- sync dc/dc converter testing: one 3ph stage as 3 separate phase->bus + converters, or 2+v separate, or all 3 paralleled (dc microgrid). needs a + dc-bus/load plant behind IPlant; ngspice netlist can already do the switch + topology +- multiple inverters at once over a simulated canbus: 5ph motor from two + inverters, or whole microgrid afe -> dcdc -> output with cross-converter + control. hostsim already loopbacks can per instance; bridge instances over + a socket. sims take --listen/--port already so N guis can attach +- 5-phase machine model behind the same plant seam diff --git a/Tools/tests/run_all_examples.sh b/Tools/tests/run_all_examples.sh new file mode 100755 index 00000000..45eeb979 --- /dev/null +++ b/Tools/tests/run_all_examples.sh @@ -0,0 +1,712 @@ +#!/usr/bin/env bash +# run_all_examples.sh — end-to-end suite: does every graph in Assets/Examples/ +# emit, build, and run on HostSim without NaN/Inf, with a monotonic time base? +# +# For each discovered graph (*.json under Assets/Examples/, scenario overlays +# *_role_* reported as SKIP rows): +# 1. emit — RTECodeEmitter with --templates Assets/NodeTemplates (several +# examples only embed their graph-local nodeTypes and resolve +# the standard library from there) +# 2. build — cmake configure + build in build/hostsim_examples__emitted_build +# 3. run — batch (--realtime 0, wall-capped) from the emitted tree with a +# per-graph scenario (baseline default_motor.json; FOC graphs get +# generated scenarios that seed their drive vars — IqVar/IdVar for +# foc_demo/foc_demo_aidan/ladrc_demo, CMD for foc_mtpa_demo; +# induction_vhz gets an induction-machine scenario with the +# proven 0.55 V/Hz + 1.5 V boost tuning) +# 4. assert — exit 0, trace written, no NaN/Inf in any column, time_us +# strictly monotonic; foc_sensorless_demo additionally runs with +# HOSTSIM_TELEM_STDERR=1 and asserts sensorless tracking: the +# graph's use_observer gate is on and the observer phase currents +# (telemetry cg_obs_iu/iv/iw) track the burst-measured ones +# (cg_meas_iu/iv/iw) to < 0.15 A worst-case after settle +# +# can_bus_demo is not runnable as a batch run (CAN needs a peer): the suite +# runs the documented two-instance live bridge recipe (role A as hub + role B +# as spoke, using the can_bus_demo_role_a/b.json scenario overlays) and asserts +# that bridge frames are witnessed in both directions and that each graph +# consumed the peer's frames (telemetry can_rx_tag shows the peer's role). +# Live mode writes no trace CSV, so rows/peak read "—" for this graph. +# +# Emitted trees are cached under build/ and re-emitted only when their inputs +# (graph, templates, HostSim base image, emitter binary) are newer, so +# re-running the suite is cheap and idempotent. +# +# Exit code is nonzero iff any graph FAILs; SKIP rows (scenario overlays, +# graphs blocked by documented defects of the example files themselves — see +# known_defect) never fail the suite. +# +# usage: run_all_examples.sh [--only ] [--keep] +set -uo pipefail + +SCRIPT_DIR="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)" +REPO_ROOT="$(cd "${SCRIPT_DIR}/../.." && pwd)" +BUILD_DIR="${REPO_ROOT}/build" +EXAMPLES_DIR="${REPO_ROOT}/Assets/Examples" +TEMPLATES_DIR="${REPO_ROOT}/Assets/NodeTemplates" +HOSTSIM_SRC="${REPO_ROOT}/Images/HostSim" +EMITTER="${BUILD_DIR}/bin/RTECodeEmitter" + +# Suite-owned directory under build/ (generated scenarios, per-graph logs). +SCRATCH="${BUILD_DIR}/hostsim_examples_suite" +SCEN_DIR="${SCRATCH}/scenarios" +LOG_DIR="${SCRATCH}/logs" + +RUN_WALL_LIMIT_S="${RUN_WALL_LIMIT_S:-120}" +CAN_RUNTIME_S="${CAN_RUNTIME_S:-6}" + +# Live-instance PIDs for the can_bus_demo two-instance run; the EXIT trap is a +# safety net so an abort mid-function can never orphan a host_sim listening on +# a port (a leftover would also poison the next suite run's can check). +CAN_PID_A="" +CAN_PID_B="" + +# stop_instance — SIGTERM, then SIGKILL if the process ignores it (live +# instances exit on TERM per the HostSim docs; the KILL fallback keeps the +# suite from leaking sims when one wedges). +stop_instance() { + local pid="$1" + [[ -n "${pid}" ]] || return 0 + kill "${pid}" 2>/dev/null || return 0 + local i + for i in $(seq 1 20); do + kill -0 "${pid}" 2>/dev/null || return 0 + sleep 0.05 + done + kill -9 "${pid}" 2>/dev/null +} + +cleanup_can_instances() { + stop_instance "${CAN_PID_A}" + stop_instance "${CAN_PID_B}" +} +trap cleanup_can_instances EXIT + +ONLY="" +KEEP=0 + +log() { echo "[examples] $*"; } +warn() { echo "[examples] WARNING: $*" >&2; } + +usage() { + echo "usage: $0 [--only ] [--keep]" >&2 +} + +while [[ $# -gt 0 ]]; do + case "$1" in + --only) + [[ $# -ge 2 && -n "$2" ]] || { usage; exit 2; } + ONLY="$2"; shift 2 + ;; + --keep) KEEP=1; shift ;; + -h|--help) usage; exit 0 ;; + *) usage; exit 2 ;; + esac +done + +# ---------------------------------------------------------------- results ----- + +RESULTS=() # one TSV record per row: name \t status \t rows \t peak \t notes +any_fail=0 + +# record +record() { + RESULTS+=("$(printf '%s\t%s\t%s\t%s\t%s' "$1" "$2" "$3" "$4" "$5")") + [[ "$2" == "FAIL" ]] && any_fail=1 +} + +print_table() { + printf '\n%-22s | %-4s | %7s | %9s | %s\n' "graph" "status" "rows" "peak|i|" "notes" + printf '%s\n' "----------------------+------+---------+-----------+---------------------------------------------" + local r name status rows peak notes + for r in "${RESULTS[@]}"; do + IFS=$'\t' read -r name status rows peak notes <<<"${r}" + printf '%-22s | %-4s | %7s | %9s | %s\n' "${name}" "${status}" "${rows}" "${peak}" "${notes}" + done +} + +# ---------------------------------------------------------------- helpers ----- + +wall_run() { + local limit="$1"; shift + if command -v timeout >/dev/null 2>&1; then + timeout --signal=KILL "${limit}" "$@" + else + "$@" + fi +} + +# tree_newer_than — true when a source file under dir is newer +# than marker (same convention as Tools/tests/run_sim_smoke.sh). +tree_newer_than() { + [[ -n "$(find "$1" \ + -name .git -prune -o \ + -type d -name 'build*' -prune -o \ + -type f ! -name '*.csv' -newer "$2" -print -quit 2>/dev/null)" ]] +} + +ensure_prereqs() { + if [[ ! -f "${BUILD_DIR}/CMakeCache.txt" ]]; then + cmake -S "${REPO_ROOT}" -B "${BUILD_DIR}" -DCMAKE_BUILD_TYPE=Release \ + >>"${LOG_DIR}/prereq_configure.log" 2>&1 \ + || { echo "[examples] FAIL: cmake configure of host tools failed" >&2 + return 1; } + fi + cmake --build "${BUILD_DIR}" --target RTECodeEmitter --parallel "$(nproc)" \ + >>"${LOG_DIR}/prereq_build.log" 2>&1 \ + || { echo "[examples] FAIL: RTECodeEmitter build failed" >&2; return 1; } + [[ -x "${EMITTER}" ]] \ + || { echo "[examples] FAIL: ${EMITTER} missing after build" >&2; return 1; } +} + +# ensure_emitted — emit + build build/hostsim_examples__emitted{,_build}, +# reusing the cached tree when it is complete and no input (graph, templates, +# HostSim base image, emitter binary) is newer than the binary. On failure sets +# EMIT_WHY to a one-line, table-friendly reason. +ensure_emitted() { + local name="$1" + local graph="${EXAMPLES_DIR}/${name}.json" + local emitted="${BUILD_DIR}/hostsim_examples_${name}_emitted" + local emitted_build="${emitted}_build" + local marker="${emitted_build}/host_sim" + EMIT_WHY="" + + if [[ -x "${marker}" && -f "${emitted}/scenarios/default_motor.json" ]]; then + if [[ "${graph}" -nt "${marker}" ]] \ + || [[ "${EMITTER}" -nt "${marker}" ]] \ + || tree_newer_than "${HOSTSIM_SRC}" "${marker}" \ + || tree_newer_than "${TEMPLATES_DIR}" "${marker}"; then + log "${name}: inputs changed - re-emitting" + else + return 0 + fi + fi + + log "${name}: emit -> build/hostsim_examples_${name}_emitted" + rm -rf "${emitted}" "${emitted_build}" + if ! "${EMITTER}" --base-src "${HOSTSIM_SRC}" --graph "${graph}" \ + --templates "${TEMPLATES_DIR}" \ + --output "${emitted}" --verbosity warning \ + >"${LOG_DIR}/${name}_emit.log" 2>&1; then + EMIT_WHY="emit failed: $(grep -m1 -oE "ERROR[^\"]{0,100}" "${LOG_DIR}/${name}_emit.log" \ + || tail -n1 "${LOG_DIR}/${name}_emit.log" | cut -c1-100)" + warn "${name}: ${EMIT_WHY} (see ${LOG_DIR#"${REPO_ROOT}"/}/${name}_emit.log)" + return 1 + fi + if ! cmake -S "${emitted}" -B "${emitted_build}" \ + >>"${LOG_DIR}/${name}_build.log" 2>&1; then + EMIT_WHY="cmake configure failed (see ${LOG_DIR#"${REPO_ROOT}"/}/${name}_build.log)" + warn "${name}: ${EMIT_WHY}" + return 1 + fi + if ! cmake --build "${emitted_build}" --parallel "$(nproc)" \ + >>"${LOG_DIR}/${name}_build.log" 2>&1; then + local err + err="$(grep -m1 -E "error:" "${LOG_DIR}/${name}_build.log" | sed 's/.*error:/error:/' | cut -c1-100)" + EMIT_WHY="host_sim build failed: ${err:-see ${LOG_DIR#"${REPO_ROOT}"/}/${name}_build.log}" + warn "${name}: ${EMIT_WHY}" + return 1 + fi + [[ -x "${marker}" ]] || { EMIT_WHY="host_sim missing after build"; warn "${name}: ${EMIT_WHY}"; return 1; } +} + +# trace_check — prints "OK " on success, or +# "FAIL: " and exits 1 on: unreadable/empty file, fewer rows than +# min_rows, ragged/non-numeric rows, NaN/Inf in any column, non-monotonic +# time_us. +trace_check() { + python3 - "$@" <<'PY' +import csv +import math +import sys + +path, min_rows = sys.argv[1], int(sys.argv[2]) +try: + with open(path, newline="") as f: + rows = list(csv.reader(f)) +except OSError as e: + print(f"FAIL: cannot read trace: {e}") + sys.exit(1) +if not rows: + print("FAIL: trace is empty") + sys.exit(1) +header = [h.strip() for h in rows[0]] +data = rows[1:] +if len(data) < min_rows: + print(f"FAIL: {len(data)} data rows, want >= {min_rows}") + sys.exit(1) +try: + ia, ib, ic = (header.index(c) for c in ("i_a", "i_b", "i_c")) +except ValueError as e: + print(f"FAIL: missing column {e}") + sys.exit(1) + +prev_t = None +peak = 0.0 +for lineno, row in enumerate(data, start=2): + if len(row) != len(header): + print(f"FAIL: row {lineno} ragged ({len(row)} fields vs {len(header)} columns)") + sys.exit(1) + vals = [] + for cell in row: + try: + v = float(cell) + except ValueError: + print(f"FAIL: row {lineno}: non-numeric value {cell!r}") + sys.exit(1) + if math.isnan(v) or math.isinf(v): + print(f"FAIL: row {lineno}: NaN/Inf value {cell!r}") + sys.exit(1) + vals.append(v) + if prev_t is not None and vals[0] <= prev_t: + print(f"FAIL: time_us not monotonic at row {lineno} ({prev_t} -> {vals[0]})") + sys.exit(1) + prev_t = vals[0] + peak = max(peak, abs(vals[ia]), abs(vals[ib]), abs(vals[ic])) + +print(f"OK {len(data)} {peak:.3f}") +PY +} + +# run_trace_check — wrap trace_check into a table record decision. +run_trace_check() { + local name="$1" csv="$2" + local out + if [[ ! -s "${csv}" ]]; then + record "${name}" FAIL "—" "—" "run ok but trace ${csv##*/} missing/empty" + return 1 + fi + out="$(trace_check "${csv}" 1000)" || { + record "${name}" FAIL "—" "—" "${out#FAIL: }" + return 1 + } + TC_ROWS="$(cut -d' ' -f2 <<<"${out}")" + TC_PEAK="$(cut -d' ' -f3 <<<"${out}")" +} + +# obs_track_check +# foc_sensorless_demo: prove that the motor actually spins and that the +# observer's phase currents track the burst-measured currents while the +# use_observer gate is on. The run log carries one "telemetry =" +# line per step per TelemetryLog node (stderr echo from HOSTSIM_TELEM_STDERR=1); +# the gate key cg_use_obs must stay 1, and in the settled window (last +# settle_frac of the run) the worst |cg_obs_iX-cg_meas_iX| must stay under +# max_err_a. The trace's settled |omega_e| mean must exceed min_omega_e +# (rad/s electrical). Prints "OK ". +obs_track_check() { + python3 - "$@" <<'PY' +import csv +import math +import sys + +(path, trace, settle_frac, max_err, min_omega) = ( + sys.argv[1], sys.argv[2], float(sys.argv[3]), float(sys.argv[4]), + float(sys.argv[5])) +keys = (["cg_use_obs"] + [f"cg_meas_i{p}" for p in "uvw"] + + [f"cg_obs_i{p}" for p in "uvw"]) +series = {k: [] for k in keys} +for line in open(path, errors="replace"): + if not line.startswith("telemetry "): + continue + k, sep, v = line[len("telemetry "):].partition("=") + if not sep or k not in series: + continue + try: + f = float(v) + except ValueError: + print(f"FAIL: non-numeric telemetry value: {line.strip()!r}") + sys.exit(1) + if math.isnan(f) or math.isinf(f): + print(f"FAIL: NaN/Inf in telemetry key {k}") + sys.exit(1) + series[k].append(f) + +n = len(series["cg_use_obs"]) +if n < 1000: + print(f"FAIL: only {n} telemetry samples for cg_use_obs (run log lacks the stderr telemetry echo?)") + sys.exit(1) +for k in keys[1:]: + if len(series[k]) != n: + print(f"FAIL: telemetry key {k}: {len(series[k])} samples vs {n} for cg_use_obs") + sys.exit(1) + +g = series["cg_use_obs"] +bad = [i for i, v in enumerate(g) if abs(v - 1.0) > 1e-6] +if bad: + print(f"FAIL: use_observer gate not steadily on: {len(bad)} samples != 1 " + f"(first at sample {bad[0]})") + sys.exit(1) + +s = int(n * (1.0 - settle_frac)) +worst = 0.0 +rmss = [] +for p in "uvw": + errs = [a - b for a, b in zip(series[f"cg_obs_i{p}"][s:], + series[f"cg_meas_i{p}"][s:])] + mx = max(abs(e) for e in errs) + worst = max(worst, mx) + rmss.append(math.sqrt(sum(e * e for e in errs) / len(errs))) +if worst > max_err: + print(f"FAIL: settled observer tracking worst |err| {worst:.4f} A > {max_err:g} A") + sys.exit(1) + +rows = list(csv.reader(open(trace))) +hdr = [h.strip() for h in rows[0]] +om = hdr.index("omega_e") +data = [[float(x) for x in r] for r in rows[1:]] +s2 = int(len(data) * (1.0 - settle_frac)) +spin = sum(abs(r[om]) for r in data[s2:]) / (len(data) - s2) +if spin < min_omega: + print(f"FAIL: motor not spinning: settled mean |omega_e| {spin:.2f} rad/s < {min_omega:g}") + sys.exit(1) +print(f"OK {worst:.4f} " + " ".join(f"{r:.4f}" for r in rmss) + f" spin={spin:.2f}") +PY +} + +# ------------------------------------------------------------- scenarios ----- + +# Baseline: the emitted tree's copy of HostSim's default_motor.json (generic +# PMSM, demo_fallback spins the plant when the graph has no PwmOut). +scenario_baseline() { + echo "scenarios/default_motor.json" +} + +# Per-graph generated scenarios: same generic PMSM motor as default_motor.json +# but 5 kHz tim/adc (matches the graphs' Dt=200 µs control constants), 1.5 s, +# throttles parked, and the graph's drive var(s) seeded so the control chain +# is actually exercised instead of idling at zero current. +gen_foc_scenario() { + local out="$1" vars_block="$2" + cat >"${out}" <"${out_cfg}" <<'EOF' +Induction.VoltsPerHz=0.55 +Induction.BoostVolts=1.5 +EOF + cat >"${out_json}" <"${out_cfg}" <<'EOF' +Motor.Ld=0.01 +Motor.Lq=0.01 +Motor.Lambda=0.0085 +EOF + cat >"${out_json}" < — sets SCEN_PATH (relative-to-emitted or absolute) and +# SCEN_NOTE (results-table note); empty SCEN_PATH = graph not batch-runnable. +scenario_for() { + local name="$1" + SCEN_PATH="" + SCEN_NOTE="" + case "${name}" in + current_telemetry) + SCEN_NOTE="sensor-only graph; legacy demo_fallback spins the plant" + SCEN_PATH="$(scenario_baseline)" ;; + foc_chain) + SCEN_NOTE="open chain, fixed theta/dq refs (Iq=5 A baked in)" + SCEN_PATH="$(scenario_baseline)" ;; + foc_demo|foc_demo_aidan) + SCEN_NOTE="default_motor baseline + vars IqVar=8 A (IdVar=0)" + gen_foc_scenario "${SCEN_DIR}/${name}.json" '"IqVar": 8.0, "IdVar": 0.0' + SCEN_PATH="${SCEN_DIR}/${name}.json" ;; + foc_mtpa_demo) + SCEN_NOTE="default_motor baseline + vars CMD=8 A (MTPA splits id/iq)" + gen_foc_scenario "${SCEN_DIR}/${name}.json" '"CMD": 8.0' + SCEN_PATH="${SCEN_DIR}/${name}.json" ;; + foc_sensorless_demo) + SCEN_NOTE="10mH 5pp PMSM @10kHz + vars IqVar=4 A, UseObserver=1 (observer feedback)" + gen_sensorless_scenario "${SCEN_DIR}/${name}.json" "${SCEN_DIR}/${name}.cfg" + SCEN_PATH="${SCEN_DIR}/${name}.json" ;; + ladrc_demo) + SCEN_NOTE="default_motor baseline + vars IqVar=8 A (LADRC current loops)" + gen_foc_scenario "${SCEN_DIR}/${name}.json" '"IqVar": 8.0, "IdVar": 0.0' + SCEN_PATH="${SCEN_DIR}/${name}.json" ;; + induction_vhz) + SCEN_NOTE="induction plant, TargetHz=40, 0.55 V/Hz + 1.5 V boost" + gen_induction_scenario "${SCEN_DIR}/${name}.json" "${SCEN_DIR}/${name}.cfg" + SCEN_PATH="${SCEN_DIR}/${name}.json" ;; + *) + SCEN_PATH="$(scenario_baseline)" ;; + esac +} + +# ------------------------------------------------------------- per graph ----- + +# known_defect — classify an emit/build failure as a documented +# defect of the example graph itself (not a simulator regression), in which +# case the honest accounting is SKIP-with-reason, not FAIL. Only exact known +# signatures are remapped; anything else stays a FAIL. When the graph is +# fixed, the build succeeds and the row returns to PASS by itself. +known_defect() { + local name="$1" why="$2" + case "${name}" in + foc_chain) + # Its Control.Pi instances predate the current Control.Pi template: + # they omit the Dt/AwGain/Feedforward params and the emitter has + # no per-param default fill, so the generated C++ does not + # compile. Fix = add the three params to pi_d/pi_q in + # Assets/Examples/foc_chain.json (outside this suite's ownership). + [[ "${why}" == *"not declared in this scope"* ]] + ;; + *) return 1 ;; + esac +} + +run_batch_graph() { + local name="$1" + local emitted="${BUILD_DIR}/hostsim_examples_${name}_emitted" + local emitted_build="${emitted}_build" + local run_log="${LOG_DIR}/${name}_run.log" + local trace="${emitted}/trace.csv" + + if ! ensure_emitted "${name}"; then + local why="${EMIT_WHY:-emit/build failed}" + if known_defect "${name}" "${why}"; then + record "${name}" SKIP "—" "—" \ + "stale graph: Control.Pi instances miss Dt/AwGain/Feedforward, generated code does not compile (${why})" + else + record "${name}" FAIL "—" "—" "${why}" + fi + return + fi + + scenario_for "${name}" + if [[ -z "${SCEN_PATH}" ]]; then + record "${name}" SKIP "—" "—" "${SCEN_NOTE:-no batch scenario for this graph}" + return + fi + + rm -f "${trace}" + # foc_sensorless_demo needs the per-step telemetry echo so the observer + # tracking assertion below can compare cg_obs_i* against cg_meas_i*. + local run_env=() + [[ "${name}" == "foc_sensorless_demo" ]] && run_env=(env HOSTSIM_TELEM_STDERR=1) + (cd "${emitted}" && wall_run "${RUN_WALL_LIMIT_S}" "${run_env[@]}" \ + "${emitted_build}/host_sim" "${SCEN_PATH}" --realtime 0) \ + >"${run_log}" 2>&1 + local rc=$? + if [[ ${rc} -ne 0 ]]; then + local why="rc=${rc}" + [[ ${rc} -eq 124 || ${rc} -eq 137 ]] && why="hit ${RUN_WALL_LIMIT_S}s wall cap" + record "${name}" FAIL "—" "—" "run failed (${why}); ${SCEN_NOTE}" + return + fi + + if [[ "${name}" == "foc_sensorless_demo" ]]; then + local track_out + if ! track_out="$(obs_track_check "${run_log}" "${trace}" 0.4 0.15 10)"; then + record "${name}" FAIL "—" "—" "observer tracking: ${track_out#FAIL: }" + return + fi + SCEN_NOTE="${SCEN_NOTE}; settled |obs-meas| worst $(cut -d' ' -f2 <<<"${track_out}") A, $(cut -d' ' -f6 <<<"${track_out}" | cut -d= -f2) rad/s elec" + fi + + run_trace_check "${name}" "${trace}" || return + record "${name}" PASS "${TC_ROWS}" "${TC_PEAK}" "${SCEN_NOTE}" +} + +# pick_port — a currently-free loopback TCP port. There's an inherent small +# race between probe and bind; the bridge/telemetry binds failing is handled +# downstream (instance dies -> FAIL with the logs attached). +pick_port() { + python3 - <<'PY' +import socket +s = socket.socket() +s.bind(("127.0.0.1", 0)) +print(s.getsockname()[1]) +s.close() +PY +} + +# can_bus_demo: one graph, two roles — needs a peer on the CAN bridge, so the +# batch path does not apply. Run the documented two-instance live recipe: +# role A as bridge hub + role B as spoke (scenario overlays in Assets/Examples +# seed Role/TxPeriod), then prove both directions: bridge witness lines and +# graph-side consumption (can_rx_tag shows the peer's role number). +run_can_bus_demo() { + local name="can_bus_demo" + local emitted="${BUILD_DIR}/hostsim_examples_${name}_emitted" + local emitted_build="${emitted}_build" + local log_a="${LOG_DIR}/${name}_role_a.log" + local log_b="${LOG_DIR}/${name}_role_b.log" + + if ! ensure_emitted "${name}"; then + record "${name}" FAIL "—" "—" "${EMIT_WHY:-emit/build failed}" + return + fi + + local port_a port_b port_bridge + port_a="$(pick_port)"; port_b="$(pick_port)"; port_bridge="$(pick_port)" + + # `exec` makes the backgrounded subshell exec host_sim, so $! IS the sim + # process (without it, bash forks a wrapper and kill would orphan the sim). + ( + cd "${emitted}" && exec env HOSTSIM_TELEM_STDERR=1 \ + "${emitted_build}/host_sim" "${EXAMPLES_DIR}/can_bus_demo_role_a.json" \ + --live --realtime 1.0 --listen "127.0.0.1:${port_a}" \ + --can-bridge-listen "${port_bridge}" --can-bridge-id 1 \ + >"${log_a}" 2>&1 + ) & CAN_PID_A=$! + sleep 0.7 # hub must be up before the spoke connects + ( + cd "${emitted}" && exec env HOSTSIM_TELEM_STDERR=1 \ + "${emitted_build}/host_sim" "${EXAMPLES_DIR}/can_bus_demo_role_b.json" \ + --live --realtime 1.0 --listen "127.0.0.1:${port_b}" \ + --can-bridge-connect "127.0.0.1:${port_bridge}" --can-bridge-id 2 \ + >"${log_b}" 2>&1 + ) & CAN_PID_B=$! + + sleep "${CAN_RUNTIME_S}" + + local note="" ab=0 ba=0 + if ! kill -0 "${CAN_PID_A}" 2>/dev/null || ! kill -0 "${CAN_PID_B}" 2>/dev/null; then + note="a live instance died before the ${CAN_RUNTIME_S}s window ended (see logs)" + else + # Frames witnessed by the *peer* over the bridge (not own-loopback): + # A transmits 0x2A1, B transmits 0x2A2 (Demo.RoleRouter, IdBase 0x2A0). + ab="$(grep -c "rx bus=1 id=0x2A1 " "${log_b}" 2>/dev/null)" + ba="$(grep -c "rx bus=1 id=0x2A2 " "${log_a}" 2>/dev/null)" + ab="${ab:-0}"; ba="${ba:-0}" + if [[ "${ab}" -lt 10 || "${ba}" -lt 10 ]]; then + note="bridge traffic thin: A->B x${ab}, B->A x${ba} (want >=10 each)" + elif ! grep -q "can_rx_tag=1" "${log_b}" || ! grep -q "can_rx_tag=2" "${log_a}"; then + note="frames bridged (A->B x${ab}, B->A x${ba}) but graph CanRx did not consume the peer's role tag" + fi + fi + + # Live instances run until killed; terminate both and reap. + stop_instance "${CAN_PID_A}" + stop_instance "${CAN_PID_B}" + wait "${CAN_PID_A}" 2>/dev/null + wait "${CAN_PID_B}" 2>/dev/null + CAN_PID_A="" + CAN_PID_B="" + + if [[ -n "${note}" ]]; then + record "${name}" FAIL "—" "—" "${note}" + else + record "${name}" PASS "—" "0.000" \ + "live 2-instance CAN bridge (${CAN_RUNTIME_S}s); frames A->B x${ab}, B->A x${ba}; peer role consumed both sides" + fi +} + +# ------------------------------------------------------------------- main ---- + +main() { + mkdir -p "${SCEN_DIR}" "${LOG_DIR}" + [[ ${KEEP} -eq 1 ]] || rm -f "${LOG_DIR}"/*.log "${SCEN_DIR}"/*.json "${SCEN_DIR}"/*.cfg + + if ! ensure_prereqs; then + echo "[examples] RESULT: FAIL (prerequisites)" >&2 + exit 1 + fi + + log "repo root: ${REPO_ROOT}" + log "suite dir: ${SCRATCH#"${REPO_ROOT}"/} (logs, generated scenarios)" + [[ -n "${ONLY}" ]] && log "only graphs matching: ${ONLY}" + + local graph_file name matched=0 + for graph_file in "${EXAMPLES_DIR}"/*.json; do + name="$(basename "${graph_file}" .json)" + [[ -z "${ONLY}" || "${name}" == *"${ONLY}"* ]] || continue + matched=$((matched + 1)) + case "${name}" in + *_role_*) + record "${name}" SKIP "—" "—" \ + "scenario overlay, not a graph; consumed by can_bus_demo two-instance run" + ;; + can_bus_demo) + log "=== can_bus_demo (two-instance CAN bridge) ===" + run_can_bus_demo + ;; + *) + log "=== ${name} ===" + run_batch_graph "${name}" + ;; + esac + done + + if [[ ${matched} -eq 0 ]]; then + echo "[examples] no graphs under Assets/Examples matched ${ONLY:+--only '${ONLY}'}" >&2 + exit 2 + fi + + print_table + + local n_pass n_fail n_skip + n_pass="$(printf '%s\n' "${RESULTS[@]}" | grep -c $'\tPASS\t')" + n_fail="$(printf '%s\n' "${RESULTS[@]}" | grep -c $'\tFAIL\t')" + n_skip="$(printf '%s\n' "${RESULTS[@]}" | grep -c $'\tSKIP\t')" + if [[ ${any_fail} -ne 0 ]]; then + echo "[examples] RESULT: FAIL (${n_pass} pass, ${n_fail} fail, ${n_skip} skip; logs in ${LOG_DIR#"${REPO_ROOT}"/})" >&2 + exit 1 + fi + log "RESULT: PASS (${n_pass} pass, 0 fail, ${n_skip} skip)" +} + +main "$@" diff --git a/Tools/tests/run_sim_smoke.sh b/Tools/tests/run_sim_smoke.sh new file mode 100755 index 00000000..6f32a50b --- /dev/null +++ b/Tools/tests/run_sim_smoke.sh @@ -0,0 +1,875 @@ +#!/usr/bin/env bash +# run_sim_smoke.sh — end-to-end smoke tests for the host simulators. +# +# Parts: +# hostsim emit spwm_demo_graph -> build host_sim -> run scenarios/spwm_demo.json +# and validate the trace (rows, NaN/Inf, zero-sum currents, omega ramp). +# plants emit induction_vhz example graph -> build -> run the salient-PMSM +# scenario through the spwm graph and the induction scenario through +# the V/Hz graph; assert NaN-free bounded currents, omega ramping in +# the commanded direction, field-locked PMSM speed and measurable +# induction slip. +# ngspice run scenarios/ngspice_rl_demo.json against the real libngspice +# backend (dlopen) with a wall-time cap that catches the old O(n^2) +# resume regression. SKIPped (not failed) when libngspice is not +# discoverable. +# dcdc run scenarios/dcdc_3bus.json through the ngspice backend in plant +# mode "dcdc" (3-leg synchronous buck -> 3 buses), on the emitted +# spwm-graph binary (graph writes PWM every tick, so applied +# duties come from the graph: buses must follow applied duty*Vdc) +# and on a graph-less base-image build (scenario "dcdc" duty keys +# drive the legs: buses must follow those). Also runs +# scenarios/dcdc_parallel.json (3 legs into one shared bus) and +# checks bus voltage + leg current sharing. Same SKIP rule as +# the ngspice part; each run is wall-capped. +# hostsil build Images/HostSIL (host_sil), run scenarios/sil_foc_demo.json +# (validate with scripts/validate_trace.py) and +# scenarios/sil_induction_vhz.json (firmware OpenLoop "induction +# start" V/Hz; validate_trace.py --mode vhz slip band). +# rte `rte sim --no-build` batch sanity reusing the hostsim emitted build. +# +# Runs from any cwd with no args. Scratch lives under build/ (gitignored) and +# is removed on exit unless --keep is given. +# +# usage: run_sim_smoke.sh [--only hostsim|plants|ngspice|dcdc|hostsil|rte] [--keep] +# env: NGSPICE_WALL_LIMIT_S — wall-time cap per host_sim run (default 120); +# runs are SIGKILLed at the cap (rc 124/137 -> FAIL). +set -euo pipefail + +SCRIPT_DIR="$(cd "$(dirname "${BASH_SOURCE[0]}")" && pwd)" +REPO_ROOT="$(cd "${SCRIPT_DIR}/../.." && pwd)" +BUILD_DIR="${REPO_ROOT}/build" + +EMITTER="${BUILD_DIR}/bin/RTECodeEmitter" +RTE_CLI="${BUILD_DIR}/bin/rte" +HOSTSIM_SRC="${REPO_ROOT}/Images/HostSim" +HOSTSIL_SRC="${REPO_ROOT}/Images/HostSIL" + +# The HostSim emit/build/rte-run trees share the fixed name below so the +# `rte sim --name ... --no-build` part reuses what the hostsim part produced. +SMOKE_NAME="spwm_demo_smoke" +EMITTED="${BUILD_DIR}/hostsim_${SMOKE_NAME}_emitted" +EMITTED_BUILD="${EMITTED}_build" +IND_EMITTED="${BUILD_DIR}/hostsim_plants_induction_emitted" +IND_EMITTED_BUILD="${IND_EMITTED}_build" +HOSTSIL_BUILD="${BUILD_DIR}/hostsil_build" + +SPWM_GRAPH="${HOSTSIM_SRC}/graphs/spwm_demo_graph.json" +IND_GRAPH="${REPO_ROOT}/Assets/Examples/induction_vhz.json" +SPWM_SCENARIO_REL="scenarios/spwm_demo.json" +SALIENT_SCENARIO_REL="scenarios/salient_pmsm.json" +INDUCTION_SCENARIO_REL="scenarios/induction_vhz.json" +NGSPICE_SCENARIO_REL="scenarios/ngspice_rl_demo.json" +SIL_SCENARIO="${HOSTSIL_SRC}/scenarios/sil_foc_demo.json" +SIL_IND_SCENARIO="${HOSTSIL_SRC}/scenarios/sil_induction_vhz.json" +SIL_VALIDATOR="${HOSTSIL_SRC}/scripts/validate_trace.py" +DCDC_SCENARIO_REL="scenarios/dcdc_3bus.json" +DCDC_PARALLEL_SCENARIO_REL="scenarios/dcdc_parallel.json" +# Graph-less base-image build used to exercise the scenario "dcdc" duty keys +# (the emitted spwm graph writes PWM every tick and shadows them). +DCDC_BASE_BUILD="${BUILD_DIR}/hostsim_dcdc_base_build" + +NGSPICE_WALL_LIMIT_S="${NGSPICE_WALL_LIMIT_S:-120}" + +ONLY="" +KEEP=0 + +log() { echo "[sim-smoke] $*"; } +fail() { echo "[sim-smoke] FAIL: $*" >&2; return 1; } + +# wall_run — run cmd with a hard wall-time cap (SIGKILL on +# expiry). Exit 124 means the cap fired; 137 means the process was SIGKILLed +# (timeout without coreutils `timeout`, or an external kill — either way the +# caller treats it as a wall-cap failure). +wall_run() { + local limit="$1"; shift + if command -v timeout >/dev/null 2>&1; then + timeout --signal=KILL "${limit}" "$@" + else + "$@" + fi +} + +# fail_run — uniform run-failure report that +# names the wall cap when rc says the run was killed on time. +fail_run() { + local desc="$1" run_log="$2" rc="$3" + if [[ "${rc}" == "124" || "${rc}" == "137" ]]; then + echo "[sim-smoke] FAIL: ${desc} hit the ${NGSPICE_WALL_LIMIT_S}s wall-time cap (rc=${rc}); tail:" >&2 + else + echo "[sim-smoke] FAIL: ${desc} exited nonzero (rc=${rc}); tail:" >&2 + fi + tail -n 20 "${run_log}" >&2 || true + return 1 +} + +# tree_newer_than — true when a *source* file under dir is +# newer than marker (skips VCS metadata, nested build trees, and trace CSVs, +# whose mtimes say nothing about the emit inputs). +tree_newer_than() { + [[ -n "$(find "$1" \ + -name .git -prune -o \ + -type d -name 'build*' -prune -o \ + -type f ! -name '*.csv' -newer "$2" -print -quit 2>/dev/null)" ]] +} + +usage() { + echo "usage: $0 [--only hostsim|plants|ngspice|dcdc|hostsil|rte] [--keep]" >&2 +} + +while [[ $# -gt 0 ]]; do + case "$1" in + --only) + [[ $# -ge 2 ]] || { usage; exit 2; } + case "$2" in + hostsim|plants|ngspice|dcdc|hostsil|rte) ONLY="$2" ;; + *) usage; exit 2 ;; + esac + shift 2 + ;; + --keep) KEEP=1; shift ;; + -h|--help) usage; exit 0 ;; + *) usage; exit 2 ;; + esac +done + +mkdir -p "${BUILD_DIR}" +SCRATCH="$(mktemp -d "${BUILD_DIR}/sim_smoke.XXXXXXXX")" +cleanup() { + if [[ "${KEEP}" == "1" ]]; then + log "--keep: scratch kept at ${SCRATCH}" + log "--keep: emitted trees kept: ${EMITTED}{,_build} ${IND_EMITTED}{,_build} ${DCDC_BASE_BUILD}" + return + fi + rm -rf "${SCRATCH}" "${EMITTED}" "${EMITTED_BUILD}" "${IND_EMITTED}" "${IND_EMITTED_BUILD}" "${DCDC_BASE_BUILD}" +} +trap cleanup EXIT + +want() { [[ -z "${ONLY}" || "${ONLY}" == "$1" ]]; } + +# ---------------------------------------------------------------- prerequisites + +ensure_prereqs() { + log "ensuring host prerequisites (RTECodeEmitter, rte)" + if [[ ! -f "${BUILD_DIR}/CMakeCache.txt" ]]; then + cmake -S "${REPO_ROOT}" -B "${BUILD_DIR}" -DCMAKE_BUILD_TYPE=Release \ + || { echo "[sim-smoke] FAIL: cmake configure of host tools failed" >&2 + echo " (needs cmake, a C++20 compiler, and Qt6 — see README)" >&2 + return 1; } + fi + # Always build: a no-op when fresh, but catches a present-but-stale binary + # (e.g. older emitter left over under --keep after graph/codegen changes). + cmake --build "${BUILD_DIR}" --target RTECodeEmitter rte --parallel "$(nproc)" \ + || { echo "[sim-smoke] FAIL: host prerequisite build failed" >&2; return 1; } + [[ -x "${EMITTER}" && -x "${RTE_CLI}" ]] \ + || { echo "[sim-smoke] FAIL: prerequisites still missing after build" >&2; return 1; } +} + +# ---------------------------------------------------------------- trace checks + +# trace_check +# Always checks: row count and no NaN/Inf in any column. +# sum_tol >= 0 additionally checks |i_a+i_b+i_c| <= sum_tol on every row. +# omega_min >= 0 additionally checks max(omega_e) > omega_min and that the +# final omega_e exceeds the initial one. +trace_check() { + command -v python3 >/dev/null \ + || { echo "[sim-smoke] FAIL: python3 not found (needed for trace checks)" >&2; return 1; } + python3 - "$@" <<'PY' +import csv +import math +import sys + +path, min_rows, sum_tol, omega_min = (sys.argv[1], int(sys.argv[2]), + float(sys.argv[3]), float(sys.argv[4])) +with open(path, newline="") as f: + rows = list(csv.reader(f)) +if not rows: + print(f"FAIL: {path}: empty file") + sys.exit(1) +header = [h.strip() for h in rows[0]] +data = rows[1:] +if len(data) < min_rows: + print(f"FAIL: {path}: {len(data)} data rows, want >= {min_rows}") + sys.exit(1) +try: + ia, ib, ic = (header.index(c) for c in ("i_a", "i_b", "i_c")) + om = header.index("omega_e") +except ValueError as e: + print(f"FAIL: {path}: missing column {e}") + sys.exit(1) + +worst_sum = 0.0 +om_max = None +for lineno, row in enumerate(data, start=2): + if len(row) != len(header): + print(f"FAIL: {path}:{lineno}: ragged row ({len(row)} fields)") + sys.exit(1) + vals = [] + for cell in row: + try: + v = float(cell) + except ValueError: + print(f"FAIL: {path}:{lineno}: non-numeric value {cell!r}") + sys.exit(1) + if math.isnan(v) or math.isinf(v): + print(f"FAIL: {path}:{lineno}: NaN/Inf value {cell!r}") + sys.exit(1) + vals.append(v) + if sum_tol >= 0.0: + worst_sum = max(worst_sum, abs(vals[ia] + vals[ib] + vals[ic])) + om_max = vals[om] if om_max is None else max(om_max, vals[om]) + +if sum_tol >= 0.0 and worst_sum > sum_tol: + print(f"FAIL: {path}: max |i_a+i_b+i_c| = {worst_sum:.6g} > {sum_tol:g}") + sys.exit(1) +if omega_min >= 0.0: + om0, om1 = float(data[0][om]), float(data[-1][om]) + if not (om_max > omega_min and om1 > om0): + print(f"FAIL: {path}: omega_e did not ramp past {omega_min:g} rad/s " + f"(first={om0:.4g} last={om1:.4g} max={om_max:.4g})") + sys.exit(1) +print(f"trace ok: {path} rows={len(data)}") +PY +} + +# plant_trace_check \ +# +# Always checks: row count, no NaN/Inf in any column, currents bounded by +# imax_bound, and that omega_e ends up moving in the commanded (positive) +# direction (final omega_e > initial + 5 rad/s). +# sync_tol_frac >= 0 additionally requires the final omega_e to sit within +# that fraction of sync_elec (synchronous machines lock to the field). +# slip_min >= 0 additionally requires sync - final >= slip_min while +# final >= 0.7*sync (induction: measurable slip, but close to sync). +plant_trace_check() { + command -v python3 >/dev/null \ + || { echo "[sim-smoke] FAIL: python3 not found (needed for trace checks)" >&2; return 1; } + python3 - "$@" <<'PY' +import csv +import math +import sys + +(path, min_rows, sum_tol, imax_bound, sync_elec, sync_tol_frac, slip_min) = ( + sys.argv[1], int(sys.argv[2]), float(sys.argv[3]), float(sys.argv[4]), + float(sys.argv[5]), float(sys.argv[6]), float(sys.argv[7])) +with open(path, newline="") as f: + rows = list(csv.reader(f)) +if not rows: + print(f"FAIL: {path}: empty file") + sys.exit(1) +header = [h.strip() for h in rows[0]] +data = rows[1:] +if len(data) < min_rows: + print(f"FAIL: {path}: {len(data)} data rows, want >= {min_rows}") + sys.exit(1) +try: + ia, ib, ic = (header.index(c) for c in ("i_a", "i_b", "i_c")) + om = header.index("omega_e") +except ValueError as e: + print(f"FAIL: {path}: missing column {e}") + sys.exit(1) + +worst_sum = 0.0 +i_peak = 0.0 +for lineno, row in enumerate(data, start=2): + if len(row) != len(header): + print(f"FAIL: {path}:{lineno}: ragged row ({len(row)} fields)") + sys.exit(1) + vals = [] + for cell in row: + try: + v = float(cell) + except ValueError: + print(f"FAIL: {path}:{lineno}: non-numeric value {cell!r}") + sys.exit(1) + if math.isnan(v) or math.isinf(v): + print(f"FAIL: {path}:{lineno}: NaN/Inf value {cell!r}") + sys.exit(1) + vals.append(v) + worst_sum = max(worst_sum, abs(vals[ia] + vals[ib] + vals[ic])) + i_peak = max(i_peak, abs(vals[ia]), abs(vals[ib]), abs(vals[ic])) + +if worst_sum > sum_tol: + print(f"FAIL: {path}: max |i_a+i_b+i_c| = {worst_sum:.6g} > {sum_tol:g}") + sys.exit(1) +if i_peak > imax_bound: + print(f"FAIL: {path}: peak phase current {i_peak:.4g} A > bound {imax_bound:g}") + sys.exit(1) +om0, om1 = float(data[0][om]), float(data[-1][om]) +if sync_elec > 0.0 and not om1 > om0 + 5.0: + print(f"FAIL: {path}: omega_e did not ramp in the commanded direction " + f"(first={om0:.4g} last={om1:.4g})") + sys.exit(1) +slip = sync_elec - om1 +if sync_tol_frac >= 0.0 and abs(slip) > sync_tol_frac * sync_elec: + print(f"FAIL: {path}: final omega_e {om1:.4g} rad/s not within " + f"{sync_tol_frac:g} of sync {sync_elec:g} rad/s (slip {slip:.4g})") + sys.exit(1) +if slip_min >= 0.0 and not (slip_min <= slip and om1 >= 0.7 * sync_elec): + print(f"FAIL: {path}: expected measurable slip: sync={sync_elec:g} " + f"final={om1:.4g} slip={slip:.4g} (want >= {slip_min:g} and " + f"final >= {0.7 * sync_elec:g})") + sys.exit(1) +print(f"plant trace ok: {path} rows={len(data)} i_peak={i_peak:.3g}A " + f"omega_e_end={om1:.4g} slip={slip:.4g} rad/s vs sync={sync_elec:g}") +PY +} + +# ---------------------------------------------------------------- hostsim core + +# Emit spwm_demo_graph and build host_sim; reuse a kept tree only when it is +# complete AND nothing it was baked from is newer — the graph, any HostSim +# base-image source, or the emitter binary (so --keep runs never validate +# stale code). +ensure_hostsim_emitted() { + if [[ -x "${EMITTED_BUILD}/host_sim" && -f "${EMITTED}/${SPWM_SCENARIO_REL}" ]]; then + local marker="${EMITTED_BUILD}/host_sim" + if [[ "${SPWM_GRAPH}" -nt "${marker}" ]] \ + || [[ "${EMITTER}" -nt "${marker}" ]] \ + || tree_newer_than "${HOSTSIM_SRC}" "${marker}"; then + log "graph/base image/emitter newer than the ${SMOKE_NAME} tree - re-emitting" + else + return 0 + fi + fi + log "emitting ${SPWM_GRAPH##*/} -> ${EMITTED#"${REPO_ROOT}"/}" + rm -rf "${EMITTED}" "${EMITTED_BUILD}" + "${EMITTER}" --base-src "${HOSTSIM_SRC}" --graph "${SPWM_GRAPH}" \ + --output "${EMITTED}" --verbosity warning \ + || { echo "[sim-smoke] FAIL: RTECodeEmitter failed" >&2; return 1; } + log "building host_sim" + cmake -S "${EMITTED}" -B "${EMITTED_BUILD}" \ + || { echo "[sim-smoke] FAIL: emitted cmake configure failed" >&2; return 1; } + cmake --build "${EMITTED_BUILD}" --parallel "$(nproc)" \ + || { echo "[sim-smoke] FAIL: emitted host_sim build failed" >&2; return 1; } +} + +run_hostsim_scenario() { # [wall-limit-s]; cwd = emitted tree + local limit="${3:-${NGSPICE_WALL_LIMIT_S}}" + (cd "${EMITTED}" && wall_run "${limit}" "${EMITTED_BUILD}/host_sim" "$1" --realtime 0) >"$2" 2>&1 +} + +# ---------------------------------------------------------------------- parts + +part_hostsim() { + ensure_prereqs || return 1 + ensure_hostsim_emitted || return 1 + + local run_log="${SCRATCH}/hostsim_spwm_run.log" + rm -f "${EMITTED}/trace_spwm.csv" + run_hostsim_scenario "${SPWM_SCENARIO_REL}" "${run_log}" || { + fail_run "host_sim spwm_demo run" "${run_log}" $? + return 1 + } + local trace="${EMITTED}/trace_spwm.csv" + [[ -f "${trace}" ]] || { echo "[sim-smoke] FAIL: trace_spwm.csv not written" >&2; return 1; } + # spwm_demo: 2.0 s at 10 kHz trace decimation -> ~20k data rows. + trace_check "${trace}" 1000 1e-3 10.0 +} + +ngspice_available() { + local ldconf + ldconf="$(ldconfig -p 2>/dev/null)" || true + if grep -q libngspice <<<"${ldconf}"; then + return 0 + fi + local d + local IFS=':' + for d in ${LD_LIBRARY_PATH:-}; do + [[ -n "${d}" ]] || continue + if compgen -G "${d}/libngspice.so*" >/dev/null; then + return 0 + fi + done + return 1 +} + +part_ngspice() { + if ! ngspice_available; then + log "SKIP: libngspice not found via ldconfig or LD_LIBRARY_PATH" + return 0 + fi + ensure_prereqs || return 1 + ensure_hostsim_emitted || return 1 + # The ngspice scenario postdates the smoke tree in cached emits; re-emit + # when the copy lacks it (same guard as the dcdc/plants parts). + if [[ ! -f "${EMITTED}/${NGSPICE_SCENARIO_REL}" ]]; then + rm -rf "${EMITTED}" "${EMITTED_BUILD}" + ensure_hostsim_emitted || return 1 + fi + + local run_log="${SCRATCH}/hostsim_ngspice_run.log" + local trace="${EMITTED}/ngspice_trace.csv" + rm -f "${trace}" + local start=${SECONDS} + run_hostsim_scenario "${NGSPICE_SCENARIO_REL}" "${run_log}" || { + fail_run "host_sim ngspice_rl_demo run" "${run_log}" $? + return 1 + } + local elapsed=$((SECONDS - start)) + + if ! grep -q "libngspice loaded" "${run_log}"; then + echo "[sim-smoke] FAIL: ngspice backend did not load; tail:" >&2 + tail -n 20 "${run_log}" >&2 || true + return 1 + fi + if grep -q "Falling back to OdePlant" "${run_log}"; then + echo "[sim-smoke] FAIL: ngspice silently fell back to OdePlant" >&2 + return 1 + fi + [[ ${elapsed} -lt ${NGSPICE_WALL_LIMIT_S} ]] \ + || { echo "[sim-smoke] FAIL: ngspice run took ${elapsed}s (limit ${NGSPICE_WALL_LIMIT_S}s)" >&2 + return 1; } + [[ -f "${trace}" ]] || { echo "[sim-smoke] FAIL: ngspice_trace.csv not written" >&2; return 1; } + # ngspice_rl_demo: 0.5 s at 10 kHz -> ~5k data rows; backend currents are + # KCL-consistent per construction, so reuse the zero-sum check too. + trace_check "${trace}" 1000 1e-3 -1 || return 1 + log "ngspice wall time: ${elapsed}s (limit ${NGSPICE_WALL_LIMIT_S}s)" +} + +# dcdc_trace_check +# dcdc-mode trace: probe columns v_bus1..3/i_leg1..3 present, no NaN/Inf, +# theta_e/omega_e stay 0 (no motor mechanics in dcdc mode), and the settled +# (last 20%) v_busN sits within tol_frac of dutyN%*vdc. With fixed duties +# given, the settled duty columns must equal them (scenario "dcdc" keys +# actually drove); with "-" the applied duty columns themselves are the +# reference (graph wrote PWM every tick, scenario keys shadowed). +dcdc_trace_check() { + command -v python3 >/dev/null \ + || { echo "[sim-smoke] FAIL: python3 not found (needed for trace checks)" >&2; return 1; } + python3 - "$@" <<'PY' +import csv +import math +import sys + +(path, min_rows, vdc, tol) = (sys.argv[1], int(sys.argv[2]), + float(sys.argv[3]), float(sys.argv[4])) +fixed = [float(x) for x in sys.argv[5:8]] if len(sys.argv) > 5 and sys.argv[5] != "-" else None +with open(path, newline="") as f: + rows = list(csv.reader(f)) +if not rows: + print(f"FAIL: {path}: empty file") + sys.exit(1) +header = [h.strip() for h in rows[0]] +data = rows[1:] +if len(data) < min_rows: + print(f"FAIL: {path}: {len(data)} data rows, want >= {min_rows}") + sys.exit(1) +try: + cols = {c: header.index(c) for c in ( + "duty_u", "duty_v", "duty_w", "theta_e", "omega_e", + "v_bus1", "v_bus2", "v_bus3", "i_leg1", "i_leg2", "i_leg3")} +except ValueError as e: + print(f"FAIL: {path}: missing column {e} (dcdc mode extends the schema " + f"with v_bus1..3,i_leg1..3)") + sys.exit(1) + +vals = [] +for lineno, row in enumerate(data, start=2): + if len(row) != len(header): + print(f"FAIL: {path}:{lineno}: ragged row ({len(row)} fields)") + sys.exit(1) + r = [] + for cell in row: + try: + v = float(cell) + except ValueError: + print(f"FAIL: {path}:{lineno}: non-numeric value {cell!r}") + sys.exit(1) + if math.isnan(v) or math.isinf(v): + print(f"FAIL: {path}:{lineno}: NaN/Inf value {cell!r}") + sys.exit(1) + r.append(v) + vals.append(r) + +for c in ("theta_e", "omega_e"): + i = cols[c] + m = max(abs(r[i]) for r in vals) + if m != 0.0: + print(f"FAIL: {path}: {c} non-zero in dcdc mode (max {m:.4g}); " + f"no motor mechanics should run") + sys.exit(1) + +win = vals[int(0.8 * len(vals)):] +def mean(col): + i = cols[col] + return sum(r[i] for r in win) / len(win) + +legs = (("duty_u", "v_bus1", "i_leg1"), + ("duty_v", "v_bus2", "i_leg2"), + ("duty_w", "v_bus3", "i_leg3")) +out = [] +for k, (dk, vk, ik) in enumerate(legs): + d, v, i = mean(dk), mean(vk), mean(ik) + if fixed is not None and abs(d - fixed[k]) > 0.5: + print(f"FAIL: {path}: settled duty {k+1} = {d:.3f}% but scenario " + f"dcdc keys say {fixed[k]:g}% (graph duty writer shadowed " + f"them unexpectedly?)") + sys.exit(1) + exp = d / 100.0 * vdc + if exp <= 0.0 or abs(v - exp) > tol * exp: + print(f"FAIL: {path}: settled v_bus{k+1} = {v:.4g} V, want within " + f"{tol:g} of duty*vdc = {exp:.4g} V (duty {d:.3f}%)") + sys.exit(1) + out.append(f"bus{k+1}={v:.3f}V/{i:.3f}A(d={d:.1f}%)") +print(f"dcdc trace ok: {path} rows={len(vals)} settled: {' '.join(out)}") +PY +} + +# dcdc_parallel_check +# Paralleled-leg trace: all three v_busN aliases agree, the shared bus sits +# within tol_frac of duty%*vdc, and the leg currents share the load evenly +# (each within 25% of load/3), summing to the bus current. +dcdc_parallel_check() { + command -v python3 >/dev/null \ + || { echo "[sim-smoke] FAIL: python3 not found (needed for trace checks)" >&2; return 1; } + python3 - "$@" <<'PY' +import csv +import math +import sys + +(path, min_rows, vdc, tol, duty_pct, load) = ( + sys.argv[1], int(sys.argv[2]), float(sys.argv[3]), float(sys.argv[4]), + float(sys.argv[5]), float(sys.argv[6])) +with open(path, newline="") as f: + rows = list(csv.reader(f)) +header = [h.strip() for h in rows[0]] +data = rows[1:] +if len(data) < min_rows: + print(f"FAIL: {path}: {len(data)} data rows, want >= {min_rows}") + sys.exit(1) +cols = {c: header.index(c) for c in ( + "v_bus1", "v_bus2", "v_bus3", "i_leg1", "i_leg2", "i_leg3")} +vals = [] +for lineno, row in enumerate(data, start=2): + if len(row) != len(header): + print(f"FAIL: {path}:{lineno}: ragged row"); sys.exit(1) + r = [] + for cell in row: + v = float(cell) + if math.isnan(v) or math.isinf(v): + print(f"FAIL: {path}:{lineno}: NaN/Inf value {cell!r}"); sys.exit(1) + r.append(v) + vals.append(r) + +win = vals[int(0.8 * len(vals)):] +def mean(col): + i = cols[col] + return sum(r[i] for r in win) / len(win) + +vb = [mean(f"v_bus{k}") for k in (1, 2, 3)] +il = [mean(f"i_leg{k}") for k in (1, 2, 3)] +exp = duty_pct / 100.0 * vdc +if abs(vb[0] - exp) > tol * exp: + print(f"FAIL: {path}: shared bus {vb[0]:.4g} V, want within {tol:g} of " + f"{exp:.4g} V"); sys.exit(1) +if max(vb) - min(vb) > 0.01: + print(f"FAIL: {path}: bus aliases disagree {vb}"); sys.exit(1) +i_load = vb[0] / load +if abs(sum(il) - i_load) > 0.02 * i_load: + print(f"FAIL: {path}: leg currents sum {sum(il):.4g} A != bus load " + f"{i_load:.4g} A"); sys.exit(1) +i_share = i_load / 3.0 +for k, i in enumerate(il): + if abs(i - i_share) > 0.25 * i_share: + print(f"FAIL: {path}: leg {k+1} current {i:.4g} A not within 25% of " + f"even share {i_share:.4g} A"); sys.exit(1) +print(f"dcdc parallel ok: {path} rows={len(vals)} shared bus={vb[0]:.3f}V " + f"legs={il[0]:.3f}/{il[1]:.3f}/{il[2]:.3f}A load={i_load:.3f}A") +PY +} + +# Graph-less base-image host_sim (no generated domains) — the harness for the +# scenario-driven dcdc duty path, since bundled graphs write PWM every tick. +# Reuse a kept build only when no base-image source is newer than the binary. +ensure_dcdc_base() { + if [[ -x "${DCDC_BASE_BUILD}/host_sim" ]] \ + && ! tree_newer_than "${HOSTSIM_SRC}" "${DCDC_BASE_BUILD}/host_sim"; then + return 0 + fi + log "building base-image host_sim -> ${DCDC_BASE_BUILD#"${REPO_ROOT}"/}" + rm -rf "${DCDC_BASE_BUILD}" + cmake -S "${HOSTSIM_SRC}" -B "${DCDC_BASE_BUILD}" \ + || { echo "[sim-smoke] FAIL: base-image cmake configure failed" >&2; return 1; } + cmake --build "${DCDC_BASE_BUILD}" --parallel "$(nproc)" \ + || { echo "[sim-smoke] FAIL: base-image host_sim build failed" >&2; return 1; } +} + +# Check one dcdc scenario run: exit code, dcdc mode engaged, no fallback, +# wall time, trace produced. Echoes the trace path. Args: +dcdc_run_base() { + local scenario="$1" tag="$2" + local run_dir="${SCRATCH}/dcdc_${tag}" + local run_log="${run_dir}/run.log" + mkdir -p "${run_dir}" + local start=${SECONDS} + # Run from scratch: the trace_csv lands there (netlist resolves relative + # to the scenario file's directory when the CWD lookup fails). + (cd "${run_dir}" && wall_run "${NGSPICE_WALL_LIMIT_S}" \ + "${DCDC_BASE_BUILD}/host_sim" "${scenario}" --realtime 0) \ + >"${run_log}" 2>&1 || { + fail_run "base host_sim ${tag} run" "${run_log}" $? + return 1 + } + local elapsed=$((SECONDS - start)) + if ! grep -q "running in dcdc mode" "${run_log}"; then + echo "[sim-smoke] FAIL: dcdc mode did not engage for ${tag}; tail:" >&2 + tail -n 20 "${run_log}" >&2 || true + return 1 + fi + if grep -qi "falling back to ode" "${run_log}"; then + echo "[sim-smoke] FAIL: ${tag} fell back to OdePlant" >&2 + return 1 + fi + [[ ${elapsed} -lt ${NGSPICE_WALL_LIMIT_S} ]] \ + || { echo "[sim-smoke] FAIL: ${tag} run took ${elapsed}s (limit ${NGSPICE_WALL_LIMIT_S}s)" >&2 + return 1; } + log "${tag} wall time: ${elapsed}s (limit ${NGSPICE_WALL_LIMIT_S}s)" >&2 + echo "${run_dir}" +} + +part_dcdc() { + if ! ngspice_available; then + log "SKIP: libngspice not found via ldconfig or LD_LIBRARY_PATH" + return 0 + fi + ensure_prereqs || return 1 + + # --- Leg 1: emitted spwm-graph binary ----------------------------------- + # The graph's pwm.set node fires every tick, so ctx.pwm_written wins over + # the scenario "dcdc" duty keys (documented precedence); the assertion is + # against the *applied* duties from the trace columns. + ensure_hostsim_emitted || return 1 + if [[ ! -f "${EMITTED}/${DCDC_SCENARIO_REL}" ]]; then + rm -rf "${EMITTED}" "${EMITTED_BUILD}" + ensure_hostsim_emitted || return 1 + fi + local run_log="${SCRATCH}/dcdc_3bus_emitted.log" + local trace="${EMITTED}/dcdc_3bus_trace.csv" + rm -f "${trace}" + local start=${SECONDS} + run_hostsim_scenario "${DCDC_SCENARIO_REL}" "${run_log}" || { + fail_run "host_sim dcdc_3bus (emitted)" "${run_log}" $? + return 1 + } + local elapsed=$((SECONDS - start)) + if ! grep -q "running in dcdc mode" "${run_log}"; then + echo "[sim-smoke] FAIL: dcdc mode did not engage (emitted run); tail:" >&2 + tail -n 20 "${run_log}" >&2 || true + return 1 + fi + if grep -qi "falling back to ode" "${run_log}"; then + echo "[sim-smoke] FAIL: dcdc run fell back to OdePlant" >&2 + return 1 + fi + [[ ${elapsed} -lt ${NGSPICE_WALL_LIMIT_S} ]] \ + || { echo "[sim-smoke] FAIL: dcdc emitted run took ${elapsed}s (limit ${NGSPICE_WALL_LIMIT_S}s)" >&2 + return 1; } + [[ -f "${trace}" ]] || { echo "[sim-smoke] FAIL: dcdc_3bus_trace.csv not written" >&2; return 1; } + dcdc_trace_check "${trace}" 1000 48.0 0.05 - || return 1 + log "dcdc_3bus (emitted, graph-driven duties) wall time: ${elapsed}s (limit ${NGSPICE_WALL_LIMIT_S}s)" + + # --- Leg 2: graph-less base image — scenario "dcdc" keys drive ---------- + ensure_dcdc_base || return 1 + local base_dir + base_dir="$(dcdc_run_base "${HOSTSIM_SRC}/${DCDC_SCENARIO_REL}" 3bus)" || return 1 + dcdc_trace_check "${base_dir}/dcdc_3bus_trace.csv" 1000 48.0 0.05 30 20 40 || return 1 + + # --- Leg 3: paralleled legs into one shared bus -------------------------- + base_dir="$(dcdc_run_base "${HOSTSIM_SRC}/${DCDC_PARALLEL_SCENARIO_REL}" parallel)" || return 1 + dcdc_parallel_check "${base_dir}/dcdc_parallel_trace.csv" 1000 48.0 0.05 30.0 2.5 || return 1 +} + +part_hostsil() { + ensure_prereqs || return 1 + # SIL_FW_SRC pinned inside the build tree so reconfigures reuse the + # emitted firmware copy deterministically — but the pin must not mask + # staleness: re-emit when Gen6FW sources or the SIL graph are newer than + # the copy (marker: a file the emitter writes on every emit). + local sil_fw_src="${HOSTSIL_BUILD}/hostsil_fw_src" + local sil_marker="${sil_fw_src}/Src/Inverter/InverterMain.cpp" + local sil_graph="${REPO_ROOT}/Assets/Examples/foc_demo.json" + if [[ ! -x "${HOSTSIL_BUILD}/host_sil" ]] || [[ ! -f "${sil_marker}" ]] \ + || tree_newer_than "${REPO_ROOT}/Images/Gen6FW" "${sil_marker}" \ + || [[ "${sil_graph}" -nt "${sil_marker}" ]]; then + log "emitting + configuring host_sil -> ${HOSTSIL_BUILD#"${REPO_ROOT}"/}" + rm -rf "${sil_fw_src}" + cmake -S "${HOSTSIL_SRC}" -B "${HOSTSIL_BUILD}" \ + -DCMAKE_BUILD_TYPE=Release \ + -DSIL_FW_SRC="${sil_fw_src}" \ + || { echo "[sim-smoke] FAIL: HostSIL cmake configure failed" >&2; return 1; } + fi + cmake --build "${HOSTSIL_BUILD}" --parallel "$(nproc)" \ + || { echo "[sim-smoke] FAIL: host_sil build failed" >&2; return 1; } + + local run_dir="${SCRATCH}/hostsil_run" + mkdir -p "${run_dir}" + local run_log="${run_dir}/host_sil_run.log" + (cd "${run_dir}" && "${HOSTSIL_BUILD}/host_sil" "${SIL_SCENARIO}" --realtime 0) \ + >"${run_log}" 2>&1 || { + echo "[sim-smoke] FAIL: host_sil run exited nonzero; tail:" >&2 + tail -n 20 "${run_log}" >&2 || true + return 1 + } + local trace="${run_dir}/sil_foc_trace.csv" + [[ -f "${trace}" ]] || { echo "[sim-smoke] FAIL: sil_foc_trace.csv not written" >&2; return 1; } + + local val_out + val_out="$(python3 "${SIL_VALIDATOR}" "${trace}" --control-start-s 1.6 --iq-a 8)" || { + echo "[sim-smoke] FAIL: validate_trace.py rejected the HostSIL trace:" >&2 + echo "${val_out}" >&2 + return 1 + } + grep -q "VALIDATION PASSED" <<<"${val_out}" \ + || { echo "[sim-smoke] FAIL: validate_trace.py output lacks VALIDATION PASSED" >&2 + return 1; } + log "validate_trace.py: $(grep "VALIDATION PASSED" <<<"${val_out}")" + + # Induction machine under the firmware's own open-loop V/Hz path + # ("induction start" shell command -> OpenLoopController SPWM ramp) — + # ensure_prereqs/build above are reused; this only adds a second ~4 s run. + local ind_log="${run_dir}/host_sil_induction_run.log" + (cd "${run_dir}" && "${HOSTSIL_BUILD}/host_sil" "${SIL_IND_SCENARIO}" --realtime 0) \ + >"${ind_log}" 2>&1 || { + echo "[sim-smoke] FAIL: host_sil induction run exited nonzero; tail:" >&2 + tail -n 20 "${ind_log}" >&2 || true + return 1 + } + grep -q "no active faults" "${ind_log}" \ + || { echo "[sim-smoke] FAIL: host_sil induction run reported active faults; tail:" >&2 + tail -n 20 "${ind_log}" >&2 || true + return 1; } + local ind_trace="${run_dir}/sil_induction_vhz_trace.csv" + [[ -f "${ind_trace}" ]] || { echo "[sim-smoke] FAIL: sil_induction_vhz_trace.csv not written" >&2; return 1; } + + val_out="$(python3 "${SIL_VALIDATOR}" "${ind_trace}" --mode vhz \ + --freq-hz 40 --pole-pairs 2 --control-start-s 1.6)" || { + echo "[sim-smoke] FAIL: validate_trace.py rejected the induction trace:" >&2 + echo "${val_out}" >&2 + return 1 + } + grep -q "VALIDATION PASSED" <<<"${val_out}" \ + || { echo "[sim-smoke] FAIL: induction validation lacks VALIDATION PASSED" >&2 + return 1; } + log "validate_trace.py --mode vhz: $(grep "VALIDATION PASSED" <<<"${val_out}")" +} + +part_rte() { + ensure_prereqs || return 1 + # --no-build reuses the hostsim part's emitted build tree. + ensure_hostsim_emitted || return 1 + + local run_log="${SCRATCH}/rte_sim_run.log" + "${RTE_CLI}" sim \ + --graph "${SPWM_GRAPH}" \ + --scenario "${HOSTSIM_SRC}/${SPWM_SCENARIO_REL}" \ + --name "${SMOKE_NAME}" \ + --no-build --realtime 0 >"${run_log}" 2>&1 || { + echo "[sim-smoke] FAIL: rte sim exited nonzero; tail:" >&2 + tail -n 20 "${run_log}" >&2 || true + return 1 + } + local trace="${EMITTED_BUILD}/run/trace_spwm.csv" + [[ -f "${trace}" ]] || { + echo "[sim-smoke] FAIL: rte sim produced no trace at ${trace}" >&2 + tail -n 20 "${run_log}" >&2 || true + return 1 + } + trace_check "${trace}" 1000 -1 -1 +} + +# Emits the induction_vhz example graph and builds host_sim in a dedicated +# tree; reused (like the spwm tree) across parts and runs, with the same +# staleness guard (graph / base image / emitter newer -> re-emit). +ensure_induction_emitted() { + if [[ -x "${IND_EMITTED_BUILD}/host_sim" && -f "${IND_EMITTED}/${INDUCTION_SCENARIO_REL}" ]]; then + local marker="${IND_EMITTED_BUILD}/host_sim" + if [[ "${IND_GRAPH}" -nt "${marker}" ]] \ + || [[ "${EMITTER}" -nt "${marker}" ]] \ + || tree_newer_than "${HOSTSIM_SRC}" "${marker}"; then + log "graph/base image/emitter newer than the induction tree - re-emitting" + else + return 0 + fi + fi + log "emitting ${IND_GRAPH##*/} -> ${IND_EMITTED#"${REPO_ROOT}"/}" + rm -rf "${IND_EMITTED}" "${IND_EMITTED_BUILD}" + "${EMITTER}" --base-src "${HOSTSIM_SRC}" --graph "${IND_GRAPH}" \ + --output "${IND_EMITTED}" --verbosity warning \ + || { echo "[sim-smoke] FAIL: RTECodeEmitter failed (induction_vhz)" >&2; return 1; } + log "building host_sim (induction tree)" + cmake -S "${IND_EMITTED}" -B "${IND_EMITTED_BUILD}" \ + || { echo "[sim-smoke] FAIL: emitted cmake configure failed" >&2; return 1; } + cmake --build "${IND_EMITTED_BUILD}" --parallel "$(nproc)" \ + || { echo "[sim-smoke] FAIL: emitted host_sim build failed" >&2; return 1; } +} + +part_plants() { + ensure_prereqs || return 1 + + # --- Salient PMSM through the SPWM graph ------------------------------- + # The spwm tree predates the salient scenario in cached trees; re-emit + # when the scenario is not in the copy. + ensure_hostsim_emitted || return 1 + if [[ ! -f "${EMITTED}/${SALIENT_SCENARIO_REL}" ]]; then + rm -rf "${EMITTED}" "${EMITTED_BUILD}" + ensure_hostsim_emitted || return 1 + fi + + local run_log="${SCRATCH}/hostsim_salient_run.log" + local trace="${EMITTED}/trace_salient_pmsm.csv" + rm -f "${trace}" + run_hostsim_scenario "${SALIENT_SCENARIO_REL}" "${run_log}" || { + fail_run "host_sim salient_pmsm run" "${run_log}" $? + return 1 + } + [[ -f "${trace}" ]] || { echo "[sim-smoke] FAIL: trace_salient_pmsm.csv not written" >&2; return 1; } + # throttle_b ramp ends at 0.6 -> spwm_demo_graph maps it to 1+19*0.6 = + # 12.4 Hz electrical; the synchronous PMSM must lock to the field + # (2*pi*12.4 = 77.9115 rad/s within 15%). + plant_trace_check "${trace}" 1000 1e-3 25.0 77.9115 0.15 -1 || return 1 + + # --- Induction machine under open-loop V/Hz ----------------------------- + ensure_induction_emitted || return 1 + + run_log="${SCRATCH}/hostsim_induction_run.log" + trace="${IND_EMITTED}/trace_induction_vhz.csv" + rm -f "${trace}" + (cd "${IND_EMITTED}" && wall_run "${NGSPICE_WALL_LIMIT_S}" \ + "${IND_EMITTED_BUILD}/host_sim" \ + "${INDUCTION_SCENARIO_REL}" --realtime 0) >"${run_log}" 2>&1 || { + fail_run "host_sim induction_vhz run" "${run_log}" $? + return 1 + } + [[ -f "${trace}" ]] || { echo "[sim-smoke] FAIL: trace_induction_vhz.csv not written" >&2; return 1; } + # scenarios/induction_vhz.json seeds TargetHz=40 (the graph slews 20 Hz/s, + # 3.5 s duration -> settled at 40 Hz); sync = 2*pi*40 = 251.327 rad/s + # (1200 rpm mechanical for pp=2). An induction machine must run measurably + # below sync: require >= 3 rad/s slip but >= 70% of sync. + plant_trace_check "${trace}" 1000 1e-3 20.0 251.327 -1 3.0 || return 1 +} + +# ----------------------------------------------------------------------- main + +log "repo root: ${REPO_ROOT}" +log "scratch: ${SCRATCH}" +[[ -n "${ONLY}" ]] && log "running only: ${ONLY}" + +failures=0 +for part in hostsim plants ngspice dcdc hostsil rte; do + want "${part}" || continue + log "=== part: ${part} ===" + if ( set -e; "part_${part}" ); then + log "=== part ${part}: PASS ===" + else + echo "[sim-smoke] === part ${part}: FAIL ===" >&2 + failures=$((failures + 1)) + fi +done + +if [[ ${failures} -gt 0 ]]; then + echo "[sim-smoke] RESULT: FAIL (${failures} part(s) failed; re-run with --keep to preserve scratch)" >&2 + exit 1 +fi +log "RESULT: PASS" diff --git a/docs/automation-backend.md b/docs/automation-backend.md index 5da7371d..4bc41f1e 100644 --- a/docs/automation-backend.md +++ b/docs/automation-backend.md @@ -10,7 +10,7 @@ validation, firmware builds, and flashing are finite CLI jobs. - `RTEAutomation` contains reusable, Qt-free generation, CMake, process, flashing, cache, and Studio-session code. - `rte` exposes that library to terminals, scripts, CI, RTE Studio, and MCP. -- `rte-studio` edits graphs and owns the live device session. It launches `rte` +- `RTEStudio` edits graphs and owns the live device session. It launches `rte` with argument arrays and consumes JSON Lines events; it does not invoke a shell or host the build system. - `RTECodeEmitter` and `RTEFirmwareBuilder` are compatibility wrappers. New @@ -38,11 +38,49 @@ rte validate --graph graph.json --templates Assets/NodeTemplates rte generate --graph graph.json --base-source Images/Gen6FW --output out rte build --graph graph.json --base-source Images/Gen6FW rte flash --firmware firmware.bin --serial /dev/ttyACM0 +rte sim --graph graph.json [--scenario file.json] [--base-source DIR] [--name NAME] + [--live] [--realtime F] [--no-build] [--output-format text|json|jsonl] ``` Use `--format json` for one structured result or `--format jsonl` for progress events. Commands never require a local web server. +`rte sim` emits a graph into the HostSim base image (default `Images/HostSim` +in the same checkout, discovered by walking up from the `rte` executable), +builds it with cmake under `build/hostsim__emitted_build`, and runs +`host_sim` in the foreground. `` defaults to the graph file stem and is +restricted to `[A-Za-z0-9_.-]` (no separators, not `.`/`..`) because it +composes build directories that are wiped between emits. When `rte` runs +outside a source checkout (an installed binary finds no repo root), the sim +workspace moves to the user cache (`~/.cache/rte/sim/` on Linux) instead of +the install prefix. + +- `RTE_EMITTER` overrides the RTECodeEmitter executable path; a set-but-missing + value falls through to the emitter next to `rte` (or on `PATH`), and the + final error names the bad path. +- Without `--scenario`, the scenario matching the effective name — `--name` if + given, else the graph stem — minus a trailing `_graph` under + `/scenarios/` is used, falling back to + `scenarios/default_motor.json` — the same rule as + `Images/HostSim/scripts/run_spwm_live.sh`. +- Batch mode defaults to `--realtime 0` (as fast as the host can run); with + `--live` the default is 1.0 (wall-clock). Live mode reports the IVP telemetry + endpoint in the progress message/structured event — the scenario's + `simulation.listen_host`/`listen_port` when set (passed to `host_sim` as + `--listen`, because a bare `--live` there would otherwise pin its CLI + defaults), else the default `127.0.0.1:14608` — and stays in the foreground + until Ctrl+C. +- POSIX: SIGINT/SIGTERM/SIGHUP delivered to `rte` are forwarded to the running + sim child before exit, so an interrupted run never orphans `host_sim`. + Windows: `host_sim` is created with `CREATE_NO_WINDOW`, so Ctrl+C in a + console does not reach it and closing the terminal can leave it running — + stop it with Task Manager or `Stop-Process -Name host_sim`. +- The simulator's trace CSV is a batch-mode artifact (live runs write none); + it lands in the run directory + `build/hostsim__emitted_build/run/`; the completed run reports the + absolute path as a `sim-trace` artifact event. `--no-build` reuses the most + recent emit and/or build for the name. + `rte flash` controls MCP2221A GP0 (BOOT0) and GP1 (active-low NRST) directly before and after invoking STM32CubeProgrammer. It uses the kernel GPIO character-device API on Linux and USB HID on Windows/macOS. This native path is diff --git a/docs/simulation.md b/docs/simulation.md new file mode 100644 index 00000000..9e86fe59 --- /dev/null +++ b/docs/simulation.md @@ -0,0 +1,707 @@ +# Simulation + +RTE ships two host simulators, both living under `Images/`: + +- **HostSim** (`Images/HostSim/`) — a *base image* for the code emitter, + targeting the host instead of the STM32. `RTECodeEmitter` copies it, + generates domain code from your graph, and builds a `host_sim` executable + that runs the graph's `tim_isr` / `adc_isr` / `app_loop` steps against a + simulated PMSM plant. This is **graph mode**: what runs is the code your + graph compiles to, nothing more. +- **HostSIL** (`Images/HostSIL/`) — a software-in-the-loop harness that + compiles the **unmodified Gen6FW application code** (Control, Calibration, + Command, drivers, …) behind an STM32 HAL shim and runs it against the same + ODE plant. This is **real-firmware mode**: the firmware's own boot + sequence, control supervisor, and shell commands execute, on a simulated + clock. + +Both are pure host executables — no hardware, no cross-toolchain required. + +## Which one should I use? + +| | HostSim | HostSIL | +|---|---|---| +| What executes | Graph-generated domain code only | The real Gen6FW application, unmodified | +| Base image source | `Images/HostSim` | Emit of `Images/Gen6FW` (+ graph) behind `sil/` shims | +| Plants | ODE PMSM/induction (default), experimental ngspice | ODE PMSM/induction | +| Live GUI attach | Yes (`--live`; the sim publishes IVP over TCP `127.0.0.1:14608`) | Yes (`--live`; relays the firmware's own USART3 telemetry over TCP) | +| Best for | Iterating on graph control logic, demos, live tuning, GUI work | Firmware-level checks: boot, command handling, ISR cadence, exact firmware behavior | + +Rule of thumb: develop and tune the *graph* in HostSim; verify the *firmware* +(including anything HostSim's scheduler does not model) in HostSIL; then +flash hardware. + +## Quickstart: `rte sim` (HostSim, graph mode) + +The `rte` automation CLI performs emit → build → run in one step: + +```bash +./build/bin/rte sim --graph Assets/Examples/foc_demo.json +./build/bin/rte sim --graph Images/HostSim/graphs/spwm_demo_graph.json \ + --scenario Images/HostSim/scenarios/spwm_demo.json +``` + +Batch mode runs as fast as the host can (`--realtime 0` default). The trace +CSV — batch mode only; `--live` runs write no trace — lands in +`build/hostsim__emitted_build/run/`. Full flag spec, +scenario-resolution rules (`--name`, `--scenario` fallback to the matching +scenario or `default_motor.json`), `--no-build`, and output formats are +documented in [automation-backend.md](automation-backend.md) — including the +`--live` mode described next. + +## Quickstart: live simulation + RTE Studio + +```bash +# terminal 1 — emits, builds, and hosts the sim; stays in the foreground +./build/bin/rte sim --graph Assets/Examples/foc_demo.json --live + +# terminal 2 — RTE Studio attaches to the live telemetry stream +./build/bin/RTEStudio Assets/Examples/foc_demo.json --tcp 127.0.0.1:14608 --protocol ivp +``` + +`--live` makes `host_sim` publish InverterProtocol (COBS-framed) telemetry on +`127.0.0.1:14608` and ignore `duration_s` (runs until quit / Ctrl+C). +`--realtime F` sets wall-clock pacing (`1.0` = realtime, `0` = as fast as +possible). RTE Studio's Runtime tab reconnects automatically after a +disconnect, plots the built-in keys (`throttle_a/b`, `duty_u/v/w`, `i_a/b/c`, +`theta_e`, `omega_e`, `vdc_v`) plus any `platform_telemetry_log_f32` keys +from the graph, and its console box sends HostSim shell commands back over +the same socket: + +```text +throttle a 0.5 # live throttle override (a|b, 0..1) +duty u 60 # live duty override (u|v|w, 0..100; "duty clear" releases) +speed 0.25 # slow motion; "speed turbo" = no pacing limit +pause / resume +clear # drop all overrides +quit +``` + +One bundled end-to-end script does emit + build + live sim + GUI together: + +```bash +./Images/HostSim/scripts/run_spwm_live.sh # Linux +powershell -File Images\HostSim\scripts\run_spwm_live.ps1 # Windows +``` + +## Quickstart: standalone HostSim (base image only) + +`host_sim` also runs without `rte` — useful when working on the base image +itself. Build it in place and run a scenario (run from `Images/HostSim` so +scenario-relative paths such as `trace_csv` and ngspice netlists resolve): + +```bash +cd Images/HostSim +cmake -S . -B build_linux +cmake --build build_linux -j +./build_linux/host_sim scenarios/default_motor.json +python3 scripts/plot_sim.py trace.csv # needs matplotlib +``` + +CLI (`host_sim --help`): + +```text +usage: host_sim [scenario.json] [--live] [--listen host:port] [--realtime N] [--telem-hz N] +``` + +The scenario may also be passed as `--scenario `. See +[Images/HostSim/README.md](../Images/HostSim/README.md) for emit-and-run +scripts, the SPWM demo walkthrough, and Windows live-mode tuning notes. + +## Quickstart: HostSIL (real-firmware mode) + +```bash +cmake -S Images/HostSIL -B build/hostsil_build +cmake --build build/hostsil_build -j +cd Images/HostSIL && ../../build/hostsil_build/host_sil scenarios/sil_foc_demo.json --realtime 0 +python3 scripts/validate_trace.py sil_foc_trace.csv --control-start-s 1.6 --iq-a 8 +``` + +The configure step auto-emits the firmware tree (`build/hostsil_fw_src` = +copy of `Images/Gen6FW/` plus graph-generated domain code). Pick a different +graph with `-DSIL_GRAPH=` and a fresh `-DSIL_FW_SRC`, or re-emit with +`Images/HostSIL/scripts/emit_firmware.sh [graph.json] [output-dir]`. +`scripts/validate_trace.py` checks the trace for NaN/inf, the i_a+i_b+i_c +zero-sum constraint, overcurrent bounds, and that speed/duty respond to +control. `scenarios/sil_induction_vhz.json` proves the shared induction +plant under real firmware too: a scheduled `induction start` shell command +drives the firmware's open-loop V/Hz (`OpenLoopController` SPWM) against +`machine: "induction"`, with `validate_trace.py --mode vhz` asserting the +slip band around sync (numbers in the HostSIL README). + +HostSIL also has a live mode (run from `Images/HostSIL`): + +```bash +../../build/hostsil_build/host_sil scenarios/sil_foc_demo.json --live +``` + +`--live` serves the firmware's **own USART3 telemetry byte stream** — the +COBS-framed InverterProtocol packets its Telemetry module would put on the +wire — verbatim on `127.0.0.1:14608` (override with `--port P`), and implies +`--realtime 1.0` unless passed explicitly. RTE Studio attaches exactly as +with HostSim (`--tcp 127.0.0.1:14608 --protocol ivp`); the firmware emits the +usual 100 Hz DATA frames plus periodic DEFINE re-announces, so the full key +table appears regardless of attach time. + +The link is **bidirectional**: bytes a client sends — RTE Studio's console +input, or any raw TCP client — are forwarded verbatim into the firmware's +USART3 IT-RX path (the SIL HAL models the single-byte +`HAL_UART_Receive_IT` / `HAL_UART_RxCpltCallback` pairing the Gen6FW +CommandShell expects), so shell commands typed over the socket take the real +firmware code path exactly as a serial terminal on hardware would. Both +`\n` and `\r\n` line endings work. Try it headlessly with the stdlib-only +client (shell responses arrive as `print` string values inside the telemetry +stream): + +```bash +python3 Images/HostSIL/scripts/shell_client.py 127.0.0.1:14608 \ + "help" "var get IqVar" "var set IqVar 5.0" "var get IqVar" +``` + +For a headless decode of the telemetry stream itself there is +`Images/HostSIL/scripts/ivp_probe.py`. + +HostSIL scenarios extend the HostSim scenario format (see below) with +`control` (`start`, `start_time_s`, `iq_a`, `id_a` — posted through the +firmware's own `CommandManager`), `firmware_config` (KV pairs seeded via +`config set/save`), and `fram_image` (file backing for the emulated F-RAM). +`Images/HostSIL/scenarios/sil_foc_salient.json` demonstrates the salient PMSM +(Ld≠Lq) with a forced negative `id_a`: the plant's reluctance torque term adds +~23 % speed at equal `iq_a` versus `id_a = 0`. +Architecture, ISR ordering, and fidelity notes: +[Images/HostSIL/README.md](../Images/HostSIL/README.md). + +## HostSim scenario file reference + +Scenarios are plain JSON passed to `host_sim` (`argv[1]` or `--scenario`). +Defaults are built in — a scenario only overrides the keys it names. The +parser matches keys by name anywhere in the file, so the shipped scenarios +nest `plant`/`pwm_scope` under `simulation` while flat placement is also +accepted. Bundled scenarios: `default_motor.json`, `spwm_demo.json`, +`svpwm_live.json`, `ngspice_rl_demo.json`, `ngspice_pmsm_demo.json`, +`salient_pmsm.json`, `induction_vhz.json`, `dcdc_3bus.json`, +`dcdc_parallel.json`. + +### `motor.*` — machine parameters + +Both simulators run the same ODE plant (`Images/HostSim/src/motor_model.cpp`). +`machine` selects the model: + +| Key | Default | Meaning | +|---|---|---| +| `machine` | `pmsm` | `pmsm` = salient-dq PMSM; `induction` = squirrel-cage induction (stationary αβ model, `src/induction_model.h`) | +| `rs_ohm` | 0.05 | Stator resistance | +| `pole_pairs` | 7 | Pole pairs | +| `inertia_kg_m2` | 1e-5 | Rotor inertia (applied to the electrical speed, the simulator's mechanics convention) | +| `friction_nm_per_rad_s` | 1e-4 | Viscous friction (same convention) | +| `vdc_v` | 48.0 | DC-link voltage | +| PMSM only: `ld_h` / `lq_h` | 1e-4 | d/q inductance — Ld≠Lq enables the `(Ld−Lq)·id·iq` reluctance torque term | +| PMSM only: `flux_wb` | 0.01 | PM flux linkage | +| Induction only: `rr_ohm` | 0.3 | Rotor resistance (referred) | +| Induction only: `lm_h` | 0.025 | Magnetizing inductance | +| Induction only: `lls_h` / `llr_h` | 0.002 | Stator/rotor leakage (Ls=Lm+Lls, Lr=Lm+Llr) | +| `name`, `comment` | — | Informational (e.g. where to paste calibrated values) | + +HostSIL parses the same keys (`Images/HostSIL/src/scenario.cpp`); its +`machine` maps onto the shared ODE plant identically. + +### `throttle_a` / `throttle_b` — stimulus profiles + +| Key | Profile | Meaning | +|---|---|---| +| `type` | all | `constant` (default), `ramp`, or `step` | +| `value` | constant, step | Output level (for `step`: the level before the step) | +| `start`, `end`, `start_s`, `end_s` | ramp | Linear ramp from `start` to `end` over the window | +| `step_time_s`, `step_value` | step | Jump to `step_value` at `step_time_s` | + +### `simulation.*` + +| Key | Default | Meaning | +|---|---|---| +| `duration_s` | 1.0 | Batch run length (ignored in live mode) | +| `tim_isr_hz` / `adc_isr_hz` | 10000 | Fast domain tick rates | +| `app_loop_hz` | 1000 | Slow domain tick rate | +| `telem_hz` | 500 | Live telemetry publish rate; in `--live` mode a value below 1500 is raised to 2000 Hz so waveforms stay dense (set ≥1500 to keep a custom rate) | +| `realtime_factor` | 1.0 | Wall-clock pacing; 0 = as fast as possible | +| `live` | false | Long-running mode with TCP telemetry | +| `listen_host` / `listen_port` | 127.0.0.1 / 14608 | Telemetry endpoint | +| `trace_csv` | `trace.csv` | Trace output path (relative to the process CWD) | +| `demo_fallback` | false | Legacy open-loop SPWM synthesized by the scheduler when no graph node drives the duties; only `default_motor.json` enables it (plant bring-up without a graph). When off and duties stay 0 despite non-zero throttle, HostSim logs a warning once. | +| `config_file` | — | Backing file (`key=value` lines) for the `platform_config_*` store; preloaded at startup, flushed on every set. Absent = in-memory only. | +| `pwm_carrier_hz` | — | Shorthand: set the PWM scope carrier and enable the scope. | + +### `simulation.plant` (or top-level `plant`) — backend selection + +| Key | Default | Meaning | +|---|---|---| +| `backend` | `ode` | `ode` or `ngspice` | +| `netlist` | — | ngspice netlist path; probed relative to the `host_sim` working directory first, then the scenario file's directory, then that directory's parent (the image root) — so bundled netlists in `Images/HostSim/plants/` resolve from any working directory | +| `substeps` | 4 | SPICE substeps per control tick (zero-order hold on phase voltages across the tick) | +| `mode` | `motor` | `motor` = 3-phase machine semantics (neutral-point subtraction, back-EMF, PMSM mechanics); `dcdc` = 3-leg converter semantics (per-leg `duty`×Vdc into a DC/DC netlist, see below). `dcdc` requires `backend: "ngspice"` and a dcdc-contract netlist; mismatched mode/netlist pairings are refused loudly with an ODE fallback. | + +### `dcdc.*` — converter default duties (dcdc mode only) + +`{"dcdc": {"duty_u_pct": 30, "duty_v_pct": 20, "duty_w_pct": 40}}` (all +default 0). The duties driven into the legs every control step **unless the +graph actually wrote PWM in that tick**. Precedence, highest first: + +1. live `duty` override (telemetry console), +2. graph `platform_pwm_set` in that tick (`ctx.pwm_written`), +3. scenario `dcdc.duty_*_pct`, +4. legacy `demo_fallback` SPWM (overwritten by the dcdc duties, so it is + never effective in dcdc mode). + +The motor-parameter keys are reused as converter knobs in dcdc mode: +`motor.vdc_v` scales the leg voltages, `motor.rs_ohm` becomes the per-leg +conduction resistance, `motor.ld_h`/`lq_h` (averaged) the leg inductance — +all three flow through `alterparam` into the netlist at Reset, same as the +motor netlists. + +## DC/DC converter mode (dcdc mode) + +ngspice backend mode for synchronous DC/DC plants (the DC-microgrid +roadmap item). Selected with +`plant {"backend": "ngspice", "mode": "dcdc", "netlist": ...}`. Bundled: +`plants/dcdc_buck.cir` (3 legs → 3 independent buses; used by +`scenarios/dcdc_3bus.json`) and `plants/dcdc_parallel.cir` (3 legs +paralleled into one shared bus; `scenarios/dcdc_parallel.json`). + +Both netlists are **averaged**: per leg, a behavioral `external` V-source +plays the averaged switch node (`duty`×Vdc, zero-order-held at the control +rate — the plant seam injects one voltage per control step, so there is no +per-carrier signal path; switching ripple and dead-time effects stay out of +scope, same convention as the motor netlists). Each leg feeds an LC filter +into a bus capacitor and a resistive load. `substeps: 1` suffices (no +intra-tick events); 0.2–0.3 s is plenty for the LC to settle. + +Netlist/host contract (both netlists, as doc comments): + +- `Vu`/`Vv`/`Vw` — `external` driven sources, one per leg switch node. +- `Vsen1`/`Vsen2`/`Vsen3` — 0 V sense sources in series with each leg; + `i(vsenN)` is the leg current, positive = leg → bus. Their presence is the + dcdc-contract marker (`DetectDcdcSenseSources`): mode `dcdc` with a motor + netlist, or mode `motor` with a dcdc netlist, is a loud error plus ODE + fallback, never silent. +- Nodes `bus1`/`bus2`/`bus3` — probed per control step via + `ngGet_Vec_Info("v(busN)")` for the trace/telemetry. The parallel netlist + aliases `bus2`/`bus3` onto the single shared bus with two 0 V tie sources. +- `.param` names `RS`, `LS`, `VDC` must exist (host `alterparam` always + pushes them: `RS` = per-leg conduction resistance, `LS` = leg inductance + in henries) plus the converter tunables (`BUS_CAP_UF`, `BUS_ESR_MO`, + `LOAD*_OHM`). Note ngspice brace substitution inserts spaces: + write `{BUS_CAP_UF*1e-6}`, never `{BUS_CAP_UF}u` (expands to `470 u`, the + element is dropped with "unknown parameter"). + +Observability: in dcdc mode the trace CSV gains +`v_bus1,v_bus2,v_bus3,i_leg1,i_leg2,i_leg3` (leg currents also ride the +`i_a/b/c` columns, so the ADC latch and overcurrent fault injection work +unchanged; `theta_e`/`omega_e`/`id`/`iq` stay 0), and live telemetry +publishes `v_bus1..3` / `i_leg1..3`. + +Steady state is `v_busN ≈ (duty_N/100)·vdc_v·R_loadN/(R_loadN+R_leg)` +(`R_leg` = `RS`): with 48 V, duties 30/20/40 % and loads 5/10/2.5 Ω, +`dcdc_3bus` settles at ≈ 14.34/9.58/19.05 V. Paralleling three legs into one +bus shares the load in exact thirds when duties and legs are symmetric; a +duty mismatch redistributes current by `ΔD·Vdc/RS` — the averaged legs are +near-ideal sources, so small mismatches move a lot of current (on hardware: +why paralleled converters need current-mode or droop control). + +### `simulation.pwm_scope` (or top-level `pwm_scope`) — switched-waveform scope + +| Key | Default | Meaning | +|---|---|---| +| `enabled` | false | Publish `pwm_gate_*` / `pwm_v_*` scope channels | +| `carrier_hz` | 800 | Triangle carrier frequency | +| `telem_hz` | auto | Scope sample rate (scales with sim speed) | + +### `adc.*` — phase-current ADC error model (absent = ideal) + +Defaults mirror the Gen6 signal-chain constants in +`Images/HostSim/include/RteParams.h`. + +| Key | Default | Meaning | +|---|---|---| +| `resolution_bits` | 16 | ADC resolution | +| `vref_v` | 3.3 | ADC reference voltage | +| `ref_v` | 1.65 | Zero-current sense offset | +| `divider` | 2/3 | Sense-chain divider | +| `sensitivity_v_per_a` | 1.042e-3 | Amps-to-volts at the ADC input | +| `gain_error` | 1.0 | Multiplicative gain error | +| `offset_u_a` / `offset_v_a` | 0 | Additive current bias per sampled phase | +| `noise_std_a` | 0 | Gaussian noise, 1-sigma amps | + +### `environment.*` + +| Key | Default | Meaning | +|---|---|---| +| `motor_temp_c` | 25 | Surfaced by the platform temperature APIs | +| `inverter_temp_c` | 25 | Surfaced by the platform temperature APIs | + +### `faults.*` — triggers surfaced via `platform_has_critical_fault()` + +| Key | Default | Meaning | +|---|---|---| +| `overcurrent_a` | 0 (off) | Trip when any |i_phase| exceeds this | +| `undervoltage_v` | 0 (off) | Trip when the DC link drops below this | +| `vdc_glitch_time_s` / `vdc_glitch_v` | off | At the given time, drop the DC link to `vdc_glitch_v` (seen by both control code and plant) | + +### `can.*` + +| Key | Default | Meaning | +|---|---|---| +| `loopback` | true | Frames sent via `platform_can_send` are readable via `platform_can_rx` (latest-frame store keyed by bus+id) | +| `frames` | — | Scheduled injected traffic: `[{"bus": 1, "id": 291, "ext": false, "start_s": 0.1, "period_s": 0.01, "data": "DEADBEEF"}]`. `id` accepts decimal or `0x` hex, `data` is a hex string ≤ 8 bytes (`dlc` follows), `period_s` > 0 repeats otherwise single shot at `start_s` (alias `time_s`). | + +### `vars.*` — graph Var node seeds (HostSim only) + +`{"vars": {"TargetHz": 40.0}}` writes each value into the `Stored` state of +the emitted graph's Var node with that id, right after domain init — the +batch-mode equivalent of the firmware shell's `var set` used by +`Tools/alternate_target_hz.py`-style live sessions. Unknown names are warned +about and ignored (base-image-only runs have no graph and warn once). +`scenarios/induction_vhz.json` uses this to set the induction_vhz example +graph's frequency target; Values.Config nodes are instead seeded from the +`simulation.config_file` KV store (e.g. `scenarios/induction_vhz.cfg` for the +V/Hz ratio). + +Motor parameters are not hardcoded to a machine: copy a bundled scenario and +paste calibrated values from the target motor. + +## Running all example graphs + +`Tools/tests/run_all_examples.sh` is the systematic answer to "does every +example graph in `Assets/Examples/` still emit, build, and run on the +simulator?". It discovers every `*.json` there and, per graph, runs the full +emit (`--templates Assets/NodeTemplates`) → cmake configure+build → batch +run (`--realtime 0`) chain and asserts: clean exit, trace CSV written, no +NaN/Inf in any trace column, and a strictly monotonic `time_us`: + +```bash +bash Tools/tests/run_all_examples.sh # full suite (~1-2 min cold, ~15 s warm) +bash Tools/tests/run_all_examples.sh --only foc # name-substring filter +``` + +Drive vars are seeded per graph via scenario `vars` so the control chains are +actually exercised: the FOC graphs get a generated default-motor scenario +with `IqVar=8 A` (`foc_mtpa_demo` uses its `CMD` ref), `induction_vhz` gets a +generated induction-machine scenario that mirrors the proven +`scenarios/induction_vhz.{json,cfg}` tuning (0.55 V/Hz + 1.5 V boost, +`TargetHz=40`). `can_bus_demo` cannot run as a single batch instance — the +suite instead runs the two-instance live bridge recipe from +[Graph-level CAN / two-inverter pattern](#graph-level-can--two-inverter-pattern) +(hub + spoke on ephemeral ports, `can_bus_demo_role_{a,b}.json` overlays) and +asserts bridge frames are witnessed in both directions *and* consumed by each +graph's CanRx; live mode writes no trace, hence the `—` in the rows column. +Scenario overlays (`*_role_*.json`) are reported as SKIP by construction. + +Emitted trees are cached under `build/hostsim_examples__emitted{,_build}` +(re-emitted only when the graph, templates, HostSim base image, or emitter is +newer); run logs and generated scenarios land in `build/hostsim_examples_suite/`. +Exit code is nonzero iff any graph FAILs. Current results: + +| graph | status | rows | peak \|i\| | notes | +|---|---|---:|---:|---| +| can_bus_demo | PASS | — | 0.000 | live 2-instance CAN bridge (6s); frames A→B x300, B→A x300; peer role consumed both sides | +| can_bus_demo_role_a | SKIP | — | — | scenario overlay, not a graph; consumed by `can_bus_demo` two-instance run | +| can_bus_demo_role_b | SKIP | — | — | scenario overlay, not a graph; consumed by `can_bus_demo` two-instance run | +| current_telemetry | PASS | 5001 | 223.282 | sensor-only graph; legacy `demo_fallback` spins the plant | +| foc_chain | PASS | 5001 | 2.625 | open chain, fixed theta/dq refs (Iq=5 A baked in) | +| foc_demo_aidan | PASS | 7501 | 17.760 | default_motor baseline + vars `IqVar=8 A` (`IdVar=0`) | +| foc_demo | PASS | 7501 | 15.480 | default_motor baseline + vars `IqVar=8 A` (`IdVar=0`) | +| foc_mtpa_demo | PASS | 7501 | 76.325 | default_motor baseline + vars `CMD=8 A` (MTPA splits id/iq) | +| foc_sensorless_demo | PASS | 15001 | 4.582 | 10 mH 5pp PMSM @10 kHz + vars `IqVar=4 A`, `UseObserver=1` (observer feedback); settled \|obs−meas\| worst 0.121 A, spins ≈25 rad/s elec | +| induction_vhz | PASS | 17501 | 2.723 | induction plant, `TargetHz=40`, 0.55 V/Hz + 1.5 V boost | +| ladrc_demo | PASS | 7501 | 17.109 | default_motor baseline + vars `IqVar=8 A` (LADRC current loops) | + +(`spwm_demo` is not an `Assets/Examples` graph — it lives in +`Images/HostSim/graphs/` and is covered by the `hostsim` part of +`Tools/tests/run_sim_smoke.sh`.) + +## Sensorless observer feedback + +`Assets/Examples/foc_sensorless_demo.json` is a `foc_demo` variant that closes +the FOC current loop on the **current observer** instead of raw burst samples — +the Gen6 `FocControlManager` observer-feedback pattern expressed as graph +topology (the same `hw.current_observer` predict/correct block the Gen6 +firmware runs, ported into HostSim). Concretely, versus `foc_demo`: + +- `ObserverObs` (`hw.current_observer`, `tim_isr`) runs every control step: + corrected by the `adc_isr` burst measurements (cross-domain bridges carry + `I_A/B/C` plus the burst slope/timestamp) and predicted from the voltage + vector that was *actually applied* during the previous period, reconstructed + by the graph-local `AppliedVab` node from the terminal-voltage readback + (`platform_phase_voltage_u/v/w`). Observe the convention conversion there: + the readback is leg-average volts vs DC−, so the node applies the + amplitude-preserving Clarke and ×2 to recover the graph's leg-referenced + α/β voltage convention (on Gen6 `duty·vdc` is the leg average, hence the + phase-neutral fundamental is half of `|vαβ|`). +- `FeedbackGate` (graph-local `Custom.ObsGate`) is the feedback switch that + Gen6 implements inside `FocControlManager::onPwmPeriod()`: when + `platform_get_use_observer()` is set it feeds the Clarke/Park chain with the + observer currents, otherwise with the raw burst measurement. The + `foc_demo` bridges that fed Clarke/Park now feed this gate. +- `ObserverCtrl` (graph-local `Custom.ObserverControl`) seeds the observer from + calibration at graph init (`platform_observer_init_from_calibration()` — + HostSim's source is the scenario `motor` block) and drives the platform + `use_observer` flag from the `UseObserver` Var (default 1) every step. + Scenario `vars` land after domain constructors, so step-time application — + not a constructor — is what makes a scenario-seeded value effective from the + first step; flag writes are idempotent. +- A `PhaseCurrentsObs` probe (`Sensors.PhaseCurrents` → telemetry key + `cg_pc_iu`) demonstrates the standard template honoring the same flag: with + `use_observer` on it outputs the observer currents, off the raw ADC samples. + The `InvertPolarity` trim applies to the raw path only — the currents that + correct the observer are sign-corrected before they reach it, so observer + output already follows the FOC convention (same as the Gen6 control path). + +The scenario generator in `Tools/tests/run_all_examples.sh` uses a 10 mH +5-pole-pair PMSM at 10 kHz tim/adc with `IqVar=4 A`, `UseObserver=1` (the demo +also runs fine at the usual 5 kHz — 10 kHz just halves the observer's per-step +prediction staleness, tightening the settled tracking error). At that operating +point the observer tracks the measured phase currents to < 0.13 A worst-case +after settle (~0.05 A RMS) with iq regulated to 4.00 A and the motor spinning +at ≈ 25 rad/s electrical. Seeding `"UseObserver": 0.0` instead falls back to +raw-measurement feedback and the run matches `foc_demo` under the same +scenario bit-for-bit (the observer keeps running but nothing consumes it). +The suite asserts all of this for the graph row: gate steadily on, worst +settled `|obs−meas|` < 0.15 A, and the motor spinning. + +## Graph-level CAN / two-inverter pattern + +`Assets/NodeTemplates` ships two CAN graph nodes that emit plain +`platform_can_*` calls (same signatures on HostSim and Gen6FW), so graph +logic can talk CAN end-to-end without firmware changes: + +- **Actuators.CanTx** — sends a frame on `Bus` (1 = A, 2 = B) with arbitration + `Id`, payload bytes `D0..D7` (each wireable, `Dlc` selects how many), at most + `Rate` times per second (`platform_millis`-paced; `Rate <= 0` sends every + step). `Id`, like any parameter, may be wire-fed (`parameterInputs`). +- **Sensors.CanRx** — Gen6 latest-frame receive mailbox for (`Bus`, `Id`): + outputs `D0..D7`, `Dlc`, and `Fresh` (true for one step per arrival; the + store is seq-counted so polling is idempotent). It is *not* an entry point, + so `Bus`/`Id` may be wired from in-graph logic. + +### Bridge topology + +The multi-instance bridge (flags in +[Images/HostSim/README.md](../Images/HostSim/README.md#multi-instance-can-bridge)) +maps instances onto a shared bus rather than buses onto buses: every +`platform_can_send` is mirrored to *all* other instances (hub rebroadcast), +where it lands in the rx store keyed by `(bus, id)` exactly like scenario +`can.frames` traffic. Two instances both using "bus 1" therefore model two +inverters sharing one physical bus; per-instance `bus 2` traffic stays a +second logical bus. Own transmissions are filtered by instance id, and +scenario `can.loopback` (default on) only mirrors frames into the *sender's* +own store — so assign each role a distinct tx id and loopback never collides +with bridged traffic. Bus 0 is reserved for the `--can-selftest` diagnostic +channel and never reaches a graph mailbox. + +Batch runs ignore `--realtime` (max speed), so overlapping multi-instance +demos must use `--live --realtime 1.0` plus a distinct `--listen` port per +instance. + +### Demo: `Assets/Examples/can_bus_demo.json` + +One graph, two roles, selected by scenario `vars` (no per-role edits): + +- `Role` + `TxPeriod` — `Values.Var` nodes seeded from the scenario + (`can_bus_demo_role_a.json`: `Role=1`, `TxPeriod=0.4`; `..._role_b.json`: + `Role=2`, `TxPeriod=0.9`). +- `Demo.RoleRouter` (graph-local type) maps Role onto ids: role 1 transmits + `0x2A1` and listens for `0x2A2`, role 2 the mirror. +- `Demo.TxPattern` generates a sawtooth test byte (period `TxPeriod`); + CanTx sends it in `D0` with the role number in `D1`, 50 fps in `app_loop`. +- CanRx feeds telemetry keys `can_rx_d0`, `can_rx_tag`, `can_rx_dlc` + (peer's byte / role tag / frame length observed *inside* the consuming + graph); `can_tx_d0` logs the local byte for comparison. + +Recipe (emit + build once, run two live instances): + +```bash +./build/bin/RTECodeEmitter --base-src Images/HostSim \ + --graph Assets/Examples/can_bus_demo.json \ + --output build/hostsim_can_bus_demo_emitted +cmake -S build/hostsim_can_bus_demo_emitted -B build/hostsim_can_bus_demo_emitted_build +cmake --build build/hostsim_can_bus_demo_emitted_build -j + +cd build/hostsim_can_bus_demo_emitted # scenario-relative paths resolve from here +HOSTSIM_TELEM_STDERR=1 ../hostsim_can_bus_demo_emitted_build/host_sim \ + ../../Assets/Examples/can_bus_demo_role_a.json \ + --live --realtime 1.0 --listen 127.0.0.1:14608 \ + --can-bridge-listen 7900 --can-bridge-id 1 > /tmp/canA.log 2>&1 & +sleep 0.7 # hub must be up before the spoke connects +HOSTSIM_TELEM_STDERR=1 ../hostsim_can_bus_demo_emitted_build/host_sim \ + ../../Assets/Examples/can_bus_demo_role_b.json \ + --live --realtime 1.0 --listen 127.0.0.1:14609 \ + --can-bridge-connect 127.0.0.1:7900 --can-bridge-id 2 > /tmp/canB.log 2>&1 & +sleep 6 && kill %1 %2 +``` + +Proof (bridge witnesses *and* graph-side consumption; A's ramp steps ≈13 per +20 ms/0.4 s period, B's ≈6 per 20 ms/0.9 s): + +```bash +grep "id=0x2A1" /tmp/canB.log | head # A→B frames: data=CC 01, D9 01, E6 01, ... +grep "id=0x2A2" /tmp/canA.log | head # B→A frames: data=05 02, 0B 02, 11 02, ... +grep can_rx_tag= /tmp/canB.log | tail -1 # =1: B's graph consumes role-A frames +grep can_rx_d0= /tmp/canA.log | awk 'NR%100==1' | head # ≈ +28.4 per 100 ms (0.9 s ramp) +``` + +Causality: raise A's `TxPeriod` in `can_bus_demo_role_a.json` (e.g. 0.15 s) +and re-run — B's `can_rx_d0` ramp wraps proportionally faster while B→A is +unchanged. RTE Studio can attach to either endpoint (`--tcp 127.0.0.1:14608` +or `:14609`) to plot the keys live. + +### Limits + +- **App-loop-rate traffic only.** The bridge relays one record per send over + best-effort TCP; put CanTx/CanRx in `app_loop` and keep `Rate` well under + the loop cadence. Placing CanTx in the 10 kHz `tim_isr` with `Rate <= 0` + would attempt 10 000 sends/s and the bridge just drops what it cannot + carry (counted as `dropped`). +- **One app-loop tick of aliasing.** The bridge polls after each app step, so + a bridged frame becomes visible to the peer's CanRx on the peer's next + tick; between two 1 kHz loops expect ≤ ~2–3 ms of staleness plus socket + jitter. +- **Latest-frame semantics.** The mailbox keeps only the newest frame per + `(bus, id)`; two senders on the same id interleave and the receiver sees + whichever is newest (same as hardware). Use one tx id per sender per bus. +- Live mode runs until killed; stop instances with SIGTERM/SIGINT (`kill`), + same as the bridge selftest demo in the HostSim README. + +## Plant backends + +| Backend | Scenario | What it models | +|---|---|---| +| **ODE** (default) | `"backend": "ode"` or omitted | Discrete-time machine ODE (`src/motor_model.cpp` + `src/induction_model.h`): clamped duty × Vdc drive → averaged phase voltages → plant dynamics; integrated mechanics. `motor.machine` picks `pmsm` (salient dq, reluctance torque included) or `induction` (4th-order squirrel-cage, stationary αβ, rotor-flux angle/slip internal). Fast — the only fully supported backend and the right choice for `--live`. | +| **ngspice RL** (experimental) | `"backend": "ngspice"`, `"netlist": "plants/inverter_rl.cir"` | Three-phase wye RL load in libngspice. The circuit has no back-EMF element, so the back-EMF is folded into the driven source values; mechanics integrate in the host. | +| **ngspice PMSM** (experimental) | `"backend": "ngspice"`, `"netlist": "plants/inverter_pmsm.cir"` | Per-phase R-L plus an **in-circuit back-EMF source** (`Veu/Vev/Vew` external sources driven from rotor angle/speed), so back-EMF is part of the circuit equation. | +| **ngspice DC/DC** (experimental) | `"backend": "ngspice"`, `"mode": "dcdc"`, `"netlist": "plants/dcdc_buck.cir"` (or `dcdc_parallel.cir`) | Three averaged synchronous-buck legs driving their own `duty`×Vdc switch node into LC filters and bus caps — 3 independent buses or all legs paralleled into one. See [DC/DC converter mode](#dcdc-converter-mode-dcdc-mode). | + +The ngspice netlists are voltage-source driven (duty → terminal/switch-node +voltage, vs DC−), with netlist components parameterized from `motor.*` +(`alterparam`, cold start via `UIC`). dcdc-mode netlists follow a small +contract instead (see [DC/DC converter mode](#dcdc-converter-mode-dcdc-mode)): +`Vsen1..3` sense sources, `bus1..3` probe nodes, no back-EMF or mechanics. +ngspice models **electrical RL / PMSM-backEMF / DC-DC converter only — no +induction machine**; `machine: "induction"` with `backend: "ngspice"` is +refused with a stderr notice and continues on the ODE plant (which models +the induction machine natively). If `libngspice` cannot be loaded, HostSim +prints a notice on stderr and continues on the ODE plant — check the log +when a scenario unexpectedly runs ODE. + +## ngspice backend setup (Linux, optional) + +The backend `dlopen`s `libngspice.so` first, then `libngspice.so.0`, so only +the shared library is needed at runtime — no headers, no rebuild: + +```bash +sudo apt install libngspice0-dev # provides libngspice.so (linker name) +``` + +The runtime-only package also works: `libngspice0` ships the versioned +`libngspice.so.0`, which the loader finds on the standard library path. If +your library lives somewhere non-standard, point the loader at it: + +```bash +LD_LIBRARY_PATH=/path/to/dir-with-libngspice ./build_linux/host_sim scenarios/ngspice_rl_demo.json +``` + +Then run a demo **from `Images/HostSim`** (run from the image root so the +relative scenario path below resolves; the netlist itself is also found via +the scenario-relative fallback, so `rte sim --scenario` with these scenarios +resolves bundled netlists too — no special working directory needed there): + +```bash +cd Images/HostSim +./build_linux/host_sim scenarios/ngspice_rl_demo.json +./build_linux/host_sim scenarios/ngspice_pmsm_demo.json +``` + +Environment knobs: + +- `HOSTSIM_NGSPICE_SYNC_JUMP=1` — experimental performance opt-in: the sync + callback jumps straight to each stop target instead of re-ramping the + timestep after every pause (~1.8× fewer internal SPICE steps; only a few + percent wall-time on the bundled demos, with slightly different + trajectories). Default off. +- `HOSTSIM_TELEM_STDERR=1` — also echo `platform_telemetry_log_f32` traffic to + stderr (off by default; debugging only). + +## Known limitations / fidelity caveats + +**Both simulators** + +- Averaged-duty drive: no switching ripple, no dead-time/distortion effects. + HostSim's `pwm_scope` is a visualization layer, not the plant. +- Sensors are ideal apart from the modeled quantization/offset/noise terms. +- Not a replacement for dyno validation — treat results as + control-logic/plant-model truth, not hardware truth. + +**HostSim** + +- The ngspice backend is experimental: voltage-source-driven (no switched + devices), limited to the RL/PMSM/DCDC netlist shapes above, slower than + the ODE plant, and it falls back to ODE when libngspice is missing. +- Number parsing is a lenient key search, not a strict JSON DOM — malformed + files can silently keep defaults. + +**HostSIL** (condensed from its README — that file is authoritative) + +- Cooperative scheduling: ISRs run at tick boundaries and never preempt + mid-instruction; firmware critical sections model a *stronger* guarantee + than hardware. +- One perfectly clean injected ADC burst per switching period; TIM1-OC4 + adaptive trigger placement is bookkeeping-only. +- CAN/UART frames are accepted and dropped; telemetry TX DMA completes at the + next app tick (in `--live` mode the USART3 TX bytes are also relayed to TCP + clients); F-RAM is a 256 KiB in-memory image (optional file backing). +- `platform_micros()`/DWT see cycles = sim µs × 550 MHz. + +## Future directions + +Deliberately not built yet, but the seams are in place (see also the TODO.txt +simulator block and the root README roadmap): + +- **Synchronous DC/DC and DC microgrids.** The first step landed: the + ngspice backend's dcdc mode (above) runs a 3-phase stage as three + independent phase→DC-bus converters or legs paralleled into one bus + (`plants/dcdc_buck.cir` / `dcdc_parallel.cir`). Still open: a fast ODE/RTL + DC-bus plant behind the `IPlant` seam (`src/plant/plant_backend.h`) for + `--live` speed, and 2+1 split topologies. +- **Multiple inverters at once.** The shared simulated CAN landed: concurrent + `host_sim` instances exchange CAN frames over localhost TCP via + `--can-bridge-listen` / `--can-bridge-connect` (hub-and-spoke relay; see + "Multi-instance CAN bridge" in + [Images/HostSim/README.md](../Images/HostSim/README.md)). Sim instances + already take distinct ports (`host_sim --listen`, `host_sil --port`) so N + RTEStudio sessions can attach independently. Still open: coupled + multi-instance *plants* (e.g. a 5-phase motor driven by two 3-phase + inverters, or a microgrid AFE → DC/DC → output chain sharing one electrical + model) and Windows support for the bridge. +- **N-phase machines.** The induction/PMSM models are 3-phase dq/αβ; a + 5-phase machine means generalizing the plant transforms behind the same + seam. + +## Design history + +The ngspice backend was delivered against +[Images/HostSim/docs/Implementation_Plan.md](../Images/HostSim/docs/Implementation_Plan.md). +That document is the historical design plan: the phases it describes (the +`IPlant` seam in `src/plant/plant_backend.h`, the ODE refactor, the +sharedspice loader, scenario-selected backends, live IVP telemetry) have +landed, but its status tables predate the implementation — read it for +rationale, not for current status. + +## Further reading + +- [Images/HostSim/README.md](../Images/HostSim/README.md) — base-image + architecture, emit-and-run scripts, SPWM demo, Windows live tuning +- [Images/HostSIL/README.md](../Images/HostSIL/README.md) — SIL architecture, + hardware-order ISR walkthrough, full fidelity notes +- [automation-backend.md](automation-backend.md) — full `rte sim` / CLI + contract, cache layout, MCP +- [Source/NodeGUI/README.md](../Source/NodeGUI/README.md) — RTE Studio live + attach, Runtime tab, presets +- [Images/HostSim/docs/Implementation_Plan.md](../Images/HostSim/docs/Implementation_Plan.md) + — original ngspice integration plan (historical)