Pong-in-FPGA-on-RISC-V-CPU/.gitmodules at master · Edw590/Pong-in-FPGA-on-RISC-V-CPU · GitHub

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
[submodule "submodules/UART"]
	path = submodules/UART
	url = git@github.com:IObundle/iob-uart.git
[submodule "submodules/CACHE"]
	path = submodules/CACHE
	url = git@github.com:IObundle/iob-cache.git
[submodule "submodules/PICORV32"]
	path = submodules/PICORV32
	url = git@github.com:IObundle/iob-picorv32.git
[submodule "submodules/AXI"]
	path = submodules/AXI
	url = git@github.com:IObundle/iob-axi.git
[submodule "submodules/MEM"]
	path = submodules/MEM
	url = git@github.com:IObundle/iob-mem.git
[submodule "submodules/LIB"]
	path = submodules/LIB
	url = git@github.com:IObundle/iob-lib.git
[submodule "submodules/VGA"]
	path = submodules/VGA
	url = git@github.com:Edw590/iob-vga.git
[submodule "submodules/TIMER"]
	path = submodules/TIMER
	url = git@github.com:IObundle/iob-timer.git