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Commit 6ebf089
committed
StdCellLib DRC fixes and via enclosure improvement
* Fix DRC errors:
* min tap licon enclosure
* minimum licon on poly to difftap and nsdm space
* minimum poly to difftap space
* minimum implant space after P&R
* Update via enclosure for routing to make width/height same as the
routing layers above and below. In order to compute enclosures
properly also right orientation has to be used for PinOnly layer.
* TODO: CRL.RoutingLayerGauge.PowerSupply1 parent 2d101f7 commit 6ebf089
124 files changed
Lines changed: 5230 additions & 5510 deletions
File tree
- thirdparty/open_pdk/C4M.Sky130
- libs.ref/StdCellLib
- gds
- liberty
- spice
- verilog
- vhdl
- libs.tech
- coriolis/techno/etc/coriolis2/node130/sky130
- klayout
- tech/C4M.Sky130
- drc
- lvs
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