Commit 1420f13
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feat(simd): Tier 3 — U16x32 lane type + movemask_epi8
Completes the seismon rasterizer wishlist (all 3 tiers shipped).
U16x32 (32 × u16 in one __m512i):
- splat, zero, from_slice, from_array, to_array, copy_to_slice
- Add, Sub, AddAssign operators
- from_u8x64_lo / from_u8x64_hi — widen u8→u16 (zero-extend)
- pack_saturate_u8 — narrow u16→u8 (unsigned saturation)
- shr / shl — immediate shift per 16-bit lane
- mullo — wrapping multiply, keep low 16 bits
- reduce_sum → u32
- AVX-512 native: _mm512_set1_epi16, _mm512_cvtepu8_epi16,
_mm512_packus_epi16, _mm512_srli/slli_epi16, _mm512_mullo_epi16,
_mm512_add/sub_epi16
- AVX2 + scalar: matching loop fallbacks
U8x64::movemask() → u64:
- Extract MSB of each byte as 64-bit mask
- AVX-512: _mm512_movepi8_mask (single instruction)
- Scalar: (byte & 0x80) != 0 loop
- Empty-tile skip: if movemask(row) == 0 → skip entire 64-pixel row
Tests: 12 new tier3_tests (movemask ×3, U16x32 splat/add/widen_lo/
widen_hi/pack_saturate ×2/mullo/shift_roundtrip/reduce_sum). All pass.
All three SIMD backends (simd_avx512.rs, simd_avx2.rs, simd.rs) updated.
Consumer writes crate::simd::U16x32 / crate::simd::U8x64::movemask().
https://claude.ai/code/session_01SbYsmmbPf9YQuYbHZN52Zh1 parent d4da568 commit 1420f13
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