diff --git a/ARM.CMSIS.pdsc b/ARM.CMSIS.pdsc index a31a483e6..6c5817900 100644 --- a/ARM.CMSIS.pdsc +++ b/ARM.CMSIS.pdsc @@ -479,7 +479,7 @@ - + MCI (Memory Card Interface) Driver API @@ -768,7 +768,7 @@ - + Access to #include Driver_MCI.h file and code template for custom implementation diff --git a/CMSIS/Documentation/Doxygen/Driver/Driver.dxy.in b/CMSIS/Documentation/Doxygen/Driver/Driver.dxy.in index 503833e50..b1329381a 100644 --- a/CMSIS/Documentation/Doxygen/Driver/Driver.dxy.in +++ b/CMSIS/Documentation/Doxygen/Driver/Driver.dxy.in @@ -47,7 +47,7 @@ PROJECT_NAME = "CMSIS-Driver" # could be handy for archiving the generated documentation or if some version # control system is used. -PROJECT_NUMBER = "Version 2.11.0" +PROJECT_NUMBER = "Version 2.12.0" # Using the PROJECT_BRIEF tag one can provide an optional one line description # for a project that appears at the top of each page and should give viewer a diff --git a/CMSIS/Documentation/Doxygen/Driver/src/Driver_MCI.c b/CMSIS/Documentation/Doxygen/Driver/src/Driver_MCI.c index 5a9d07e74..009c5d3e8 100644 --- a/CMSIS/Documentation/Doxygen/Driver/src/Driver_MCI.c +++ b/CMSIS/Documentation/Doxygen/Driver/src/Driver_MCI.c @@ -115,6 +115,10 @@ The following call back notification events are generated: \sa \ref ARM_MCI_SignalEvent \def ARM_MCI_EVENT_CCS_TIMEOUT \sa \ref ARM_MCI_SignalEvent +\def ARM_MCI_EVENT_RETUNING_REQUEST +\sa \ref ARM_MCI_SignalEvent +\def ARM_MCI_EVENT_TUNING_ERROR +\sa \ref ARM_MCI_SignalEvent @} *******************************************************************************************************************/ @@ -164,6 +168,37 @@ The following codes are used as values for the parameter \em control of the func \def ARM_MCI_CONTROL_READ_WAIT \def ARM_MCI_SUSPEND_TRANSFER \def ARM_MCI_RESUME_TRANSFER +\def ARM_MCI_UHS_VOLTAGE_SWITCH +@} +*******************************************************************************************************************/ + +/** +\defgroup mci_uhs_voltage_switch_ctrls MCI UHS-I Signal Voltage Switch +\ingroup mci_control_gr +\brief Host-controller phases of the SD UHS-I signal-voltage switch. +\details +@{ +\def ARM_MCI_VOLTAGE_SWITCH_PREPARE +\def ARM_MCI_VOLTAGE_SWITCH_APPLY +\def ARM_MCI_VOLTAGE_SWITCH_CLOCK_ON +\def ARM_MCI_VOLTAGE_SWITCH_VERIFY +\def ARM_MCI_VOLTAGE_SWITCH_ABORT +\def ARM_MCI_VOLTAGE_SWITCH_RESET +@} +*******************************************************************************************************************/ + +/** +\defgroup mci_uhs_tuning_ctrls MCI UHS-I Tuning +\ingroup mci_control_gr +\brief Host-controller tuning operations and results. +\details +@{ +\def ARM_MCI_UHS_TUNING_ABORT +\def ARM_MCI_UHS_TUNING_START +\def ARM_MCI_UHS_RETUNING_START +\def ARM_MCI_UHS_TUNING_DONE +\def ARM_MCI_UHS_TUNING_CONTINUE +\def ARM_MCI_UHS_TUNING_ERROR @} *******************************************************************************************************************/ @@ -182,8 +217,8 @@ as specified with \em arg listed bellow. The function \ref ARM_MCI_GetCapabilities lists the supported bus speed modes. Initially, all SD cards use a 3.3 volt electrical interface. Some SD cards can switch to 1.8 volt operation. For example, the use of ultra-high-speed (UHS) -SD cards requires 1.8 volt operation and a 4-bit bus data width. The data field \em uhs_signaling of the structure ARM_MCI_CAPABILITIES encodes -whether the driver supports 1.8 volt UHS signaling. +SD cards requires 1.8 volt operation and a 4-bit bus data width. The data field \em uhs_signaling of the structure ARM_MCI_CAPABILITIES encodes +whether the driver supports the UHS-I signal-voltage switch and the mandatory SDR12 and SDR25 baseline. \sa - \ref mci_driver_strength_ctrls @@ -613,14 +648,15 @@ Parameter \em control | Operation \ref ARM_MCI_DRIVER_STRENGTH | Set driver strength. Predefined values for \em arg are listed in the table Driver Type \ref ARM_MCI_CONTROL_RESET | Control optional RST_n Pin (eMMC). The parameter \em arg can have the values \token{[0:inactive(default); 1:active]} \ref ARM_MCI_CONTROL_CLOCK_IDLE | Control clock generation on CLK Pin when idle. The parameter \em arg can have the values \token{[0:disabled; 1:enabled]} -\ref ARM_MCI_UHS_TUNING_OPERATION | Sampling clock Tuning operation (SD UHS-I). The parameter \em arg can have the values \token{[0:reset; 1:execute]} -\ref ARM_MCI_UHS_TUNING_RESULT | Sampling clock Tuning result (SD UHS-I). Returns \token{[0:done; 1:in progress; -1:error]} +\ref ARM_MCI_UHS_TUNING_OPERATION | Start, restart, or abort host-controller sampling-clock tuning. The parameter \em arg is one of \ref ARM_MCI_UHS_TUNING_ABORT, \ref ARM_MCI_UHS_TUNING_START, or \ref ARM_MCI_UHS_RETUNING_START. +\ref ARM_MCI_UHS_TUNING_RESULT | Return \ref ARM_MCI_UHS_TUNING_DONE, \ref ARM_MCI_UHS_TUNING_CONTINUE, or \ref ARM_MCI_UHS_TUNING_ERROR after a protocol tuning-block command. \ref ARM_MCI_DATA_TIMEOUT | Set Data timeout; The parameter \em arg sets the timeout in bus cycles. \ref ARM_MCI_CSS_TIMEOUT | Set Command Completion Signal (CCS) timeout. The parameter \em arg sets timeout in bus cycles. \ref ARM_MCI_MONITOR_SDIO_INTERRUPT | Monitor SD I/O interrupt. The parameter \em arg can have the values \token{[0:disabled(default); 1:enabled]}. Monitoring is automatically disabled when an interrupt is recognized. \ref ARM_MCI_CONTROL_READ_WAIT | Control Read/Wait states for SD I/O. The parameter \em arg can have the values \token{[0:disabled(default); 1:enabled]}. \ref ARM_MCI_SUSPEND_TRANSFER | Suspend Data transfer (SD I/O). Returns the number of remaining bytes to transfer. \ref ARM_MCI_RESUME_TRANSFER | Resume Data transfer (SD I/O). +\ref ARM_MCI_UHS_VOLTAGE_SWITCH | Perform a host-controller phase of the UHS-I signal-voltage switch. The parameter \em arg is an \ref mci_uhs_voltage_switch_ctrls value. Bus Speed Mode @@ -628,7 +664,7 @@ Parameter \em control | Operation The function \ref ARM_MCI_GetCapabilities lists the supported bus speed modes. Initially, all SD cards use a 3.3 volt electrical interface. Some SD cards can switch to 1.8 volt operation. For example, the use of ultra-high-speed (UHS) SD cards requires 1.8 volt operation and a 4-bit bus data width. The bit field ARM_MCI_CAPABILITIES.uhs_signaling encodes -whether the driver supports 1.8 volt UHS signaling. +whether the driver supports the UHS-I signal-voltage switch and the mandatory SDR12 and SDR25 baseline. The \em control operation \b ARM_MCI_BUS_SPEED_MODE sets the bus speed mode using the parameter \em arg. @@ -713,13 +749,7 @@ MCIdrv->Control(ARM_MCI_CONTROL_CLOCK_IDLE, 1); // Disable Clock generation on CLK when Idle MCIdrv->Control(ARM_MCI_CONTROL_CLOCK_IDLE, 0); -// UHS Tuning -MCIdrv->Control(ARM_MCI_UHS_TUNING_OPERATION, 1); // start tuning -do { - status = MCIdrv->Control(ARM_MCI_UHS_TUNING_RESULT, 0/*argument not used*/); - if (status == -1) { break; /* tuning failed */ } -} while (status == 1); - + // Set Data Timeout to 12500000 bus cycles (0.5s @25MHz Bus Speed) // Default value is hardware specific (typically 2^32-1) MCIdrv->Control(ARM_MCI_DATA_TIMEOUT, 12500000); @@ -769,11 +799,11 @@ The parameter \em event indicates one or more events that occurred during driver Each event is encoded in a separate bit and therefore it is possible to signal multiple events within the same call. Not every event is necessarily generated by the driver. This depends on the implemented capabilities stored in the -data fields of the structure \ref ARM_NAND_CAPABILITIES, which can be retrieved with the function \ref ARM_NAND_GetCapabilities. +data fields of the structure \ref ARM_MCI_CAPABILITIES, which can be retrieved with the function \ref ARM_MCI_GetCapabilities. The following events can be generated: -Parameter \em event |Bit | Description | supported when \ref ARM_NAND_CAPABILITIES +Parameter \em event |Bit | Description | supported when \ref ARM_MCI_CAPABILITIES :------------------------------------------|---:|:----------------------------------------------------------------------|:--------------------------------------------- \ref ARM_MCI_EVENT_CARD_INSERTED | 0 | Occurs after Memory Card inserted | always supported \ref ARM_MCI_EVENT_CARD_REMOVED | 1 | Occurs after Memory Card removal | always supported @@ -785,7 +815,9 @@ Parameter \em event |Bit | Description \ref ARM_MCI_EVENT_TRANSFER_ERROR | 7 | Occurs after data transfer error (CRC failed) | always supported \ref ARM_MCI_EVENT_SDIO_INTERRUPT | 8 | Indicates SD I/O Interrupt | data field \em sdio_interrupt = \token{1} \ref ARM_MCI_EVENT_CCS | 9 | Indicates a Command Completion Signal (CCS) | data field \em ccs = \token{1} -\ref ARM_MCI_EVENT_CCS_TIMEOUT |10 | Indicates a Command Completion Signal (CCS) Timeout | data field \em css_timeout = \token{1} +\ref ARM_MCI_EVENT_CCS_TIMEOUT |10 | Indicates a Command Completion Signal (CCS) Timeout | data field \em ccs_timeout = \token{1} +\ref ARM_MCI_EVENT_RETUNING_REQUEST |11 | Requests execution of the re-tuning loop before a subsequent command | data field \em uhs_retuning = \token{1} +\ref ARM_MCI_EVENT_TUNING_ERROR |12 | Indicates tuned sampling circuit failed during normal operation | data field \em uhs_tuning = \token{1} See also: - \ref ARM_MCI_SendCommand diff --git a/CMSIS/Documentation/Doxygen/Driver/src/history.md b/CMSIS/Documentation/Doxygen/Driver/src/history.md index b43b97b72..a5fc8750c 100644 --- a/CMSIS/Documentation/Doxygen/Driver/src/history.md +++ b/CMSIS/Documentation/Doxygen/Driver/src/history.md @@ -9,6 +9,15 @@ The table below provides information about the changes delivered with specific v Version Description + + 2.12.0 + + - Updated MCI API 2.5.0: + - Enhance support for UHS-I devices + - Added phased UHS-I signal-voltage switching + - Added tuning and re-tuning operations and capabilities + + 2.11.0 diff --git a/CMSIS/Documentation/Doxygen/General/src/revision_history.md b/CMSIS/Documentation/Doxygen/General/src/revision_history.md index 435636128..734a0d380 100644 --- a/CMSIS/Documentation/Doxygen/General/src/revision_history.md +++ b/CMSIS/Documentation/Doxygen/General/src/revision_history.md @@ -15,6 +15,13 @@ Release history of other CMSIS components and tools can be found in their docume Version Description + + 6.4.0 + + - CMSIS-Driver: 2.12.0 + - Updated MCI API to 2.5.0 with UHS-I voltage switching, tuning, and re-tuning support + + 6.3.0 diff --git a/CMSIS/Driver/DriverTemplates/Driver_MCI.c b/CMSIS/Driver/DriverTemplates/Driver_MCI.c index dd73c040d..76b5f62ad 100644 --- a/CMSIS/Driver/DriverTemplates/Driver_MCI.c +++ b/CMSIS/Driver/DriverTemplates/Driver_MCI.c @@ -57,7 +57,9 @@ static const ARM_MCI_CAPABILITIES DriverCapabilities = { 0, /* rst_n */ 0, /* ccs */ 0, /* ccs_timeout */ - 0 /* Reserved */ + 0, /* reserved */ + 0, /* uhs_tuning_sdr50 */ + 0 /* uhs_retuning */ }; // diff --git a/CMSIS/Driver/Include/Driver_MCI.h b/CMSIS/Driver/Include/Driver_MCI.h index 088c48fd0..3737ce127 100644 --- a/CMSIS/Driver/Include/Driver_MCI.h +++ b/CMSIS/Driver/Include/Driver_MCI.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2020 ARM Limited. All rights reserved. + * Copyright (c) 2013-2026 Arm Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -15,13 +15,16 @@ * See the License for the specific language governing permissions and * limitations under the License. * - * $Date: 31. March 2020 - * $Revision: V2.4 + * $Date: 9. July 2026 + * $Revision: V2.5 * * Project: MCI (Memory Card Interface) Driver definitions */ /* History: + * Version 2.5 + * Added phased UHS-I signal-voltage switching + * Added tuning and re-tuning operations and capabilities * Version 2.4 * Removed volatile from ARM_MCI_STATUS * Version 2.3 @@ -71,7 +74,7 @@ extern "C" #include "Driver_Common.h" -#define ARM_MCI_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,4) /* API version */ +#define ARM_MCI_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2,5) /* API version */ #define _ARM_Driver_MCI_(n) Driver_MCI##n @@ -121,14 +124,15 @@ extern "C" #define ARM_MCI_DRIVER_STRENGTH (0x05UL) ///< Set SD UHS-I Driver Strength as specified with arg #define ARM_MCI_CONTROL_RESET (0x06UL) ///< Control optional RST_n Pin (eMMC); arg: 0=inactive, 1=active #define ARM_MCI_CONTROL_CLOCK_IDLE (0x07UL) ///< Control Clock generation on CLK Pin when idle; arg: 0=disabled, 1=enabled -#define ARM_MCI_UHS_TUNING_OPERATION (0x08UL) ///< Sampling clock Tuning operation (SD UHS-I); arg: 0=reset, 1=execute -#define ARM_MCI_UHS_TUNING_RESULT (0x09UL) ///< Sampling clock Tuning result (SD UHS-I); returns: 0=done, 1=in progress, -1=error +#define ARM_MCI_UHS_TUNING_OPERATION (0x08UL) ///< Sampling clock tuning operation (SD UHS-I); arg: ARM_MCI_UHS_TUNING_* or ARM_MCI_UHS_RETUNING_START +#define ARM_MCI_UHS_TUNING_RESULT (0x09UL) ///< Sampling clock tuning result (SD UHS-I); returns: ARM_MCI_UHS_TUNING_* #define ARM_MCI_DATA_TIMEOUT (0x0AUL) ///< Set Data timeout; arg = timeout in bus cycles #define ARM_MCI_CSS_TIMEOUT (0x0BUL) ///< Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles #define ARM_MCI_MONITOR_SDIO_INTERRUPT (0x0CUL) ///< Monitor SD I/O interrupt: arg: 0=disabled, 1=enabled #define ARM_MCI_CONTROL_READ_WAIT (0x0DUL) ///< Control Read/Wait for SD I/O; arg: 0=disabled, 1=enabled #define ARM_MCI_SUSPEND_TRANSFER (0x0EUL) ///< Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer #define ARM_MCI_RESUME_TRANSFER (0x0FUL) ///< Resume Data transfer (SD I/O) +#define ARM_MCI_UHS_VOLTAGE_SWITCH (0x10UL) ///< UHS-I signal voltage switch; arg: ARM_MCI_VOLTAGE_SWITCH_* /*----- MCI Bus Speed Mode -----*/ #define ARM_MCI_BUS_DEFAULT_SPEED (0x00UL) ///< SD/MMC: Default Speed mode up to 25/26MHz @@ -156,6 +160,24 @@ extern "C" #define ARM_MCI_DRIVER_TYPE_C (0x02UL) ///< SD UHS-I Driver Type C #define ARM_MCI_DRIVER_TYPE_D (0x03UL) ///< SD UHS-I Driver Type D +/*----- MCI UHS-I Signal Voltage Switch -----*/ +#define ARM_MCI_VOLTAGE_SWITCH_PREPARE (0x00UL) ///< Prepare or arm the host controller before CMD11 +#define ARM_MCI_VOLTAGE_SWITCH_APPLY (0x01UL) ///< Stop clock, verify DAT low, and apply 1.8 V signaling after CMD11 +#define ARM_MCI_VOLTAGE_SWITCH_CLOCK_ON (0x02UL) ///< Verify voltage selection and start or confirm SD clock after the 5 ms delay +#define ARM_MCI_VOLTAGE_SWITCH_VERIFY (0x03UL) ///< Verify DAT high after the subsequent 1 ms delay +#define ARM_MCI_VOLTAGE_SWITCH_ABORT (0x04UL) ///< Abort an incomplete switch and leave the host interface safe +#define ARM_MCI_VOLTAGE_SWITCH_RESET (0x05UL) ///< Restore host signaling state for card power-up at 3.3 V + +/*----- MCI UHS-I Tuning Operation -----*/ +#define ARM_MCI_UHS_TUNING_ABORT (0x00UL) ///< Abort/reset the tuning state machine +#define ARM_MCI_UHS_TUNING_START (0x01UL) ///< Start initial tuning +#define ARM_MCI_UHS_RETUNING_START (0x02UL) ///< Start re-tuning requested by the host controller + +/*----- MCI UHS-I Tuning Result -----*/ +#define ARM_MCI_UHS_TUNING_DONE (0) ///< Tuning completed successfully +#define ARM_MCI_UHS_TUNING_CONTINUE (1) ///< Another protocol tuning-block command is required +#define ARM_MCI_UHS_TUNING_ERROR (-1) ///< Tuning failed + /****** MCI Card Power *****/ #define ARM_MCI_POWER_VDD_Pos 0 @@ -199,6 +221,8 @@ typedef struct _ARM_MCI_STATUS { #define ARM_MCI_EVENT_SDIO_INTERRUPT (1UL << 8) ///< SD I/O Interrupt #define ARM_MCI_EVENT_CCS (1UL << 9) ///< Command Completion Signal (CCS) #define ARM_MCI_EVENT_CCS_TIMEOUT (1UL << 10) ///< Command Completion Signal (CCS) Timeout +#define ARM_MCI_EVENT_RETUNING_REQUEST (1UL << 11) ///< Driver requests re-tuning before a subsequent command +#define ARM_MCI_EVENT_TUNING_ERROR (1UL << 12) ///< Host controller detected a tuning error // Function documentation @@ -313,7 +337,7 @@ typedef struct _ARM_MCI_CAPABILITIES { uint32_t data_width_4_ddr : 1; ///< Supports 4-bit data, DDR (Dual Data Rate) - MMC only uint32_t data_width_8_ddr : 1; ///< Supports 8-bit data, DDR (Dual Data Rate) - MMC only uint32_t high_speed : 1; ///< Supports SD/MMC High Speed Mode - uint32_t uhs_signaling : 1; ///< Supports SD UHS-I (Ultra High Speed) 1.8V signaling + uint32_t uhs_signaling : 1; ///< Supports SD UHS-I 1.8 V signaling with SDR12 and SDR25 timing uint32_t uhs_tuning : 1; ///< Supports SD UHS-I tuning uint32_t uhs_sdr50 : 1; ///< Supports SD UHS-I SDR50 (Single Data Rate) up to 50MB/s uint32_t uhs_sdr104 : 1; ///< Supports SD UHS-I SDR104 (Single Data Rate) up to 104MB/s @@ -329,7 +353,9 @@ typedef struct _ARM_MCI_CAPABILITIES { uint32_t rst_n : 1; ///< Supports RST_n Pin Control (eMMC) uint32_t ccs : 1; ///< Supports Command Completion Signal (CCS) for CE-ATA uint32_t ccs_timeout : 1; ///< Supports Command Completion Signal (CCS) timeout for CE-ATA - uint32_t reserved : 3; ///< Reserved (must be zero) + uint32_t reserved : 1; ///< Reserved (must be zero) + uint32_t uhs_tuning_sdr50 : 1; ///< UHS-I SDR50 requires host-controller tuning + uint32_t uhs_retuning : 1; ///< Supports driver-managed re-tuning requests or timers } ARM_MCI_CAPABILITIES;